Direct current converter and method of controlling the same
Patent Information
- Application Number
- CN202510368707.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-25
- Publication Date
- 2026-10-09
AI Technical Summary
当直流变换器的输入电压较高,则上述直流偏置电压也就较高,需要选用额定电压较高的电容器件,才能成功隔离直流偏置电压,导致电容器件的选型困难,且成本较高
[0019]上述直流变换器和其控制方法,其中的直流变换器包括多电平变换电路、谐振电路、变压电路、整流电路和滤波电容;多电平变换电路由n个相同的子模块和一个桥臂电感串联组成;子模块包括子模块储能电容、上开关管和下开关管;多电平变换电路设置有子模块组串的一端用于与第一直流源的正极端口连接,多电平变换电路设置有桥臂电感的一端用于与第一直流源的负极端口连接;谐振电路并联在桥臂电感两端;变压电路原边的一极经过谐振电路的一条串联支路连接至子模块和桥臂电感的连接处,变压电路原边的另一极用于与第一直流源的负极端口连接;变压电路副边设置有整流电路;整流电路的直流端口与滤波电容并联。该方式中,由各个相同的子模块串联进行分压,多个相同的子模块与一个桥臂电感串联,桥臂电感两端的电压等于谐振电路的输入电压,可以支持电容器件选型的多样化需求,降低了器件选型成本,同时可以隔离直流偏置电压。
Smart Images

Figure CN122890882A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics technology, and in particular to a DC converter and its control method. Background Technology
[0002] DC-DC converters are used to convert DC power to voltage. Multilevel resonant converters include a resonant circuit and a level-shifting circuit. The bridge arm of the level-shifting circuit has a DC bias voltage, which needs to be isolated using capacitors from the resonant circuit. When the input voltage of the DC-DC converter is high, the aforementioned DC bias voltage is also high, requiring the selection of capacitors with higher rated voltages to successfully isolate the DC bias voltage. This makes capacitor selection difficult and increases costs. Summary of the Invention
[0003] In view of this, the purpose of this application is to provide a DC-DC converter and its control method to support the diverse needs of capacitor selection, reduce the cost of device selection, and isolate DC bias voltage.
[0004] In a first aspect, embodiments of this application provide a DC-DC converter, comprising: a multi-level conversion circuit, a resonant circuit, a transformer circuit, a rectifier circuit, and a filter capacitor; the multi-level conversion circuit consists of n identical sub-modules connected in series with a bridge arm inductor; each sub-module includes a sub-module energy storage capacitor, an upper switch transistor, and a lower switch transistor; one end of the multi-level conversion circuit with the sub-modules connected in series is used to connect to the positive port of a first DC source, and one end of the multi-level conversion circuit with the bridge arm inductor is used to connect to the negative port of the first DC source; the resonant circuit is connected in parallel across the bridge arm inductor; one pole of the primary side of the transformer circuit is connected to the connection point between the sub-modules and the bridge arm inductor via a series branch of the resonant circuit, and the other pole of the primary side of the transformer circuit is used to connect to the negative port of the first DC source; the secondary side of the transformer circuit includes a rectifier circuit; the DC port of the rectifier circuit is connected in parallel with the filter capacitor.
[0005] In the above multilevel converter circuit, n identical sub-modules are used to perform voltage division processing on the input DC power; the power devices in the sub-modules are used for power conversion to realize the positive and negative changes of the output power.
[0006] The above submodules are either half-bridge submodules or full-bridge submodules.
[0007] The aforementioned half-bridge submodule includes a submodule energy storage capacitor, an upper switching transistor S1, and a lower switching transistor S2; the source and drain of the upper switching transistor are connected; the negative terminal of the submodule energy storage capacitor is connected to the source of the lower switching transistor; the positive terminal of the submodule energy storage capacitor is connected to the drain of the upper switching transistor; the upper and lower switching transistors are connected in series and then in parallel with the submodule energy storage capacitor; a first port is provided between the source and drain of the upper switching transistor, and a second port is provided between the negative terminal of the submodule energy storage capacitor and the source of the lower switching transistor; or, a first port is provided between the positive terminal of the submodule energy storage capacitor and the drain of the upper switching transistor, and a second port is provided between the source and drain of the upper switching transistor; each half-bridge submodule is connected in series through the first and second ports, and n identical half-bridge submodules are connected in series and then connected to the bridge arm inductor to form a multi-level conversion circuit.
[0008] The aforementioned full-bridge submodule includes a submodule energy storage capacitor, a first bridge arm upper switch S3, a first bridge arm lower switch S4, a second bridge arm upper switch S5, and a second bridge arm lower switch S6. The branch formed by the series connection of the first bridge arm upper switch and the first bridge arm lower switch, and the branch formed by the series connection of the second bridge arm upper switch and the second bridge arm lower switch, are all connected in parallel with the submodule energy storage capacitor. A first port is provided between the first bridge arm upper switch and the first bridge arm lower switch, and a second port is provided between the second bridge arm upper switch and the second bridge arm lower switch. Each full-bridge submodule is connected in series through the first port and the second port. n identical full-bridge submodules are connected in series and then connected to the bridge arm inductor to form a multi-level conversion circuit.
[0009] The resonant circuit described above is of the type LLC resonant circuit, or CLLC resonant circuit, or L resonant circuit, or LC resonant circuit.
[0010] The aforementioned transformer circuit includes m sub-transformer circuits; wherein, the primary windings of the m sub-transformer circuits are connected in series to form the primary side of the transformer circuit, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary side of the transformer circuit; or, the individual windings of the primary side of the m sub-transformer circuits are connected in series to form the primary side of the transformer circuit, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary side of the transformer circuit.
[0011] The above rectifier circuit is a full-bridge rectifier circuit; each secondary winding of the transformer circuit corresponds one-to-one with the AC port of the full-bridge rectifier circuit.
[0012] The switching transistors of the above sub-modules and the rectifier circuits are all fully controllable power semiconductor devices.
[0013] Secondly, embodiments of this application provide a control method for a DC-DC converter. The method includes: detecting the power transmission direction of the DC-DC converter; comparing the current value collected from the DC output side with a preset command value and then controlling it through a closed-loop PI regulator to obtain the phase shift angle of the DC output side, so as to control the power magnitude and transmission direction; and performing voltage balance control on the energy storage capacitor of each sub-module in the multi-level converter circuit based on a capacitor voltage balance algorithm, generating a quasi-two-level drive signal to control the multi-level converter circuit, and generating a drive signal to control the rectifier circuit, so as to stabilize the output voltage of the DC-DC converter.
[0014] The steps for voltage balance control of the energy storage capacitor of each sub-module in the multi-level conversion circuit based on the capacitor voltage balance algorithm include: detecting the current capacitor voltage of the energy storage capacitor of each sub-module, and the voltage difference between the current capacitor voltage and the historical capacitor voltage at a specified time; sorting multiple sub-modules in descending order of voltage difference to obtain a first order; sorting multiple sub-modules in ascending order of current capacitor voltage to obtain a second order; and for each sub-module in the first order, inputting the drive signal of the sub-module at the first order to the sub-module at the same order in the second order.
[0015] The steps described above for generating quasi-two-level drive signals to control the multilevel conversion circuit include: inputting a first drive signal into the multilevel conversion circuit of the DC-DC converter to control the lower switch of the sub-module in the multilevel conversion circuit to be turned on and the upper switch to be turned off; inputting a second drive signal into the multilevel conversion circuit of the DC-DC converter to control the upper switch of the sub-module in the multilevel conversion circuit to be turned on and the lower switch to be turned off; wherein the duty cycle of the second drive signal is 0.5, and the second drive signal and the first drive signal are complementary; adjusting the signal phase of the drive signal input to each sub-module to obtain a quasi-two-level drive signal, so that the signal phases corresponding to at least some sub-modules have a specified phase difference; wherein the drive signal of the sub-module includes: the first drive signal and / or the second drive signal.
[0016] The above-mentioned steps of comparing the current value collected from the DC output side with the preset command value and then controlling it through the closed loop of the PI regulator include: when the difference between the collected current value and the preset command current value is greater than a specified threshold, the resonant circuit generates current waveforms with different components through the closed loop control of the PI regulator, thereby outputting voltages with different gains.
[0017] The resonant circuit described above transforms the voltage across the inductor of the bridge arm, making the current waveform sinusoidal to reduce the current stress on the switching transistor; it also realizes the phase difference between the voltage waveform and the current waveform, thereby achieving soft switching.
[0018] When the first DC power input to the multilevel converter circuit is detected, and the power transmission direction changes from the multilevel converter circuit to the rectifier circuit, the first current on the DC output side is collected; based on the first current and a preset first command current, the first phase shift angle of the rectifier circuit's drive signal is determined; and the rectifier circuit's drive signal is generated based on the first phase shift angle. When the second DC power input to the rectifier circuit is detected, and the power transmission direction changes from the rectifier circuit to the multilevel converter circuit, the second current on the DC output side is collected; based on the second current and a preset second command current, the second phase shift angle of the quasi-two-level drive signal of the multilevel converter circuit is determined; and the quasi-two-level drive signal of the multilevel converter circuit is generated based on the second phase shift angle.
[0019] The aforementioned DC-DC converter and its control method include a multi-level converter circuit, a resonant circuit, a transformer circuit, a rectifier circuit, and a filter capacitor. The multi-level converter circuit consists of n identical sub-modules connected in series with a bridge arm inductor. Each sub-module includes a sub-module energy storage capacitor, an upper switch, and a lower switch. One end of the multi-level converter circuit with the sub-modules in series is connected to the positive port of the first DC source, and one end of the multi-level converter circuit with the bridge arm inductor is connected to the negative port of the first DC source. The resonant circuit is connected in parallel across the bridge arm inductor. One pole of the primary side of the transformer circuit is connected to the connection point between the sub-modules and the bridge arm inductor via a series branch of the resonant circuit, and the other pole of the primary side of the transformer circuit is connected to the negative port of the first DC source. A rectifier circuit is provided on the secondary side of the transformer circuit. The DC port of the rectifier circuit is connected in parallel with the filter capacitor. In this method, the voltage is divided by connecting the same sub-modules in series. Multiple identical sub-modules are connected in series with a bridge arm inductor. The voltage across the bridge arm inductor is equal to the input voltage of the resonant circuit. This method can support diverse requirements for capacitor selection, reduce component selection costs, and isolate DC bias voltage.
[0020] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0021] To more clearly illustrate the specific embodiments of this application or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0022] Figure 1 This is a schematic diagram of the topology of a DC-DC converter provided in related technologies;
[0023] Figure 2This is a schematic diagram of another DC-DC converter topology provided in related technologies;
[0024] Figure 3 This is a schematic diagram of the structure of a DC-DC converter provided in an embodiment of this application;
[0025] Figure 4 This is a topology diagram of a submodule provided in an embodiment of this application;
[0026] Figure 5 A schematic diagram of the topology of a resonant circuit provided in an embodiment of this application;
[0027] Figure 6 A topology diagram of a combination of transformer circuit and rectifier circuit provided for an embodiment of this application;
[0028] Figure 7 This is a schematic diagram of the topology of a DC-DC converter provided in an embodiment of this application;
[0029] Figure 8 A waveform diagram of a simulation verification result provided in an embodiment of this application;
[0030] Figure 9 A flowchart illustrating a control method for a DC-DC converter provided in this application embodiment;
[0031] Figure 10 A waveform diagram of quasi-two-level modulation provided in an embodiment of this application;
[0032] Figure 11 This is a schematic diagram of the control logic of a DC-DC converter provided in an embodiment of this application. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0034] DC-DC converters are used to convert DC power to voltage. Multilevel resonant converters include resonant circuits and level conversion circuits. Currently, modular multilevel converters (MMCs) can be applied to DC-DC converters.
[0035] In one approach, such as Figure 1For example, a medium-voltage DC-DC converter is achieved by combining a half-bridge resonant circuit and a modular multilevel converter circuit. However, it has medium and high voltage bus capacitors, and the balance of capacitor voltage needs to be considered. In addition, in order to prevent the bus capacitors and the capacitors of the sub-modules in the MMC from being connected in parallel, inductors Lu and Lp need to be added to the bridge arm, which affects the inductance parameters in the resonant circuit. Therefore, the design of the bridge arm inductors Lu and Lp needs to consider not only DC ripple but also the resonant circuit.
[0036] In summary, this approach introduces a large number of capacitors and inductors, making the design relatively complex.
[0037] In another way, such as Figure 2 For example, by placing the inductor at the input, there is no problem with bridge arm inductance. However, the bridge arm in this method has a DC bias voltage, which needs to be isolated by using capacitors in the resonant circuit.
[0038] If the input voltage of the DC-DC converter is high, the aforementioned DC bias voltage will also be high. In this case, capacitors with higher rated voltages are required to successfully isolate the DC bias voltage, which makes capacitor selection difficult and increases costs.
[0039] Based on this, the DC converter and its control method provided in this application embodiment can be applied to DC converters to realize DC power conversion.
[0040] To facilitate understanding of this embodiment, a DC-DC converter disclosed in this application will first be described in detail, such as... Figure 3 As shown, the DC-DC converter includes: a multi-level conversion circuit 31, a resonant circuit 32, a transformer circuit 33, a rectifier circuit 34, and a filter capacitor;
[0041] The multilevel converter circuit 31 consists of n identical sub-modules connected in series with a bridge arm inductor; the sub-modules include a sub-module energy storage capacitor, an upper switch transistor, and a lower switch transistor; one end of the multilevel converter circuit 31 with the sub-modules connected in series is used to connect to the positive port of the first DC source, and one end of the multilevel converter circuit 31 with the bridge arm inductor is used to connect to the negative port of the first DC source; the resonant circuit 32 is connected in parallel across the bridge arm inductor.
[0042] In the multi-level conversion circuit 31, the first DC power input from the first DC source is divided by n identical sub-modules, such as... Figure 3 The submodules are SM1 to SMn. This submodule can be a half-bridge structure or a full-bridge structure; the number of submodules can be set according to the input DC voltage level. If the input DC voltage level is higher, then the number of submodules is more; if the input DC voltage level is lower, then the number of submodules is less.
[0043] The aforementioned n identical sub-modules are connected in series and then connected in series with a bridge arm inductor. The resonant circuit 32 is connected in parallel across the bridge arm inductor. In one embodiment, a first DC power is input from a first DC source. After the first DC power passes through the n identical sub-modules, the voltage across the bridge arm inductor is input to the resonant circuit 32. That is, the voltage across the bridge arm inductor is equal to the input voltage of the resonant circuit 32. Since there is no DC bias voltage across the bridge arm inductor, the input voltage of the resonant circuit 32 has no DC bias voltage, which can isolate the DC bias voltage.
[0044] The resonant circuit 32 can be of various types, such as LLC resonant circuit, CLLC resonant circuit, L resonant circuit, and LC resonant circuit. The resonant circuit 32 reduces the current stress on the switching transistor by making the current waveform sinusoidal, and also creates a phase difference between the voltage and current, thereby achieving soft switching and reducing device losses. As an impedance network, the resonant circuit 32 can generate current waveforms with different components for voltages at different switching frequencies, thus outputting voltages with different gains.
[0045] One pole of the primary side of transformer circuit 33 is connected to the connection point of submodule and bridge arm inductor through a series branch of resonant circuit 32. The other pole of the primary side of transformer circuit 33 is used to connect to the negative terminal of the first DC source. A rectifier circuit 34 is provided on the secondary side of transformer circuit 33. The DC port of rectifier circuit 34 is connected in parallel with filter capacitor.
[0046] Specifically, the transformer circuit 33 typically includes multiple sub-transformer circuits, the number of which is usually related to the number of rectifier circuits 34. The primary winding of the transformer circuit 33 adopts a multi-winding, single-winding series connection, or a hybrid configuration of multiple windings and single-winding series connection. The secondary winding of the transformer circuit 33 adopts a configuration where each secondary winding is connected in parallel with the AC port of one rectifier circuit 34 to meet the requirements of low voltage and high current. The rectifier circuit 34 adopts a full-bridge structure and is typically a fully controlled device to meet the requirements of bidirectional power transmission. Filter capacitors are connected in parallel across the DC ports of the rectifier circuit 34.
[0047] The aforementioned DC-DC converter includes a multilevel conversion circuit, a resonant circuit, a transformer circuit, a rectifier circuit, and a filter capacitor. The multilevel conversion circuit consists of n identical sub-modules connected in series with a bridge arm inductor. Each sub-module includes a sub-module energy storage capacitor, an upper switch, and a lower switch. One end of the multilevel conversion circuit with the sub-modules in series is connected to the positive port of the first DC source, and one end of the multilevel conversion circuit with the bridge arm inductor is connected to the negative port of the first DC source. The resonant circuit is connected in parallel across the bridge arm inductor. One pole of the primary side of the transformer circuit is connected to the connection point between the sub-modules and the bridge arm inductor via a series branch of the resonant circuit, and the other pole of the primary side of the transformer circuit is connected to the negative port of the first DC source. A rectifier circuit is provided on the secondary side of the transformer circuit. The DC port of the rectifier circuit is connected in parallel with the filter capacitor. In this method, the voltage is divided by connecting the same sub-modules in series. Multiple identical sub-modules are connected in series with a bridge arm inductor. The voltage across the bridge arm inductor is equal to the input voltage of the resonant circuit. This supports the diverse needs of capacitor selection, reduces the cost of component selection, and can isolate DC bias voltage.
[0048] In this embodiment, based on the four parts of the multi-level conversion circuit 31—sub-module, resonant circuit 32, transformer circuit 33, and rectifier circuit 34—and the connection relationship between each part, one or more of the parts can be transformed into different types of topologies to form DC-DC converters with different topologies.
[0049] In the multilevel conversion circuit 31 described above, n identical sub-modules are used to perform voltage division processing on the input DC power; the power devices in the sub-modules are used for power conversion to realize positive and negative changes in the output power.
[0050] Specifically, the above submodule is a half-bridge submodule or a full-bridge submodule; the nth submodule includes a first port, a second port, a submodule energy storage capacitor, and two power devices, an upper switch and a lower switch. The power devices can be insulated bipolar transistors or metal-oxide-semiconductor field-effect transistors.
[0051] In one embodiment, the aforementioned half-bridge submodule includes a submodule energy storage capacitor, an upper switch S1, and a lower switch S2; the source of the upper switch and the drain of the lower switch are connected; the negative terminal of the submodule energy storage capacitor is connected to the source of the lower switch; the positive terminal of the submodule energy storage capacitor is connected to the drain of the upper switch; the upper switch S1 and the lower switch S2 are connected in series and then in parallel with the submodule energy storage capacitor.
[0052] Optionally, the half-bridge submodule adopts as follows: Figure 4 In the topology shown in (a), a first port is provided between the source of the upper switch S1 and the drain of the lower switch S2, and a second port is provided between the negative terminal of the energy storage capacitor of the submodule and the source of the lower switch S2; or, the half-bridge submodule adopts the following... Figure 4In the topology shown in (b), a first port is provided between the positive terminal of the energy storage capacitor of the submodule and the drain of the upper switch S1, and a second port is provided between the source of the upper switch S1 and the drain of the lower switch S2.
[0053] Each half-bridge submodule is connected in series through the first port and the second port. After n identical half-bridge submodules are connected in series, they are connected to the bridge arm inductor to form a multi-level conversion circuit 31.
[0054] In actual implementation, among the n identical half-bridge submodules connected in series, the first port of the first half-bridge submodule is connected to the positive port of the first DC source; the second port of the (k-1)th half-bridge submodule is connected to the first port of the kth half-bridge submodule, where 2≤k≤n; the second port of the nth half-bridge submodule is connected to the bridge arm inductor. It can be understood that when the upper switch S1 is on and the lower switch S2 is off, or when the upper switch S1 is off and the lower switch S2 is on, for example... Figure 4 The two topologies shown in (a) and (b) have different voltage levels across the inductors of the bridge arms.
[0055] In one approach, such as Figure 4 In the topology shown in (c), the full-bridge submodule includes a submodule energy storage capacitor, a first bridge arm upper switch S3, a first bridge arm lower switch S4, a second bridge arm upper switch S5, and a second bridge arm lower switch S6; the branch formed by the series connection of the first bridge arm upper switch S3 and the first bridge arm lower switch S4, and the branch formed by the series connection of the second bridge arm upper switch S5 and the second bridge arm lower switch S6 are all connected in parallel with the submodule energy storage capacitor; a first port is provided between the first bridge arm upper switch S3 and the first bridge arm lower switch S4, and a second port is provided between the second bridge arm upper switch S5 and the second bridge arm lower switch S6; each full-bridge submodule is connected in series through the first port and the second port, and n identical full-bridge submodules are connected in series and then connected to the bridge arm inductor to form a multi-level conversion circuit 31.
[0056] In actual implementation, among the n identical full-bridge submodules connected in series, the first port of the first full-bridge submodule is connected to the positive port of the first DC source; the second port of the (k-1)th full-bridge submodule is connected to the first port of the kth full-bridge submodule, where 2≤k≤n; the second port of the nth full-bridge submodule is connected to the bridge arm inductor.
[0057] The resonant circuit 32 described above is of the type LLC resonant circuit, or CLLC resonant circuit, or L resonant circuit, or LC resonant circuit.
[0058] In one embodiment, the resonant circuit 32 is located on the primary side of the transformer circuit 33, and can be used as follows: Figure 5In the LLC resonant circuit shown in (a), the first resonant capacitor Cr and the first leakage inductance Lr form a first series branch, which is then connected in series with the primary side of the transformer circuit 33, and the first magnetizing inductance Lm is connected in parallel with the primary side of the transformer circuit 33; or, as shown in Figure .... Figure 5 In the L resonant circuit shown in (b), the first leakage inductance Lr is connected in series with the primary side of the transformer circuit 33; or, as shown in Figure (b), the first leakage inductance Lr is connected in series with the primary side of the transformer circuit 33. Figure 5 In the LC resonant circuit shown in (c), the first resonant capacitor Cr and the first leakage inductance Lr form a first series branch and are connected in series with the primary side of the transformer circuit 33.
[0059] In another embodiment, the resonant circuit 32 is arranged on both the primary and secondary sides of the transformer circuit 33, using, for example... Figure 5 In the CLLC resonant circuit shown in (d), the first resonant capacitor Cr and the first leakage inductance Lr form a first series branch and are connected in series with the primary side of the transformer circuit 33, and the second resonant capacitor Cr2 and the second leakage inductance Lr2 form a second series branch and are connected in series with the secondary side of the transformer circuit 33.
[0060] The aforementioned transformer circuit 33 includes m sub-transformer circuits. The primary windings of the m sub-transformer circuits are connected in series to form the primary winding of transformer circuit 33, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary winding of transformer circuit 33; as shown... Figure 6 As shown in (a), the primary windings of the transformer circuit are connected in series to form multiple windings, which serve as the primary windings of transformer circuit 33. The m secondary windings are connected in parallel after passing through the rectifier circuit, which serve as the secondary windings of transformer circuit 33.
[0061] Alternatively, the single windings of the primary sides of the m sub-transformer circuits are connected in series to form the primary side of transformer circuit 33, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary side of transformer circuit 33. For example... Figure 6 As shown in (b), the individual windings of the primary side of the transformer circuit are connected in series to form the primary side of transformer circuit 33, and the m secondary windings are connected in parallel after passing through the rectifier circuit to form the secondary side of transformer circuit 33.
[0062] The aforementioned rectifier circuit 34 is a full-bridge rectifier circuit. Specifically, each secondary winding of the transformer circuit 33 corresponds one-to-one with the AC port of the full-bridge rectifier circuit.
[0063] like Figure 6As shown in Figure (a), the full-bridge rectifier circuit includes four switching transistors: Q1, Q2, Q3, and Q4. Each secondary winding of the transformer circuit 33 corresponds one-to-one with the AC port of the full-bridge rectifier circuit. One pole of each secondary winding is connected to the midpoint of the bridge arm formed by the first switching transistor Q1 and the second switching transistor Q2, and the other pole is connected to the midpoint of the bridge arm formed by the third switching transistor Q3 and the fourth switching transistor Q4. One pole of the DC port of the full-bridge rectifier circuit is connected to the positive port of the second DC source, and the other pole is connected to the negative port of the second DC source.
[0064] The switching transistors of the above sub-modules and the switching transistors of the rectifier circuit 34 are all fully controllable power semiconductor devices.
[0065] Fully controllable devices, also known as self-turn-off devices, can be controlled to turn on or off by a drive signal, such as gate turn-off thyristors, electric field-effect transistors, and insulated gate bipolar transistors. The switching transistors in the sub-module and rectifier circuit 34 are fully controllable power semiconductor devices, which can be controlled to turn on or off by a drive signal, and are not easily damaged when using high voltage and high current.
[0066] In practical applications, this embodiment can achieve voltage conversion, specifically voltage conversion between medium-high voltage and low voltage, or voltage conversion between low voltages; no limitation is made here. In a specific embodiment, the first DC source is a medium-high voltage DC bus, and the second DC source is a low voltage DC bus, such as... Figure 7 A schematic diagram of a DC-DC converter topology is shown below. Figure 7 Provide a detailed description:
[0067] exist Figure 7 In the DC-DC converter shown, the multilevel conversion circuit consists of n identical half-bridge sub-modules (SM1 to SMn) connected in series and then connected in series with a bridge arm inductor Lf. Each half-bridge sub-module includes a sub-module energy storage capacitor Cn, an upper switch S1, and a lower switch S2. The resonant circuit is an LLC resonant circuit, the turns ratio of the primary and secondary sides of the transformer circuit is N:1, the rectifier circuit is a full-bridge rectifier circuit, and the filter capacitor C... o It is connected in parallel across the DC port of the rectifier circuit.
[0068] Figure 7 In the first state, assuming the first DC power and drive signal are input from the medium-voltage DC bus, the lower switch S2 of the half-bridge submodule is turned on, and the upper switch S1 is turned off. According to the Kirchhoff voltage law (KVL), we can obtain:
[0069] Vin = VLf
[0070] Where VLf represents the voltage across the bridge arm inductor; the above formula indicates that the voltage across the bridge arm inductor in the DC-DC converter is the same as the voltage value of the first DC power.
[0071] In the second state, the upper switch S1 of the half-bridge submodule is turned on, and the lower switch S2 is turned off. This is equivalent to the energy storage capacitors of each submodule in the multi-level converter circuit being connected in series with the bridge arm inductor Lf. Assuming the voltages of the energy storage capacitors of each submodule are equal, we can obtain:
[0072] Vin=nVc+VLf
[0073] Where n represents the number of energy storage capacitors in the submodule, and Vc represents the voltage of one energy storage capacitor in the submodule.
[0074] Assuming the duty cycle of the drive signal controlling the conduction of switch S2 is D, then the duty cycle of the drive signal controlling the conduction of switch S1 is 1-D, obtained from the volt-second balance:
[0075] D*Vin+(1-D)*(Vin-nVc)=0
[0076] Solving for nVc, we get nVc = Vin / (1-D). When the duty cycle D is 0.5, the sum of the voltages of the energy storage capacitors of each sub-module in the multilevel converter circuit is twice the voltage value of the first DC energy. Therefore, in the first two states, the bridge arm inductor generates the voltages of the first DC energy at high and low potentials, respectively, which are the input voltages of the resonant circuit.
[0077] for Figure 7 The DC-DC converter shown is simulated and verified, and the results are as follows: Figure 8 The main waveforms shown; among them, Figure 8 (a) shows the current waveform when the current flows through the submodule string and is not shunted; Figure 8 (b) shows the voltage waveform across the bridge arm inductor Lf. Since there is no DC bias voltage across the bridge arm inductor, the input voltage of the resonant circuit has no DC bias voltage. Figure 8 (c) shows the current waveform when current flows through the bridge arm inductor Lf; Figure 8 In the middle (d), the current waveform is the current flowing through the first leakage inductance Lr in the resonant circuit.
[0078] Furthermore, this embodiment is also applicable to reverse operation, where the main waveforms are the same, meaning that the DC-DC converter has bidirectional operation capability.
[0079] This application also provides a control method for a DC-DC converter, such as... Figure 9 As shown, this method can be executed by the control components of a DC-DC converter, and includes the following steps:
[0080] Step S901: Detect the power transmission direction of the DC converter, compare the current value collected on the DC output side with the preset command value, and then obtain the phase shift angle of the DC output side through closed-loop control of the PI regulator to control the power magnitude and transmission direction.
[0081] Specifically, the system acquires power from either the first or second DC source. After acquiring the DC power input from either the first or second DC source, it detects the power transmission direction of the DC-DC converter, for example, from the multi-level converter circuit to the rectifier circuit, or from the rectifier circuit to the multi-level converter circuit. Then, it compares the current value acquired from the DC output side with a preset command value for the current. Through closed-loop control of the PI regulator, it keeps the drive signal on the DC input side constant, causing the drive signal on the DC output side to have a phase shift relative to the drive signal on the DC input side. Furthermore, when the acquired current value is lower than the preset command value, the gain of the resonant circuit is increased; when the acquired current value exceeds the preset command value, the gain of the resonant circuit is decreased, so that the acquired current value reaches the preset command value, thereby controlling the power magnitude and transmission direction.
[0082] Step S902: Based on the capacitor voltage balancing algorithm, voltage balancing control is performed on the energy storage capacitor of each sub-module in the multi-level conversion circuit to generate a quasi-two-level drive signal to control the multi-level conversion circuit and a drive signal to control the rectifier circuit, so as to stabilize the output voltage of the DC converter.
[0083] First, based on the magnitude of the DC power input to the DC converter, the number of drive signals input to the DC converter is set, and a duty cycle is introduced to achieve soft switching. By detecting the current capacitor voltage of the energy storage capacitor in each submodule and calculating the voltage difference between the current capacitor voltage and the historical capacitor voltage over a preset time interval, the current capacitor voltage and voltage difference are sorted according to preset rules, and drive signals are redistributed to each submodule, thereby achieving voltage equalization of the energy storage capacitors in the submodules. For two adjacent submodules, quasi-two-level modulation can be used to control the switching transistor of the k-th submodule and the (k-1)-th submodule. There is a conduction delay time between the switching transistors of the module, 2≤k≤n, which enables the generation of a quasi-two-level drive signal in the form of a stepped square wave, thereby reducing the difficulty of insulation design in the transformer circuit. After obtaining the phase shift angle through the closed-loop control of the PI regulator, a drive signal for controlling the rectifier circuit is generated by lagging the phase shift angle of the quasi-two-level drive signal in phase, so that the power transmission direction is from the multi-level converter circuit to the rectifier circuit. Alternatively, a drive signal for controlling the rectifier circuit is generated by leading the phase shift angle of the quasi-two-level drive signal in phase, so that the power transmission direction is from the rectifier circuit to the multi-level converter circuit.
[0084] The aforementioned control method for the DC-DC converter detects the power transmission direction of the DC-DC converter. After comparing the current value collected from the DC output side with a preset command value, it undergoes closed-loop control via a PI regulator to obtain the phase shift angle of the DC output side, thereby controlling the power magnitude and transmission direction. Based on a capacitor voltage balancing algorithm, voltage balancing control is performed on the energy storage capacitors of each sub-module in the multi-level converter circuit. This generates quasi-two-level drive signals to control the multi-level converter circuit and drive signals to control the rectifier circuit, thus stabilizing the DC-DC converter's output voltage. In this method, closed-loop control is performed after collecting the current from the DC output side, while voltage balancing control is applied to the energy storage capacitors of each sub-module, achieving bidirectional power transmission and obtaining a stable output voltage.
[0085] In one implementation, the current capacitor voltage of the energy storage capacitor of each submodule is detected, as well as the voltage difference between the current capacitor voltage and the historical capacitor voltage at a specified time; multiple submodules are sorted in descending order of voltage difference to obtain a first order; multiple submodules are sorted in ascending order of current capacitor voltage to obtain a second order; for each submodule in the first order, the drive signal of the submodule in the first order is input to the submodule in the same order in the second order.
[0086] Specifically, the current capacitor voltage of the energy storage capacitor in each submodule is detected, and the voltage difference between the current capacitor voltage and the historical capacitor voltage at a specified time is calculated. This specified time is typically a historical time with a preset time interval from the current time. Then, multiple submodules are sorted in descending order of voltage difference to obtain a first order; simultaneously, multiple submodules are sorted in ascending order of current capacitor voltage to obtain a second order. Based on the first and second orders, the drive signal of the submodule at the first position in the first order is input to the corresponding first position in the second order, and so on, the drive signal of each submodule at each position in the first order is input to the submodule at the same position in the second order.
[0087] In one implementation, a first drive signal is input to the multilevel conversion circuit in the DC-DC converter to control the lower switch of a submodule in the multilevel conversion circuit to turn on and the upper switch to turn off; a second drive signal is input to the multilevel conversion circuit in the DC-DC converter to control the upper switch of a submodule in the multilevel conversion circuit to turn on and the lower switch to turn off; wherein the duty cycle of the second drive signal is 0.5, and the second drive signal and the first drive signal are complementary; the signal phase of the drive signal input to each submodule is adjusted to obtain a quasi-two-level drive signal, so that the signal phases corresponding to at least some submodules have a specified phase difference; wherein the drive signal of the submodule includes: the first drive signal and / or the second drive signal.
[0088] by Figure 3 Taking the DC-DC converter shown as an example, a first drive signal is input from the first DC source to the multilevel conversion circuit in the DC-DC converter, controlling the lower switch S2 of the half-bridge submodule to turn on and the upper switch S1 to turn off. This first drive signal can continuously cycle in multiple switching cycles to form a working cycle, and the duty cycle of the first drive signal in each switching cycle is 0.5. A second drive signal is input from the first DC source to the multilevel conversion circuit in the DC-DC converter, controlling the lower switch S2 of the half-bridge submodule to turn on and the upper switch S1 to turn off. This second drive signal is complementary to the first drive signal, and both the second drive signal and the first drive signal can be PWM signals with a duty cycle of 0.5.
[0089] After achieving voltage balance of the energy storage capacitors in the submodules, the signal phase of the drive signal input to each submodule is adjusted to obtain a quasi-two-level drive signal. This drive signal for the submodule can be either the first drive signal or the second drive signal, or both. In practical applications, quasi-two-level modulation is used to control a conduction delay time (2≤k≤n) between the switching transistors of the k-th submodule and the (k-1)-th submodule, generating a quasi-two-level drive signal in the form of a stepped square wave, such as... Figure 10 In the diagram, g1, g2, g3, and g4 are PWM signals with a duty cycle of 0.5 for one switching cycle, and Dt is the specified phase difference.
[0090] In one implementation, when the difference between the acquired current value and the preset command current value is greater than a specified threshold, the resonant circuit generates current waveforms with different components through closed-loop control of the PI regulator, thereby outputting voltages with different gains.
[0091] Specifically, after acquiring the current value of the DC output current, it is compared with the preset command current value. Through the closed-loop control of the PI regulator, the phase shift angle can be obtained. If the difference between the acquired current value and the preset command current value is greater than a specified threshold, the gain of the resonant circuit is reduced, the current waveform generated by the resonant circuit is changed, and the operating frequency of the DC converter is increased through closed-loop control.
[0092] Furthermore, the resonant circuit transforms the voltage across the bridge arm inductor, causing the current waveform to exhibit a sinusoidal transformation to reduce the current stress on the switching transistor; it also achieves a phase difference between the voltage waveform and the current waveform, thereby realizing soft switching.
[0093] In actual implementation, after the voltage across the inductor of the bridge arm is input to the resonant circuit, the capacitor in the resonant circuit can buffer the electric field energy, causing the voltage waveform to lag behind the current waveform; the inductor in the resonant circuit can buffer the electromagnetic energy, causing the current waveform to lag behind the voltage waveform, thus making the current waveform sinusoidal, reducing the current stress on the switching transistor. At the same time, it can realize the phase difference between the voltage waveform and the current waveform, thereby achieving soft switching.
[0094] In one implementation, when the input of the first DC power to the multilevel converter circuit is detected and the power transmission direction is from the multilevel converter circuit to the rectifier circuit, the first current on the DC output side is collected; based on the first current and the preset first command current, the first phase shift angle of the drive signal of the rectifier circuit is determined; and the drive signal of the rectifier circuit is generated based on the first phase shift angle.
[0095] The first command current is typically the current value that the first current needs to be converted to.
[0096] like Figure 3 In the example, if the first DC power is input from the first DC source, then when the first DC power is detected to be input to the multilevel converter circuit and the power transmission direction is from the multilevel converter circuit to the rectifier circuit, the first current output from the second DC source is collected; then the first current is compared with the preset first command current, and the first phase shift angle of the rectifier circuit drive signal is obtained through closed-loop control. The rectifier circuit drive signal is generated according to the first phase shift angle. For example, the quasi-two-level drive signal of the multilevel converter circuit is kept fixed, and the rectifier circuit drive signal with the first phase shift angle is generated that lags behind the multilevel converter circuit quasi-two-level drive signal.
[0097] The driving signal of the rectifier circuit is made to generate a first phase shift angle relative to the quasi-two-level driving signal of the multi-level converter circuit.
[0098] When the second DC power input to the rectifier circuit is detected, and the power transmission direction is from the rectifier circuit to the multilevel converter circuit, the second current on the DC output side is collected; based on the second current and the preset second command current, the second phase shift angle of the quasi-two-level drive signal of the multilevel converter circuit is determined; based on the second phase shift angle, the quasi-two-level drive signal of the multilevel converter circuit is generated.
[0099] The second command current is typically the current value that the second current needs to be converted to.
[0100] like Figure 3In the example, if a second DC power is input from a second DC source, then when the second DC power is detected to be input to the rectifier circuit and the power transmission direction is from the rectifier circuit to the multilevel converter circuit, the second current output from the first DC source is collected; then the second current is compared with a preset second command current, and the second phase shift angle of the quasi-two-level drive signal is obtained through closed-loop control. The quasi-two-level drive signal of the multilevel converter circuit is generated based on the second phase shift angle. For example, the drive signal of the rectifier circuit is kept constant, and the quasi-two-level drive signal of the multilevel converter circuit that lags behind the drive signal of the rectifier circuit is generated as the second phase shift angle.
[0101] In a specific embodiment, such as Figure 11 The diagram shows a control logic schematic of a DC-DC converter, which will be described in detail below.
[0102] Step S110: Determine whether power is transferred from the first DC source side to the second DC source side. If yes, proceed to step S111; otherwise, proceed to step S113.
[0103] Step S111: Acquire the first current output from the second DC source;
[0104] Step S112, closed-loop control; specifically, the first current and the preset first command current are compared, and then the first phase shift angle is obtained through closed-loop control. Then proceed to the next step S116.
[0105] Step S113: Determine whether power is being transferred from the second DC source side to the first DC source side. If yes, proceed to step S114; otherwise, end the process.
[0106] Step S114: Acquire the second current output from the first DC source;
[0107] Step S115, closed-loop control; specifically, the second current and the preset second command current are compared, and then the second phase shift angle is obtained through closed-loop control. Then proceed to the next step S116.
[0108] Step S116, capacitor voltage equalization; specifically, the voltage balance control of the energy storage capacitor of each sub-module in the multi-level conversion circuit is performed by a capacitor voltage balancing algorithm.
[0109] Step S117, Quasi-two-level modulation; specifically, adjusting the signal phase of the drive signal input to each sub-module in the multi-level conversion circuit to obtain a quasi-two-level drive signal;
[0110] Step S118: Redistribute the drive signals; specifically, adjust the signal phase of the drive signals input to each submodule to obtain quasi-two-level drive signals; then, according to the power transmission direction, control the drive signal of the rectifier circuit to generate a first phase shift angle relative to the quasi-two-level drive signal of the multilevel converter circuit, or control the quasi-two-level drive signal of the multilevel converter circuit to generate a second phase shift angle relative to the drive signal of the rectifier circuit; finally, redistribute the drive signals for the multilevel converter circuit and the rectifier circuit.
[0111] The topology in this embodiment combines quasi-two-level modulation and capacitor balancing algorithm, which reduces the insulation requirements of the transformer and balances the voltage of the energy storage capacitor of the submodule by exchanging the drive signals of the submodule corresponding to the energy storage capacitor of the submodule.
[0112] This embodiment achieves a resonant circuit without DC bias voltage, reduces the selection requirements for capacitors in the resonant circuit, and provides more possibilities for capacitor selection when using medium to high voltage input.
[0113] The DC-DC converter and its control method computer program product provided in this application embodiment includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementation, please refer to the method embodiments, which will not be repeated here.
[0114] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0115] Furthermore, in the description of the embodiments of this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0116] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0117] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0118] Finally, it should be noted that the above embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.
Claims
1. A DC-DC converter, characterized in that, It includes a multi-level conversion circuit, a resonant circuit, a transformer circuit, a rectifier circuit, and a filter capacitor; The multilevel conversion circuit consists of n identical sub-modules connected in series with a bridge arm inductor; each sub-module includes a sub-module energy storage capacitor, an upper switch transistor, and a lower switch transistor; one end of the multilevel conversion circuit with the sub-modules connected in series is used to connect to the positive port of the first DC source, and one end of the multilevel conversion circuit with the bridge arm inductor is used to connect to the negative port of the first DC source; the resonant circuit is connected in parallel across the bridge arm inductor. One pole of the primary side of the transformer circuit is connected to the connection point of the submodule and the bridge arm inductor through a series branch of the resonant circuit, and the other pole of the primary side of the transformer circuit is used to connect to the negative port of the first DC source; the secondary side of the transformer circuit is provided with the rectifier circuit; the DC port of the rectifier circuit is connected in parallel with the filter capacitor.
2. The DC-DC converter according to claim 1, characterized in that, The multi-level conversion circuit has n identical sub-modules used to perform voltage division processing on the input DC power; the power devices in the sub-modules are used for power conversion to realize positive and negative changes in the output power.
3. The DC-DC converter according to claim 1, characterized in that, The submodule is either a half-bridge submodule or a full-bridge submodule.
4. The DC-DC converter according to claim 3, characterized in that, The half-bridge submodule includes a submodule energy storage capacitor, an upper switch S1, and a lower switch S2; the source of the upper switch and the drain of the lower switch are connected; the negative terminal of the submodule energy storage capacitor is connected to the source of the lower switch; the positive terminal of the submodule energy storage capacitor is connected to the drain of the upper switch; the upper and lower switches are connected in series and then in parallel with the submodule energy storage capacitor. A first port is provided between the source of the upper switch and the drain of the lower switch, and a second port is provided between the negative terminal of the submodule energy storage capacitor and the source of the lower switch; or, a first port is provided between the positive terminal of the submodule energy storage capacitor and the drain of the upper switch, and a second port is provided between the source of the upper switch and the drain of the lower switch. Each half-bridge submodule is connected in series through the first port and the second port. After n identical half-bridge submodules are connected in series, they are connected to the bridge arm inductor to form a multi-level conversion circuit.
5. The DC-DC converter according to claim 3, characterized in that, The full-bridge submodule includes a submodule energy storage capacitor, a first bridge arm upper switch S3, a first bridge arm lower switch S4, a second bridge arm upper switch S5, and a second bridge arm lower switch S6; the branch formed by the series connection of the first bridge arm upper switch and the first bridge arm lower switch, and the branch formed by the series connection of the second bridge arm upper switch and the second bridge arm lower switch are all connected in parallel with the submodule energy storage capacitor. A first port is provided between the upper switch tube of the first bridge arm and the lower switch tube of the first bridge arm, and a second port is provided between the upper switch tube of the second bridge arm and the lower switch tube of the second bridge arm. Each of the full-bridge submodules is connected in series through the first port and the second port. After n identical full-bridge submodules are connected in series, they are connected to the bridge arm inductor to form a multi-level conversion circuit.
6. The DC-DC converter according to claim 1, characterized in that, The type of resonant circuit is LLC resonant circuit, CLLC resonant circuit, L resonant circuit, or LC resonant circuit.
7. The DC-DC converter according to claim 1, characterized in that, The transformer circuit includes m sub-transformer circuits; wherein, the primary windings of the m sub-transformer circuits are connected in series to form the primary side of the transformer circuit, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary side of the transformer circuit. Alternatively, the primary windings of the m sub-transformer circuits are connected in series to form the primary side of the transformer circuit, and the secondary windings of the m sub-transformer circuits are connected in parallel after passing through a rectifier circuit to form the secondary side of the transformer circuit.
8. The DC-DC converter according to claim 1, characterized in that, The rectifier circuit is a full-bridge rectifier circuit; each secondary winding of the transformer circuit corresponds one-to-one with the AC port of the full-bridge rectifier circuit.
9. The DC-DC converter according to claim 1, characterized in that, The switching transistors of the submodule and the rectifier circuit are both fully controllable power semiconductor devices.
10. A control method for a DC-DC converter, characterized in that, The method includes: The power transmission direction of the DC-DC converter is detected. The current value collected on the DC output side is compared with the preset command value and then controlled by the closed loop of the PI regulator to obtain the phase shift angle of the DC output side, so as to control the power magnitude and transmission direction. Based on the capacitor voltage balancing algorithm, voltage balancing control is performed on the energy storage capacitor of each sub-module in the multi-level converter circuit to generate a quasi-two-level drive signal to control the multi-level converter circuit and a drive signal to control the rectifier circuit, so as to stabilize the output voltage of the DC converter.
11. The control method for a DC-DC converter according to claim 10, characterized in that, The steps for voltage balance control of the energy storage capacitor in each sub-module of the multi-level converter circuit based on the capacitor voltage balance algorithm include: The current capacitor voltage of the energy storage capacitor of each submodule is detected, as well as the voltage difference between the current capacitor voltage and the historical capacitor voltage at a specified time. The sub-modules are sorted in descending order of voltage difference to obtain a first order; The sub-modules are sorted in ascending order of their current capacitor voltages to obtain a second order; For each submodule at a sequential position in the first sequence, the drive signal of the submodule at that sequential position is input to the submodule at the same sequential position in the second sequence.
12. The control method for a DC-DC converter according to claim 10, characterized in that, The steps for generating quasi-two-level drive signals to control a multilevel conversion circuit include: A first drive signal is input to the multilevel conversion circuit in the DC-DC converter to control the lower switch of the submodule in the multilevel conversion circuit to be turned on and the upper switch to be turned off. A second drive signal is input to the multilevel conversion circuit in the DC-DC converter to control the upper switch of the submodule in the multilevel conversion circuit to be turned on and the lower switch to be turned off; wherein, the duty cycle of the second drive signal is 0.5, and the second drive signal and the first drive signal are complementary; The signal phase of the drive signal input to each of the sub-modules is adjusted to obtain a quasi-two-level drive signal, so that the signal phase corresponding to at least some of the sub-modules has a specified phase difference; wherein, the drive signal of the sub-module includes: the first drive signal and / or the second drive signal.
13. The control method for a DC-DC converter according to claim 10, characterized in that, The process of comparing the current value acquired from the DC output side with the preset command value and then implementing closed-loop control via a PI regulator includes: When the difference between the acquired current value and the preset command current value is greater than the specified threshold, the resonant circuit generates current waveforms with different components through the closed-loop control of the PI regulator, thereby outputting voltages with different gains.
14. The control method for a DC-DC converter according to claim 13, characterized in that, The resonant circuit transforms the voltage across the bridge arm inductor, making the current waveform sinusoidal to reduce the current stress on the switching transistor. Achieving a phase difference between voltage and current waveforms enables soft switching.
15. The control method for a DC-DC converter according to claim 10, characterized in that, When the multilevel converter circuit detects that the input of the first DC power is from the multilevel converter circuit to the rectifier circuit, and the power transmission direction is from the multilevel converter circuit to the rectifier circuit, the first current on the DC output side is collected; based on the first current and the preset first command current, the first phase shift angle of the drive signal of the rectifier circuit is determined. The drive signal for the rectifier circuit is generated based on the first phase shift angle; When the second DC power is detected to be input into the rectifier circuit and the power transmission direction is from the rectifier circuit to the multilevel converter circuit, the second current on the DC output side is collected. Based on the second current and the preset second command current, the second phase shift angle of the quasi-two-level drive signal of the multi-level conversion circuit is determined; The quasi-two-level drive signal of the multi-level conversion circuit is generated based on the second phase shift angle.