Modulation method and device for dual active bridge converter

Abstract

Embodiments of the present application provide a modulation method and device of a dual active bridge converter, wherein the modulation method comprises: obtaining an input voltage, an output voltage and an output current of the dual active bridge converter; determining a voltage gain according to the input voltage and the output voltage, and determining a power instruction according to the output voltage and the output current; determining a target modulation mode in a triangular waveform mode, a trapezoidal waveform mode and a phase-shifted waveform mode according to the voltage gain and the power instruction; determining a switching time set of a primary H-bridge and a secondary H-bridge in a current switching period according to an analytical formula of a switching time corresponding to the target modulation mode; determining a pulse width modulation comparison value according to the switching time set, and driving a switch tube in the primary H-bridge and the secondary H-bridge. Through the scheme of the present application, transient direct current bias at the time of modulation mode switching is eliminated from the root cause, and the system reliability and dynamic response speed are significantly improved.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and more specifically, to a modulation method and apparatus for a dual active bridge converter. Background Technology

[0002] With the large-scale application of dual active bridge (DAB) converters in energy storage systems, electric vehicle charging, and DC microgrids, their operational stability under wide voltage range and frequent operating condition switching, as the core power conversion unit, directly determines the energy efficiency and lifespan of the entire system.

[0003] However, DAB modulation strategies in related technologies typically rely solely on traditional phase-shift control logic to achieve power transfer. Their control dimensions are relatively simple, failing to consider the zero-state of the inductor current at the switching cycle boundary as a constraint. When the system switches modulation modes or encounters sudden load changes, the residual current in the cycle can easily form an inherent DC bias in the second half of the cycle. This can lead to serious operational risks such as high-frequency transformer core saturation, surges in switching current stress, and dynamic response hysteresis, failing to meet the stringent operational requirements of high power density and high reliability scenarios. Summary of the Invention

[0004] The purpose of this invention is to provide a modulation method and apparatus for a dual active bridge converter, which can solve the problems of DC bias and magnetic saturation hazards caused by non-zero period boundary current during modulation mode switching.

[0005] In view of this, an embodiment of the first aspect of the present invention provides a modulation method for a dual active bridge converter.

[0006] A second aspect of the present invention provides a modulation apparatus for a dual active bridge converter.

[0007] To achieve the above objectives, an embodiment of the first aspect of the present invention provides a modulation method for a dual active bridge converter, executed by a controller of the dual active bridge converter. The dual active bridge converter includes a primary H-bridge, a secondary H-bridge, and an auxiliary inductor connected between the primary and secondary H-bridges. The primary H-bridge is connected to the DC input side, and the secondary H-bridge is connected to the DC output side. The modulation method includes: acquiring the input voltage, output voltage, and output current of the dual active bridge converter; determining a voltage gain based on the input voltage and output voltage; determining a power command based on the output voltage and output current; determining a target modulation mode among a triangular waveform mode, a trapezoidal waveform mode, and a phase-shifting waveform mode based on the voltage gain and power command; determining the set of switching times of the primary and secondary H-bridges within the current switching cycle based on the switching time analysis formula corresponding to the target modulation mode; determining a pulse width modulation comparison value based on the set of switching times; and writing the pulse width modulation comparison value into a pulse width modulation comparison register to drive the switching transistors in the primary and secondary H-bridges.

[0008] Among them, the triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary and secondary H-bridges are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary and secondary H-bridges within half a switching cycle is determined by the phase shift angle between the bridges.

[0009] Furthermore, in the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

[0010] This invention discloses a modulation method for a dual active bridge converter, used in a dual active bridge topology including a primary-side H-bridge, a secondary-side H-bridge and an auxiliary inductor, wherein the primary-side H-bridge is connected to the DC input side and the secondary-side H-bridge is connected to the DC output side.

[0011] The method first acquires the input voltage, output voltage, and output current, and calculates the voltage gain and power command. Then, based on the voltage gain and power command, a target modulation mode is selected from three modes: triangular waveform, trapezoidal waveform, and phase-shifting waveform. These three modes correspond to non-overlapping, partially overlapping, and fixed duty cycle phase-shifting operation characteristics of the primary and secondary conduction periods, respectively. The switching time analysis formula corresponding to the target mode is called to calculate the set of switching times of the primary and secondary H-bridges within the current switching cycle. This set is converted into pulse width modulation comparison values ​​and written to the controller register to drive the corresponding switching transistors. In all modes, the auxiliary inductor current is forcibly constrained to be zero at the beginning and end of the switching cycle.

[0012] Understandably, this invention embeds zero-current boundary constraints into the waveform construction process, eliminating transient DC bias during modulation mode switching from the root cause, avoiding transformer saturation and overcurrent risks of switching transistors, and adapting to wide voltage gain and wide load range in three modes, while taking into account the operating efficiency under all operating conditions.

[0013] Furthermore, analytical calculations do not require iteration or table lookups, allowing for direct deployment on low-cost hardware. They also support zero-voltage cold starts, significantly improving system reliability and dynamic response speed.

[0014] In some technical solutions, optionally, a target modulation mode is determined among a triangular waveform mode, a trapezoidal waveform mode, and a phase-shifting waveform mode based on the voltage gain and power command. This includes: determining a first power boundary for the triangular waveform mode and a second power boundary for the trapezoidal waveform mode based on the voltage gain; determining the triangular waveform mode as the target modulation mode when the power command is less than the first power boundary; determining the trapezoidal waveform mode as the target modulation mode when the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary; and determining the phase-shifting waveform mode as the target modulation mode when the power command is greater than the second power boundary.

[0015] In this scheme, intelligent partitioning management of modulation modes is achieved through a pre-stored power boundary lookup table.

[0016] Understandably, discretizing the continuous voltage and power plane into three distinct operating ranges transforms mode selection into a deterministic operation based on table lookup and numerical comparison, ensuring the rigor and efficiency of the control logic.

[0017] In some technical solutions, optionally, in the triangular waveform mode, half a switching cycle includes, sequentially, a primary-side turn-on phase, a secondary-side turn-on phase, and a zero-voltage phase where both primary and secondary sides are off. During the primary-side turn-on phase, the primary-side H-bridge outputs a positive input voltage, the secondary-side H-bridge does not output an effective bridge voltage, and the inductor current of the auxiliary inductor rises from zero. During the secondary-side turn-on phase, the primary-side H-bridge does not output an effective bridge voltage, the secondary-side H-bridge outputs the output voltage referred to the primary side, and the inductor current of the auxiliary inductor drops to zero. During the zero-voltage phase, both the upper and lower transistors of the primary and secondary H-bridges are in a turn-off state, and the inductor current of the auxiliary inductor remains zero until the end of half a switching cycle. The analytical formula for the switching timing includes:

[0018] ;

[0019] Where D1 is the primary side duty cycle, D2 is the secondary side duty cycle, and M is the voltage gain;

[0020] The controller determines the primary duty cycle based on the power command, input voltage, inductance value of the auxiliary inductor, and switching frequency, and determines the set of switching times based on the primary and secondary duty cycles.

[0021] In this scheme, based on a two-stage topology where the primary and secondary sides are independently conducting, and relying on the volt-second balance constraint under zero current boundary, the mapping relationship between the secondary duty cycle and the primary duty cycle is derived. The controller combines the power command, input voltage, auxiliary inductance value, and switching frequency parameters to obtain the primary duty cycle value, and then converts it into the set of switching times for the current switching cycle, achieving precise timing control in triangular mode.

[0022] Understandably, relying on volt-second balance constraints ensures that the inductor current at the cycle boundary is zero from the source, completely eliminating the risks of transformer magnetic saturation and switch overcurrent caused by DC bias. The duty cycle is calculated analytically, requiring no iterative optimization or offline table lookup, resulting in low computational load and compatibility with low-cost control hardware.

[0023] In some technical solutions, optionally, when the output voltage is zero, the controller configures the switching transistor of the secondary H-bridge to the off state and controls the output pulse voltage of the primary H-bridge, so that the inductor current of the auxiliary inductor freewheels through the anti-parallel diode of the secondary H-bridge to precharge the output capacitor on the DC output side.

[0024] In this scheme, for the cold start condition where the output voltage is zero, the controller first samples the output voltage to determine the zero-voltage state, and then forces all switches of the secondary H-bridge to turn off, leaving only the anti-parallel diode as a freewheeling path. Based on the preset start-up power command, combined with the input voltage, auxiliary inductance value, and switching frequency, the controller analyzes the primary duty cycle and controls the output pulse voltage of the primary H-bridge, so that the auxiliary inductor current freewheels through the secondary anti-parallel diode, completing the pre-charging of the DC output capacitor, and maintaining the constraint that the inductor current is zero at the boundary of the switching cycle throughout the process.

[0025] Understandably, there is no need to add an extra pre-charge circuit. Zero-voltage start-up can be achieved by relying on existing topology devices, avoiding overcurrent surges caused by mis-conduction of the secondary-side switch during the cold start process.

[0026] In some technical solutions, optionally, in the trapezoidal waveform mode, half a switching cycle includes, sequentially, a primary-side independent conduction phase corresponding to the first time parameter, a primary-secondary side overlapping conduction phase corresponding to the first time parameter to the second time parameter, a secondary-side independent conduction phase corresponding to the second time parameter to the third time parameter, and a zero-current phase corresponding to the third time parameter to the end of half a switching cycle. During the primary-side independent conduction phase, the inductor current of the auxiliary inductor rises from zero. During the primary-secondary side overlapping conduction phase, the auxiliary inductor bears the voltage difference between the input voltage and the output voltage referred to the primary side. During the secondary-side independent conduction phase, the inductor current of the auxiliary inductor drops to zero. During the zero-current phase, neither the primary-side H-bridge nor the secondary-side H-bridge outputs an effective bridge voltage, and the inductor current of the auxiliary inductor remains zero. The controller determines the first, second, and third time parameters based on the zero-current boundary constraint equation and the power command, and determines the set of switching times based on the first, second, and third time parameters.

[0027] Among them, the zero-current boundary constraint equation characterizes the sum of the magnetization volt-second product of the auxiliary inductor during the primary-side-only conduction stage and the primary-side-overlapping conduction stage, which is equal to the demagnetization volt-second product during the secondary-side-only conduction stage.

[0028] In this scheme, the half-cycle four-segment operation logic of the trapezoidal waveform mode is limited. Based on the zero current boundary constraint, the magnetization volt-second product of the primary side conducting alone and the primary and secondary sides conducting overlappingly is bound with the demagnetization volt-second product of the secondary side conducting alone. A system of two equations is constructed by combining power commands, and the first time parameter, the second time parameter and the third time parameter are obtained by analysis. The corresponding set of switching times is then generated to adapt to the medium power operation condition.

[0029] Understandably, reserving a safety margin during the zero-current phase offsets sampling and calculation errors, preventing DC bias caused by inductor residual current. The overlapping conduction phase between the primary and secondary sides enables direct power transfer, significantly reducing return current losses and improving operating efficiency in the mid-power region.

[0030] In some technical solutions, optionally, in the phase-shifted waveform mode, both the primary-side H-bridge and the secondary-side H-bridge output bridge arm voltages with a 50% duty cycle; the controller determines the inter-bridge phase shift angle based on the combined analytical results of the zero-current boundary constraint and the power command; when the discriminant in the analytical expression of the inter-bridge phase shift angle is less than zero, the controller determines that the power command exceeds the transmission power range of the phase-shifted waveform mode under the zero-current boundary constraint, and generates a mode switching command to switch to the trapezoidal waveform mode, or generates a frequency adjustment command to adjust the switching frequency; when the discriminant in the analytical expression of the inter-bridge phase shift angle is greater than or equal to zero, the controller determines the set of switching times based on the inter-bridge phase shift angle.

[0031] In this scheme, the control logic for the phase-shifted waveform mode is determined by deriving the analytical expression for the phase shift angle between bridges based on the zero-current boundary constraint and power command. The feasibility of the operating condition is judged by calculating the discriminant value. When the discriminant is non-negative, the phase shift angle is obtained analytically and a set of switching times is generated; when the discriminant is negative, it is determined that the maximum transmission power exceeds the zero-current constraint, and the switch to the trapezoidal waveform mode or the switching frequency is reduced to adapt to the requirements of heavy-load operating conditions.

[0032] Understandably, zero-current constraint is used as a pre-verification condition for phase-shifting mode to avoid DC bias caused by disrupting the zero-current characteristic at the cycle boundary during over-power operation. Automatic switching or frequency conversion mechanisms require no manual intervention, balancing transmission efficiency under full-load conditions with wide power adaptability, reducing the controller's computational load, and forming a complete modulation system covering all operating conditions with triangular waveform mode and trapezoidal waveform mode, thereby improving system reliability.

[0033] In some technical solutions, optionally, the controller updates the pulse width modulation comparison register at the moment when the inductor current of the auxiliary inductor crosses zero, and sets the hysteresis power width according to the difference between the power command and the first power boundary or the second power boundary, so as to suppress the target modulation mode from switching back and forth near the power boundary.

[0034] In this scheme, the controller updates the pulse width modulation comparator register through the shadow register when the inductor current crosses zero, ensuring strict synchronization with the zero current boundary. Simultaneously, the hysteresis power width is set based on the difference between the power command and the first and second power boundaries, constructing a bidirectional hysteresis interval to prevent the power command from triggering repeated switching of the target modulation mode when it fluctuates slightly near the boundaries.

[0035] Understandably, updating the register at the zero-crossing moment avoids switching shocks caused by drive signal glitches, ensuring that the zero-current boundary constraint is not affected by switching interference, and reducing DC bias risk at its source. The hysteresis width design breaks the positive feedback of boundary oscillations, reduces the additional switching losses caused by frequent mode switching, and the adjustable width characteristic can adapt to different scenarios with high dynamic response or high stability operation, significantly improving the reliability and durability of the system under all operating conditions.

[0036] A second aspect of the present invention provides a modulation device for a dual active bridge converter, comprising: a data acquisition module for acquiring input voltage, output voltage, and output current; an instruction determination module for determining voltage gain based on input voltage and output voltage, and determining power instruction based on output voltage and output current; a mode determination module for determining a target modulation mode among triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode based on voltage gain and power instruction; a timing determination module for determining the set of switching times of the primary-side H-bridge and the secondary-side H-bridge within the current switching cycle based on the switching time analysis formula corresponding to the target modulation mode; and a drive generation module for determining a pulse width modulation comparison value based on the set of switching times, and writing the pulse width modulation comparison value into a pulse width modulation comparison register to drive the switching transistors in the primary-side H-bridge and the secondary-side H-bridge.

[0037] Among them, the triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary and secondary H-bridges are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary and secondary H-bridges within half a switching cycle is determined by the phase shift angle between the bridges.

[0038] Furthermore, in the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

[0039] In some technical solutions, optionally, the mode determination module is also used to: determine the first power boundary of the triangular waveform mode and the second power boundary of the trapezoidal waveform mode based on the voltage gain; when the power command is less than the first power boundary, determine the triangular waveform mode as the target modulation mode; when the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary, determine the trapezoidal waveform mode as the target modulation mode; when the power command is greater than the second power boundary, determine the phase-shifting waveform mode as the target modulation mode.

[0040] In some technical solutions, optionally, the drive generation module is also used to: update the pulse width modulation comparison register at the zero-crossing moment of the inductor current of the auxiliary inductor, and set the hysteresis power width according to the difference between the power command and the first power boundary or the second power boundary, so as to suppress the target modulation mode from switching back and forth near the power boundary.

[0041] Additional aspects and advantages of the technical solutions of the present invention will become apparent in the following description or may be learned by practice of the invention. Attached Figure Description

[0042] Figure 1 One of the schematic flowcharts of the modulation method of the dual active bridge converter according to this application is shown;

[0043] Figure 2 A second schematic flowchart of the modulation method for the dual active bridge converter according to this application is shown;

[0044] Figure 3 A schematic block diagram of the modulation device of the dual active bridge converter according to this application is shown;

[0045] Figure 4 The main circuit topology of the DAB converter according to this application is shown;

[0046] Figure 5 Key waveform diagrams of the triangular waveform pattern according to this application are shown;

[0047] Figure 6 Key waveform diagrams of the trapezoidal waveform pattern according to this application are shown;

[0048] Figure 7 Key waveform diagrams of the phase-shifting waveform mode according to this application are shown;

[0049] Figure 8 A schematic diagram of the mode boundary logic according to this application is shown;

[0050] Figure 9 A schematic diagram of the inductor current waveform is shown when the mode is switched according to this application.

[0051] Among them, 900: modulation device of dual active bridge converter; 902: data acquisition module; 904: instruction determination module; 906: mode determination module; 908: timing determination module; 910: drive generation module;

[0052] 1000: Dual active bridge converter; 1002: Primary H-bridge; 1004: Secondary H-bridge; 1006: Auxiliary inductor. Detailed Implementation

[0053] To better understand the above-described objectives, features, and advantages of the embodiments of the present invention, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0054] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, embodiments of the invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of this application is not limited to the specific embodiments disclosed below.

[0055] Dual active bridge converters feature bidirectional power transfer, electrical isolation, and high power density, and are widely used in energy storage systems, electric vehicle charging, solid-state transformers, and DC microgrids.

[0056] To cover a wide voltage and load range, DAB converters need to switch between different modulation modes (such as SPS, EPS, DPS, TPS). When a modulation mode or modulation parameter switch occurs, the inductor current at the end of the previous switching cycle is usually not zero. The magnetic field energy stored in the inductor remains in the next cycle, causing the next cycle to start with a non-zero initial current, generating a transient DC bias current. This DC bias can cause:

[0057] (a) The magnetic core of a high-frequency transformer tends to saturate, increasing iron losses and even damaging components;

[0058] (b) The current stress of the switching transistor exceeds the safety margin;

[0059] (c) Output voltage fluctuates;

[0060] (d) It takes multiple switching cycles to recover to a steady state, resulting in a slow dynamic response.

[0061] The root cause of DC bias lies in the fact that traditional modulation strategies do not use the zeroing of inductor current at the cycle boundary as a constraint during design. The initial / final value of the inductor current is a passive result of the modulation parameters being selected, rather than an active design variable. Once the modulation parameters change, the final value of the previous cycle will not be zero, thus generating bias current.

[0062] In relevant DC bias suppression schemes:

[0063] 1. Gradual parameter transition: A relatively long transition time (tens to hundreds of switching cycles) is set to allow the modulation parameters to gradually change from the previous mode to the next mode. The disadvantages are long transition time, slow dynamic response, and inability to cope with rapid response conditions such as sudden load changes.

[0064] 2. Bias detection and compensation: The DC bias current is detected by a current sensor, and a compensation term is added to offset the bias. The disadvantages are that an additional current sensor or bias observer is required, the compensation has a delay of several switching cycles, and the compensation formula needs to be tuned separately for different modulation modes.

[0065] 3. Each of the four bridge arms uses an independent carrier, and a uniform d-value is calculated within a single carrier frame to offset all PWM comparator registers, causing the inductor current to return to zero at the cycle boundary. The limitations are: (a) reliance on a specific four-carrier synchronization frame; (b) use of a uniform d-value offset formula, failing to distinguish structural differences in different current waveform patterns; (c) the d-value calculation formula relies on a non-zero output voltage, making it unable to handle startup conditions where the output voltage is zero; and (d) the current waveform retains the shape of the original modulation strategy, without waveform-level redesign for zero-current boundary conditions.

[0066] The modulation method and apparatus for the dual active bridge converter provided in this application will be described in detail below with reference to specific embodiments and application scenarios.

[0067] This embodiment provides a modulation method for a dual active bridge converter, executed by the converter's controller. The dual active bridge converter includes a primary-side H-bridge, a secondary-side H-bridge, and an auxiliary inductor connected between the primary and secondary H-bridges. The primary-side H-bridge is connected to the DC input side, and the secondary-side H-bridge is connected to the DC output side. Figure 1 As shown, the modulation method includes:

[0068] Step S100: Obtain the input voltage, output voltage, and output current of the dual active bridge converter;

[0069] Step S102: Determine the voltage gain based on the input voltage and output voltage, and determine the power command based on the output voltage and output current;

[0070] Step S104: Determine the target modulation mode from the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode according to the voltage gain and power command;

[0071] Step S106: Determine the set of switching times of the primary H-bridge and secondary H-bridge within the current switching cycle according to the analytical formula for the switching time corresponding to the target modulation mode;

[0072] Step S108: Determine the pulse width modulation comparison value according to the set of switch switching times, and write the pulse width modulation comparison value into the pulse width modulation comparison register to drive the switching transistors in the primary H-bridge and the secondary H-bridge;

[0073] Among them, the triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary and secondary H-bridges are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary and secondary H-bridges within half a switching cycle is determined by the phase shift angle between the bridges.

[0074] Furthermore, in the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

[0075] This invention discloses a modulation method for a dual active bridge converter, used in a dual active bridge topology including a primary-side H-bridge, a secondary-side H-bridge and an auxiliary inductor, wherein the primary-side H-bridge is connected to the DC input side and the secondary-side H-bridge is connected to the DC output side.

[0076] The method first acquires the input voltage, output voltage, and output current, and calculates the voltage gain and power command. Then, based on the voltage gain and power command, a target modulation mode is selected from three modes: triangular waveform, trapezoidal waveform, and phase-shifting waveform. These three modes correspond to non-overlapping, partially overlapping, and fixed duty cycle phase-shifting operation characteristics of the primary and secondary conduction periods, respectively. The switching time analysis formula corresponding to the target mode is called to calculate the set of switching times of the primary and secondary H-bridges within the current switching cycle. This set is converted into pulse width modulation comparison values ​​and written to the controller register to drive the corresponding switching transistors. In all modes, the auxiliary inductor current is forcibly constrained to be zero at the beginning and end of the switching cycle.

[0077] Understandably, this invention embeds zero-current boundary constraints into the waveform construction process, eliminating transient DC bias during modulation mode switching from the root cause, avoiding transformer saturation and overcurrent risks of switching transistors, and adapting to wide voltage gain and wide load range in three modes, while taking into account the operating efficiency under all operating conditions.

[0078] Furthermore, analytical calculations do not require iteration or table lookups, allowing for direct deployment on low-cost hardware. They also support zero-voltage cold starts, significantly improving system reliability and dynamic response speed.

[0079] like Figure 4 As shown, the dual active bridge converter 1000 includes a primary-side H-bridge 1002, an auxiliary inductor 1006, and a secondary-side H-bridge 1004. The primary-side H-bridge 1002 consists of a full-bridge topology composed of four controllable switches (S1, S2, S3, and S4), with its input terminal connected to the DC input side, which is either an energy storage battery or the preceding DC bus. Similarly, the secondary-side H-bridge 1004 consists of a full-bridge topology composed of four controllable switches (Q1, Q2, Q3, and Q4), with its output terminal connected to the DC output side, which is either the load to be powered or the subsequent DC bus.

[0080] The auxiliary inductor 1006 includes the leakage inductance of the high-frequency transformer itself and the external series filter inductor, and is connected between the AC side of the primary H-bridge 1002 and the secondary H-bridge 1004. The controller is a digital signal processing chip with built-in analog-to-digital conversion module, pulse width modulation module and non-volatile memory, which executes the entire modulation process.

[0081] The controller acquires the input voltage analog signal through the voltage sensor on the primary side DC bus, the output voltage analog signal through the voltage sensor on the secondary side DC bus, and the output current analog signal through the Hall current sensor in the secondary circuit. The sampling time is fixed at the moment when the inductor current crosses zero at the beginning of the switching cycle to avoid switching noise interfering with the sampling accuracy.

[0082] The acquired analog signal is converted into a 16-bit digital value by an analog-to-digital converter module, and then filtered by a moving average filter with a length of eight sampling points to obtain the filtered digital values ​​of input voltage, output voltage, and output current.

[0083] The controller reads the transformer turns ratio parameters pre-stored in the non-volatile memory. The transformer turns ratio is the ratio of the number of turns in the primary winding to the number of turns in the secondary winding of the high-frequency transformer. It is calibrated by open-circuit test before leaving the factory. The controller multiplies the digital output voltage by the transformer turns ratio to obtain the digital equivalent voltage of the secondary output voltage referred to the primary side.

[0084] Divide the equivalent voltage digital value by the input voltage digital value to obtain the voltage gain value. The voltage gain is a dimensionless intermediate calculation parameter.

[0085] The controller reads the output voltage reference value pre-stored in the non-volatile memory. The output voltage reference value is the target voltage value set by the user according to the load requirements. The controller calculates the difference between the output voltage reference value and the currently sampled digital output voltage value. The difference is then processed by the proportional-integral regulator to obtain the output current reference value.

[0086] The controller calculates the difference between the output current reference value and the digital value of the currently sampled output current. The difference is then multiplied by the power calculation module to obtain the instantaneous power by multiplying the output current by the output voltage. After a moving average filtering process over one switching cycle, the digital value of the power command is obtained. The power command is the target value of the active power that the converter needs to output.

[0087] The controller pre-stores a power boundary lookup table for triangular waveform mode and a power boundary lookup table for trapezoidal waveform mode. The two lookup tables are derived theoretically and, after pre-calculation, are burned into non-volatile memory.

[0088] The power boundary lookup table for the triangular waveform mode records the maximum transmission power value of the triangular waveform mode under different voltage gains, and the power boundary lookup table for the trapezoidal waveform mode records the maximum transmission power value of the trapezoidal waveform mode under different voltage gains. The controller retrieves the two corresponding maximum transmission power values ​​from the lookup table based on the currently calculated voltage gain.

[0089] The power command is compared with the two maximum transmission power values. If the power command is less than the maximum transmission power value of the triangular waveform mode, the triangular waveform mode is selected as the target modulation mode. If the power command is greater than or equal to the maximum transmission power value of the triangular waveform mode and less than or equal to the maximum transmission power value of the trapezoidal waveform mode, the trapezoidal waveform mode is selected as the target modulation mode. If the power command is greater than the maximum transmission power value of the trapezoidal waveform mode, the phase-shifting waveform mode is selected as the target modulation mode.

[0090] The triangular waveform mode is a mode in which the conduction periods of the primary H-bridge and the secondary H-bridge do not overlap within half a switching cycle. Its analytical formula for switching time is derived based on the constraint that the boundary of the inductor current period is zero.

[0091] The derivation is based on Kirchhoff's voltage law to write expressions for the inductor current in the rising and falling segments. The relationship between the primary and secondary duty cycles is obtained by using the constraint that the inductor current is zero at the end of half a switching cycle. Combined with the expression for the power command, the analytical calculation formulas for the primary and secondary duty cycles are obtained. The values ​​of the two duty cycles are between 0 and 1.

[0092] For example, when the voltage gain is greater than 1, the primary side duty cycle is greater than the secondary side duty cycle, which corresponds to the buck voltage operation. When the voltage gain is less than 1, the primary side duty cycle is less than the secondary side duty cycle, which corresponds to the boost voltage operation. Both operation conditions share the same set of analytical formulas.

[0093] The trapezoidal waveform mode is a mode in which the conduction periods of the primary H-bridge and the secondary H-bridge partially overlap within half a switching cycle. Its analytical formula for switching time is also derived based on the constraint that the boundary of the inductor current cycle is zero.

[0094] In the derivation, half a switching cycle is divided into four time periods: primary side conduction only, primary and secondary side conduction together, secondary side conduction only, and zero current. The inductor voltage equations for each time period are written out. Using the constraint of zero current at the cycle boundary, the expression of power command is solved to obtain the analytical formulas for the three switching time parameters. The values ​​of the three time parameters are all between 0 and half a switching cycle.

[0095] The phase-shifting waveform mode is a mode in which both the primary-side H-bridge and the secondary-side H-bridge are turned on with a fixed duty cycle and the power is adjusted by the inter-bridge phase shift angle. The fixed duty cycle is preset to 50% and stored in non-volatile memory. The analytical formula for the switching time is derived by combining the constraint that the inductor current period boundary is zero and the expression of the power command. The analytical formula for the inter-bridge phase shift angle is obtained by solving the equation. The value range of the inter-bridge phase shift angle is between 0 and π / 2. The switching time of each switch is calculated based on the phase shift angle and the fixed duty cycle.

[0096] The controller calls the analytical formula for the switching time corresponding to the target modulation mode, and reads the switching frequency parameters and auxiliary inductance value parameters pre-stored in the non-volatile memory. The switching frequency is the operating frequency of the converter, which is set according to user requirements before leaving the factory. The auxiliary inductance value is the equivalent inductance value of the converter, which is calibrated by an inductance tester before leaving the factory. The controller substitutes the voltage gain, power command, switching frequency, and auxiliary inductance value into the analytical formula to perform numerical calculations, and obtains the turn-on and turn-off times of the four switches of the primary H-bridge and the four switches of the secondary H-bridge in the current switching cycle. All time values ​​together form the set of switching times.

[0097] The controller converts each time value in the set of switching times with the counting period of the internal counter. The counter is an up-counting module built into the controller, and the counting period is the switching period. During the conversion, the proportion of the time value to the counting period is first calculated, and the proportion is multiplied by the sixteen-bit modulus of the counter to obtain the pulse width modulation comparison value for each switching transistor. The comparison value is a sixteen-bit digital quantity.

[0098] At the moment when the inductor current crosses zero at the beginning of the switching cycle, the controller writes all comparison values ​​into the pulse width modulation comparison register of each corresponding switch. After the comparison register is updated, the pulse width modulation module automatically compares the comparison value with the current value of the counter. When the counter value equals the comparison value, the driving pin level of the corresponding switch is flipped, driving the switches of the primary H-bridge and secondary H-bridge to turn on and off at the set time.

[0099] Triangular waveform mode, trapezoidal waveform mode and phase-shifting waveform mode all take the inductor current being zero at the beginning and end of the switching cycle as a common constraint. When deriving the analytical formula, it is mandatory that the inductor current value is zero at the cycle boundary. The set of switching times calculated under all modes can ensure that the inductor current returns to zero at the cycle boundary, thereby avoiding transformer saturation and overcurrent problems of the switching tube caused by DC bias from the root.

[0100] In some embodiments, the sources of voltage gain and power commands may include external host computer commands received via a communication bus and / or default operating parameters embedded within the controller, to accommodate two different system control architectures: remote scheduling and local autonomy.

[0101] In some embodiments, optionally, a hysteresis comparison mechanism based on power boundaries is introduced into the target modulation mode selection logic, and / or a prediction window for the zero-crossing moment of the inductor current is added before the switching action is executed, so as to prevent frequent mode switching near the power boundary and ensure that the switching action is completed at the zero current moment.

[0102] In some embodiments, the circuit parameters in the switching timing analysis formula may include the auxiliary inductance value and the switching frequency, and the circuit parameters can be corrected online during system operation based on the measured temperature drift characteristics or device aging degree to improve the calculation accuracy under high temperature or long-term operating conditions.

[0103] In some embodiments, optionally, under the cold start condition where the output voltage is zero, each switch of the secondary H-bridge remains off, and the inductor current forms a freewheeling path through the anti-parallel diodes integrated in the secondary H-bridge until the output voltage is built up to a preset threshold, so as to cover the startup process starting from zero voltage.

[0104] In some embodiments, the timing of updating the pulse width modulation comparison value is optionally configured to be strictly synchronized with the start of the switching cycle, and the update action is performed only after confirming that the inductor current of the current cycle has returned to zero, so as to eliminate glitches during the register update process.

[0105] In some embodiments, the controller may optionally include one or a combination of a digital signal processor and a field-programmable gate array, and the computation task of the set of switching times and the writing task of the pulse width modulation comparison value are interrupt-isolated at the hardware level to meet the hardware deployment flexibility under different computing power requirements.

[0106] In some embodiments, optionally, such as Figure 2 As shown, step S104: Based on the voltage gain and power command, determine the target modulation mode among the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode, including:

[0107] Step S1042: Determine the first power boundary of the triangular waveform mode and the second power boundary of the trapezoidal waveform mode based on the voltage gain;

[0108] Step S1044: When the power command is less than the first power boundary, the triangular waveform mode is determined as the target modulation mode;

[0109] Step S1046: When the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary, the trapezoidal waveform mode is determined as the target modulation mode;

[0110] Step S1048: When the power command is greater than the second power boundary, the phase-shifting waveform mode is determined as the target modulation mode.

[0111] In this embodiment, intelligent partitioning management of modulation modes is achieved through a pre-stored power boundary lookup table.

[0112] The controller retrieves the maximum transmission power limits for both delta and trapezoidal modes based on the real-time voltage gain, establishing a first power boundary and a second power boundary, respectively. By comparing the power command with the two boundaries, a three-layer discrimination logic is constructed: when the power is below the first power boundary, the delta mode is locked; when it is between the two boundaries, the trapezoidal mode is switched; and when it exceeds the second power boundary, the phase-shifting mode is switched.

[0113] Understandably, discretizing the continuous voltage and power plane into three distinct operating ranges transforms mode selection into a deterministic operation based on table lookup and numerical comparison, ensuring the rigor and efficiency of the control logic.

[0114] The controller's internal non-volatile memory contains pre-written power boundary lookup tables for triangular waveform mode and trapezoidal waveform mode.

[0115] The data for the two lookup tables comes from a process that combines theoretical derivation and experimental calibration.

[0116] The theoretical derivation is based on the power transmission limit formula of three modulation modes under zero current boundary constraints. The experimental calibration corrects the theoretical value by measuring the actual maximum transmission power under different voltage gains on the prototype.

[0117] The lookup table uses voltage gain as the index address, and the storage unit records the maximum transmission power value under the corresponding gain. Voltage gain is used as an input variable in the lookup process. The controller calls the input and output voltages collected by the analog-to-digital converter module, calculates the voltage gain value after moving average filtering, maps the voltage gain value to the address pointer of the lookup table, and reads the values ​​in the storage units pointed to by the pointers to obtain the maximum transmission power value of the triangular waveform mode under the current voltage gain. This maximum transmission power value is defined as the first power boundary, and the maximum transmission power value of the trapezoidal waveform mode under the current voltage gain is defined as the second power boundary.

[0118] The unit for both the first and second power boundaries is watts, and the data type is 32-bit floating-point numbers.

[0119] The controller's arithmetic logic unit subtracts the value of the power command from the value of the first power boundary to obtain the first power difference.

[0120] The sign bit of the first power difference is determined. If the sign bit is positive, it indicates that the power command is greater than the first power boundary. If the sign bit is negative, it indicates that the power command is less than the first power boundary.

[0121] When the power command is less than the first power boundary, the controller sends a mode selection signal. The logic level of this signal is set to the encoded value of the corresponding triangular waveform mode, and the triangular waveform mode is selected as the target modulation mode for the current cycle.

[0122] The triangular waveform mode is suitable for light load conditions. Its primary and secondary duty cycles are independently adjustable, and it can maintain zero current boundary constraints over a wide voltage gain range with low switching losses.

[0123] For example, when the voltage gain is 2.0 and the power command is 10% of the rated power, the power command value is less than the first power boundary value, and the system automatically switches to triangular waveform mode.

[0124] The controller's arithmetic logic unit subtracts the value of the power command from the value of the second power boundary to obtain the second power difference.

[0125] The sign bit of the second power difference is determined, and the sign bit status of the first power difference is combined to construct the mode selection logic.

[0126] When the first power difference sign bit is positive and the second power difference sign bit is negative, it indicates that the power command value is between the first power boundary and the second power boundary.

[0127] At this time, the controller sends a mode selection signal. The logic level of the mode selection signal is set to the encoding value of the corresponding trapezoidal waveform mode, and the trapezoidal waveform mode is selected as the target modulation mode for the current period.

[0128] Trapezoidal waveform mode is suitable for medium power conditions. Its unique zero-current plateau segment can significantly reduce return power and improve the system's operating efficiency in the medium load region.

[0129] The controller's arithmetic logic unit monitors the sign bit of the second power difference. When the sign bit is positive, it indicates that the power command is greater than the second power boundary.

[0130] At this time, the controller sends a mode selection signal. The logic level of this signal is set to the encoding value of the corresponding phase-shift waveform mode, and the phase-shift waveform mode is selected as the target modulation mode for the current cycle.

[0131] The phase-shifting waveform mode is suitable for heavy-load conditions. Its fixed 50% duty cycle structure can minimize current stress and maximize power transmission capability.

[0132] The execution cycle of the mode selection logic is a single switching cycle, and each execution is completed at the moment when the inductor current crosses zero, ensuring that there is no transient impact during the mode switching process.

[0133] The values ​​of the first and second power boundaries remain unchanged during system operation unless an external instruction is received to update the lookup table online. The encoded value of the mode selection signal is directly sent to the switching timing calculation module as the addressing basis for calling the corresponding analytical formula.

[0134] In some embodiments, optionally, during the determination of the values ​​of the first power boundary and the second power boundary, a hysteresis comparison mechanism based on the power boundary is introduced, and / or a prediction window for the zero-crossing moment of the inductor current is added before the switching action is executed, so as to prevent frequent switching of modes near the power boundary and ensure that the switching action is completed at the zero current moment.

[0135] In some embodiments, the power boundary lookup table in the triangular waveform mode and the power boundary lookup table in the trapezoidal waveform mode are optionally stored in the random access memory of the controller, and can be corrected online during system operation based on the measured temperature drift characteristics or device aging degree to improve the calculation accuracy under high temperature or long-term operating conditions.

[0136] In some embodiments, optionally, when the voltage gain is close to unity gain one, the value of the second power boundary is dynamically expanded according to a preset overload coefficient, allowing the trapezoidal waveform mode to operate under conditions of slight deviation in zero current boundary constraints, thereby widening the efficient operating range in the medium power region.

[0137] In some embodiments, the mode selection logic may optionally include a priority arbitration mechanism, in which the modulation mode with a lower switching frequency is preferentially selected when the power command simultaneously satisfies the boundary conditions of the triangular waveform mode and the trapezoidal waveform mode, so as to reduce the overall switching loss of the system.

[0138] In some embodiments, optionally, in the triangular waveform mode, half a switching cycle sequentially includes a primary-side turn-on phase, a secondary-side turn-on phase, and a zero-voltage phase where both primary and secondary sides are off; during the primary-side turn-on phase, the primary-side H-bridge outputs a positive input voltage, the secondary-side H-bridge does not output an effective bridge voltage, and the inductor current of the auxiliary inductor rises from zero; during the secondary-side turn-on phase, the primary-side H-bridge does not output an effective bridge voltage, the secondary-side H-bridge outputs an output voltage referred to the primary side, and the inductor current of the auxiliary inductor drops to zero; during the zero-voltage phase, both the upper and lower transistors of the primary and secondary H-bridges are in the off state, and the inductor current of the auxiliary inductor remains zero until the end of half a switching cycle; the analytical formula for switching timing includes:

[0139] ;

[0140] Where D1 is the primary side duty cycle, D2 is the secondary side duty cycle, and M is the voltage gain;

[0141] The controller determines the primary duty cycle based on the power command, input voltage, inductance value of the auxiliary inductor, and switching frequency, and determines the set of switching times based on the primary and secondary duty cycles.

[0142] In this embodiment, based on a two-stage topology where the primary side and secondary side are independently turned on, and relying on the volt-second balance constraint under zero current boundary, the mapping relationship between the secondary side duty cycle and the primary side duty cycle is derived. The controller combines the power command, input voltage, auxiliary inductance value, and switching frequency parameters to obtain the primary side duty cycle value, and then converts it into the set of switching times for the current switching cycle, realizing precise timing control in triangular mode.

[0143] Understandably, relying on volt-second balance constraints ensures that the inductor current at the cycle boundary is zero from the source, completely eliminating the risks of transformer magnetic saturation and switch overcurrent caused by DC bias. The duty cycle is calculated analytically, requiring no iterative optimization or offline table lookup, resulting in low computational load and compatibility with low-cost control hardware.

[0144] Furthermore, it is logic compatible with a wide voltage gain range, which can cover extreme operating conditions such as cold start and light load, effectively improving the system's operational reliability and adaptability to operating conditions.

[0145] The triangular waveform mode takes the auxiliary inductor current being zero at the beginning and end of the switching cycle as its core constraint. Within half a switching cycle, the inductor current only goes through two stages: rising and falling, without a continuous constant current stage.

[0146] During the primary-side independent conduction phase, the two switches in the upper arm of the primary-side H-bridge are simultaneously turned on, and the two switches in the lower arm are simultaneously turned off, outputting a positive input voltage to the two ends of the auxiliary inductor. All four switches in the secondary-side H-bridge are turned off, with no effective bridge voltage output. The voltage across the auxiliary inductor is equal to the input voltage, and the inductor current rises linearly from zero with a slope equal to the ratio of the input voltage to the auxiliary inductance value.

[0147] During the secondary-side turn-on phase, all four switches of the primary-side H-bridge are turned off, resulting in no effective bridge voltage output. The two switches in the upper arm of the secondary-side H-bridge are turned on simultaneously, while the two switches in the lower arm are turned off simultaneously. The output secondary-side voltage, when referred to the primary side, is a negative equivalent voltage. The voltage across the auxiliary inductor is equal to this negative equivalent voltage. The inductor current decreases linearly from its peak value with a slope equal to the ratio of the absolute value of this negative equivalent voltage to the value of the auxiliary inductor, and drops to zero at the end of the half-cycle.

[0148] Within half a switching cycle, after the secondary-side turn-on phase, a zero-voltage phase is defined. During this zero-voltage phase, neither the primary nor secondary H-bridge outputs an effective voltage, and the auxiliary inductor current remains zero. The introduction of this zero-voltage phase ensures that the switching transistors turn off under zero-current conditions, reducing switching losses. Furthermore, by controlling the duration of this phase, the transmitted power can be precisely adjusted, especially under light load conditions, effectively preventing current backflow and improving the overall efficiency of the converter.

[0149] In triangular wave control, to ensure soft switching, the inductor current is typically required to drop to zero precisely at the moment of switching. However, due to the influence of circuit parasitic parameters and dead time, the actual current waveform may oscillate or deviate. By setting this zero-voltage stage, a reset window is provided, forcing the inductor current to return to zero and remain there. This not only eliminates the risk of oscillation after the secondary side conduction ends but also makes the initial state of the next switching cycle more stable, improving the system's robustness to voltage fluctuations and load changes.

[0150] The zero-current boundary constraint requires the inductor current to return to zero at the end of half a cycle. Therefore, the volt-second product of the rise in inductor current during the primary-side turn-on phase must be equal to the volt-second product of the fall inductor current during the secondary-side turn-on phase. The input voltage multiplied by the primary-side duty cycle multiplied by the length of half a switching cycle equals the secondary-side output voltage referred to the primary side multiplied by the secondary-side duty cycle multiplied by the length of half a switching cycle. After canceling out the length of half a switching cycle, the voltage gain is substituted to obtain the correlation between the secondary-side duty cycle and the primary-side duty cycle.

[0151] The controller reads the nominal value of the auxiliary inductor and the value of the switching frequency pre-stored in the non-volatile memory, calls the digital value of the power command, the digital value of the input voltage and the value of the voltage gain obtained in the previous steps, combines the power transfer formula in the triangular waveform mode with the zero current boundary constraint formula, and solves it to obtain the analytical calculation formula of the primary side duty cycle. Substitute each parameter into the calculation formula to perform numerical calculation and obtain the digital value of the primary side duty cycle with a value range of 0 to 1.

[0152] The controller multiplies the calculated primary-side duty cycle and secondary-side duty cycle by the length of half a switching cycle to obtain the conduction duration of the primary-side H-bridge and the secondary-side H-bridge. Combining the timing relationship of each stage within half a cycle, the controller determines the turn-on and turn-off times of the primary-side H-bridge and the secondary-side H-bridge. The controller then converts these time values ​​into configuration values ​​for the pulse width modulation comparator register, forming the set of switching times for the current switching cycle.

[0153] In some embodiments, optionally, a compensation coefficient based on the temperature drift characteristics of the auxiliary inductor is introduced into the analytical calculation formula of the primary duty cycle, and / or a feedforward correction based on the on-state voltage drop of the switching transistor is added during the power command inverse solution process, so as to offset the calculation error caused by the non-ideal characteristics of the components and improve the accuracy of the duty cycle calculation.

[0154] In some embodiments, optionally, under the cold start condition where the output voltage is zero, the calculated result of the secondary duty cycle D2 is ignored by the controller, the four switches of the secondary H-bridge are forcibly turned off, and the inductor current naturally freewheels through the anti-parallel diode integrated in the secondary H-bridge until the output voltage is established to a preset threshold, thereby achieving shockless start-up from zero voltage.

[0155] In some embodiments, the values ​​of the primary-side duty cycle D1 and the secondary-side duty cycle D2 are optionally clamped by the maximum duty cycle limit module before being written to the pulse width modulation comparison register. The maximum duty cycle limit value is pre-stored in non-volatile memory to prevent the risk of bridge arm shoot-through caused by excessive power commands leading to duty cycle exceeding the limit.

[0156] In some embodiments, the controller may optionally support dynamically switching the switching frequency value during operation in triangular waveform mode. When the system is detected to enter a light-load deep sleep state, the switching frequency value is reduced to reduce switching losses. At this time, the analytical calculation process of the primary side duty cycle D1 is automatically adapted to the updated switching frequency value to maintain the zero current boundary constraint unchanged.

[0157] In some embodiments, optionally, after the primary side duty cycle D1 is obtained by analytical calculation, it is further determined whether the sum of D1 and D2 exceeds the limit of half a switching cycle. If it is determined that it exceeds the limit, it automatically reverts to the trapezoidal waveform mode or limits the maximum value of D1 to ensure the physical feasibility of the timing logic.

[0158] In some embodiments, the logic for generating the switch switching time set can optionally support two configuration modes: double-edge modulation and single-edge modulation. The time conversion algorithm in both modes shares the same set of calculation results for the primary side duty cycle D1 and the secondary side duty cycle D2, in order to adapt to the deployment requirements of different hardware driver architectures.

[0159] In some embodiments, optionally, when the output voltage is zero, the controller configures the switching transistor of the secondary H-bridge to the off state and controls the output pulse voltage of the primary H-bridge, so that the inductor current of the auxiliary inductor freewheels through the anti-parallel diode of the secondary H-bridge to precharge the output capacitor on the DC output side.

[0160] In this embodiment, for the cold start condition where the output voltage is zero, the controller first samples the output voltage to determine the zero-voltage state, and then forces all switches of the secondary H-bridge to turn off, leaving only the anti-parallel diode as a freewheeling path. Based on the preset start-up power command, and combined with the input voltage, auxiliary inductance value, and switching frequency to analyze the primary duty cycle, the controller controls the output pulse voltage of the primary H-bridge, so that the auxiliary inductor current freewheels through the secondary anti-parallel diode, completing the pre-charging of the DC output capacitor, and maintaining the constraint that the inductor current is zero at the boundary of the switching cycle throughout the process.

[0161] Understandably, no additional pre-charge circuit is needed. Zero-voltage startup is achieved using existing topology devices, avoiding overcurrent surges caused by mis-conduction of the secondary-side switch during cold start. The entire process adheres to zero-current boundary constraints, eliminating potential hazards such as transformer saturation and excessive stress on the switch caused by inductor residual current accumulation during startup. The startup current amplitude is precisely controlled by analytical duty cycle, adapting to the triangular waveform mode operating logic, significantly improving the startup reliability and hardware compatibility under extreme operating conditions.

[0162] The controller samples the digital output voltage at the beginning of each switching cycle and compares the sampled result with the start-up voltage threshold pre-stored in the non-volatile memory. When the sampled result is less than the start-up voltage threshold, it determines that the DC output side is in a zero-voltage state and triggers the cold start control process.

[0163] In the cold start control process, the controller sends a full shutdown control signal to the pulse width modulation drive module of the secondary H-bridge, forcing all four switches of the secondary H-bridge to be in the off state. Only the anti-parallel diodes of the switches are retained on the secondary side as current paths. This configuration avoids the risk of overcurrent caused by the secondary switches being mis-turned under zero voltage conditions, and at the same time matches the topology constraint that the conduction periods of the primary and secondary sides do not overlap in the triangular waveform mode.

[0164] The controller calls the pre-stored startup power command value, which is five percent of the rated power. Combining the currently sampled digital input voltage, the pre-stored nominal value of the auxiliary inductor, and the switching frequency value, it substitutes them into the analytical calculation formula of the primary side duty cycle in the triangular waveform mode to obtain the digital value of the primary side duty cycle. Multiplying the primary side duty cycle by the length of half a switching cycle, the conduction time of the primary side H-bridge is obtained.

[0165] Generate a switching pulse signal for the primary-side H-bridge, control the primary-side H-bridge to periodically turn on and off according to the pulse signal, and output an alternating pulse voltage to the two ends of the auxiliary inductor.

[0166] During the conduction phase of the primary-side H-bridge, the auxiliary inductor is subjected to a positive input voltage, and the inductor current rises linearly from zero. During the turn-off phase of the primary-side H-bridge, the voltage across the auxiliary inductor is reversed, and the current cannot pass through the turned-off secondary-side switch. It can only form a closed loop through the anti-parallel diodes of the secondary-side H-bridge.

[0167] The forward voltage drop of the diode clamps the voltage across the auxiliary inductor to the negative clamp value. The inductor current decreases linearly from the initial peak value to zero. The entire process satisfies the zero current boundary constraint. The inductor current is zero at the beginning and end of the switching cycle.

[0168] During the process of the inductor current freewheeling through the anti-parallel diode on the secondary side, the current charges the output capacitor on the DC output side, and the voltage across the output capacitor gradually rises. The controller continuously samples the digital output voltage. When the sampling result is greater than or equal to the start-up completion threshold pre-stored in the non-volatile memory, it is determined that the pre-charging process is complete, exits the cold start process, and switches to normal modulation mode operation.

[0169] In some embodiments, optionally, during the transition from determining that the output voltage is zero to the completion of pre-charging, the controller continuously monitors the sampled value of the auxiliary inductor current. When the current peak is detected to exceed the preset start-up current threshold, the primary H-bridge is immediately shut down and a restart delay timer is triggered to achieve hardware self-protection in case of start-up failure.

[0170] In some embodiments, the set value of the start-up completion threshold can be dynamically adjusted according to the type of downstream load. A lower threshold corresponds to capacitive loads to speed up the start-up process, while a higher threshold corresponds to inductive loads to ensure excitation stability and improve adaptability to different load characteristics.

[0171] In some embodiments, optionally, in the cold start control process, the pulse voltage output mode of the primary-side H-bridge can be configured as single-edge modulation or double-edge modulation, and the drive signal generation logic in the two modulation modes shares the same set of primary-side duty cycle calculation results to adapt to the interface requirements of different driver chips.

[0172] In some embodiments, optionally, after the output voltage is established to the start-up completion threshold, the controller executes the soft transition logic before mode switching, gradually increasing the primary side duty cycle and simultaneously unlocking the switching transistor drive permission of the secondary side H-bridge, to prevent voltage jumps or current backflow from occurring instantaneously when switching from diode freewheeling mode to active modulation mode.

[0173] In some embodiments, the duration of the pre-charging process is optionally recorded in non-volatile memory as historical statistical data for evaluating the health status of the output capacitor or the forward voltage drop characteristics of the secondary diode, and used as input for subsequent fault diagnosis or lifetime prediction algorithms.

[0174] In some embodiments, optionally, in the trapezoidal waveform mode, half a switching cycle sequentially includes a primary-side independent conduction phase corresponding to a first time parameter, a primary-secondary side overlapping conduction phase corresponding to the first time parameter to the second time parameter, a secondary-side independent conduction phase corresponding to the second time parameter to the third time parameter, and a zero-current phase corresponding to the third time parameter to the end of half a switching cycle; during the primary-side independent conduction phase, the inductor current of the auxiliary inductor rises from zero; during the primary-secondary side overlapping conduction phase, the auxiliary inductor bears the voltage difference between the input voltage and the output voltage referred to the primary side; during the secondary-side independent conduction phase, the inductor current of the auxiliary inductor drops to zero; during the zero-current phase, neither the primary-side H-bridge nor the secondary-side H-bridge outputs an effective bridge voltage, and the inductor current of the auxiliary inductor remains zero; the controller determines the first time parameter, the second time parameter, and the third time parameter according to the zero-current boundary constraint equation and the power command, and determines the set of switching times according to the first time parameter, the second time parameter, and the third time parameter;

[0175] Among them, the zero-current boundary constraint equation characterizes the sum of the magnetization volt-second product of the auxiliary inductor during the primary-side-only conduction stage and the primary-side-overlapping conduction stage, which is equal to the demagnetization volt-second product during the secondary-side-only conduction stage.

[0176] In this embodiment, the half-cycle four-segment operation logic of the trapezoidal waveform mode is limited. Based on the zero current boundary constraint, the magnetization volt-second product of the primary side conducting alone and the primary and secondary sides conducting overlappingly is bound with the demagnetization volt-second product of the secondary side conducting alone. A set of two equations is constructed by combining power commands, and the first time parameter, the second time parameter and the third time parameter are obtained by analysis. The corresponding set of switching times is generated by conversion to adapt to the medium power operation condition.

[0177] Understandably, reserving a safety margin during the zero-current phase offsets sampling and calculation errors, preventing DC bias caused by inductor residual current. The overlapping conduction phase between the primary and secondary sides enables direct power transfer, significantly reducing return current losses and improving operating efficiency in the mid-power region.

[0178] Furthermore, analytical calculations do not require iterative optimization, are compatible with low-cost digital controllers, balance operational reliability and energy efficiency, and broaden the high-efficiency operating range under wide voltage gain.

[0179] The trapezoidal waveform mode is adapted to operating conditions where the voltage gain is close to the unit value. Within half a cycle, the inductor current goes through four stages in sequence: rising, slow change, falling, and holding at zero. The duration of each stage is defined by the first time parameter, the second time parameter, and the third time parameter.

[0180] The controller reads the pre-stored transformer ratio, auxiliary inductance value, and switching frequency value, and calls the acquired input voltage, output voltage, voltage gain, and power command digital values ​​as the input data source for time parameter calculation.

[0181] The primary-side single-conduction phase corresponds to the interval from the start of half a switching cycle to the first time parameter. The upper arm switch of the primary-side H-bridge is turned on, the lower arm switch is turned off, and the output is a positive input voltage. All four switches of the secondary-side H-bridge are turned off, the voltage across the auxiliary inductor is equal to the input voltage, and the inductor current rises linearly from zero with a slope equal to the ratio of the input voltage to the auxiliary inductance value. The first time parameter is the end time of the phase.

[0182] The primary and secondary side overlap conduction phase corresponds to the interval between the first and second time parameters. The primary H-bridge maintains the upper arm conduction state, the upper arm switch of the secondary H-bridge is turned on, and the lower arm switch is turned off. The output is the negative equivalent voltage referred to the primary side. The voltage across the auxiliary inductor is equal to the difference between the input voltage and this negative equivalent voltage. The inductor current changes with the slope of the ratio of the absolute value of this difference to the value of the auxiliary inductor. When the voltage gain is close to 1, this difference approaches zero, and the current remains approximately constant. This phase is the direct power transmission window with no return power loss.

[0183] The secondary-side conduction phase corresponds to the interval between the second and third time parameters. All four switches of the primary-side H-bridge are turned off, while the secondary-side H-bridge maintains the conduction state of the upper bridge arm. The voltage across the auxiliary inductor is equal to the negative equivalent voltage referred to the primary side. The inductor current decreases linearly to zero with the slope of the ratio of the absolute value of the negative equivalent voltage to the value of the auxiliary inductor. The third time parameter is the end time of this phase, which is also the moment when the inductor current returns to zero.

[0184] The zero-current stage corresponds to the interval from the third time parameter to the end of half a switching cycle. All four switches of the primary and secondary H-bridges are turned off, no voltage is applied to the auxiliary inductor, and the current remains zero. This stage is a safety margin range unique to the trapezoidal waveform mode, which can offset the effects of parameter sampling errors or calculation deviations.

[0185] The core logic of the zero-current boundary constraint equation is that there is no accumulation of inductor flux within a switching cycle. Therefore, the sum of the magnetization volt-second product during the primary side's independent conduction phase and the magnetization volt-second product during the primary and secondary side's overlapping conduction phase must be equal to the demagnetization volt-second product during the secondary side's independent conduction phase. This constraint is the physical premise that the inductor current returns to zero at the end of a half-cycle. The controller transforms this constraint into a mathematical expression and combines it with the energy transfer equation corresponding to the power command to construct a set of two nonlinear equations.

[0186] The controller substitutes the input voltage, output voltage, voltage gain, auxiliary inductance value, switching frequency, and power command into the equation set, performs numerical solution calculations, and obtains sixteen-bit digital values ​​of the first time parameter, the second time parameter, and the third time parameter. The third time parameter can be obtained by eliminating variables from the relationship between the first two parameters and the constraint equations, thus reducing the computational complexity.

[0187] The controller maps the three time parameters to the switching times respectively. The first time parameter corresponds to the turn-on time of the secondary H-bridge, the second time parameter corresponds to the turn-off time of the primary H-bridge, and the third time parameter corresponds to the turn-off time of the secondary H-bridge. The controller converts each time value into the configuration value of the pulse width modulation comparator register to form the set of switching times for the current switching cycle.

[0188] In some embodiments, the zero-current stage length corresponding to the third time parameter can be adaptively extended according to the dynamic range of the input voltage sampling error, and / or corrected online according to the drift amplitude of the auxiliary inductor parameter, so as to offset the calculation deviation caused by sampling noise or device aging and widen the stable operating range of the trapezoidal waveform mode.

[0189] In some embodiments, optionally, when the numerical solutions of the first time parameter and the second time parameter diverge or exceed the limit, the controller automatically calls the pre-stored trapezoidal mode boundary correction coefficients to perform regularization processing on the equation set, and / or smoothly switches the current modulation mode to triangular waveform mode operation to avoid bridge arm shoot-through or overcurrent faults caused by incorrect timing.

[0190] In some embodiments, the second power boundary value of the trapezoidal waveform mode can be dynamically reduced based on the current junction temperature of the converter and / or adjusted according to the output current ripple requirements, so as to prioritize the reliability of system operation under high temperature or high ripple conditions and balance efficiency and safety requirements.

[0191] In some embodiments, optionally, during the transition from triangular waveform mode to trapezoidal waveform mode, the controller gradually extends the duration of the primary and secondary side overlapping conduction phase and simultaneously shortens the duration of the secondary side conducting phase until it fully matches the timing logic of the trapezoidal mode, so as to avoid sudden changes or bias in the inductor current at the moment of switching.

[0192] In some embodiments, the historical operating data of the first time parameter, the second time parameter, and the third time parameter are optionally recorded periodically into a non-volatile memory as a basis for fault diagnosis to evaluate the saturation characteristics of the auxiliary inductor or the transformer turns ratio drift, supporting the health management of the system throughout its entire life cycle.

[0193] In some embodiments, optionally, in the phase-shifted waveform mode, both the primary-side H-bridge and the secondary-side H-bridge output bridge arm voltages with a 50% duty cycle; the controller determines the inter-bridge phase shift angle based on the combined analytical results of the zero-current boundary constraint and the power command; when the discriminant in the analytical expression of the inter-bridge phase shift angle is less than zero, the controller determines that the power command exceeds the transmission power range of the phase-shifted waveform mode under the zero-current boundary constraint, and generates a mode switching command to switch to the trapezoidal waveform mode, or generates a frequency adjustment command to adjust the switching frequency; when the discriminant in the analytical expression of the inter-bridge phase shift angle is greater than or equal to zero, the controller determines the set of switching times based on the inter-bridge phase shift angle.

[0194] In this embodiment, the control logic for limiting the phase-shift waveform mode derives the analytical expression for the inter-bridge phase shift angle based on the zero-current boundary constraint and power command, and determines the feasibility of the operating condition by calculating the discriminant value. When the discriminant is non-negative, the phase shift angle is obtained analytically and a set of switching times is generated; when the discriminant is negative, it is determined that the maximum transmission power exceeds the zero-current constraint, and the switch to the trapezoidal waveform mode or the switching frequency is reduced to adapt to the requirements of heavy-load operating conditions.

[0195] Understandably, zero-current constraint is used as a pre-verification condition for phase-shifting mode to avoid DC bias caused by disrupting the zero-current characteristic at the cycle boundary during over-power operation. Automatic switching or frequency conversion mechanisms require no manual intervention, balancing transmission efficiency under full-load conditions with wide power adaptability, reducing the controller's computational load, and forming a complete modulation system covering all operating conditions with triangular waveform mode and trapezoidal waveform mode, thereby improving system reliability.

[0196] The controller reads the duty cycle configuration parameters pre-stored in the non-volatile memory. The duty cycle configuration parameters are fixed at 50%, which corresponds to the proportion of the conduction time of the primary H-bridge and the secondary H-bridge in half a switching cycle.

[0197] The controller uses the acquired voltage gain, input voltage, auxiliary inductance value, switching frequency, and power command digital values ​​as the input data source for calculating the inter-bridge phase shift angle.

[0198] The power transfer characteristics in phase-shifted waveform mode are determined by the zero-current boundary constraint and the power balance equation. The controller transforms the physical condition that the inductor current is zero at the beginning and end of the switching cycle into a mathematical constraint, and combines it with the energy transfer equation corresponding to the power command to derive the analytical calculation formula for the inter-bridge phase shift angle.

[0199] The analytical formula contains a discriminant quantity composed of voltage gain, power command, input voltage, auxiliary inductance value, and switching frequency. The discriminant quantity is located inside the square root of the formula, and the sign of its value directly determines whether there is a physically feasible real solution for the phase shift angle.

[0200] The controller performs numerical calculations of the discriminant, substituting the various input parameters under the current operating conditions into the discriminant expression, completing arithmetic and logical operations, and obtaining the 32-bit floating-point result of the discriminant.

[0201] When the result of the discrimination value calculation is less than zero, it indicates that even if the maximum inter-bridge phase shift angle is applied at the current switching frequency, it is impossible to transmit the required power command while maintaining the zero current boundary constraint. The controller then determines that the power command exceeds the maximum power transmission range of the phase-shifted waveform mode under the zero current boundary constraint.

[0202] The controller generates a mode switching command based on the judgment result, switching the target modulation mode from phase-shift waveform mode to trapezoidal waveform mode. Trapezoidal waveform mode has a wider power transmission range and stronger voltage adaptability, and can handle power demands that exceed the limits of phase-shift mode.

[0203] The controller can also generate frequency adjustment commands to reduce the switching frequency value to extend the power transmission limit of the phase-shift waveform mode. After the frequency is reduced, the controller recalculates the discrimination value. If the discrimination value becomes non-negative, it continues to operate in the phase-shift waveform mode; otherwise, it still performs mode switching.

[0204] When the result of the discrimination quantity calculation is greater than or equal to zero, it indicates that there is a phase shift angle solution that satisfies the zero current boundary constraint. The controller substitutes each parameter into the analytical calculation formula of the inter-bridge phase shift angle, performs square root and inverse trigonometric function operations, and obtains a digital value of the phase shift angle with a range of 0 to π / 2 radians.

[0205] The controller calculates the switching times of the primary H-bridge and the secondary H-bridge based on the calculated inter-bridge phase shift angle and a fixed 50% duty cycle parameter. The rising edge of the primary H-bridge is set as the start point of half a cycle, and the rising edge of the secondary H-bridge is delayed by the phase shift angle relative to the primary H-bridge. The falling edges of both H-bridges are set at half a switching cycle after the rising edge, thus forming a set of switching times.

[0206] The controller converts the values ​​of each moment in the set of switching moments into configuration values ​​for the pulse width modulation comparator register, writes them into the register at the next zero-crossing moment of the inductor current, and drives the primary H-bridge and secondary H-bridge to operate according to the set phase shift relationship, thereby achieving efficient power transmission under full load conditions.

[0207] In some embodiments, optionally, a compensation coefficient based on the temperature drift characteristics of the auxiliary inductor is introduced during the calculation of the discrimination quantity, and / or a feedforward correction based on the on-state voltage drop of the switching transistor is added during the power command inverse solution process, so as to offset the calculation error caused by the non-ideal characteristics of the components and improve the accuracy of the phase shift angle calculation.

[0208] In some embodiments, optionally, when the discrimination value is less than zero and the trigger mode switches to the trapezoidal waveform mode, the controller executes smooth transition logic, gradually reduces the inter-bridge phase shift angle and synchronously extends the duration of the primary and secondary side overlapping conduction phase until it fully matches the timing logic of the trapezoidal mode, so as to avoid sudden changes or bias in the inductor current at the moment of switching.

[0209] In some embodiments, the frequency reduction amplitude of the frequency adjustment command can be adaptively configured based on the negative value depth of the discrimination quantity. The larger the negative value of the discrimination quantity, the larger the power gap, and the frequency reduction amplitude is increased accordingly to expand the upper limit of power transmission. Conversely, the frequency reduction amplitude is reduced to reduce light load loss.

[0210] In some embodiments, optionally, after determining that the discrimination value is less than zero, the controller further detects the ratio of the input voltage to the output voltage. When the ratio is close to unity gain, frequency reduction operation is performed first to retain the high efficiency characteristics of the phase-shifting mode. When the ratio deviates far from unity gain, mode switching operation is performed first to ensure operational stability.

[0211] In some embodiments, the historical minimum value of the discrimination quantity is periodically recorded in a non-volatile memory as a fault diagnosis basis for evaluating the peak power reserve of the converter or the saturation characteristics of the auxiliary inductor, supporting the health management of the entire system lifecycle.

[0212] In some embodiments, optionally, the controller updates the pulse width modulation comparison register at the zero-crossing moment of the inductor current of the auxiliary inductor, and sets the hysteresis power width according to the difference between the power command and the first power boundary or the second power boundary, so as to suppress the target modulation mode from switching back and forth near the power boundary.

[0213] In this embodiment, when the inductor current crosses zero, the controller updates the pulse width modulation comparator register through the shadow register, ensuring strict synchronization with the zero-current boundary. Simultaneously, the hysteresis power width is set based on the difference between the power command and the first and second power boundaries, constructing a bidirectional hysteresis interval to prevent the power command from triggering repeated switching of the target modulation mode when it fluctuates slightly near the boundaries.

[0214] Understandably, updating the register at the zero-crossing moment avoids switching shocks caused by drive signal glitches, ensuring that the zero-current boundary constraint is not affected by switching interference, and reducing DC bias risk at its source. The hysteresis width design breaks the positive feedback of boundary oscillations, reduces the additional switching losses caused by frequent mode switching, and the adjustable width characteristic can adapt to different scenarios with high dynamic response or high stability operation, significantly improving the reliability and durability of the system under all operating conditions.

[0215] The controller performs inductor current zero-crossing detection at the beginning of each switching cycle. The detection signal comes from the phase current sampling channel of the primary H-bridge or secondary H-bridge. The sampled value is read by the analog-to-digital converter at the beginning of the switching cycle. After being processed by the digital filter, the current value is confirmed to be less than the preset zero current threshold, and the current moment is determined to be the moment when the inductor current crosses zero.

[0216] The pulse width modulation comparator register adopts a shadow register update mechanism. After the controller determines that the inductor current has crossed zero, it writes the currently calculated set of switching times into the shadow register. At the zero-crossing moment at the beginning of the next switching cycle, the hardware automatically loads the data in the shadow register into the valid register. The drive signal completes the switching at the zero-crossing moment, avoiding the generation of glitch pulses during the register update process.

[0217] The controller reads the hysteresis power width parameter pre-stored in the non-volatile memory. This parameter is set to three percent of the rated power and is used to construct the hysteresis range for mode switching to prevent frequent mode jumps caused by small fluctuations in power commands near the boundary value.

[0218] The controller calculates the difference between the current power command and the first power boundary to obtain the first power difference, calculates the difference between the power command and the second power boundary to obtain the second power difference, and compares the first power difference and the second power difference with the hysteresis power width respectively.

[0219] When the power command crosses the first power boundary from low to high, the controller determines that the power command is greater than the sum of the first power boundary and the hysteresis power width before switching the target modulation mode from the triangular waveform mode to the trapezoidal waveform mode. When the power command falls back from high to low, the controller determines that the power command is less than the first power boundary minus the hysteresis power width before performing the back-cut operation to form the first hysteresis interval.

[0220] When the power command crosses the second power boundary from low to high, the controller determines that the power command is greater than the sum of the second power boundary and the hysteresis power width before switching the target modulation mode from trapezoidal waveform mode to phase-shifted waveform mode. When the power command falls back from high to low, the controller determines that the power command is less than the second power boundary minus the hysteresis power width before performing a back-cut operation to form the second hysteresis interval.

[0221] The controller performs a logical AND operation between the result of the hysteresis comparison logic and the current mode selection signal to generate the final stable mode selection instruction. This instruction is synchronously updated to the mode selection register when the inductor current crosses zero, ensuring that the mode switching action is strictly synchronized with the zero current boundary and eliminating transient impacts during the switching process.

[0222] The hysteresis power width parameter can be dynamically adjusted by the host computer via the communication bus. The width can be reduced in scenarios with high dynamic response requirements and expanded in scenarios with high stability requirements to adapt to the control needs of different application scenarios.

[0223] In some embodiments, optionally, during the mode switching transition within the hysteresis interval, the controller gradually adjusts the switching timing parameters of the target modulation mode and / or performs soft shutdown processing on the residual switching action of the previous mode to reduce the current surge at the moment of mode switching and ensure the effectiveness of the zero current boundary constraint.

[0224] In some embodiments, the timing of mode switching, the mode type before and after switching, and the power command value during switching are periodically recorded to a non-volatile memory and / or used to statistically analyze the equivalent switching losses of the switching transistors to support converter lifetime prediction and health status assessment.

[0225] In one specific embodiment, optionally, the present invention provides a modulation method for a dual active bridge (DAB) converter based on multi-mode zero-current waveforms: defining at least three modulation modes with different current waveform topologies, each mode having an independent analytical calculation formula for switching moments, ensuring that the inductor current is zero at the beginning and end of each switching cycle; according to real-time operating conditions (voltage gain M=nV)... o / V in and power command P ref V in V is the DC input voltage on the side of the dual active bridge. o (where n is the DC output voltage on the secondary side of the dual active bridge and n is the turns ratio of the primary and secondary sides) Select the target mode and calculate the corresponding switching time analytically.

[0226] Unlike schemes that eliminate bias through bias detection compensation or uniform d-value offset, this invention constructs three current waveform modes with independent physical premises, independent constraint equations, and independent analytical formulas at the waveform design level. The inductor current is zero at the beginning and end of each switching cycle, thus eliminating the DC bias generation mechanism at its source.

[0227] Mode 1: Triangular Waveform Mode

[0228] (1) Voltage waveform topology:

[0229] The voltage waveform topology characteristics of the triangular waveform mode are: the conduction periods of the primary-side H-bridge and the secondary-side H-bridge do not overlap on the time axis, and the inter-bridge phase shift angle φ = 0. Taking voltage gain M > 1 (step-down operation) as an example, in the half-cycle [0, T s / 2] Inside: At time 0, the primary H-bridge starts conducting (output +V) in), Secondary H-bridge remains off; D1×T s At time / 2, the primary H-bridge turns off, and the secondary H-bridge simultaneously begins to conduct (output +nV). o (folded to the original edge); (D1+ D2) T s At time / 2, the secondary H-bridge is turned off; thereafter until T s / 2, both the primary and secondary H-bridges are turned off.

[0230] Where D1 is the duty cycle of the primary H-bridge, D2 is the duty cycle of the secondary H-bridge, and T s The switching cycle is the duration of one complete working cycle of the DAB.

[0231] At any given time, only one H-bridge outputs a non-zero voltage. The primary and secondary voltage waveforms are spliced ​​together rather than superimposed in time (unlike in traditional phase-shift modulation where the primary and secondary voltages always overlap).

[0232] (2) Segmented analysis of inductor current:

[0233] Ascending segment [0, D1×T s / 2]: Primary voltage +V only in When applied to an inductor, the inductor current flows at a slope V in / L increases linearly from zero, where L is the auxiliary inductance value:

[0234] ;

[0235] ;

[0236] Where D1 is the duty cycle of the primary H-bridge, and D2 is the duty cycle of the secondary H-bridge. For the switching cycle, V is the inductor current, L is the auxiliary inductance value, and V is the inductor current. in This is the DC input voltage on the side of the dual active bridge. This represents the peak value of the inductor current.

[0237] Descent segment [D1× / 2,(D1+D2)× / 2]: Secondary voltage n only Acting on an inductor (referred to the primary side), the inductor current flows at a slope n / L decreases linearly from its peak to zero:

[0238] ;

[0239] (3) Derivation of Zero-Current Boundary Constraint (ZCM):

[0240] ZCM requires the inductor current to return to zero at the end of the falling segment (which is also the end of a half cycle and the start of the next half cycle):

[0241] ;

[0242] ;

[0243] ;

[0244] ;

[0245] The physical meaning of this formula is: the volt-second product accumulated by the inductor in the rising segment ( × D1 × / 2) is equal to the volt-second product released in the falling segment (n × D2 × / 2), which is a direct expression of the inductor magnetic reset condition.

[0246] (4) Power expression:

[0247] Integrate the product of the primary voltage and the inductor current over a half cycle, take the cycle average, and use the ZCM constraint D2=D1 / M to eliminate D2, so as to obtain the relationship between the transmission power in the triangular mode and D1, , M and circuit parameters. The formula for inversely solving the primary duty cycle D1 from the power command is:

[0248] ;

[0249] wherein, is the switching frequency.

[0250] (5) Sub-modes: Buck-type in Triangular mode (BUT) and Boost-type in Triangular mode (BOT):

[0251] According to different voltage gains M, the triangular mode is automatically divided into two sub-modes:

[0252] M>1 (Buck, BUT sub-mode): D2<D1, the conduction time of the primary side is longer than that of the secondary side. The current rises slowly (slope / L) and falls quickly (slope -n / L). The primary H-bridge conducts and turns off first; the secondary H-bridge conducts and turns off later. It is suitable for energy storage battery discharge conditions.

[0253] M<1 (Boost, BOT sub-mode): D2>D1, the conduction time of the secondary side is longer than that of the primary side. The current rises quickly (slope / L), slow descent (slope -n) / L). At this time, the secondary H-bridge is turned on first, and the primary H-bridge is turned off later. This is suitable for energy storage battery charging conditions.

[0254] Both sub-modes share the same set of formulas. The only difference is that when M>1 or M<1, the relative sizes of D1 and D2 are automatically swapped to ensure that the triangular mode can work continuously across the entire voltage gain range.

[0255] (6) Zero output voltage start-up capability (cold start):

[0256] When the output voltage V o When M=0, the formula D2=D1 / M degenerates into an indeterminate form, but the physical operating mechanism of the triangular mode remains valid: at this time, all switches on the secondary H-bridge remain off, with freewheeling only through their anti-parallel diodes. The primary H-bridge output pulse voltage + This causes the inductor current to rise. After being turned off, the inductor current freewheels through the anti-parallel diode on the secondary side, and the voltage across the inductor is clamped at approximately the forward voltage drop of the diode. The current slowly decreases to zero. This process can achieve the following:

[0257] (a) Regarding the output capacitor C o Pre-charging (through diode rectification effect);

[0258] (b) Establish the initial rise of the output voltage from 0V;

[0259] (c) The current stress of the switching transistor during startup is determined by D1 throughout the entire process.

[0260] Optionally, in the triangular waveform mode, D2 is decoupled from the ZCM constraint D2=D1 / M, allowing D2 to be adjusted independently within a certain range. At this time... It does not completely return to zero at the cycle boundary, but is corrected to zero through subsequent cycles (converging within 2-3 switching cycles). This approach sacrifices strict single-cycle ZCM, but gains greater power regulation flexibility, which is advantageous in transient conditions requiring rapid transitions through high-power pulses.

[0261] For example, the key waveform diagram in the triangular waveform pattern is as follows: Figure 5 As shown, the primary voltage V pri The timing changes include: In the triangular waveform mode, the conduction periods of the primary-side H-bridge and the secondary-side H-bridge do not overlap on the time axis (inter-bridge phase shift angle φ=0). Taking M>1 (buck voltage operation) as an example, within half a cycle, the primary-side H-bridge conducts first, outputting a positive voltage +V. in Continuous D1∙T s The circuit is turned off after a period of 2 seconds; subsequently, the secondary H-bridge is turned on, and the output voltage converted to the primary side is +nV. oContinuous D2∙T s The circuit is turned off after a period of 2 seconds. The primary and secondary voltage waveforms are spliced ​​together, and at most only one H-bridge outputs a non-zero voltage at any given time, which is different from the characteristic of the primary and secondary voltages always overlapping in traditional phase-shift modulation.

[0262] Secondary voltage V sec The response characteristics include: the on-time of the secondary H-bridge is aligned with the off-time of the primary H-bridge (φ=0), and the secondary-side conduction duration is D2×T. s After / 2, the circuit is turned off, and the primary and secondary H-bridges remain off until the end of the half-cycle. Power regulation does not depend on the phase shift angle, but is achieved by changing the primary duty cycle D1 and the secondary duty cycle D2. D1 is obtained by analytical calculation of power command and voltage gain, and D2 is determined by the ZCM volt-second balance constraint D2=D1 / M.

[0263] Current flowing through auxiliary inductor L The characteristics of a pure triangular waveform include: during the primary side's independent conduction phase [0, D1×T] s / 2], the inductor only withstands +V. in The current flows at a slope V in / L rises linearly from zero to peak i L,peak During the secondary-side independent conduction phase [D1×T] s / 2, (D1+D2) ×T s / 2], the inductor only withstands -nV. o (Reverted to the original side), the current flows at a slope of -nV o / L decreases linearly from its peak to zero. The inductor current is zero at the beginning and end of each switching cycle, which is a direct manifestation of the ZCM constraint.

[0264] D1× / 2 and D2× / 2 represents the duration of the current rising and falling phases, respectively. The duty cycle parameters D1 and D2 determine the peak value of the inductor current and the volt-second product balance. This triangular wave characteristic of the inductor current is key to achieving zero-current switching. By performing the switching action near the current zero-crossing point, switching losses can be effectively eliminated and current ripple can be suppressed.

[0265] Mode 2: Trapezoidal Mode

[0266] (1) Voltage waveform topology:

[0267] The voltage waveform topology of the trapezoidal waveform mode is as follows: the conduction periods of the primary-side H-bridge and the secondary-side H-bridge partially overlap on the time axis. The half-cycle [0, [ / 2] contains four stages:

[0268] [0, (Primary side conduction section only): Primary side H-bridge output + The secondary H-bridge is turned off (output voltage is zero).

[0269] [ , (Simultaneous conduction of primary and secondary sides / overlapping section): The primary side H-bridge continues to output + The secondary H-bridge simultaneously outputs +n (Reverted to the original side), the inductor withstands the voltage difference. -n ;

[0270] [ , (Secondary side conduction only): The primary H-bridge is turned off (output zero voltage), and the secondary H-bridge continues to output +n. ;

[0271] [ , / 2] (Zero-voltage plateau segment): Both the primary and secondary H-bridges are turned off, and the inductor current has returned to zero and remains at zero.

[0272] to During a given period, the primary and secondary voltages act simultaneously on the inductor (a characteristic not present in delta mode). ≈n Time platform segment / When the current is approximately 0, the inductor neither stores nor releases energy, and the power is directly transferred from the primary side to the secondary side during this period, resulting in optimal efficiency.

[0273] (2) Segmented analysis of inductor current:

[0274] Ascending segment [0, ]:

[0275] ;

[0276] ;

[0277] Platform segment [ , ]:

[0278] ;

[0279] when ≈n When the slope is approximately 0, the current is approximately constant; when > n It rises slowly; when < n Slowly descending

[0280] Descent segment [ , ]:

[0281] ;

[0282] End of descent Place ( )=0.

[0283] Zero current segment [ , / 2]:

[0284] ;

[0285] This section is a unique feature of this mode: the current is... After the current is zeroed out, the remaining time remains zero, with neither conduction loss nor return power.

[0286] (3) Derivation of ZCM constraints:

[0287] The current at the end of the falling segment is zero.

[0288] ;

[0289] ;

[0290] Will Expand: =( / L)× +( -n ) / L×( - );

[0291] Substituting into the equations, we obtain the ZCM constraint equations:

[0292] ;

[0293] Physical meaning: The magnetization volt-second product of the inductance in the rising segment plus the plateau segment must be equal to the demagnetization volt-second product of the inductance in the falling segment. (Three variables) , , The equation satisfies the condition that the number of independent control variables is 2 (usually chosen). and , (Determined by the equation).

[0294] (4) Power boundary:

[0295] The lower bound P of the trapezoidal patternmax,tri (M) (connected to the triangular pattern) arrive (Overlapping segments disappear, degenerating into a triangular pattern); Upper limit P max,trap (M) (corresponding to phase-shifting mode) arrive / 2 (The zero-current plateau disappears, and the current is at...) ( / 2 points exactly return to zero) and Reaching 0 (the rising segment disappears). Between the upper and lower limits, the trapezoidal pattern covers the medium power range.

[0296] (5) Significance of the zero-current plateau segment:

[0297] Zero-current plateau segment [ , / 2] Provides a safety margin: Due to parameter disturbances or sampling errors, the actual current returns to zero later than [previous time]. At that time, as long as the deviation does not exceed / 2- The current can still return to zero before the end of the half-cycle. During the zero-current segment, all switches are turned off, with no switching losses, no conduction losses, and no return power.

[0298] For example, the key waveform diagram of the trapezoidal waveform pattern is as follows: Figure 6 As shown, the primary voltage V pri The timing variations include: In trapezoidal waveform mode, the conduction periods of the primary-side H-bridge and the secondary-side H-bridge partially overlap on the time axis. Within half a cycle, the primary-side H-bridge conducts first, outputting +V. in , continued until The secondary H-bridge starts conducting at a certain moment; to The period is the overlapping conduction phase of the primary and secondary sides, during which the inductor simultaneously withstands +V. in and +nV o (Reverted to the original side), the voltage difference between the two ends is V. in -nV o ; When the primary H-bridge is turned off, the secondary H-bridge remains connected until... time; When the secondary H-bridge is turned off, the inductor current returns to zero, and thereafter... / 2 represents the zero-current plateau segment.

[0299] Secondary voltage V sec The response characteristics of the secondary H-bridge include: Conduction begins at a time later than the initial conduction time of the original side. Time (later than the original edge closing time) When the circuit is turned off, the primary and secondary voltage waveforms exhibit a nested, partially overlapping relationship. Power regulation does not depend on a single phase shift angle, but rather on three time parameters. , , Joint control. Among them, and As an independent control variable, The solution is obtained by solving the simultaneous power equations, which are determined by the ZCM constraint equations.

[0300] Current flowing through auxiliary inductor L The trapezoidal waveform characteristics include: the current sequentially undergoes four stages: the rising segment [0, With slope V in / L rises linearly from zero; plateau segment [ , With slope (V) in -nV o ) / L changes slowly (when V in ≈nV o When the slope approaches zero, the current is approximately constant, and power is directly transferred from the primary side to the secondary side); descent segment [ , With slope −nV o / L linearly decreases to zero; zero current segment [ , / 2] The current remains zero. to The zero-current plateau segment of / 2 is a unique feature that distinguishes the trapezoidal mode from the triangular mode, providing a safety margin for parameter disturbances and sampling errors.

[0301] Mode 3: Phase-Shift Mode

[0302] (1) Voltage waveform topology:

[0303] The voltage waveform topology of the phase-shifted waveform mode is as follows: both the primary-side H-bridge and the secondary-side H-bridge are turned on with a fixed 50% duty cycle (each bridge arm in / 2 conduction time for half the duration, square wave output). There is a time difference between the starting points of the conduction periods of the primary-side H-bridge and the secondary-side H-bridge, i.e., the inter-bridge phase shift angle φ (in time terms, δ=φ×). / (2π)), by adjusting φ to control the magnitude and direction of the power.

[0304] The duty cycle is fixed at 50% and cannot be adjusted; power regulation is controlled by a single variable, φ. The 50% duty cycle results in a complete AC square wave voltage waveform without DC components, suitable for high-power applications. This differs from delta and trapezoidal waveforms.

[0305] (2) Segmented analysis of inductor current:

[0306] Taking 0 < φ < π / 2 (forward power transfer) as an example, the inductor current is divided into two segments within half a cycle:

[0307] The first segment [0, δ]: original edge + Secondary edge -n (The negative half-cycle has not yet ended), the inductor voltage is +n :

[0308] ;

[0309] The second paragraph [δ, / 2]:Original edge+ Secondary edge + n The inductor voltage is -n :

[0310] ;

[0311] ZCM requires the endpoint t of this segment to be t= / 2 places =0.

[0312] (3) Derivation of ZCM constraint and solution of φ:

[0313] Depend on (0)=0 yields the current at the end of the first segment: (φ)=( +n ) / L× ;

[0314] Depend on ( Derivation of / 2)=0:

[0315] ;

[0316] ;

[0317] ;

[0318] With a phase shift angle φ = 2π / This indicates that the φ-M relationship under pure ZCM constraints is obtained:

[0319] ;

[0320] Combining the traditional PSM power formula with the ZCM constraint, we obtain the solution φ that simultaneously satisfies the power demand and the ZCM condition:

[0321] ;

[0322] When the equivalent is not less than 0, φ has a physically feasible solution. A value within the square root is less than 0, indicating that the required power exceeds the maximum transmission capacity of the phase-shifting mode under ZCM constraints, and it is necessary to switch to trapezoidal mode or enable frequency conversion control.

[0323] (4) Power boundary:

[0324] The maximum transmission power of the phase-shifting mode under ZCM constraints occurs at φ=π / 2:

[0325] ;

[0326] The global maximum value is reached when M=1. .

[0327] (5) Power Reverse:

[0328] when When φ is less than 0 (reverse power transfer), φ takes a negative value (the secondary H-bridge conduction period leads the primary H-bridge), the inductor current waveform shape remains unchanged (mirrored with respect to the time axis), the power direction reverses, and the ZCM condition ( = =0) remains constant.

[0329] For example, the key waveform diagram of the phase-shifting waveform mode is as follows: Figure 7 As shown, the primary voltage V pri The timing changes include: In phase-shifted waveform mode, the primary-side H-bridge outputs a square wave voltage with a fixed 50% duty cycle, and conducts T during half a cycle. s / 4 turns off; the secondary H-bridge also outputs a square wave voltage with a fixed duty cycle of 50%, but its turn-on start time is delayed (or advanced) relative to the primary H-bridge by a bridge phase shift angle φ, corresponding to the time δ=φ×T. s / (2π). The duty cycle is fixed and cannot be adjusted, which is the fundamental structural difference between the phase-shifting waveform mode and the delta and trapezoidal modes.

[0330] Secondary voltage V sec The response characteristics include: a horizontal displacement exists between the square wave output of the secondary H-bridge and the square wave output of the primary H-bridge, i.e., the inter-bridge phase shift angle φ. φ is the only power control variable in the phase-shifted waveform mode; φ increases when the power command increases and takes a negative value when the power is reversed. The specific value of φ is obtained analytically by simultaneously solving the ZCM constraints and the power equation.

[0331] The current i flowing through the auxiliary inductor L L The sinusoidal broken-line waveform characteristics include: taking forward power transmission (0<φ<π / 2) as an example, the current is divided into two segments within half a cycle: the first segment [0, δ] is subjected to V across the inductor. in +nV oThe current flows at a slope (V) in +nV o ) / L increases linearly from zero; the second segment [δ, T] s / 2] The inductor is subjected to V at both ends in -nV o The current flows at a slope (V) in -nV o The change in ) / L occurs in T s The value at point / 2 exactly returns to zero. The ZCM constraint requires i... L (0)=i L∙ (T s The constraint φ / 2)=0 is embedded in the analytical formula of φ, ensuring that the inductor current naturally returns to zero at the boundary in each switching cycle.

[0332] Power boundary curves and MP plane partitioning:

[0333] The applicable boundaries of the three modulation modes are determined by the voltage gain M and their respective power upper limits. Define the reference power:

[0334] ;

[0335] (1) Power limit of triangular waveform mode :

[0336] The triangular mode is subject to timing constraints of D1+D2≤1 and maximum duty cycle. Hard limit combined effect:

[0337] ;

[0338] When M≤ / (1- ) time (for =0.48, M≤0.923), the constraint D1+D2≤1 precedes Effective As M rises: = ×[M / (1+M)]²; when M> / (1- )hour, =0.48 becomes the hard limit. Constant to .

[0339] (2) Upper power limit of trapezoidal waveform mode :

[0340] Operating condition M≤1 (voltage reduction):

[0341] ;

[0342] M>1 operating condition (boost): constrained by ZCM = + / M≤ / 2 and ≤ / 2 Derivation, the maximum power of the trapezoidal mode ZCM is ×(1-1 / M). Considering the energy transfer of the actual PWM freewheeling phase, an overload factor is introduced. =1.2 Allows for slight ZCM errors at the boundaries to extend the applicability of the trapezoid:

[0343] ;

[0344] (3) Maximum power of phase-shifted waveform mode :

[0345] ;

[0346] (4) MP plane three-region division:

[0347] In the MP plane, three power boundary curves divide the working plane into three regions:

[0348] Triangle region (low power region): P< Applicable to triangular waveform mode (mode1).

[0349] Trapezoidal region (medium power region): ≤P≤ Applicable to trapezoidal waveform mode (mode2);

[0350] PSM region (high power region): P> Applicable to phase-shift waveform mode (mode3).

[0351] Optionally, the switching frequency can be increased based on the mode selection logic. As an additional degree of freedom for control. When in a given mode with the current... Unable to simultaneously meet power commands When constrained by ZCM (e.g., when the internal quantity is negative in phase-shifting mode), do not switch modes, but adjust... This allows the ZCM constraint to be satisfied again. Variable frequency extension can reduce the mode switching frequency, expand the applicable power range of each mode, and keep the ZCM condition unchanged.

[0352] Pattern boundary logic diagram as follows Figure 8 As shown, the transmission power boundary of the dual active bridge converter under different voltage matching conditions and modulation strategies is illustrated, and the three core operating mode regions are intuitively divided, which is an important basis for guiding the controller to perform mode switching and power closed-loop design.

[0353] The horizontal axis is defined as voltage gain M = nV o / V in The vertical axis represents the ratio of the equivalent voltage across the secondary side referred to the primary side to the input voltage. The vertical axis represents the output power P, in kilowatts (kW). The vertical dashed line M=1 indicates perfect voltage matching (i.e., nV). o =V in The reference state is reached when the phase-shifted waveform mode achieves the global maximum transmission power. When M deviates from 1, the triangular waveform mode, thanks to the structural advantage of non-overlapping primary and secondary conduction periods, can still maintain zero current boundary constraints over a wide voltage gain range.

[0354] The region boundaries clearly delineate the operating range of the converter:

[0355] Triangle region (low power region): corresponds to the triangle waveform mode, when the power command is below the maximum power boundary P of the triangle mode. max,tri When (M) is selected, the controller selects the triangular waveform mode. In this mode, the conduction periods of the primary and secondary sides do not overlap (φ=0), and the inductor current forms a pure triangle. The power is controlled by adjusting the duty cycle D1 of the primary side and the duty cycle D2 of the secondary side. The triangular mode is particularly suitable for light load conditions and conditions where the voltage gain M deviates significantly from 1, and it supports cold start with zero output voltage.

[0356] Trapezoidal Region (Medium Power Region): This operating mode corresponds to an inductor current exhibiting a trapezoidal waveform. When the power command is between P... max,tri (M) and P max,trap When the current is between (M) and (M), the controller selects the trapezoidal waveform mode. In this mode, the primary and secondary conduction periods partially overlap, and the inductor current includes a rising segment, a plateau segment, a falling segment, and a zero-current plateau segment. Power and the zero-current boundary are controlled by three time parameters t1, t2, and t3. The plateau segment enables direct power transfer, and the zero-current plateau segment provides a safety margin.

[0357] PSM region (high power region): corresponds to phase-shifted waveform mode. When the power command is higher than P... max,trap When (M), the controller selects the phase-shifted waveform mode. In this mode, both the primary and secondary H-bridges conduct with a fixed duty cycle of 50%, and the power is controlled by the inter-bridge phase shift angle φ. The PSM mode is suitable for heavy-load conditions near M≈1, where the current stress is minimal and the transmission efficiency is highest.

[0358] In actual operation, the maximum transmission power of the system is not only limited by the soft-switching boundaries of these modulation strategies, but also strictly constrained by the physical limits of the hardware circuit (such as the transformer saturation flux density, the maximum current handling capacity of the switching devices, and the saturation current of the auxiliary inductor L). The controller intelligently optimizes the switching between these three modes by monitoring the voltage transfer ratio M and power demand P in real time, thereby maximizing the overall efficiency of the converter across the entire voltage and load range.

[0359] Mode selection logic:

[0360] Based on the real-time voltage gain M=n / and power command Select the target modulation mode according to the following rules:

[0361] when < Time: Select the triangular waveform mode.

[0362] when ≤ ≤ When: Select trapezoidal waveform mode.

[0363] when > Time: Select phase-shift waveform mode.

[0364] in:

[0365] The maximum transmission power of the triangular waveform mode under a given M (determined by the physical upper limit of D1).

[0366] The maximum transmission power of the trapezoidal waveform mode at a given M (by...) ≤ / 2 is determined by timing constraints.

[0367] Mode switching occurs at the zero-crossing moment of the inductor current (at the cycle boundary). After switching, the new mode is used in the next switching cycle without the need for a gradual transition. Hysteresis control ΔPhyst (2%-5% of rated power) can be added to prevent frequent switching at the boundary.

[0368] Optionally, in addition to the three modes of triangular waveform, trapezoidal waveform, and phase-shifting waveform, a double-triangular waveform mode is added. This mode generates an independent triangular current pulse on both the primary and secondary sides, with the two pulses arranged sequentially within half a cycle to control the forward and reverse power transmission components, respectively. This mode is suitable for applications requiring fine-tuning of return power (such as grid-connected energy storage systems that need precise control of reactive power components), increasing the number of control variables to three (D1p, D1s, and the distance between them).

[0369] The core difference between the three modulation modes lies in the overlap of the primary-side H-bridge conduction period and the secondary-side H-bridge conduction period on the time axis. This topological difference determines the geometry of the current waveform, the physical mechanism of power transfer, and the number of control degrees of freedom. The structural comparison of the three modes is shown in the table below:

[0370]

[0371] The inductor current waveform during mode switching is as follows: Figure 9 As shown, the horizontal axis represents time (t), and the vertical axis represents the switching period (t). The scale is clearly divided into different working ranges; the vertical axis represents the instantaneous value of the current flowing through the auxiliary inductor (L). The entire waveform is represented by a line located at t=3. The vertical dashed line of / 2 divides the system into two parts, left and right. This dashed line represents the decision moment for switching the control system's execution mode, marked with " "=0 switching point" indicates that the controller strictly uses the natural zero-crossing point of the inductor current as the seamless switching boundary between different modes.

[0372] In 3 Before / 2, the system mainly operates in the triangular region. During this period, the inductor current exhibits a continuous triangular waveform, alternating between positive and negative values ​​and zero values ​​in each switching cycle. This waveform ensures that the switching transistor completes its state transition near the natural zero-crossing point of the current, thereby achieving zero-current turn-on and turn-off of the primary and secondary switching devices and effectively reducing switching losses.

[0373] In 3 At time / 2, the system triggers a mode switch from the triangular region to the trapezoidal region (or subsequently to the PSM region). Observing the waveforms before and after the switch point reveals that the controller precisely... The handover of control logic is completed at the moment =0. After entering the new mode, in order to adapt to different voltage transfer ratios (M) and power transfer requirements, the waveform characteristics of the inductor current change significantly, for example, transforming into a trapezoidal wave with a distinct flat top or a unipolar wave with alternating positive and negative values.

[0374] This multi-mode smooth switching mechanism based on zero current boundary enables the converter to maintain high operating efficiency over a wide voltage range and under full load conditions. It not only inherits the low switching loss advantage of the triangular region ZCS, but also effectively widens the soft switching range and reduces conduction losses and return power under high current conditions by introducing the trapezoidal region or PSM region. It is the core control method to improve the overall dynamic performance and steady-state efficiency of the DAB converter.

[0375] The control execution process includes:

[0376] Step S1 (Sampling): At the beginning of each switching cycle (when the inductor current is zero), sample the current input voltage. Output voltage Calculate voltage gain =n / According to the reference voltage and output current Calculate power command .

[0377] Step S2 (Mode Selection): According to and exist Figure 8 The target modulation mode is selected according to the rules based on the position in the middle.

[0378] Step S3 (Switch-on Timing Analysis and Calculation): Based on the selected target mode, the preset analysis formula for the corresponding mode is called to calculate the set of switch-on timings for this cycle. , ...}. Triangular model calculations: D1 and D2 = D1 / M; Trapezoidal model: Solving by simultaneously solving the ZCM constraint equations and power equations. , , The phase-shifting mode is calculated directly from the analytical formula for φ.

[0379] Step S4 (PWM Generation): Convert the switching moment into the PWM comparison value of each switching transistor and write it into the PWM comparison register of the DSP / FPGA. Drive each switching transistor according to the PWM signal within this switching cycle. At the end of the cycle, the inductor current returns to zero, and the process returns to step S1 to start the next cycle.

[0380] like Figure 3 As shown in the figure, this application embodiment also provides a modulation device 900 for a dual active bridge converter, including: a data acquisition module 902 for acquiring input voltage, output voltage, and output current; an instruction determination module 904 for determining voltage gain based on input voltage and output voltage, and determining power instruction based on output voltage and output current; a mode determination module 906 for determining a target modulation mode among triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode based on voltage gain and power instruction; a timing determination module 908 for determining the set of switching times of the primary H-bridge and secondary H-bridge within the current switching cycle based on the switching time analysis formula corresponding to the target modulation mode; and a drive generation module 910 for determining a pulse width modulation comparison value based on the set of switching times, and writing the pulse width modulation comparison value into a pulse width modulation comparison register to drive the switching transistors in the primary H-bridge and secondary H-bridge.

[0381] Among them, the triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary and secondary H-bridges are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary and secondary H-bridges within half a switching cycle is determined by the phase shift angle between the bridges.

[0382] Furthermore, in the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

[0383] In some embodiments, optionally, the mode determination module is further configured to: determine a first power boundary of the triangular waveform mode and a second power boundary of the trapezoidal waveform mode based on the voltage gain; determine the triangular waveform mode as the target modulation mode when the power command is less than the first power boundary; determine the trapezoidal waveform mode as the target modulation mode when the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary; and determine the phase-shifting waveform mode as the target modulation mode when the power command is greater than the second power boundary.

[0384] In some embodiments, the drive generation module is optionally further configured to: update the pulse width modulation comparison register at the zero-crossing moment of the inductor current of the auxiliary inductor, and set the hysteresis power width according to the difference between the power command and the first power boundary or the second power boundary, so as to suppress the target modulation mode from switching back and forth near the power boundary.

[0385] In this invention, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; the term "multiple" refers to two or more unless otherwise explicitly defined. The terms "install," "connect," "link," and "fix" should be interpreted broadly. For example, "connect" can be a fixed connection, a detachable connection, or an integral connection; "link" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0386] In the description of this invention, it should be understood that the terms "upper," "lower," "left," "right," "front," "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or unit referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0387] In the description of this specification, the terms "one embodiment," "some embodiments," "specific embodiment," etc., refer to specific features, structures, materials, or characteristics described in connection with an embodiment or example that are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0388] The above are merely preferred embodiments of the present invention and are not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A modulation method for a dual active bridge converter, characterized in that, The modulation method is executed by the controller of a dual active bridge converter, which includes a primary-side H-bridge, a secondary-side H-bridge, and an auxiliary inductor connected between the primary-side H-bridge and the secondary-side H-bridge. The primary-side H-bridge is connected to the DC input side, and the secondary-side H-bridge is connected to the DC output side. Obtain the input voltage, output voltage, and output current of the dual active bridge converter; The voltage gain is determined based on the input voltage and the output voltage, and the power command is determined based on the output voltage and the output current. Based on the voltage gain and the power command, a target modulation mode is determined among the triangular waveform mode, trapezoidal waveform mode, and phase-shifting waveform mode; Based on the analytical formula for the switching time corresponding to the target modulation mode, determine the set of switching times of the primary H-bridge and the secondary H-bridge within the current switching cycle; The pulse width modulation comparison value is determined based on the set of switching times, and the pulse width modulation comparison value is written into the pulse width modulation comparison register to drive the switching transistors in the primary H-bridge and the secondary H-bridge. The triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary H-bridge and the secondary H-bridge are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary H-bridge and the secondary H-bridge within half a switching cycle is determined by the inter-bridge phase shift angle. Furthermore, in the triangular waveform mode, the trapezoidal waveform mode, and the phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

2. The modulation method according to claim 1, characterized in that, Determining the target modulation mode among the triangular waveform mode, trapezoidal waveform mode, and phase-shifted waveform mode based on the voltage gain and the power command includes: The first power boundary of the triangular waveform mode and the second power boundary of the trapezoidal waveform mode are determined based on the voltage gain. When the power command is less than the first power boundary, the triangular waveform pattern is determined as the target modulation pattern; When the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary, the trapezoidal waveform pattern is determined as the target modulation mode; When the power command is greater than the second power boundary, the phase-shifting waveform mode is determined as the target modulation mode.

3. The modulation method according to claim 2, characterized in that, In the triangular waveform mode, half a switching cycle includes, in sequence, the primary side conducting alone, the secondary side conducting alone, and the zero-voltage stage in which both the primary and secondary sides are turned off. During the primary-side single-conduction phase, the primary-side H-bridge outputs a positive input voltage, the secondary-side H-bridge does not output an effective bridge voltage, and the inductor current of the auxiliary inductor rises from zero. During the secondary-side independent conduction phase, the primary-side H-bridge does not output an effective bridge voltage, the secondary-side H-bridge outputs an output voltage referred to the primary side, and the inductor current of the auxiliary inductor drops to zero. During the zero-voltage phase, both the upper and lower transistors of the primary-side H-bridge and the secondary-side H-bridge are in the off state, and the inductor current of the auxiliary inductor remains zero until half a switching cycle ends. The analytical formula for the switching timing includes: ； Where D1 is the primary side duty cycle, D2 is the secondary side duty cycle, and M is the voltage gain; The controller determines the primary duty cycle based on the power command, the input voltage, the inductance value of the auxiliary inductor, and the switching frequency, and determines the set of switching times based on the primary duty cycle and the secondary duty cycle.

4. The modulation method according to claim 3, characterized in that, When the output voltage is zero, the controller configures the switching transistor of the secondary H-bridge to the off state and controls the primary H-bridge to output a pulse voltage, so that the inductor current of the auxiliary inductor freewheels through the anti-parallel diode of the secondary H-bridge to precharge the output capacitor on the DC output side.

5. The modulation method according to claim 2, characterized in that, In the trapezoidal waveform mode, half a switching cycle includes, in sequence, the primary side conducting alone corresponding to the first time parameter, the primary and secondary sides conducting overlappingly from the first time parameter to the second time parameter, the secondary side conducting alone from the second time parameter to the third time parameter, and the zero current stage from the third time parameter to the end of the half switching cycle. During the primary-side conduction phase, the inductance current of the auxiliary inductor rises from zero. During the primary and secondary side overlap conduction phase, the auxiliary inductor bears the voltage difference between the input voltage and the output voltage referred to the primary side; During the secondary side's independent conduction phase, the inductance current of the auxiliary inductor drops to zero; During the zero-current phase, neither the primary-side H-bridge nor the secondary-side H-bridge outputs an effective bridge voltage, and the inductor current of the auxiliary inductor remains zero. The controller determines the first time parameter, the second time parameter, and the third time parameter based on the zero current boundary constraint equation and the power command, and determines the set of switching times based on the first time parameter, the second time parameter, and the third time parameter. The zero-current boundary constraint equation characterizes the sum of the magnetization volt-second products of the auxiliary inductor during the primary-side-only conduction phase and the primary-side-overlapping conduction phase, which is equal to the demagnetization volt-second product during the secondary-side-only conduction phase.

6. The modulation method according to claim 2, characterized in that, In the phase-shifted waveform mode, both the primary H-bridge and the secondary H-bridge output bridge arm voltage with a 50% duty cycle. The controller determines the inter-bridge phase shift angle based on the combined analytical results of the zero-current boundary constraint and the power command; When the discriminant in the analytical expression of the inter-bridge phase shift angle is less than zero, the controller determines that the power command exceeds the transmission power range of the phase-shift waveform mode under the zero current boundary constraint, and generates a mode switching command to switch to the trapezoidal waveform mode, or generates a frequency adjustment command to adjust the switching frequency. When the discriminant in the analytical expression of the inter-bridge phase shift angle is greater than or equal to zero, the controller determines the set of switching times based on the inter-bridge phase shift angle.

7. The modulation method according to any one of claims 1 to 6, characterized in that, The controller updates the pulse width modulation comparison register when the inductor current of the auxiliary inductor crosses zero, and sets the hysteresis power width according to the difference between the power command and the first power boundary or the second power boundary, so as to suppress the target modulation mode from switching back and forth near the power boundary.

8. A modulation device for a dual active bridge converter, characterized in that, include: The data acquisition module is used to acquire input voltage, output voltage, and output current. The instruction determination module is used to determine the voltage gain based on the input voltage and the output voltage, and to determine the power instruction based on the output voltage and the output current; The mode determination module is used to determine the target modulation mode among the triangular waveform mode, trapezoidal waveform mode and phase-shifting waveform mode according to the voltage gain and the power command; The timing determination module is used to determine the set of switching times of the primary H-bridge and the secondary H-bridge within the current switching cycle according to the switching timing analysis formula corresponding to the target modulation mode. The driver generation module is used to determine the pulse width modulation comparison value according to the set of switch switching times, and write the pulse width modulation comparison value into the pulse width modulation comparison register to drive the switching transistors in the primary H-bridge and the secondary H-bridge. The triangular waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge do not overlap within half a switching cycle; the trapezoidal waveform mode is a mode in which the conduction period of the primary H-bridge and the conduction period of the secondary H-bridge partially overlap within half a switching cycle; and the phase-shifting waveform mode is a mode in which both the primary H-bridge and the secondary H-bridge are turned on with a fixed duty cycle, and the amount of overlap between the conduction periods of the primary H-bridge and the secondary H-bridge within half a switching cycle is determined by the inter-bridge phase shift angle. Furthermore, in the triangular waveform mode, the trapezoidal waveform mode, and the phase-shifting waveform mode, the inductor current of the auxiliary inductor is zero at both the beginning and end of the switching cycle.

9. The modulation apparatus for a dual active bridge converter according to claim 8, characterized in that, The pattern determination module is also used for: The first power boundary of the triangular waveform mode and the second power boundary of the trapezoidal waveform mode are determined based on the voltage gain. When the power command is less than the first power boundary, the triangular waveform pattern is determined as the target modulation pattern; When the power command is greater than or equal to the first power boundary and less than or equal to the second power boundary, the trapezoidal waveform pattern is determined as the target modulation mode; When the power command is greater than the second power boundary, the phase-shifting waveform mode is determined as the target modulation mode.

10. The modulation apparatus for a dual active bridge converter according to claim 8, characterized in that, The driver generation module is also used for: The pulse width modulation comparator register is updated when the inductor current of the auxiliary inductor crosses zero, and the hysteresis power width is set according to the difference between the power command and the first power boundary or the second power boundary to suppress the target modulation mode from switching back and forth near the power boundary.

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