Synchronous rectification control method and device of LLC resonant converter and storage medium

Abstract

The application relates to a synchronous rectification control method and device of an LLC resonant converter and a storage medium. At least one conduction timing parameter of a rectifier tube in the LLC resonant converter is acquired, the at least one conduction timing parameter is shortened, the difference between the shortened conduction timing parameter and a preset anti-continuity dead time length is less than a preset time length difference corresponding to the conduction timing parameter, and the rectifier tube is controlled to perform synchronous rectification according to the shortened conduction timing parameter. According to the application, the conduction timing parameter is shortened, the conduction timing parameter is gradually fine-tuned, the rectifier tube is gradually turned on, current and voltage are prevented from suddenly changing at the moment of switching, the transient stress impact of the rectifier tube is greatly reduced, a too large preset anti-continuity dead time length does not need to be artificially reserved, the freewheeling circulation and the switching loss are effectively reduced, the dual requirements of low device stress and low switching loss are considered on the premise of guaranteeing the safety bottom line of anti-continuity.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a synchronous rectification control method, apparatus and storage medium for an LLC resonant converter. Background Technology

[0002] Inductor-inductor-capacitor resonant converters (LLC resonant converters) are widely used in bidirectional energy storage power supplies, new energy vehicle charging and discharging, and industrial power supplies due to their advantages such as soft-switching characteristics, high efficiency, and high power density. They feature both charging and discharging modes and have extremely high requirements for energy conversion efficiency, operational stability, and device reliability. To improve energy conversion efficiency, synchronous rectification (SR) technology is commonly used. This technology replaces diodes with metal-oxide-semiconductor field-effect transistors (MOS transistors) and performs active switching control, thereby significantly reducing conduction losses and improving system efficiency.

[0003] Currently, the turn-on time of synchronous rectifier MOSFETs is usually calculated by software or control logic, and a fixed shoot-through dead time is often used to avoid cross-conduction between the upper and lower bridge arms. However, a fixed shoot-through dead time cannot simultaneously meet the requirements of reducing switching losses and minimizing stress impact. Summary of the Invention

[0004] Therefore, it is necessary to provide a synchronous rectification control method, device, and storage medium for LLC resonant converters that can simultaneously reduce switching losses and stress impacts, in order to address the aforementioned technical problems.

[0005] In a first aspect, this application provides a synchronous rectification control method for an LLC resonant converter, the method comprising:

[0006] Obtain at least one conduction timing parameter for the rectifier diode in the LLC resonant converter; wherein the conduction timing parameter includes a delayed conduction duration and an early turn-off duration; the delayed conduction duration is the duration by which the rectifier diode is delayed from the start time of the common conduction interval of the main bridge arm diodes in the LLC resonant converter, and the early turn-off duration is the duration by which the rectifier diode is turned off early from the end time of the common conduction interval;

[0007] The at least one conduction timing parameter is shortened such that the difference between the shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter; wherein, the preset duration difference corresponding to the delayed conduction duration is the first preset duration difference, and the preset duration difference corresponding to the early shutdown duration is the second preset duration difference.

[0008] Based on the shortened conduction timing parameters, the rectifier tube is controlled to perform synchronous rectification.

[0009] In one embodiment, shortening the at least one conduction timing parameter includes:

[0010] The iterative steps are executed repeatedly until the difference between the shortened conduction timing parameters and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameters;

[0011] The iterative steps include: shortening the current conduction timing parameters according to the adjustment step size corresponding to the conduction timing parameters, and using the shortened conduction timing parameters as the conduction timing parameters for the next conduction;

[0012] Wherein, the adjustment step size corresponding to the delayed turn-on duration is the first adjustment step size, and the adjustment step size corresponding to the early turn-off duration is the second adjustment step size.

[0013] In one embodiment, the method further includes determining an initial margin duration, including:

[0014] The resonant frequency deviation rate of the LLC resonant converter is determined based on the inductance tolerance and capacitance tolerance of the LLC resonant converter.

[0015] The first candidate duration is determined based on the resonant frequency deviation rate and the equivalent quality factor of the LLC resonant converter;

[0016] The second candidate duration is determined based on the turn-on delay of the rectifier tube;

[0017] The initial margin duration is determined based on the first candidate duration and the second candidate duration;

[0018] The initial margin duration is the additional conduction time reserved relative to the preset anti-straight-through dead zone duration when the rectifier tube is first turned on.

[0019] In one embodiment, the conduction timing parameter includes the delayed conduction duration; obtaining the at least one conduction timing parameter includes:

[0020] The delayed conduction duration is determined based on the initial margin duration, the preset anti-shoot-through dead zone duration, and the phase shift value of the main bridge arm tube; wherein the phase shift value is determined based on the actual voltage of the device to be controlled by the LLC resonant converter and the preset target voltage.

[0021] In one embodiment, determining the delayed conduction duration based on the initial margin duration, the preset anti-straight-through dead zone duration, and the phase shift value includes:

[0022] The basic delay conduction time is determined based on the preset anti-straight-through dead zone duration and the initial margin duration;

[0023] If the phase shift value indicates that there is no phase shift in the main bridge arm tube, the delayed conduction duration is determined to be equal to the basic delayed conduction duration.

[0024] Alternatively, if the phase shift value indicates that the main bridge arm tube has a phase shift, a phase shift count value is determined based on the phase shift value and a preset conduction event, and the delayed conduction duration is determined based on the sum of the duration corresponding to the phase shift count value and the basic delayed conduction duration; wherein, the preset conduction event is determined based on the count value output by the timer of the PWM module in the processor.

[0025] In one embodiment, determining the basic delay conduction duration based on the preset anti-straight-through dead zone duration and the initial margin duration includes:

[0026] Determine the sum of the preset anti-straight-through dead zone duration and the initial margin duration;

[0027] When the current conduction is the first conduction, the sum is determined to be the basic delay conduction duration;

[0028] Alternatively, if the current conduction is not the first conduction, the difference between the sum and the first shortened total duration is determined as the basic delayed conduction duration; wherein, the first shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the first adjustment step size.

[0029] In one embodiment, the phase shift count value includes a first phase shift count value; determining the phase shift count value based on the phase shift value and a preset conduction event includes:

[0030] Obtain the period value of the LLC resonant converter;

[0031] When the preset conduction event is the first preset conduction event, the first phase shift count value is determined based on the product of the phase shift value and the period value; wherein, the first preset conduction event indicates that the main bridge arm transistor is controlled to conduct when the count value output by the timer of the PWM module in the processor rises to the first comparison value, and the first comparison value is the sum of the first phase shift count value and the count value corresponding to the preset anti-shoot-through dead time.

[0032] In one embodiment, the phase-shift count value further includes a second phase-shift count value; the method further includes:

[0033] When the preset conduction event is the second preset conduction event, the second phase shift count value is determined based on the difference between the period value and the first phase shift count value; wherein, the second preset conduction event indicates that the main bridge arm transistor is controlled to conduct when the count value output by the timer of the PWM module in the processor drops to the second comparison value, and the second comparison value is the difference between the second phase shift count value and the count value corresponding to the preset anti-shoot-through dead time.

[0034] In one embodiment, the conduction timing parameter includes the early shutdown duration; obtaining the at least one conduction timing parameter includes:

[0035] The early shutdown duration is determined based on the initial margin duration and the preset anti-straight-through dead zone duration; wherein, determining the early shutdown duration includes:

[0036] When the current conduction is the first conduction, the sum of the preset anti-straight-through dead zone duration and the initial margin duration is determined to be the early shutdown duration;

[0037] If the current conduction is not the first conduction, the difference between the sum and the second shortened total duration is determined as the early shutdown duration; wherein, the second shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the second adjustment step size.

[0038] In one embodiment, the method further includes determining the first adjustment step size and the second adjustment step size:

[0039] The upper limit of the adjustment step size is determined based on the resonant frequency deviation rate, the equivalent quality factor, and the conduction time corresponding to the complete conduction of the rectifier tube.

[0040] The lower limit of the adjustment step size is determined based on the initial margin duration, the conduction duration corresponding to the complete conduction of the rectifier tube, and the clock frequency of the timer of the PWM module in the processor.

[0041] The first adjustment step and the second adjustment step are determined based on the upper limit value and the lower limit value of the adjustment step.

[0042] Secondly, this application also provides a synchronous rectification control device for an LLC resonant converter, including a processor and a memory, wherein the memory stores a computer program, and the processor executes the computer program to implement the synchronous rectification control method described in any of the first aspects.

[0043] Thirdly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method steps provided in the first aspect.

[0044] Fourthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the method steps provided in the first aspect.

[0045] The aforementioned synchronous rectification control method, device, and storage medium for an LLC resonant converter acquire at least one conduction timing parameter of the rectifier diodes in the LLC resonant converter, shorten at least one conduction timing parameter, and make the difference between the shortened conduction timing parameter and the preset anti-shoot-through dead zone duration less than the preset duration difference corresponding to the conduction timing parameter. Based on the shortened conduction timing parameter, the rectifier diodes are controlled to perform synchronous rectification. The conduction timing parameter includes a delayed conduction duration and an early turn-off duration. The delayed conduction duration is the duration by which the rectifier diode is delayed from the start of the common conduction interval of the main bridge arm diodes in the LLC resonant converter, and the early turn-off duration is the duration by which the rectifier diode is turned off early from the end of the common conduction interval. The preset duration difference corresponding to the delayed conduction duration is the first preset duration difference, and the preset duration difference corresponding to the early turn-off duration is the second preset duration difference. This application embodiment shortens the conduction timing parameters, enabling gradual fine-tuning of the conduction timing parameters and smooth turn-on of the rectifier diodes. This avoids sudden changes in current and voltage during switching, significantly reducing transient stress impacts during rectifier diode turn-on and turn-off. Moreover, it eliminates the need for excessively long preset anti-shoot-through dead time, effectively reducing freewheeling current and switching losses. While ensuring the safety baseline for anti-shoot-through, it also meets the dual requirements of low device stress and low switching losses. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1This is a schematic diagram of an LLC resonant converter in one embodiment;

[0048] Figure 2 This is a schematic diagram of the first pulse in the discharge mode of one embodiment;

[0049] Figure 3 This is a schematic diagram of the first pulse in the charging mode of one embodiment;

[0050] Figure 4 This is a flowchart illustrating the synchronous rectification control method for an LLC resonant converter in one embodiment;

[0051] Figure 5 This is a flowchart illustrating the method for determining the initial margin duration in one embodiment;

[0052] Figure 6 This is a flowchart illustrating a method for determining the delayed conduction duration in one embodiment;

[0053] Figure 7 This is a flowchart illustrating a method for determining the basic delay on-time in one embodiment;

[0054] Figure 8 This is a schematic diagram of the conduction timing parameters in one embodiment;

[0055] Figure 9 This is a schematic diagram of the conduction timing parameters in another embodiment;

[0056] Figure 10 This is a flowchart illustrating the method for determining the first and second adjustment step sizes in one embodiment.

[0057] Figure 11 This is a schematic diagram of the second pulse in the discharge mode of one embodiment;

[0058] Figure 12 This is a schematic diagram of the third pulse in the discharge mode of one embodiment;

[0059] Figure 13 This is a schematic diagram of the second pulse in the charging mode of one embodiment;

[0060] Figure 14 This is a schematic diagram of the third pulse in the charging mode of one embodiment. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0062] It should be noted that the terms "first", "second" and the like used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from a second element. The terms "comprising" and "having" used in this application, and any variations thereof, are intended to cover non-exclusive inclusion. The term "plurality" used in this application refers to two or more than two. The term "and / or" used in this application refers to one of the solutions, or any combination of multiple solutions.

[0063] The synchronous rectification control method for an LLC resonant converter provided by the embodiments of the present application can be applied to Figure 1 the application environment shown in Figure 1 is a schematic diagram of an LLC resonant converter in one embodiment. The LLC resonant converter comprises a main bridge arm and a rectifier bridge. Synchronous rectification control performed on the LLC resonant converter shown in Figure 1 includes control in a discharge mode and a charging mode. As shown in Figure 2 , without considering the preset shoot-through prevention dead time duration, Figure 2 is a first pulse schematic diagram in a discharge mode according to one embodiment; in the discharge mode, 5A, 5B, 6A, and 6B are main bridge arm switches in the main bridge arm of the LLC, and 7A, 7B, 8A, and 8B are rectifier switches in the rectifier bridge. The rectifier switches 7A and 8B need to be turned on when the main bridge arm switches 5A and 6B are both at high level; the rectifier switches 7B and 8A need to be conducted when the main bridge arm switches 5B and 6A are both at high level. Taking the main bridge arm switches 5A and 6B as an example, the waveform generation logic of the main bridge arm switch 5A is that when the count value equals ZERO, it is set to low level, and when the count value equals PRD, it is set to high level; the waveform generation logic of the main bridge arm switch 6B is that when the count value equals A, it is set to low level, and when the count value equals B, it is set to high level. It can be known from the waveform logic of the first pulse that the section where the main bridge arm switches 5A and 6B are both at high level is the interval where the count value is from B to ZERO, therefore, the turn-on condition for the rectifier switches 7A and 8B is the interval where the count value is from B to ZERO. The rectifier switches and the main bridge arm switches can be MOS transistors.

[0064] When the preset shoot-through prevention dead time duration is considered, that is, based on the above, the high level is set after the preset shoot-through prevention dead time duration.

[0065] The LLC resonant converter of the present application can realize bidirectional flow of energy. As shown in Figure 3 , Figure 3This is a schematic diagram of the first pulse in the charging mode of one embodiment. In the charging mode, 7A, 7B, 8A, and 9B are the main bridge arm transistors, and 5A, 5B, 6A, and 6B are the rectifier transistors in the rectifier bridge. The driving logic of the charging mode is a mirror image of the discharging mode. In the charging mode, rectifier transistors 5A and 6B need to be turned on when both main bridge arm transistors 7A and 8B are high; rectifier transistors 5B and 6A need to be turned on when both main bridge arm transistors 7B and 8A are high.

[0066] In one exemplary embodiment, such as Figure 4 As shown, a synchronous rectification control method for an LLC resonant converter is provided, which can be applied to... Figure 1 The following explanation uses a processor connected to an LLC resonant converter as an example, including the following steps S201 to S203. Wherein:

[0067] S201, obtain at least one conduction timing parameter of the rectifier in the LLC resonant converter; wherein, the conduction timing parameter includes a delayed conduction duration and an early turn-off duration; the delayed conduction duration is the duration by which the rectifier is delayed from the start of the common conduction interval of the main bridge arm tubes in the LLC resonant converter, and the early turn-off duration is the duration by which the rectifier is turned off early from the end of the common conduction interval.

[0068] In this embodiment, the resonant frequency deviation rate of the LLC resonant converter can be determined based on the inductance tolerance and capacitance tolerance of the LLC resonant converter. A first candidate duration can be determined based on the resonant frequency deviation rate and the equivalent quality factor of the LLC resonant converter. A second candidate duration can be determined based on the turn-on delay of the rectifier diode. An initial margin duration can be determined based on the first and second candidate durations. The initial margin duration is the additional conduction duration reserved relative to the preset anti-shoot-through dead zone duration when the rectifier diode is first turned on.

[0069] Furthermore, the delayed turn-on time is determined based on the initial margin duration, the preset anti-shoot-through dead time, and the phase shift value of the main bridge arm transistor. The early turn-off time is also determined based on the initial margin duration and the preset anti-shoot-through dead time. The phase shift value is determined based on the actual voltage of the controlled device in the LLC resonant converter and the preset target voltage.

[0070] In one possible implementation, a hardware capture unit combined with a zero-crossing detection circuit is used to synchronously capture the start and end times of the common conduction interval of the primary main bridge arm tubes, as well as the actual turn-on and actual turn-off times of the rectifier tubes. The delayed conduction duration is obtained by subtracting the start time of the common conduction interval from the actual turn-on time, and the early turn-off duration is obtained by subtracting the actual turn-off time from the end time of the common conduction interval.

[0071] In another possible implementation, multiple sets of delayed turn-on durations and early turn-off durations corresponding to different operating conditions can be obtained in advance through simulation or whole-machine calibration and stored as a lookup table array. The processor obtains the current phase shift value, output load, and operating temperature, indexes the lookup table array, and performs interpolation calculations using the lookup nodes obtained in the lookup table array to obtain the current turn-on delay duration and early turn-off duration.

[0072] S202, shorten at least one conduction timing parameter so that the difference between the shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter; wherein, the preset duration difference corresponding to the delayed conduction duration is the first preset duration difference, and the preset duration difference corresponding to the early shutdown duration is the second preset duration difference.

[0073] In this embodiment, the current conduction timing parameter is shortened according to the adjustment step size corresponding to the conduction timing parameter, and the shortened conduction timing parameter is used as the conduction timing parameter for the next conduction. If the difference between the next conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter, the conduction timing parameter for the next conduction is not shortened further. If the difference between the next conduction timing parameter and the preset anti-straight-through dead zone duration is not less than the preset duration difference corresponding to the conduction timing parameter, the conduction timing parameter for the next conduction is shortened according to the adjustment step size corresponding to the conduction timing parameter, until the difference between the latest shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter.

[0074] In one possible implementation, the first moment corresponding to the initial conduction timing parameters and the second moment satisfying the constraint condition (i.e., the difference between the shortened conduction timing parameters and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameters) can be obtained. The time difference between the first and second moments is determined, and the time difference is divided into equal intervals according to the preset number of conductions to obtain the conduction timing parameters corresponding to each number of conductions. Conduction is performed based on the corresponding conduction timing parameters each time conduction occurs until the difference between the latest conduction timing parameters and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameters.

[0075] The difference between the shortened delayed conduction time and the preset anti-straight-through dead zone time is less than the first preset time difference. This can be understood as follows: when there is no phase shift in the main bridge arm tube, the shortened delayed conduction time is as equal as possible to the preset anti-straight-through dead zone time; when there is phase shift in the main bridge arm tube, the shortened delayed conduction time is as equal as possible to the sum of the preset anti-straight-through dead zone time and the phase shift time.

[0076] The difference between the shortened early shutdown duration and the preset anti-straight-through dead zone duration is less than the second preset duration difference, and the shortened early shutdown duration is as equal as possible to the preset anti-straight-through dead zone duration.

[0077] Optionally, when there is no phase shift in the main bridge boom tube, the first preset duration difference and the second preset duration difference can be the same or different; when there is phase shift in the main bridge boom tube, the first preset duration difference is greater than the second preset duration difference.

[0078] S203 controls the rectifier tube to perform synchronous rectification based on the shortened conduction timing parameters.

[0079] In this embodiment, the processor configures the shortened turn-on timing parameters to the logic device, which then performs the timing transformation between turn-on delay and early turn-off, and outputs the transformed drive signal to control the rectifier.

[0080] In the aforementioned synchronous rectification control method for the LLC resonant converter, at least one conduction timing parameter of the rectifier tube in the LLC resonant converter is obtained, and at least one conduction timing parameter is shortened so that the difference between the shortened conduction timing parameter and the preset anti-shoot-through dead zone time is less than the preset time difference corresponding to the conduction timing parameter. Based on the shortened conduction timing parameter, the rectifier tube is controlled to perform synchronous rectification. The conduction timing parameter includes a delayed conduction time and an early turn-off time. The delayed conduction time is the time by which the rectifier tube is delayed from the start of the common conduction interval of the main bridge arm tube in the LLC resonant converter, and the early turn-off time is the time by which the rectifier tube is turned off early from the end of the common conduction interval. The preset time difference corresponding to the delayed conduction time is the first preset time difference, and the preset time difference corresponding to the early turn-off time is the second preset time difference. This application embodiment shortens the conduction timing parameters, enabling gradual fine-tuning of the conduction timing parameters and smooth turn-on of the rectifier diodes. This avoids sudden changes in current and voltage during switching, significantly reducing transient stress impacts during rectifier diode turn-on and turn-off. Moreover, it eliminates the need for excessively long preset anti-shoot-through dead time, effectively reducing freewheeling current and switching losses. While ensuring the safety baseline for anti-shoot-through, it also meets the dual requirements of low device stress and low switching losses.

[0081] In an exemplary embodiment, shortening at least one conduction timing parameter includes: repeatedly executing an iterative step until the difference between the shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter; the iterative step includes: shortening the currently conducted conduction timing parameter according to the adjustment step size corresponding to the conduction timing parameter, and using the shortened conduction timing parameter as the conduction timing parameter for the next conduction; wherein, the adjustment step size corresponding to the delayed conduction duration is the first adjustment step size, and the adjustment step size corresponding to the early shutdown duration is the second adjustment step size.

[0082] The adjustment step size can be a preset fixed step size that remains the same in each conduction process, or it can change continuously during the conduction process, meaning the adjustment step size changes continuously in each conduction process.

[0083] In this embodiment of the application, the iterative steps are executed repeatedly. If the difference between the shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter, the conduction timing parameter corresponding to the current conduction of the rectifier tube is used as the conduction timing parameter corresponding to the next conduction and subsequent conduction of the rectifier tube.

[0084] In this embodiment, a soft-start gradual convergence is achieved through iterative looping, gradually enlarging the conduction window of the rectifier tube to avoid directly pulling the conduction timing parameters to a minimum value at once, thus preventing large instantaneous current and voltage stress and achieving flexible start-up of the rectifier tube.

[0085] Figure 5 This is a flowchart illustrating the method for determining the initial margin duration in one embodiment, as shown below. Figure 5 As shown, it includes the following steps:

[0086] S301, determine the resonant frequency deviation rate of the LLC resonant converter based on the inductance tolerance and capacitance tolerance of the LLC resonant converter.

[0087] In the embodiments of this application, based on Determine the resonant frequency of the LLC resonant converter , where Cr represents the resonant capacitance value of the LLC resonant converter.

[0088] Because both the resonant inductance and resonant capacitance values ​​are subject to manufacturing errors and temperature drift, the resonant frequency can have multiple values, depending on... Determine the deviation rate of multiple candidate resonant frequencies, where fs represents the actual switching frequency of the LLC resonant converter.

[0089] The candidate resonant frequency deviation rate with the largest absolute value is determined from multiple candidate resonant frequency deviation rates as the final resonant frequency deviation rate. That is, in The candidate resonant frequency deviation rate at its maximum is the resonant frequency deviation rate. .

[0090] Since the above is a mathematical definition, this application is based on... Determine the resonant frequency deviation rate ,in, For the inductance tolerance of the LLC resonant converter, For the capacitance tolerance of the LLC resonant converter, This refers to the nominal value of the resonant inductance of the LLC resonant converter. This refers to the nominal value of the resonant capacitance of the LLC resonant converter. This indicates the frequency deviation rate caused by temperature drift.

[0091] S302, determine the first candidate duration based on the resonant frequency deviation rate and the equivalent quality factor of the LLC resonant converter.

[0092] In the embodiments of this application, it can be based on and Determine the initial quality factor Q, where, Vbat represents the equivalent AC load resistance of the rectifier bridge, filter, and load on the secondary side of the LLC resonant converter, referred to the primary side of the LLC resonant converter. The equivalent AC load resistance characterizes the "load intensity." Vbat represents the input voltage on the primary side of the LLC resonant converter, and Pout represents the output power of the LLC resonant converter. ω is the angular frequency corresponding to the resonant frequency. r =2πf r1 Lr1 represents the target resonant inductance value of the LLC resonant converter, that is, the resonant inductance value corresponding to the candidate resonant frequency deviation rate with the largest absolute value, and fr1 is the resonant frequency obtained based on the target resonant inductance value and the target resonant capacitance value (that is, the resonant capacitance value corresponding to the candidate resonant frequency deviation rate with the largest absolute value).

[0093] The initial quality factor Q is corrected to obtain the equivalent quality factor. , Where Lm represents the magnetizing inductance value of the LLC resonant converter.

[0094] The zero-crossing moment of the resonant current is the instant when the resonant current (i.e., the primary-side current of the LLC resonant converter, flowing through the resonant inductor / capacitor) changes from positive to negative or from negative to positive, which is the ideal commutation point for the rectifier diodes. The main bridge arm transistor drive signal is the PWM drive signal of the primary-side main bridge arm transistor (5A / 5B / 6A / 6B in discharge mode), and the switching edge of the drive signal is the switching moment of the primary-side main bridge arm transistor. Under ideal conditions without component tolerances, the zero-crossing moment of the resonant current in the resonant cavity is aligned with the switching edge of the main bridge arm transistor drive signal. When there are manufacturing tolerances and temperature drift in the resonant inductor and resonant capacitor, the actual zero-crossing moment of the resonant current is offset relative to the drive switching edge. Therefore, the maximum phase offset of the zero-crossing moment of the resonant current relative to the main bridge arm transistor drive signal is... Determined by the following formula: Maximum phase offset Convert to the corresponding maximum timing offset , can be represented as: , Ts represents the switching period of the LLC resonant converter, where Ts = 1 / fs.

[0095] Based on the maximum timing offset, determine the upper bound t of the safety window during the rectifier diode conduction period. safe It is determined by the following formula: , where t margin This indicates the first preset engineering margin. The maximum timing offset is used to prevent the rectifier from conducting during the period when the resonant current reverses, thereby preventing bridge arm shoot-through faults caused by the alternating conduction of the body diodes of the two rectifiers in the same bridge arm.

[0096] The first candidate duration t is determined by multiplying the upper bound of the safety window by the preset safety factor. min，1 Specifically, it can be expressed as: Where k represents the preset safety factor, which can range from 0.4 to 0.6.

[0097] Alternatively, the initial quality factor Q can be left uncorrected. However, if the initial quality factor Q is not corrected, the initial quality factor Q will be too large, the maximum phase offset will be too large, but the subsequently determined initial margin duration will be too small.

[0098] S303, determine the second candidate duration based on the turn-on delay of the rectifier tube.

[0099] In this embodiment of the application, the turn-on delay time of the rectifier tube can be used as a reference. Duration of channel formation Determine the second candidate duration. It can be represented as , t guard This indicates the preset gate margin duration. Optionally, the preset gate margin duration is 1 to 2 times the channel formation duration, which is used to ensure that the conductive channel reaches a fully enhanced state.

[0100] The turn-on delay time is the time required for the gate voltage of the rectifier to rise from zero to the turn-on threshold voltage, and the channel formation time is the time required for the gate voltage of the rectifier to pass through the Miller plateau stage and for the current to transfer from the body diode to the conductive channel, corresponding to the rise time / Miller plateau stage in the rectifier datasheet.

[0101] S304. Determine the initial margin duration based on the first candidate duration and the second candidate duration; wherein, the initial margin duration is the additional conduction duration reserved relative to the preset anti-straight-through dead zone duration when the rectifier tube is first turned on.

[0102] In this embodiment of the application, the maximum value between the first candidate duration and the second candidate duration can be used as the initial margin duration. Specifically, it can be expressed as .

[0103] Optionally, the first candidate duration and the second candidate duration can be weighted and summed to obtain the initial margin duration.

[0104] Among them, the duration of the first candidate is usually the dominant constraint, and the duration of the second candidate is usually much shorter than that of the first candidate.

[0105] In this embodiment, the resonant frequency deviation rate of the LLC resonant converter is determined based on the inductor and capacitor tolerances. A first candidate duration is determined based on the resonant frequency deviation rate and the equivalent quality factor of the LLC resonant converter. A second candidate duration is determined based on the turn-on delay of the rectifier diode. Finally, an initial margin duration is determined based on both the first and second candidate durations. The first candidate duration in this embodiment considers the resonant frequency deviation caused by the manufacturing tolerances of the resonant inductor and capacitor, preventing bridge arm shoot-through faults caused by the rectifier diode conducting in the reverse current region. The second candidate duration, combined with the turn-on delay of the rectifier diode, ensures that the gate conductive channel can be fully established, avoiding the loss of synchronous rectification efficiency gains due to relying solely on the body diode's conduction.

[0106] In an exemplary embodiment, at least one conduction timing parameter is obtained, including: determining the delayed conduction duration based on the initial margin duration, the preset anti-shoot-through dead zone duration, and the phase shift value of the main bridge arm tube; wherein the phase shift value is determined based on the actual voltage of the device to be controlled in the LLC resonant converter and the preset target voltage.

[0107] The preset anti-shoot-through dead zone duration is a control interval duration set in a half-bridge or full-bridge circuit to prevent simultaneous conduction of the upper and lower bridge arms. This is used to avoid short circuits and damage to power devices and ensure safe switching, as described above. Figure 2 As shown, taking the black dashed line containing the count value PRD as an example, the preset anti-shot-through dead time is the time corresponding to the interval between the black dashed line and the blue dashed line on the right. For example, in discharge mode, to avoid the simultaneous conduction of main bridge arm tubes 5A and 5B, the preset anti-shot-through dead time can optionally be 200ns-500ns, or 500ns-1μs, etc.

[0108] The phase shift value refers to the phase difference between the drive signals of the two main bridge arm tubes in the main bridge arm. The phase shift value can be expressed in terms of angle, time, etc. For example, a phase shift value of 90° means that the drive signal of main bridge arm tube 6B is delayed by 1 / 4 cycle relative to the drive signal of main bridge arm tube 5A; a phase shift value of 0° means that there is no phase shift between the main bridge arm tubes; a phase shift value of 2µs, etc.

[0109] The device under control is the controlled object managed by the LLC resonant converter. The actual voltage is the sampled current true voltage of the device under control, and the preset target voltage is the voltage reference value for closed-loop control. The controller acquires the actual voltage and the preset target voltage of the device under control and calculates the voltage error between them. The voltage error is processed by the closed-loop controller and outputs a phase shift value. For example, if the actual voltage is less than the preset target voltage, the phase shift value decreases; if the actual voltage is greater than the preset target voltage, the phase shift value increases. If the actual voltage is equal to the preset target voltage, the phase shift value remains unchanged.

[0110] In this embodiment, the basic delay conduction duration can be determined based on the preset anti-shoot-through dead zone duration and the initial margin duration. When the phase shift value indicates that there is no phase shift in the main bridge arm transistor, the delayed conduction duration is determined to be equal to the basic delayed conduction duration. When the phase shift value indicates that there is phase shift in the main bridge arm transistor, the phase shift count value is determined based on the phase shift value and the preset conduction event, and the delayed conduction duration is determined based on the sum of the duration corresponding to the phase shift count value and the basic delayed conduction duration. The preset conduction event is determined based on the count value output by the timer of the PWM module in the processor.

[0111] In one possible implementation, if the phase shift value indicates that the main bridge boom tube has a phase shift, a phase shift count value can be determined based on the phase shift value and a preset conduction event. The target conduction time can then be determined based on the preset anti-straight-through dead zone duration and the duration corresponding to the phase shift count value. Within the time range of the initial conduction start time corresponding to the initial margin duration and the target conduction time, a search is performed using a first adjustment step size to determine the delayed conduction duration. Similarly, if the phase shift value indicates that the main bridge boom tube does not have a phase shift, the search is performed within the time range of the initial conduction start time corresponding to the initial margin duration and the target conduction time corresponding to the preset anti-straight-through dead zone duration, using a first adjustment step size to determine the delayed conduction duration.

[0112] In this embodiment, the delayed turn-on time is determined based on the initial margin duration, the preset anti-shoo-through dead zone duration, and the phase shift value of the main bridge arm transistor. This embodiment incorporates the initial margin duration into the calculation of the delayed turn-on time to ensure a safe turn-on margin for the first turn-on. Furthermore, based on the phase shift value of the main bridge arm transistor, the delayed turn-on time of synchronous rectification can be adapted to the phase shift condition of the LLC resonant converter, solving the problem in traditional schemes where the synchronous rectification timing does not follow the phase shift of the primary side, and the common conduction interval shifts after phase shift, resulting in misaligned synchronous rectification turn-on timing and hard turn-on.

[0113] Figure 6 This is a flowchart illustrating a method for determining the delayed conduction duration in one embodiment, as shown below. Figure 6As shown, this application embodiment relates to a possible implementation method for determining the delayed conduction time based on the initial margin duration, the preset anti-straight-through dead zone duration, and the phase shift value, including the following steps:

[0114] S401 determines the basic delay conduction time based on the preset anti-straight-through dead zone duration and the initial margin duration.

[0115] S402, when the phase shift value indicates that there is no phase shift in the main bridge arm tube, determine that the delayed conduction time is equal to the basic delayed conduction time.

[0116] S403, when the phase shift value indicates that the main bridge arm tube has a phase shift, the phase shift count value is determined according to the phase shift value and the preset conduction event, and the delayed conduction duration is determined according to the sum of the duration corresponding to the phase shift count value and the basic delayed conduction duration; wherein, the preset conduction event is determined based on the count value output by the timer of the PWM module in the processor.

[0117] In this embodiment, when the phase shift value indicates that the main bridge arm transistor has a phase shift (i.e., the phase shift value D is not equal to 0), the main bridge arm transistor can be turned on when the count value rises to a certain phase shift count value (i.e., the first comparison value) or when the count value falls to a certain phase shift count value (i.e., the second comparison value). Therefore, when determining the phase shift count value based on the phase shift value, the determined phase shift count value can include the first phase shift count value and the second phase shift count value. When the main bridge arm transistor is turned on when the preset conduction event indicates that the count value rises to a certain phase shift count value, the first phase shift count value is determined by multiplying the phase shift value by the period value of the LLC resonant converter. The first comparison value is the sum of the first phase shift count value and the count value corresponding to the preset anti-straight-through dead zone duration.

[0118] When the main bridge arm tube is turned on when the preset conduction event indicator count value drops to a certain phase shift count value, the second phase shift count value is determined based on the difference between the period value and the first phase shift count value. The second comparison value is the difference between the second phase shift count value and the count value corresponding to the preset anti-straight-through dead zone duration.

[0119] In this embodiment, two operating conditions are distinguished: no phase shift and phase shift. In the case of no phase shift, the basic delay conduction time is directly used as the delay conduction time, which is logically simple. In the case of phase shift, the time offset caused by the phase shift is superimposed to complete the phase compensation of the synchronous rectification turn-on timing, ensuring that the synchronous rectification turn-on time is still aligned with the common conduction interval of the main bridge arm tube under the phase shift operating condition.

[0120] Figure 7 This is a flowchart illustrating a method for determining the basic delay on-time in one embodiment, as shown below. Figure 7As shown, this application embodiment relates to a possible implementation method for determining the basic delay conduction time based on a preset anti-straight-through dead zone duration and an initial margin duration, including:

[0121] S501, determine the sum of the preset anti-straight-through dead zone duration and the initial margin duration.

[0122] S502, when the current conduction is the first conduction, determine the sum value as the basis for the conduction delay duration.

[0123] S503, if the current conduction is not the first conduction, determine the difference between the sum and the first shortened total duration as the basis for delaying the conduction duration; wherein, the first shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the first adjustment step size.

[0124] In the embodiments of this application, such as Figure 8 As shown, the preset anti-straight-through dead zone duration is t1, the initial margin duration is t2, and the first adjustment step size is d1. If the current conduction is the first conduction, the basic delay conduction duration is t1 + t2. If the current conduction is not the first conduction, the basic delay conduction duration is t1 + t2 - n × d1, where n is the number of conductions since the first conduction. For example, if the current conduction is the 2nd conduction, the number of conductions since the first conduction is 1; if the current conduction is the 5th conduction, the number of conductions since the first conduction is 4.

[0125] It should be noted that the above is a time-level expression, which can also be represented using registers, such as... Figure 9 As shown, the conduction side of the rectifier is implemented based on a dead-time register. Assuming the register value corresponding to the period value calculated as described above is 100, the register value t12 corresponding to the preset anti-snap-through dead-time is 5, and the register value t22 corresponding to the initial margin duration is 20. The initial value of the dead-time register is the sum of the register value t12 corresponding to the preset anti-snap-through dead-time and the register value t22 corresponding to the initial margin duration, i.e., the initial value of the dead-time register = t12 + t22 = 5 + 20 = 25. The initial value t31 of the dead-time register, converted to a time-level expression, corresponds to the delay conduction duration for the first conduction. The initial value t31 of the dead-time register is gradually decreased according to the first register adjustment step size (i.e., the register value corresponding to the first adjustment step size) until the difference between the initial value of the dead-time register and the register value corresponding to the preset anti-snap-through dead-time is less than the register value corresponding to the first preset duration difference.

[0126] Similarly, the conduction side of the rectifier is implemented based on a comparator register. The initial value of the comparator register is also 25. The initial value t32 of the comparator register is gradually decreased according to the second register adjustment step value (i.e., the register value corresponding to the second adjustment step value) until the difference between the initial value of the comparator register and the register value corresponding to the preset anti-straight-through dead zone time is less than the register value corresponding to the second preset time difference.

[0127] Optionally, the turn-on side and the turn-off side of the rectifier are both implemented based on a dead-time register, or both are implemented based on a comparator register, or the turn-on side of the rectifier is implemented based on a comparator register and the turn-off side is implemented based on a dead-time register.

[0128] In this embodiment, the initial conduction fully retains the entire initial margin duration, providing a maximum safety margin to address the issue of unstable resonant current during startup. Subsequent conductions are performed by multiplying the number of conductions by a first adjustment step size to obtain a first shortened total duration. This achieves a linear decrease in the basic delay conduction duration with the conduction period, corresponding to a gradual reduction in the inner shrinkage on the turn-on side during the soft-start process, progressively amplifying the effective conduction window of the rectifier diode.

[0129] In an exemplary implementation, the phase shift count value includes a first phase shift count value and a second phase shift count value. Determining the phase shift count value based on the phase shift value and a preset conduction event can include the following two cases:

[0130] The first scenario: Obtain the period value of the LLC resonant converter. When the preset turn-on event is the first preset turn-on event, determine the first phase shift count value based on the product of the phase shift value and the period value. The first preset turn-on event indicates that the main bridge arm transistor is turned on when the count value output by the timer of the PWM module in the processor rises to the first comparison value. The first comparison value is the sum of the first phase shift count value and the count value corresponding to the preset anti-shoot-through dead time.

[0131] In this embodiment, the period value can be determined based on the ratio of the clock frequency of the timer of the PWM module in the processor to the actual switching frequency of the LLC resonant converter. For example, if the clock frequency is 150MHz and the actual switching frequency is 72.5kHz, then the period value is approximately 150MHz ÷ 72.5kHz ≈ 2069.

[0132] In one possible implementation, in fixed-frequency mode, the period value is a fixed value set by the processor.

[0133] When the main bridge arm tube is turned on when the preset turn-on event indicator count value rises to the first comparison value, that is, when the upward counting mode is adopted, the count value increases from zero. After the count value equals the first phase shift count value, the main bridge arm tube is turned on after the preset anti-straight-through dead zone time. The first phase shift count value CompareA is determined according to the product of the phase shift value D and the period value Prd of the LLC resonant converter. That is, the first phase shift count value can be expressed as CompareA=D*Prd.

[0134] The ratio of the preset anti-straight-through dead zone duration to half a cycle of the pulse wave can be determined, and the count value corresponding to the preset anti-straight-through dead zone duration can be determined based on the ratio and the cycle value Prd.

[0135] For example, in discharge mode, a fixed-frequency discharge is performed, and the period value Prd is determined based on the frequency. The actual output voltage of the rectifier diode is obtained, filtered, and the difference between the set target voltage and the filtered actual output voltage is calculated to obtain a voltage error signal. This voltage error signal is input to a PI controller to obtain the phase shift value D. As described above... Figure 2 For example, when the count value of the main bridge arm tube 6A rises to the first phase shift count value A (i.e., CompareA), it is then set to a high level after a preset anti-straight-through dead time.

[0136] The second scenario: When the preset turn-on event is the second preset turn-on event, the second phase-shift count value is determined based on the difference between the period value and the first phase-shift count value. The second preset turn-on event indicates that the main bridge arm transistor is turned on when the count value output by the timer of the PWM module in the processor drops to the second comparison value. The second comparison value is the difference between the second phase-shift count value and the count value corresponding to the preset anti-shoot-through dead time.

[0137] In this embodiment, when the main bridge boom tube is turned on when the preset conduction event indicator count value drops to the second comparison value (i.e., the count value first decreases to the second phase-shift count value, and then the main bridge boom tube is turned on after a preset anti-straight-through dead zone time), the second phase-shift count value CompareB is determined based on the difference between the period value Prd and the first phase-shift count value CompareA obtained above. That is, the second phase-shift count value can be expressed as CompareB = Prd - CompareA. Figure 2 For example, when the count value of the main bridge arm tube 6B drops to the second phase-shift count value B (i.e., CompareB), it is then set to a high level after a preset anti-straight-through dead time.

[0138] In this embodiment, the period value of the LLC resonant converter is obtained. When the preset conduction event is a first preset conduction event, a first phase shift count value is determined based on the product of the phase shift value and the period value. When the preset conduction event is a second preset conduction event, a second phase shift count value is determined based on the difference between the period value and the first phase shift count value. This embodiment determines the corresponding phase shift count value under different preset conduction events, achieving accurate conversion from phase shift angle to phase shift count value. Furthermore, by solving for the second phase shift count value using the difference between the period value and the first phase shift count value, existing parameters are reused, reducing computational complexity.

[0139] In an exemplary embodiment, obtaining at least one conduction timing parameter includes: determining an early shutdown duration based on an initial margin duration and a preset anti-straight-through dead zone duration; wherein, determining the early shutdown duration includes:

[0140] When the current conduction is the first conduction, the sum of the preset anti-straight-through dead zone duration and the initial margin duration is determined as the early shutdown duration; when the current conduction is not the first conduction, the difference between the sum and the second shortened total duration is determined as the early shutdown duration; wherein, the second shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the second adjustment step size.

[0141] In this embodiment, the initial margin duration is reused to the early turn-off duration on the turn-off side, thereby achieving synchronous soft start on the turn-on and turn-off sides. Moreover, the early turn-off duration gradually decreases with the number of turn-on cycles, thereby improving the effective turn-on time of the rectifier tube and enhancing the converter efficiency.

[0142] Figure 10 This is a flowchart illustrating the method for determining the first and second adjustment step sizes in one embodiment, as shown below. Figure 10 As shown, it includes the following steps:

[0143] S601 determines the upper limit of the adjustment step size based on the resonant frequency deviation rate, the equivalent quality factor, and the conduction time corresponding to the rectifier tube being fully turned on.

[0144] In this embodiment, the adjustment step size is limited by two independent physical constraints. The first constraint limits the upper limit of the adjustment step size, and the second constraint limits the lower limit. The physical mechanism of the upper limit of the adjustment step size is the same as that of the initial margin duration: due to the inductance and capacitance tolerances of the LLC resonant converter, the true zero-crossing time of the resonant current has a timing offset relative to the main bridge arm transistor drive signal. If the single adjustment of the adjustment step size is too large, the conduction window of the rectifier may cross the upper limit of the aforementioned safety window half-width in this iteration, causing the two rectifiers in the same bridge arm to conduct alternately, resulting in a bridge arm shoot-through fault. Therefore, each value of the adjustment step size should not exceed the remaining margin between the current conduction window half-width and the upper limit of the safety window half-width.

[0145] Therefore, the maximum timing offset can be obtained based on the above-described S201 method in the embodiments of this application. ,based on Determine the upper half-width limit of the safety window. Tcond represents the conduction time corresponding to the rectifier diode being fully turned on. This indicates the second pre-set engineering margin.

[0146] The step size upper limit can be adjusted by... It is determined that Δt step,max(n) This indicates that the upper limit of the step size is adjusted in the nth iteration, w n This represents the half-width of the rectifier diode's conduction window during the nth iteration. For example, in the first iteration, the upper limit of the adjustment step size is 2 × (w / n). safe - Half the initial margin duration); the second time, 2×(w) safe - Half the conduction time after the first conduction.

[0147] S602 determines the lower limit of the adjustment step size based on the initial margin duration, the conduction duration corresponding to the rectifier tube being fully turned on, and the clock frequency of the timer in the PWM module of the processor.

[0148] In this embodiment of the application, the lower limit of the adjustment step size is... It can be represented as: f clk The clock frequency of the timer in the PWM module of the processor is determined by the hardware configuration. min T represents the initial margin duration corresponding to the first conduction of the rectifier diode; ramp,max This indicates the preset maximum total soft-activation ramp-up time, T. ctrl This indicates the control period between two consecutive iterations.

[0149] S603, determine the first adjustment step size and the second adjustment step size based on the upper limit value and the lower limit value of the adjustment step size.

[0150] In this embodiment of the application, the first adjustment step size and the second adjustment step size can therefore be based on It is confirmed that... This indicates the pre-selected candidate adjustment step size.

[0151] As the above analysis shows, the upper limit of the adjustment step size is a monotonically decreasing function of the half-width of the rectifier tube's conduction window. As the soft-start ramp-up process progresses and the half-width of the rectifier tube's conduction window gradually increases, the margin between the rectifier tube's conduction window and the upper limit of the safety window's half-width decreases accordingly, and the allowable single adjustment step size narrows accordingly. In the simplified engineering implementation using a fixed adjustment step size, to ensure that the upper limit of the adjustment step size is always satisfied throughout the entire ramp-up range, the most stringent value of the upper limit of the adjustment step size should be taken at the end of the ramp-up period, i.e., when the half-width of the rectifier tube's conduction window approaches the half-width of the window corresponding to the rectifier tube being fully conducting. This value should be used as a fixed adjustment step size that is uniformly applicable throughout the entire process.

[0152] In this embodiment, the upper limit of the adjustment step size is determined by the resonant frequency deviation rate, the equivalent quality factor, and the conduction time corresponding to the complete conduction of the rectifier tube. This prevents the single adjustment step size from being too large, which would deplete the phase safety margin too quickly and cause the bridge arm to shoot through. Furthermore, a lower limit of the adjustment step size is set to avoid the adjustment step size being too small, which would result in a slow soft-turn-on convergence speed.

[0153] In one exemplary embodiment, such as Figures 11-14 As shown, Figure 11 and Figure 12 In discharge mode, Figure 13 and Figure 14 In charging mode, the initial margin duration is calculated to be 1.344 μs based on the method provided above. In discharging mode, the delayed turn-on duration corresponding to the first turn-on is 2.531 μs, and the early turn-off duration corresponding to the first turn-on is 2.561 μs. In charging mode, both the delayed turn-on duration and the early turn-off duration corresponding to the first turn-on are 2.531 μs. Subsequently, the conduction window is gradually increased in adjustment steps of 31 ns to gradually achieve full conduction. After full conduction, the delayed turn-on duration and the early turn-off duration are 200 ns, and the target conduction duration at full conduction is approximately 6 μs. When both the delayed turn-on duration and the early turn-off duration meet the corresponding requirements, the conduction timing parameters are locked and directly used as the control reference for the next turn-on, realizing the self-holding of the conduction timing parameters under steady-state conditions, eliminating the need for repeated iterative calculations, and reducing the main control computational load.

[0154] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0155] Based on the same inventive concept, this application also provides a synchronous rectification control device for an LLC resonant converter used to implement the synchronous rectification control method for the LLC resonant converter described above. The solution provided by this device is similar to the implementation described in the above method. Therefore, the specific limitations of one or more embodiments of the synchronous rectification control device for an LLC resonant converter provided below can be found in the limitations of the synchronous rectification control method for the LLC resonant converter described above, and will not be repeated here.

[0156] In one exemplary embodiment, a synchronous rectification control device for an LLC resonant converter is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of any of the above method embodiments.

[0157] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above method embodiments.

[0158] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of any of the above method embodiments.

[0159] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0160] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0161] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0162] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A synchronous rectification control method for an LLC resonant converter, characterized in that, include: Obtain at least one conduction timing parameter for the rectifier diode in the LLC resonant converter; wherein the conduction timing parameter includes a delayed conduction duration and an early turn-off duration; the delayed conduction duration is the duration by which the rectifier diode is delayed from the start time of the common conduction interval of the main bridge arm diodes in the LLC resonant converter, and the early turn-off duration is the duration by which the rectifier diode is turned off early from the end time of the common conduction interval; The at least one conduction timing parameter is shortened such that the difference between the shortened conduction timing parameter and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameter; wherein, the preset duration difference corresponding to the delayed conduction duration is the first preset duration difference, and the preset duration difference corresponding to the early shutdown duration is the second preset duration difference. Based on the shortened conduction timing parameters, the rectifier tube is controlled to perform synchronous rectification.

2. The method according to claim 1, characterized in that, The shortening of the at least one conduction timing parameter includes: The iterative steps are executed repeatedly until the difference between the shortened conduction timing parameters and the preset anti-straight-through dead zone duration is less than the preset duration difference corresponding to the conduction timing parameters; The iterative steps include: shortening the current conduction timing parameters according to the adjustment step size corresponding to the conduction timing parameters, and using the shortened conduction timing parameters as the conduction timing parameters for the next conduction; Wherein, the adjustment step size corresponding to the delayed turn-on duration is the first adjustment step size, and the adjustment step size corresponding to the early turn-off duration is the second adjustment step size.

3. The method according to claim 2, characterized in that, The method further includes determining the initial margin duration, including: The resonant frequency deviation rate of the LLC resonant converter is determined based on the inductance tolerance and capacitance tolerance of the LLC resonant converter. The first candidate duration is determined based on the resonant frequency deviation rate and the equivalent quality factor of the LLC resonant converter; The second candidate duration is determined based on the turn-on delay of the rectifier tube; The initial margin duration is determined based on the first candidate duration and the second candidate duration; The initial margin duration is the additional conduction time reserved relative to the preset anti-straight-through dead zone duration when the rectifier tube is first turned on.

4. The method according to claim 3, characterized in that, The conduction timing parameters include the conduction delay duration; obtaining the at least one conduction timing parameter includes: The delayed conduction duration is determined based on the initial margin duration, the preset anti-shoot-through dead zone duration, and the phase shift value of the main bridge arm tube; wherein the phase shift value is determined based on the actual voltage of the device to be controlled by the LLC resonant converter and the preset target voltage.

5. The method according to claim 4, characterized in that, The step of determining the delayed conduction duration based on the initial margin duration, the preset anti-straight-through dead zone duration, and the phase shift value includes: The basic delay conduction time is determined based on the preset anti-straight-through dead zone duration and the initial margin duration; If the phase shift value indicates that there is no phase shift in the main bridge arm tube, the delayed conduction duration is determined to be equal to the basic delayed conduction duration. Alternatively, if the phase shift value indicates that the main bridge arm tube has a phase shift, a phase shift count value is determined based on the phase shift value and a preset conduction event, and the delayed conduction duration is determined based on the sum of the duration corresponding to the phase shift count value and the basic delayed conduction duration; wherein, the preset conduction event is determined based on the count value output by the timer of the PWM module in the processor.

6. The method according to claim 5, characterized in that, The step of determining the basic delay conduction duration based on the preset anti-straight-through dead zone duration and the initial margin duration includes: Determine the sum of the preset anti-straight-through dead zone duration and the initial margin duration; When the current conduction is the first conduction, the sum is determined to be the basic delay conduction duration; Alternatively, if the current conduction is not the first conduction, the difference between the sum and the first shortened total duration is determined as the basic delayed conduction duration; wherein, the first shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the first adjustment step size.

7. The method according to claim 5, characterized in that, The phase shift count value includes a first phase shift count value; determining the phase shift count value based on the phase shift value and a preset conduction event includes: Obtain the period value of the LLC resonant converter; When the preset conduction event is the first preset conduction event, the first phase shift count value is determined based on the product of the phase shift value and the period value; wherein, the first preset conduction event indicates that the main bridge arm transistor is controlled to conduct when the count value output by the timer of the PWM module in the processor rises to the first comparison value, and the first comparison value is the sum of the first phase shift count value and the count value corresponding to the preset anti-shoot-through dead time.

8. The method according to claim 7, characterized in that, The phase-shift count value further includes a second phase-shift count value; the method further includes: When the preset conduction event is the second preset conduction event, the second phase shift count value is determined based on the difference between the period value and the first phase shift count value; wherein, the second preset conduction event indicates that the main bridge arm transistor is controlled to conduct when the count value output by the timer of the PWM module in the processor drops to the second comparison value, and the second comparison value is the difference between the second phase shift count value and the count value corresponding to the preset anti-shoot-through dead time.

9. The method according to claim 3, characterized in that, The conduction timing parameters include the early shutdown duration; obtaining the at least one conduction timing parameter includes: The early shutdown duration is determined based on the initial margin duration and the preset anti-straight-through dead zone duration; wherein, determining the early shutdown duration includes: When the current conduction is the first conduction, the sum of the preset anti-straight-through dead zone duration and the initial margin duration is determined to be the early shutdown duration; Alternatively, if the current conduction is not the first conduction, the difference between the sum and the second shortened total duration is determined as the early shutdown duration; wherein the second shortened total duration is the product of the number of conductions experienced by the rectifier tube since its first conduction and the second adjustment step size.

10. The method according to claim 3, characterized in that, The method further includes determining the first adjustment step size and the second adjustment step size: The upper limit of the adjustment step size is determined based on the resonant frequency deviation rate, the equivalent quality factor, and the conduction time corresponding to the complete conduction of the rectifier tube. The lower limit of the adjustment step size is determined based on the initial margin duration, the conduction duration corresponding to the complete conduction of the rectifier tube, and the clock frequency of the timer of the PWM module in the processor. The first adjustment step and the second adjustment step are determined based on the upper limit value and the lower limit value of the adjustment step.

11. A synchronous rectification control device for an LLC resonant converter, characterized in that, It includes a processor and a memory, the memory storing a computer program, and the processor executing the computer program to implement the synchronous rectification control method according to any one of claims 1 to 10.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the synchronous rectification control method according to any one of claims 1 to 10.

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