A variable level modulation method for flying capacitor multilevel inverter

Abstract

The present application relates to the field of power electronics and multi-level conversion technology, and particularly relates to a variable level modulation method of flying capacitor multi-level inverter, which first constructs a multi-level circuit topology, the multi-level circuit topology comprises twelve switching tubes and five capacitors, based on the flying capacitor multi-level inverter multi-level circuit topology of six pairs of switching tubes, a total of 64 switching modes, by merging the switching modes which have no influence on the output level, finally 16 switching modes can be obtained, multiple output voltage levels are generated, and the flying capacitor is charged and discharged, finally forming nine level output schemes of the flying capacitor multi-level inverter based on six pairs of switching tubes, then according to different output voltage and voltage sharing characteristics requirements, selecting five-level mode, seven-level mode or nine-level mode, by comparing the modulation wave and the carrier wave, the voltage which should be output at this time is obtained, and the driving signal of each switching tube is obtained.

Description

Technical Field

[0001] This invention relates to the field of power electronics and multilevel conversion technology, and more specifically, to a method for level modulation of a flying capacitor multilevel inverter. Background Technology

[0002] With the development of applications such as electric vehicle motor drives, charging piles, solar power generation protection and control devices, smart grid rectifiers, and battery energy storage inverters, power conversion devices are facing higher requirements for output voltage quality, device voltage stress, system efficiency, and operational reliability. Traditional two-level inverters, when the DC bus voltage is high, typically require power switching devices to withstand higher blocking voltages, and the output voltage step amplitude is large, easily generating high voltage change rates and harmonic content. This exacerbates electromagnetic interference and load insulation stress, and increases the design difficulty of the output filter.

[0003] Multilevel inverters, by synthesizing multiple intermediate voltage levels within the DC bus voltage range, can reduce the amplitude of single voltage jumps and improve the output waveform quality, and are therefore widely used in medium and high voltage power conversion fields. Existing multilevel inverters mainly include diode-clamped, flying capacitor, and cascaded H-bridge types. Among them, the flying capacitor type multilevel inverter utilizes a flying capacitor to establish intermediate voltage levels, and features a large number of output levels, high switching state redundancy, and easy capacitor voltage regulation.

[0004] However, multilevel inverters with flying capacitors still have certain problems in actual operation. On the one hand, to obtain stable multilevel output, the voltage of each flying capacitor needs to be maintained near its corresponding reference value. When the load changes, the power flow direction changes, or the switching state is not properly allocated, the flying capacitors are prone to uneven charging and discharging, which can lead to capacitor voltage deviation, output waveform distortion, and even cause some switching devices to experience abnormal voltage. On the other hand, existing modulation methods are usually designed for a fixed number of levels. During operation, the inverter can generally only output according to a predetermined level mode, making it difficult to flexibly switch between different level modes according to the target output voltage, power quality requirements, and capacitor voltage equalization requirements. For operating conditions with higher output voltage, increasing the number of output levels is beneficial to reducing the output voltage step amplitude and improving harmonic performance. However, for operating conditions with lower output voltage, if a higher number of levels is still used for modulation, it may result in low utilization of control resources and is not conducive to flexible adjustment of flying capacitor voltage deviation. In addition, different output levels usually correspond to multiple redundant switching states. The key to achieving dynamic voltage balance of the flying capacitor is to rationally select the appropriate charging or discharging state based on the deviation between the actual voltage of the flying capacitor and the reference voltage and the direction of the output current while ensuring that the target output level remains unchanged.

[0005] Therefore, it is necessary to propose a variable level modulation method for existing flying capacitor multilevel inverters. Summary of the Invention

[0006] To address the problem that a given flying capacitor multilevel inverter struggles to simultaneously achieve both output waveform quality and flying capacitor voltage balance across different output voltage ranges, this invention proposes a variable-level modulation method for flying capacitor multilevel inverters. The objective of this invention is achieved through the following technical solution: A method for level modulation of a flying capacitor multilevel inverter includes the following steps: A multilevel circuit topology is constructed, which includes twelve switching transistors and five capacitors. For different output voltage and voltage equalization characteristics, a five-level mode, a seven-level mode, or a nine-level mode is selected. By comparing the modulation wave with the carrier wave, the voltage that should be output at this time is obtained, and the drive signal of each switching transistor is obtained.

[0007] Furthermore, the switching transistor includes six main switches S. 1a S 2a S 3a S 4a S 5a S 6a and the corresponding six complementary switches S 1b S 2b S 3b S 4b S 5b S 6b The five capacitors are DC bus capacitors C1 and C3, and flying capacitors C2, C4, and C5. DC bus capacitors C1 and C3 are located at the positive and negative terminals of the DC bus, respectively, and their voltages are both half the bus voltage. Flying capacitors C2 and C4 are located between the bus capacitors, and their voltages are one-quarter of the DC bus voltage. The voltage of flying capacitor C5 is one-eighth of the DC bus voltage. Furthermore, the DC bus voltage is... V dc ; The positive terminal of DC bus capacitor C1 is connected to the positive terminal of the DC bus, and the negative terminal of DC bus capacitor C1 is grounded. The positive terminal of DC bus capacitor C3 is connected to the negative terminal of capacitor C1, and the negative terminal of DC bus capacitor C3 is connected to the negative terminal of the DC bus. Switch S 1a Connect the positive terminal of the DC bus capacitor C1, and then connect it to the switching transistor S. 1a S 2a S 2b S 1b Connect to the negative terminal of capacitor C1; Switch S 3aConnect the negative terminal of DC bus capacitor C3, and then connect it to the switching transistor S. 3a S 4a S 4b S 3b Connect to the negative terminal of capacitor C1; The positive terminal of the flying capacitor C2 is connected to the switching transistor S. 1a and S 2a Between them, the negative terminal of the flying capacitor C2 is connected to the switching transistor S. 2b and S 1b between; The positive terminal of the flying capacitor C4 is connected to the switching transistor S. 3b and S 4b Between them, the negative terminal of the flying capacitor C4 is connected to the switching transistor S. 3a and S 4a between; Switch S 5a Connected to the switching transistor S 2a S 2b Between them, via the switching transistor S 5a and S 6a Connect to the circuit output terminal; Switch S 5b Connected to the switching transistor S 4a S 4b Between them, via the switching transistor S 5b and S 6b Connect to the circuit output terminal; The positive terminal of the flying capacitor C5 is connected to the switching transistor S. 5a and S 6a Between them, the negative terminal of the flying capacitor C5 is connected to the switching transistor S. 6b and S 5b between; The output port is connected to the switching transistor S. 6a and S 6b Between these two points, the filter is connected after the output.

[0008] Furthermore, in the step of selecting the five-level mode, seven-level mode, or nine-level mode inverter voltage output according to different output voltage and voltage equalization characteristic requirements: If the target output voltage amplitude is greater than one-quarter of the bus voltage, select the nine-level or seven-level mode. Use the seven-level mode when a high dynamic response across the capacitor voltage is required, and select the nine-level mode when higher power quality is required. If the target output voltage is less than one-quarter of the bus voltage, select the five-level mode.

[0009] Furthermore, in the nine-level mode, the following steps are included: the amplitude of the modulated wave |V m|Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result of the modulation wave Vm and the eight carriers, make the inverter alternately output nine levels: 0, ±Vdc / 8, ±2Vdc / 8, ±3Vdc / 8, and ±4Vdc / 8. Finally, the drive signal for each switching transistor is obtained. In seven-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result of the modulation wave Vm and the eight carriers, make the inverter alternately output seven levels: 0, ±Vdc / 8, ±2Vdc / 8, ±4Vdc / 8. Use ±4Vdc / 8 and ±2Vdc / 8 to synthesize a virtual ±3Vdc / 8. Finally, output the corresponding switching transistor drive signal according to the selected mode. In five-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 0 and 2, construct four stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the four carriers. Based on the comparison result of the modulation wave Vm with the four carriers, make the inverter alternately output five levels: 0, ±Vdc / 8, ±2Vdc / 8. Finally, output the corresponding switching transistor drive signal according to the selected mode.

[0010] Furthermore, in the nine-level mode, the following steps are included: Construct eight stacked triangular carrier signals of the same frequency, with four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0–1, 1–2, 2–3, and 3–4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal Vm is compared with the eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage v ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 3 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 3 and 8.V dc / 8 level and 4 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-3 V dc / 8、-4 V dc / 8 level variation; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0011] Furthermore, in the seven-level mode, the following steps are included: Construct eight stacked triangular carrier signals of the same frequency, with four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0–1, 1–2, 2–3, and 3–4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal Vm is compared with the eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 4 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 2 and 3. V dc / 8 level and 4 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-4V dc / 8 level variation; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0012] Furthermore, in the five-level mode, the following steps are included: Construct four stacked triangular carrier signals of the same frequency, where the two triangular carrier signals Tri1 and Tri2 are on the positive half-axis, and the two triangular carrier signals FTri1 and FTri2 are on the negative half-axis; the amplitudes of the two carrier signals on the positive half-axis are 0 to 1 and 1 to 2, respectively; the two carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal V m The voltage level to be output is obtained by comparing it with the four stacked triangular carrier signals: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8 level variation; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0013] Furthermore, the modulation method of the five-level mode, seven-level mode or nine-level mode uses redundant switch states to regulate the charging and discharging of flying capacitors C2, C4 and C5 under the condition that the output level remains unchanged, so as to achieve voltage balance of flying capacitors.

[0014] Furthermore, when applied to a three-phase circuit, the variable-level modulation method is applied to the power units of phase A, phase B, and phase C respectively. The modulation reference signals of phase A, phase B, and phase C are sequentially 120° out of phase, and the corresponding redundant switching states are selected according to the voltage deviation of the flying capacitor of each phase to form a three-phase multi-level output.

[0015] Compared with the prior art, the beneficial effects of the present invention are: ① The variable-level modulation method of the flying capacitor multilevel inverter in this invention can achieve nine-level, seven-level, or five-level output according to application requirements. The nine-level mode is suitable for applications requiring high power quality and high voltage utilization, and can further improve the output waveform quality. The seven-level mode is simpler to control, easier for capacitor voltage equalization, and its output power quality falls between that of the nine-level and five-level modes. The five-level mode is suitable for lower output voltage levels or applications requiring reduced device stress, offering advantages such as flexible control and strong adaptability. Switching between different output level modes using the same topology requires no change to the main circuit structure, enhancing the system's versatility and engineering application flexibility.

[0016] ② This invention utilizes redundant switch states to selectively control the charging and discharging of the flying capacitor while maintaining a constant output level. This achieves dynamic voltage balancing of the flying capacitor without requiring additional complex auxiliary balancing circuits, reducing the hardware complexity and implementation cost of the control system. Simultaneously, this voltage balancing method improves the steady-state consistency of the system during long-term operation, preventing output waveform distortion or device overvoltage caused by capacitor voltage deviation, thus enhancing the overall safety and stability of the converter.

[0017] ③ The variable-level modulation method of the flying capacitor multilevel inverter of the present invention can be applied to single-phase systems and can also be easily extended to three-phase multilevel inverter systems. This modulation method is suitable for various application scenarios such as new energy electric vehicle motor drives, charging piles, solar power generation protection and control devices, smart grid rectifiers, and battery energy storage inverters. Therefore, the present invention has the advantages of high output level, high power density, low device stress, low harmonic content, and good scalability, and has high engineering application value. Attached Figure Description

[0018] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a flowchart of the variable level modulation method for the flying capacitor multilevel inverter in this invention.

[0019] Figure 2 This is a diagram of the multilevel circuit topology in this invention.

[0020] Figure 3 This is a flowchart of the nine, seven, and five-level mode selection process in this invention.

[0021] Figure 4 This is a schematic diagram showing the correspondence between the nine-level mode modulation wave, the carrier wave, the states of each switch, and the output voltage in this invention.

[0022] Figure 5 This is a schematic diagram showing the correspondence between the seven-level mode modulation wave, the carrier wave, the states of each switch, and the output voltage in this invention.

[0023] Figure 6 This is a schematic diagram showing the correspondence between the five-level mode modulation wave, the carrier wave, the states of each switch, and the output voltage in this invention.

[0024] Figure 7 This is a simulation waveform diagram of the nine-level mode of the variable level modulation method in this invention.

[0025] Figure 8 This is a simulation waveform diagram of the seven-level mode of the variable level modulation method in this invention.

[0026] Figure 9 This is a simulation waveform diagram of the five-level mode of the variable level modulation method in this invention. Figure 10 This is a circuit diagram showing the application of the variable-level modulation method of the flying capacitor multilevel inverter in this invention to a three-phase flying capacitor multilevel inverter.

[0027] Figure 11 The variable-level modulation method of the flying capacitor multilevel inverter of the present invention is applied to the simulated phase voltage waveform of the nine-level mode of a three-phase circuit.

[0028] Figure 12 The present invention relates to the variable-level modulation method of the flying capacitor multilevel inverter, which is applied to the simulated line voltage waveform of a three-phase circuit in a nine-level mode. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Example

[0030] like Figure 1 As shown, the variable level modulation method of the flying capacitor multilevel inverter in this embodiment is as follows: First, a multilevel circuit topology is constructed. Then, according to different output voltage and voltage equalization characteristic requirements, a five-level mode, a seven-level mode, or a nine-level mode is selected. By comparing the modulation wave with the carrier wave, the voltage that should be output at this time is obtained, and the drive signal of each switch is obtained.

[0031] The multilevel circuit topology includes twelve switching transistors and five capacitors. The switching transistors include six main switches (S). 1a S 2a S 3a S 4aS 5a S 6a and the corresponding six complementary switches S 1b S 2b S 3b S 4b S 5b S 6b The five capacitors are DC bus capacitors C1 and C3, and flying capacitors C2, C4 and C5.

[0032] Specifically, the DC bus voltage is V dc The positive terminal of DC bus capacitor C1 is connected to the positive terminal of the DC bus, and the negative terminal of DC bus capacitor C1 is grounded; the positive terminal of DC bus capacitor C3 is connected to the negative terminal of capacitor C1, and the negative terminal of DC bus capacitor C3 is connected to the negative terminal of the DC bus; the switching transistor S... 1a Connect the positive terminal of the DC bus capacitor C1, and then connect it to the switching transistor S. 1a S 2a S 2b S 1b Connected to the negative terminal of capacitor C1; switching transistor S 3a Connect the negative terminal of DC bus capacitor C3, and then connect it to the switching transistor S. 3a S 4a S 4b S 3b Connect the capacitor C1 to its negative terminal; connect the flying capacitor C2 to the positive terminal of the switching transistor S. 1a and S 2a Between them, the negative terminal of the flying capacitor C2 is connected to the switching transistor S. 2b and S 1b Between; the positive terminal of the flying capacitor C4 is connected to the switching transistor S. 3b and S 4b Between them, the negative terminal of the flying capacitor C4 is connected to the switching transistor S. 3a and S 4a Between; switching transistor S 5a Connected to the switching transistor S 2a S 2b Between them, via the switching transistor S 5a and S 6a Connected to the circuit output terminal; Switch S 5b Connected to the switching transistor S 4a S 4b Between them, via the switching transistor S 5b and S 6b Connect to the circuit output terminal; the positive terminal of the flying capacitor C5 is connected to the switching transistor S. 5a and S 6a Between them, the negative terminal of the flying capacitor C5 is connected to the switching transistor S. 6b and S 5b Between; the output port is connected to the switching transistor S. 6a and S6b Between these two points, the filter is connected after the output.

[0033] DC bus capacitors C1 and C3 are located at the positive and negative terminals of the DC bus, respectively. The voltage across both capacitors C1 and C3 is half of the bus voltage. V dc / 2. Flying capacitors C2 and C4 are located between the bus capacitors. The voltage across flying capacitors C2 and C4 is one-quarter of the DC bus voltage, i.e. V dc / 4. The voltage across the flying capacitor C5 is one-eighth of the DC bus voltage, i.e. V dc / 8.

[0034] In this embodiment, based on the multilevel circuit topology of a flying capacitor multilevel inverter with 6 pairs of switching transistors, there are a total of 64 switching modes. By merging the switching modes that have no effect on the output level, 16 switching modes can be obtained, as shown in Table 1. These 16 switching modes generate multiple output voltage levels and charge and discharge the flying capacitor, ultimately forming 9 output level schemes based on the 6-pair flying capacitor multilevel inverter.

[0035] Table 1. Examples of 9 Level Generation Methods for Flying Capacitor Multilevel Inverters Where x represents either 0 or 1, it has no effect on the output voltage. As can be seen from the table above, this modulation method outputs at 0 level, ±... V dc / 8 and ±2 V dc At the / 8 level, there are multiple switching modes to choose from, and the charging and discharging states of each flying capacitor are different in different states. The charging and discharging states of the capacitors in the table are all based on the output current being positive. When the output current is negative, the charging and discharging states are reversed. By alternating different switching modes, the voltage of the flying capacitor can be self-balanced.

[0036] In this embodiment, to meet different output voltage and voltage equalization requirements, a five-level mode, a seven-level mode, or a nine-level mode is selected. The specific steps for obtaining the driving signal for each switch by comparing the modulation wave and the carrier wave are as follows: First, select whether to use the nine-level, seven-level, or five-level mode based on the target output voltage. If the target output voltage amplitude is less than one-quarter of the bus voltage, the five-level mode is selected; otherwise, the nine-level or seven-level mode is selected. Furthermore, if the system requires the voltage of the flying capacitor C5 to have high dynamic response characteristics, the seven-level mode is selected. If better waveform quality is required and a larger value flying capacitor C5 is used, the nine-level mode is used.

[0037] In nine-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result of the modulation wave Vm and the eight carriers, make the inverter alternately output nine levels: 0, ±Vdc / 8, ±2Vdc / 8, ±3Vdc / 8, and ±4Vdc / 8. Finally, the drive signal for each switching transistor is obtained.

[0038] Specifically, among the eight stacked triangular carrier signals, there are four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis, and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0 to 1, 1 to 2, 2 to 3, and 3 to 4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis.

[0039] The modulated wave signal Vm is compared with eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 3 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 2 and 3. V dc / 8 level and 4 V dc The level varies between / 8.

[0040] Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-3 V dc / 8、-4 V dc The level varies between / 8.

[0041] Specifically, when the output voltage is positive, the modulation wave is also positive. When the modulation wave is in the range of 0 to 1, the modulation wave is compared with the carrier wave Tri1. If the modulation wave is greater than the carrier wave, then a 1 level is output, i.e., +1. V dc / 8, otherwise output 0 level; when the modulating wave is in the range of 1 to 2, compare the modulating wave with the carrier wave Tri2. If the modulating wave is greater than the carrier wave, output 2 level, i.e., +2. V dc / 8, otherwise output level 1; when the modulating wave is in the range of 2 to 3, compare the modulating wave with the carrier wave Tri3. If the modulating wave is greater than the carrier wave, output level 3, i.e., +3. V dc / 8, otherwise output level 2; when the modulating wave is in the range of 3 to 4, compare the modulating wave with the carrier wave Tri4. If the modulating wave is greater than the carrier wave, output level 4, i.e., +4. V dc / 8, otherwise output 3 levels. When the output voltage is negative, the level output logic is the same as when the output voltage is positive.

[0042] After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0043] The nine-level mode enables the output to synthesize a nine-level stepped wave within one power frequency cycle, and can utilize redundant states to dynamically balance the voltage of the flying capacitor, taking into account both output power quality and control feasibility.

[0044] In seven-level mode, the following steps are included: the amplitude of the modulated wave |V m Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result, the inverter alternately outputs seven levels: 0, ±Vdc / 8, ±2Vdc / 8, ±4Vdc / 8. This mode does not use the ±3 level, i.e., ±3... V dc / 8, using ±4 level and ±2 level to synthesize virtual ±3 level, and finally output the corresponding switch drive signal according to the selected mode.

[0045] Specifically, among the eight stacked triangular carrier signals, there are four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis, and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0 to 1, 1 to 2, 2 to 3, and 3 to 4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis.

[0046] The modulated wave signal Vm is compared with eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 4 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 2 and 3. V dc / 8 level and 4 V dc The level varies between / 8.

[0047] Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-4 V dc The output voltage varies between 0 and 1. Specifically, when the output voltage is positive, the modulation wave is positive; when the modulation wave is within the range of 0 to 1, it is compared with the carrier wave Tri1. If the modulation wave is greater than the carrier wave, then a 1 level is output, i.e., +1. V dc / 8, otherwise output 0 level; when the modulating wave is in the range of 1 to 2, compare the modulating wave with the carrier wave Tri2. If the modulating wave is greater than the carrier wave, output 2 level, i.e., +2. V dc / 8, otherwise output level 1; when the modulating wave is in the range of 2 to 3, compare the modulating wave with the carrier wave Tri3. If the modulating wave is greater than the carrier wave, output level 4, i.e., +4. V dc / 8, otherwise output level 2; when the modulating wave is in the range of 3 to 4, compare the modulating wave with the carrier wave Tri4. If the modulating wave is greater than the carrier wave, output level 4, i.e., +4. V dc / 8, otherwise output 2 levels. When the output voltage is negative, the level output logic is the same as when the output voltage is positive.

[0048] After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0049] In seven-level mode, three-level modulation is not used. When three-level modulation is required according to conventional methods, a virtual three-level modulation is synthesized using either two-level or four-level modulation, depending on the current stage of the carrier wave. The state of the flying capacitor voltage is then used to determine the voltage of the main switch S. 1a S 2a S 3a S 4a S 5a and S 6a The driving signal is given, and the remaining switches are turned on according to their corresponding complementary relationships. This mode enables the output to synthesize a seven-level stepped wave within one power frequency cycle, and can utilize redundant states to dynamically balance the voltage of the flying capacitor, taking into account both output power quality and control feasibility.

[0050] In five-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 0 and 2, construct four stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the four carriers. Based on the comparison result of the modulation wave Vm with the four carriers, make the inverter alternately output five levels: 0, ±Vdc / 8, ±2Vdc / 8. Finally, output the corresponding switching transistor drive signal according to the selected mode.

[0051] Specifically, among the four stacked triangular carrier signals, there are two triangular carrier signals Tri1 and Tri2 on the positive half-axis, and two triangular carrier signals FTri1 and FTri2 on the negative half-axis; the amplitudes of the two carrier signals on the positive half-axis are 0 to 1 and 1 to 2, respectively; the two carrier signals on the negative half-axis are inversely related to the positive half-axis.

[0052] The modulated wave signal V m The output voltage level is obtained by comparing the four stacked triangular carrier signals: when the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The level varies between / 8.

[0053] Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc The level varies between / 8.

[0054] Specifically, when the output voltage is positive, the modulation wave is also positive. When the modulation wave is in the range of 0 to 1, the modulation wave is compared with the carrier wave Tri1. If the modulation wave is greater than the carrier wave, then a 1 level is output, i.e., +1. V dc / 8, otherwise output 0 level; when the modulating wave is in the range of 1 to 2, compare the modulating wave with the carrier wave Tri2. If the modulating wave is greater than the carrier wave, output 2 level, i.e., +2. V dc / 8, otherwise output a 1 level. When the output voltage is negative, the level output logic is the same as when the output voltage is positive.

[0055] After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

[0056] In the five-level mode, by adjusting the modulation strategy and the switching state selection range, the highest output level, i.e., ±4, is not used. V dc / 8, using only 0, ± V dc / 8、±2 V dc / 8 is used as the output level. Compared with the nine-level mode, the five-level mode can operate at a lower output voltage level and further reduce the voltage stress and switching losses of some switches. It is suitable for low voltage output or more demanding operating conditions, while still retaining the advantages of compact flying capacitor topology and voltage sharing of devices.

[0057] Figure 7 This is a simulation waveform diagram of the nine-level circuit in this embodiment. Figure 7 As can be seen, under the nine-level modulation method, the output voltage exhibits a clear stepped multi-level characteristic, with smooth transitions between adjacent levels, effectively approximating a sine wave. Due to the increased number of output levels, the dv / dt and harmonic content of the output voltage are effectively suppressed, thereby reducing the filter inductor requirement and improving system output performance. Simultaneously, with appropriate modulation and redundancy state selection, the flying capacitor voltage can be maintained near a predetermined value, verifying the feasibility of the modulation method of this invention.

[0058] Figure 8 This is the simulation waveform diagram of the seven-level circuit in this embodiment. (From...) Figure 8 As can be seen, under the seven-level modulation method, the output voltage exhibits a clear stepped multi-level characteristic, and instead of using three-eighths level, it uses four-eighths and two-eighths levels to synthesize a virtual three-eighths level. Meanwhile, with reasonable modulation and redundancy state selection, the flying capacitor voltage can be maintained relatively easily near the predetermined value, verifying the feasibility of the modulation method of this invention.

[0059] Figure 9 This is the simulation waveform diagram of the five-level circuit in this embodiment. (From...) Figure 9 As can be seen, in five-level mode, the output voltage still maintains a multi-level stepped variation characteristic, which can meet the operating requirements at lower output voltage levels. Compared with nine-level mode, this mode has a simpler control implementation, further reduces the working stress on the device, and is suitable for application scenarios that need to balance control complexity, device safety margin, and output quality.

[0060] The level modulation method of the flying capacitor multilevel inverter in this embodiment can be applied to three-phase circuits, such as... Figure 10 As shown, the phase system consists of phase A power unit, phase B power unit, and phase C power unit. Each phase power unit adopts... Figure 1 The single-phase flying capacitor multilevel circuit topology shown here shares the same DC bus across all three phases. The three-phase modulation reference signals are 120° out of phase with each other, and the corresponding redundant switching states are selected based on the voltage deviation of each phase's flying capacitor, thus forming a three-phase multilevel output on the AC side. This flying capacitor multilevel circuit topology in this embodiment can achieve three-phase expansion while maintaining the advantages of a single-phase topology, making it suitable for applications such as new energy electric vehicle motor drives, charging piles, solar power generation protection and control devices, smart grid rectifiers, and battery energy storage inverters.

[0061] Figure 11 and Figure 12 The simulation waveform diagram of the variable-level modulation method of the flying capacitor multilevel inverter in this embodiment applied to a three-phase circuit is shown below. Figure 11 The waveform diagram is shown below. Figure 12 This is a waveform diagram of the line voltage. Figure 11 As can be seen, the three-phase phase voltages all exhibit a multi-level stepped distribution, with a 120° phase difference between the three phases; the line voltage is formed by the superposition of phase voltages, possessing richer level levels and better waveform quality. Simulation results show that when the variable-level modulation method proposed in this invention is applied to the aforementioned flying capacitor multi-level inverter, it can stably achieve three-phase multi-level output and has good application scalability.

[0062] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for level modulation of a flying capacitor multilevel inverter, characterized in that, Includes the following steps: Construct a multilevel circuit topology, which includes twelve switching transistors and five capacitors; To meet different output voltage and voltage equalization requirements, a five-level mode, a seven-level mode, or a nine-level mode can be selected. By comparing the modulation wave with the carrier wave, the voltage that should be output at this time can be determined, and the drive signal for each switch can be obtained.

2. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 1, characterized in that, The switching transistor includes six main switches S 1a S 2a S 3a S 4a S 5a S 6a and the corresponding six complementary switches S 1b S 2b S 3b S 4b S 5b S 6b The five capacitors are DC bus capacitors C1 and C3, and flying capacitors C2, C4 and C5. DC bus capacitors C1 and C3 are located at the positive and negative terminals of the DC bus, respectively, and the voltage of DC bus capacitors C1 and C3 is half of the bus voltage. Flying capacitors C2 and C4 are located between the bus capacitors, and the voltage of flying capacitors C2 and C4 is one-quarter of the DC bus voltage. The voltage of flying capacitor C5 is one-eighth of the DC bus voltage.

3. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 2, characterized in that, DC bus voltage is V dc ; The positive terminal of DC bus capacitor C1 is connected to the positive terminal of the DC bus, and the negative terminal of DC bus capacitor C1 is grounded. The positive terminal of DC bus capacitor C3 is connected to the negative terminal of capacitor C1, and the negative terminal of DC bus capacitor C3 is connected to the negative terminal of the DC bus. Switch S 1a Connect the positive terminal of the DC bus capacitor C1, and then connect it to the switching transistor S. 1a S 2a S 2b S 1b Connect to the negative terminal of capacitor C1; Switch S 3a Connect the negative terminal of DC bus capacitor C3, and then connect it to the switching transistor S. 3a S 4a S 4b S 3b Connect to the negative terminal of capacitor C1; The positive terminal of the flying capacitor C2 is connected to the switching transistor S. 1a and S 2a Between them, the negative terminal of the flying capacitor C2 is connected to the switching transistor S. 2b and S 1b between; The positive terminal of the flying capacitor C4 is connected to the switching transistor S. 3b and S 4b Between them, the negative terminal of the flying capacitor C4 is connected to the switching transistor S. 3a and S 4a between; Switch S 5a Connected to the switching transistor S 2a S 2b Between them, via the switching transistor S 5a and S 6a Connect to the circuit output terminal; Switch S 5b Connected to the switching transistor S 4a S 4b Between them, via the switching transistor S 5b and S 6b Connect to the circuit output terminal; The positive terminal of the flying capacitor C5 is connected to the switching transistor S. 5a and S 6a Between them, the negative terminal of the flying capacitor C5 is connected to the switching transistor S. 6b and S 5b between; The output port is connected to the switching transistor S. 6a and S 6b Between these two points, the filter is connected after the output.

4. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 2 or 3, characterized in that, In the step of selecting five-level, seven-level, or nine-level inverter voltage output mode to meet different output voltage and voltage equalization characteristics requirements: If the target output voltage amplitude is greater than one-quarter of the bus voltage, select the nine-level or seven-level mode. Use the seven-level mode when a high dynamic response across the capacitor voltage is required, and select the nine-level mode when higher power quality is required. If the target output voltage is less than one-quarter of the bus voltage, then select the five-level mode.

5. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 1, characterized in that, In nine-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result of the modulation wave Vm and the eight carriers, make the inverter alternately output nine levels: 0, ±Vdc / 8, ±2Vdc / 8, ±3Vdc / 8, and ±4Vdc / 8. Finally, the drive signal for each switching transistor is obtained. In seven-level mode, the following steps are included: the amplitude of the modulated wave. Assuming the frequency is between 2 and 4, construct eight stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the eight carriers. Based on the comparison result of the modulation wave Vm and the eight carriers, make the inverter alternately output seven levels: 0, ±Vdc / 8, ±2Vdc / 8, ±4Vdc / 8. Use ±4Vdc / 8 and ±2Vdc / 8 to synthesize a virtual ±3Vdc / 8. Finally, output the corresponding switching transistor drive signal according to the selected mode. In five-level mode, the following steps are included: the amplitude of the modulated wave |V m |Assuming the frequency is between 0 and 2, construct four stacked triangular carrier signals of the same frequency. Compare the modulation wave Vm with the four carriers. Based on the comparison result of the modulation wave Vm with the four carriers, make the inverter alternately output five levels: 0, ±Vdc / 8, ±2Vdc / 8. Finally, output the corresponding switching transistor drive signal according to the selected mode.

6. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 5, characterized in that, In the nine-level mode, the following steps are included: Construct eight stacked triangular carrier signals of the same frequency, with four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0–1, 1–2, 2–3, and 3–4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal Vm is compared with the eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage v ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 3 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 3 and 8. V dc / 8 level and 4 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-3 V dc / 8、-4 V dc / 8 level variation; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

7. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 5, characterized in that, In the seven-level mode, the following steps are included: Construct eight stacked triangular carrier signals of the same frequency, with four triangular carrier signals Tri1, Tri2, Tri3, and Tri4 on the positive half-axis and four triangular carrier signals FTri1, FTri2, FTri3, and FTri4 on the negative half-axis; the amplitudes of the four carrier signals on the positive half-axis are 0–1, 1–2, 2–3, and 3–4, respectively; and the four carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal Vm is compared with the eight stacked triangular carrier signals to obtain the required output voltage level: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc The voltage varies between 8 and 2; when the modulation wave is in the range of 2 to 3, the output voltage is between 2 and 3. V dc / 8 and 4 V dc The voltage varies between 8 and 3; when the modulation wave is in the range of 3 to 4, the output voltage is between 2 and 3. V dc / 8 level and 4 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8、-4 V dc The level varies between / 8 levels; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

8. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 5, characterized in that, In the five-level mode, the following steps are included: Construct four stacked triangular carrier signals of the same frequency, where the two triangular carrier signals Tri1 and Tri2 are on the positive half-axis, and the two triangular carrier signals FTri1 and FTri2 are on the negative half-axis; the amplitudes of the two carrier signals on the positive half-axis are 0 to 1 and 1 to 2, respectively; the two carrier signals on the negative half-axis are inverted one-to-one with the positive half-axis. The modulated wave signal V m The voltage level to be output is obtained by comparing it with the four stacked triangular carrier signals: When the modulated wave is in the range of 0 to 1, the output voltage V ox At 0 level and V dc The voltage varies between 8 and 1; when the modulation wave is in the range of 1 to 2, the output voltage is... V dc / 8 level and 2 V dc / 8 level variation; Correspondingly, the negative half-cycle carrier signal, after modulation, yields the output voltage v. ox In 0, - V dc / 8、-2 V dc / 8 level variation; After determining the output level, the mode is allocated according to the voltage of the flying capacitor to obtain the drive signal for each switch.

9. The variable-level modulation method for a flying capacitor multilevel inverter according to claim 5, characterized in that, The modulation method of the five-level mode, seven-level mode or nine-level mode uses redundant switch states to regulate the charging and discharging of flying capacitors C2, C4 and C5 under the condition that the output level remains unchanged, so as to achieve voltage balance of flying capacitors.

10. The method for level modulation of a flying capacitor multilevel inverter according to any one of claims 1-9, characterized in that, In a three-phase circuit, the variable-level modulation method is applied to the power units of phase A, phase B, and phase C respectively. The modulation reference signals of phase A, phase B, and phase C are sequentially 120° out of phase, and the corresponding redundant switching states are selected according to the voltage deviation of the flying capacitor of each phase to form a three-phase multi-level output.

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