Semiconductor device

Abstract

A semiconductor device including a transistor having a large on-state current is provided. The semiconductor device includes a transistor, a first insulating layer, and a second insulating layer. The transistor includes a first conductive layer over the first insulating layer, a second conductive layer, a third conductive layer, an oxide semiconductor layer, and a third insulating layer. The second insulating layer is over the first conductive layer. The second insulating layer has an end portion in contact with a top surface of the first conductive layer. The second conductive layer is over the second insulating layer. The oxide semiconductor layer has an end portion in contact with the top surface of the first conductive layer, an end portion in contact with a side surface of the second insulating layer, an end portion in contact with a side surface of the second conductive layer, and an end portion in contact with a top surface of the second conductive layer. The third insulating layer has a region in contact with a top surface and a side surface of the oxide semiconductor layer. The third conductive layer has a region facing the side surface of the second insulating layer with the third insulating layer and the oxide semiconductor layer interposed therebetween. The first insulating layer contains hydrogen.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device and a method for manufacturing the same. Another aspect of the present invention relates to a transistor and a method for manufacturing the same. A third aspect of the present invention relates to a display device including a semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the technical fields described above. Examples of technical fields encompassing one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), and driving or manufacturing methods for the aforementioned devices.

[0003] In this specification, etc., a semiconductor device refers to a device that utilizes the properties of semiconductors, and includes circuits that include semiconductor elements (transistors, diodes, photodiodes, etc.) and devices that include such circuits. Furthermore, a semiconductor device refers to all devices capable of functioning by utilizing the properties of semiconductors. Examples of semiconductor devices include integrated circuits, chips containing integrated circuits, and electronic components that house chips in packages. Additionally, sometimes storage devices, display devices, light-emitting devices, lighting devices, and electronic devices are themselves semiconductor devices, or include semiconductor devices. Background Technology

[0004] Semiconductor devices, including transistors, are widely used in electronic devices. For example, in display devices, by reducing the area occupied by transistors, pixel size can be reduced, thus improving resolution. Therefore, microtransistors are in demand.

[0005] The development of devices that require high-definition display devices, such as those for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), is very active.

[0006] As a display device, for example, light-emitting devices including organic EL (Electro Luminescence) elements or light-emitting diodes (LEDs) are being developed.

[0007] Patent document 1 discloses a high-definition display device using organic EL elements.

[0008] [Preliminary Technology Documents]

[0009] [Patent Literature]

[0010] [Patent Document 1] International Publication No. 2016 / 038508 Summary of the Invention

[0011] The technical problem that the invention aims to solve

[0012] One objective of this invention is to provide a semiconductor device comprising micro-sized transistors. Another objective of this invention is to provide a semiconductor device comprising transistors with short channel lengths. Another objective of this invention is to provide a semiconductor device comprising transistors with large on-state currents. Another objective of this invention is to provide a semiconductor device comprising transistors with high field-effect mobility. Another objective of this invention is to provide a semiconductor device comprising transistors with good electrical characteristics. Another objective of this invention is to provide a semiconductor device operating at high speed. Another objective of this invention is to provide a semiconductor device with a small footprint. Another objective of this invention is to provide a semiconductor device with low wiring resistance. Another objective of this invention is to provide a semiconductor device or display device with low power consumption. Another objective of this invention is to provide a transistor, semiconductor device, or display device with high reliability. Another objective of this invention is to provide a high-definition display device. Another objective of this invention is to provide a method for manufacturing a semiconductor device or display device with high productivity. Another objective of this invention is to provide a novel transistor, semiconductor device, display device, or method for manufacturing the same.

[0013] Note that the description of these objectives does not preclude the existence of other objectives. One aspect of the invention does not necessarily require achieving all of the above objectives. Objectives other than those described above can be extracted from the description, drawings, and claims.

[0014] means of solving technical problems

[0015] One aspect of the present invention is a semiconductor device including a transistor, a first insulating layer, and a second insulating layer. The transistor includes a first conductive layer, a second conductive layer, and an oxide semiconductor layer on the first insulating layer. The second insulating layer is located on the first conductive layer. The second insulating layer has an end contacting the top surface of the first conductive layer. The second conductive layer is located on the second insulating layer. The oxide semiconductor layer has an end contacting the top surface of the first conductive layer, an end contacting a side surface of the second insulating layer, an end contacting a side surface of the second conductive layer, and an end contacting the top surface of the second conductive layer. The first insulating layer contains hydrogen.

[0016] In the aforementioned semiconductor device, the transistor preferably includes a third conductive layer and a third insulating layer. The third insulating layer has regions that contact the top surface and side surface of the oxide semiconductor layer. The third conductive layer has regions that face the side surface of the second insulating layer, separated by the third insulating layer and the oxide semiconductor layer.

[0017] One aspect of the present invention is a semiconductor device including a transistor, a first insulating layer, and a second insulating layer. The transistor includes a first conductive layer, a second conductive layer, a third conductive layer, an oxide semiconductor layer, and a third insulating layer on the first insulating layer. The second insulating layer is located on the first conductive layer. The second insulating layer has an end portion contacting the top surface of the first conductive layer. The second conductive layer is located on the second insulating layer. The oxide semiconductor layer has regions contacting the top surface of the first conductive layer, the side surface of the second insulating layer, and the top surface and side surface of the second conductive layer. The third insulating layer has regions contacting the top surface and side surface of the oxide semiconductor layer and the side surface of the second insulating layer. The third conductive layer has a region facing the side surface of the second insulating layer across the third insulating layer and the oxide semiconductor layer. The first insulating layer contains hydrogen.

[0018] In the above-described semiconductor device, the top surface shape of the second conductive layer is preferably the same as or substantially the same as the top surface shape of the second insulating layer.

[0019] In the aforementioned semiconductor device, the third insulating layer preferably has a region that contacts the top surface of the second insulating layer.

[0020] In the aforementioned semiconductor device, the second insulating layer and the second conductive layer preferably include openings extending into the first conductive layer. The oxide semiconductor layer, the third insulating layer, and the third conductive layer preferably each have regions located within the openings.

[0021] In the aforementioned semiconductor device, the second insulating layer preferably includes a fourth insulating layer and a fifth insulating layer on the fourth insulating layer. The fourth insulating layer preferably comprises silicon and nitrogen. The fifth insulating layer preferably comprises silicon and oxygen. The first insulating layer preferably comprises silicon and nitrogen.

[0022] In the aforementioned semiconductor device, the first insulating layer preferably has a region with a higher hydrogen content than the fourth insulating layer.

[0023] In the above-described semiconductor device, the oxide semiconductor layer preferably contains indium.

[0024] In the aforementioned semiconductor device, the first conductive layer preferably comprises indium and oxygen.

[0025] Invention Effects

[0026] According to one aspect of the present invention, a semiconductor device comprising micro-sized transistors can be provided. Additionally, according to one aspect of the present invention, a semiconductor device comprising transistors with short channel lengths can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device comprising transistors with large on-state currents can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device comprising transistors with high field-effect mobility can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device comprising transistors with good electrical characteristics can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device operating at high speed can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device with a small footprint can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device with low wiring resistance can be provided. Furthermore, according to one aspect of the present invention, a semiconductor device or display device with low power consumption can be provided. Furthermore, according to one aspect of the present invention, a transistor, semiconductor device, or display device with high reliability can be provided. Furthermore, according to one aspect of the present invention, a high-definition display device can be provided. Furthermore, according to one aspect of the present invention, a method for manufacturing a semiconductor device or display device with high productivity can be provided. Furthermore, according to one aspect of the present invention, a novel transistor, semiconductor device, display device, or method for manufacturing the same can be provided.

[0027] Note that the description of these effects does not preclude the existence of other effects. One aspect of the invention does not necessarily require all of the aforementioned effects. Effects other than those described above can be extracted from the specification, drawings, and claims. Attached Figure Description

[0028] Figure 1A This is a top view showing an example of a semiconductor device. Figure 1B and Figure 1C This is a cross-sectional view showing an example of a semiconductor device.

[0029] Figures 2A to 2C This is a perspective view showing an example of a semiconductor device.

[0030] Figures 3A to 3C This is a cross-sectional view showing an example of a semiconductor device.

[0031] Figure 4A and Figure 4B This is a cross-sectional view showing an example of a semiconductor device.

[0032] Figure 5A This is a cross-sectional view showing an example of a semiconductor device. Figure 5B This is a top view showing an example of a semiconductor device.

[0033] Figure 6This is a cross-sectional view showing an example of a semiconductor device.

[0034] Figures 7A to 7D This is a cross-sectional view showing an example of a semiconductor device.

[0035] Figure 8A and Figure 8B This is a cross-sectional view showing an example of a semiconductor device.

[0036] Figure 9A and Figure 9B This is a cross-sectional view showing an example of a semiconductor device.

[0037] Figure 10A and Figure 10B This is a cross-sectional view showing an example of a semiconductor device.

[0038] Figure 11A and Figure 11B This is a cross-sectional view showing an example of a semiconductor device.

[0039] Figure 12A and Figure 12B This is a cross-sectional view showing an example of a semiconductor device.

[0040] Figure 13A This is a top view showing an example of a semiconductor device. Figure 13B This is a cross-sectional view showing an example of a semiconductor device.

[0041] Figures 14A to 14C This is a perspective view showing an example of a semiconductor device.

[0042] Figures 15A to 15C This is a cross-sectional view showing an example of a semiconductor device.

[0043] Figure 16A This is a top view showing an example of a semiconductor device. Figure 16B This is a cross-sectional view showing an example of a semiconductor device.

[0044] Figure 17A and Figure 17B This is a perspective view showing an example of a semiconductor device.

[0045] Figure 18 This is a perspective view showing an example of a semiconductor device.

[0046] Figure 19 This is a cross-sectional view showing an example of a semiconductor device.

[0047] Figure 20A and Figure 20B This is a cross-sectional view showing an example of a semiconductor device.

[0048] Figure 21 This is a cross-sectional view showing an example of a semiconductor device.

[0049] Figure 22 This is a cross-sectional view showing an example of a semiconductor device.

[0050] Figure 23A This is a top view showing an example of a semiconductor device. Figure 23B This is a cross-sectional view showing an example of a semiconductor device.

[0051] Figure 24A and Figure 24B This is a perspective view showing an example of a semiconductor device.

[0052] Figure 25A This is a top view showing an example of a semiconductor device. Figure 25B This is a cross-sectional view showing an example of a semiconductor device.

[0053] Figure 26A This is a top view showing an example of a semiconductor device. Figure 26B and Figure 26C This is a cross-sectional view showing an example of a semiconductor device.

[0054] Figure 27A and Figure 27B This is a perspective view showing an example of a semiconductor device.

[0055] Figure 28 This is a perspective view showing an example of a semiconductor device.

[0056] Figure 29 This is a cross-sectional view showing an example of a semiconductor device.

[0057] Figure 30A and Figure 30B This is a cross-sectional view showing an example of a semiconductor device.

[0058] Figure 31 This is a cross-sectional view showing an example of a semiconductor device.

[0059] Figure 32 This is a cross-sectional view showing an example of a semiconductor device.

[0060] Figure 33A This is a cross-sectional view showing an example of a semiconductor device. Figure 33B This is a top view showing an example of a semiconductor device.

[0061] Figures 34A to 34E This is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0062] Figures 35A to 35DThis is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0063] Figure 36A and Figure 36B This is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0064] Figures 37A to 37D This is a cross-sectional view illustrating an example of a method for manufacturing a semiconductor device.

[0065] Figure 38 This is a perspective view showing an example of a display device.

[0066] Figure 39A and Figure 39B This is a cross-sectional view showing an example of a display device.

[0067] Figure 40 This is a cross-sectional view showing an example of a display device.

[0068] Figures 41A to 41C This is a cross-sectional view showing an example of a display device.

[0069] Figure 42A and Figure 42B This is a cross-sectional view showing an example of a display device.

[0070] Figure 43 This is a cross-sectional view showing an example of a display device.

[0071] Figures 44A to 44C This is a cross-sectional view showing an example of a display device.

[0072] Figure 45 This is a cross-sectional view showing an example of a display device.

[0073] Figure 46A and Figure 46B This is a cross-sectional view showing an example of a display device.

[0074] Figures 47A to 47D This is a diagram illustrating an example of an electronic device.

[0075] Figures 48A to 48F This is a diagram illustrating an example of an electronic device.

[0076] Figures 49A to 49G This is a diagram illustrating an example of an electronic device.

[0077] Figure 50A and Figure 50B This is a SEM image of the transistor in the embodiment.

[0078] Figure 51A and Figure 51BThis is a STEM image of the transistor in the embodiment.

[0079] Figure 52A This is a graph illustrating the Id-Vg characteristics of the transistor in the embodiment. Figure 52B This is a diagram illustrating the reliability of the transistor in an embodiment. Detailed Implementation

[0080] The embodiments will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and those skilled in the art will readily understand that its methods and details can be varied in many ways without departing from the spirit and scope of the invention. Therefore, the present invention should not be construed as being limited only to the contents described in the embodiments shown below.

[0081] Note that in the inventive structure described below, the same symbols are used in different figures to represent the same parts or parts with the same function, and repeated descriptions are omitted. Furthermore, when representing parts with the same function, the same shading lines are sometimes used without additional symbols.

[0082] Furthermore, for ease of understanding, the positions, sizes, and extents of the components shown in the accompanying drawings do not necessarily represent their actual positions, sizes, and extents. Therefore, the disclosed invention is not necessarily limited to the positions, sizes, and extents disclosed in the accompanying drawings.

[0083] In this specification and other documents, ordinal numbers such as "first" and "second" are used for convenience, but these do not limit the number of constituent elements or the order of the constituent elements (e.g., process sequence or stacking sequence). Furthermore, the ordinal numbers used for constituent elements in one part of this specification may sometimes differ from those used for the same constituent element in other parts of this specification or in the claims.

[0084] Furthermore, depending on the situation or state, the "film" and "layer" can be interchanged. For example, a "conductive layer" can be changed into a "conductive film." Similarly, an "insulating film" can be changed into an "insulating layer."

[0085] A transistor is a type of semiconductor device that can amplify current or voltage, control switching operations (turning on or off), etc. The transistors discussed in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin-film transistors (TFTs).

[0086] In cases where transistors with different polarities are used or the direction of current changes during circuit operation, the functions of the "source" and "drain" are sometimes interchanged. Therefore, in this specification and other materials, the terms "source" and "drain" can be used interchangeably. Note that, depending on the situation, the source and drain of the transistor can be appropriately referred to as source terminal and drain terminal, or source electrode and drain electrode, etc.

[0087] Furthermore, the "gate" and "back gate" can be interchanged. Therefore, in this specification and other materials, the terms "gate" and "back gate" can be used interchangeably. Note that, depending on the circumstances, the gate and back gate of the transistor can be appropriately referred to as gate electrode and back gate electrode, etc.

[0088] In this specification, "connection" includes, for example, "electrical connection." Note that sometimes "electrical connection" is used to describe the connection relationship of circuit elements as an object. Furthermore, "electrical connection" includes both "direct connection" and "indirect connection." "A and B directly connected" means that A and B are connected without any circuit elements (e.g., transistors, switches, etc. Note that wiring is not a circuit element). On the other hand, "A and B indirectly connected" means that A and B are connected through more than one circuit element.

[0089] For example, assuming a circuit including A and B is operating, if there are opportunities during circuit operation where electrical signals are exchanged or potentials interact between A and B, such a circuit can be defined as "A and B are indirectly connected". Furthermore, even if there are times during circuit operation where no electrical signals are exchanged or potentials interact between A and B, the opportunity where electrical signals are exchanged or potentials interact between A and B can still be defined as "A and B are indirectly connected".

[0090] As an example of "A and B being indirectly connected," there are cases where A and B are connected through the source and drain of more than one transistor. On the other hand, as an example of a situation that cannot be expressed as "A and B being indirectly connected," sometimes there is an insulator in the path from A to B. Specifically, there are cases where a capacitor is connected between A and B; and cases where there is a gate insulating film of a transistor between A and B, etc. Therefore, it cannot be said that "the gate (A) of the transistor is indirectly connected to the source or drain (B) of the transistor."

[0091] As another example of a situation that cannot be expressed as "A and B are indirectly connected", sometimes there are multiple transistors connected through the source and drain along the path from A to B, and the nodes between the transistors are supplied with a fixed potential V from the power supply, GND, etc.

[0092] Furthermore, unless otherwise specified in this specification, the on-state current refers to the drain current (also denoted as Id) when the transistor is in the on-state (also called the conduction state). Unless otherwise specified, in an n-channel transistor, the on-state refers to a state where the voltage between the gate and source (gate voltage, also denoted as Vg or Vgs) is above the threshold voltage (also denoted as Vth), and in a p-channel transistor, the on-state refers to a state where the voltage between the gate and source is below the threshold voltage.

[0093] In this specification, unless otherwise specified, off-state current refers to the leakage current between the source and drain of a transistor when it is in the off state (also known as the non-conducting state or the blocked state). Unless otherwise specified, in an n-channel transistor, the off state is defined as the state where the voltage between the gate and source is below the threshold voltage; in a p-channel transistor, the off state is defined as the state where the voltage between the gate and source is above the threshold voltage.

[0094] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than or equal to -10 degrees and less than 10 degrees. Therefore, it also includes states where the angle is greater than or equal to -5 degrees and less than 5 degrees. "Approximately parallel" refers to a state where the angle formed by two straight lines is greater than or equal to -30 degrees and less than 30 degrees. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than or equal to 80 degrees and less than 100 degrees. Therefore, it also includes states where the angle is greater than or equal to 85 degrees and less than 95 degrees. "Approximately perpendicular" refers to a state where the angle formed by two straight lines is greater than or equal to 60 degrees and less than 120 degrees.

[0095] In this specification and the like, the top surface shape of a constituent element refers to the outline shape of the constituent element when viewed from above (also known as plan view). In addition, "view from above" means the view taken from the normal direction of the surface on which the constituent element is formed or the surface of the support (e.g., a substrate) on which the constituent element is formed.

[0096] In this specification, "consistent or substantially consistent top surface shape" means that at least a portion of the edges of each layer in a stack overlaps. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion thereof. However, there are actually cases where the edges do not overlap, sometimes with the upper layer located inside or outside the lower layer; in such cases, it can also be described as "consistent or substantially consistent top surface shape." When the top surface shapes are consistent or substantially consistent, it can also be described as "consistent or substantially consistent end shapes" or "end-aligned or substantially aligned end shapes."

[0097] In this specification and the like, a conical shape refers to a shape in which at least a portion of the side surface of a constituent element is disposed obliquely relative to the substrate surface or the surface to be formed. Additionally, the angle formed between the oblique side surface and the substrate surface or the surface to be formed is sometimes referred to as the cone angle.

[0098] In this specification, devices manufactured using metal masks or FMM (Fine Metal Mask) are sometimes referred to as devices with an MM (Metal Mask) structure. Furthermore, devices manufactured without metal masks or FMM are sometimes referred to as devices with an MML (Metal Mask Less) structure. Note that because MML structure devices can be manufactured without metal masks, the resolution can exceed the upper limit of the alignment accuracy required by metal masks. Furthermore, MML structure devices do not require the equipment needed for metal mask manufacturing or the metal mask washing process. In addition, MML structure devices can reduce manufacturing costs, making them suitable for mass production.

[0099] In this specification and other materials, the structure in which light-emitting elements (also known as light-emitting devices) with different emission wavelengths are fabricated separately is sometimes referred to as an SBS (Side By Side) structure. Because the SBS structure allows for the optimization of materials and structure in each light-emitting element, the freedom of material and structure selection is increased, and it is easy to achieve improvements in brightness and reliability.

[0100] In this specification and other materials, holes or electrons are sometimes referred to as "carriers." For example, a hole injection layer or electron injection layer in a light-emitting element is sometimes called a "carrier injection layer," a hole transport layer or electron transport layer is called a "carrier transport layer," and a hole blocking layer or electron blocking layer is called a "carrier blocking layer." Note that sometimes it is not possible to clearly distinguish between the aforementioned carrier injection layer, carrier transport layer, and carrier blocking layer. Furthermore, sometimes a single layer performs the functions of two or three of the following: carrier injection layer, carrier transport layer, and carrier blocking layer.

[0101] In this specification, the light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Examples of layers included in the EL layer (also referred to as functional layers) include a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), and a carrier blocking layer (hole blocking layer and electron blocking layer). In this specification, the light-receiving element (also referred to as a light-receiving device) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes. In this specification, sometimes one of the pairs of electrodes is referred to as a pixel electrode and the other as a common electrode.

[0102] In this specification and the like, "disconnection" refers to the phenomenon where a layer, film, or electrode is disconnected due to the shape of the surface to which it is formed (e.g., a step).

[0103] In this specification, etc., "island-like" refers to the state in which two or more layers made of the same material are physically separated in the same process.

[0104] In this specification, the sacrificial layer (also known as a mask layer) is located at least above the light-emitting layer (more specifically, the layer that is processed into an island shape in the layers constituting the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.

[0105] (Implementation Method 1)

[0106] In this embodiment, refer to Figures 1A to 33B A semiconductor device according to one aspect of the present invention will be described.

[0107] One aspect of the present invention is a semiconductor device comprising a transistor, a first insulating layer, and a second insulating layer.

[0108] One embodiment of the transistor of the present invention includes a first conductive layer, a second conductive layer, a third conductive layer, an oxide semiconductor layer, and a third insulating layer on a first insulating layer. The first conductive layer serves as one of the source electrode and the drain electrode of the transistor, and the second conductive layer serves as the other of the source electrode and the drain electrode. The third conductive layer serves as the gate electrode, and the third insulating layer serves as the gate insulating layer. A region of the oxide semiconductor layer that contacts the first conductive layer serves as one of the source region and the drain region, and a region that contacts the second conductive layer serves as the other of the source region and the drain region. A channel formation region in the oxide semiconductor layer is located between the source region and the drain region.

[0109] The second insulating layer is located on the first conductive layer. The second insulating layer has an end contacting the top surface of the first conductive layer. The second conductive layer is located on the second insulating layer. The oxide semiconductor layer has an end contacting the top surface of the first conductive layer, an end contacting the side surface of the second insulating layer, an end contacting the side surface of the second conductive layer, and an end contacting the top surface of the second conductive layer. The third insulating layer includes regions contacting the top surface and side surface of the oxide semiconductor layer. The third conductive layer includes a region facing the side surface of the second insulating layer, separated by the third insulating layer and the oxide semiconductor layer.

[0110] The first insulating layer preferably contains hydrogen. The hydrogen contained in the first insulating layer diffuses through the first conductive layer to the oxide semiconductor layer. The region of the oxide semiconductor layer in contact with the first conductive layer (i.e., one of the source region and the drain region) contains hydrogen. Thus, a transistor with lower resistance and higher on-state current in one of the source region and the drain region can be realized.

[0111] In one aspect of the present invention, the channel length of the transistor can be controlled by the thickness of the second insulating layer sandwiched between the first conductive layer and the second conductive layer. That is, the channel length of the transistor is not affected by the exposure performance of the exposure apparatus used during manufacturing. Therefore, the channel length of the transistor can be made smaller than the minimum size (hereinafter also referred to as the minimum size) that the exposure apparatus can expose. By reducing the channel length, a transistor with a large on-state current can be realized. This provides a semiconductor device that operates at high speed. Furthermore, since the source electrode, oxide semiconductor layer, and drain electrode can be stacked, the occupied area of ​​the transistor can be reduced. Therefore, the occupied area of ​​the semiconductor device including this transistor can be reduced.

[0112] <Structure Example 1>

[0113] A semiconductor device according to one aspect of the present invention will be described. Figure 1A This is a top view (also called a plan view) of the semiconductor device 10. Figure 1B Show along Figure 1A A cross-sectional view of the section between the dotted line A1 and A2 in the diagram. Figure 1C This shows a cross-sectional view along the dashed line B1-B2. Note that... Figure 1A Some of the constituent elements of the semiconductor device 10 (such as the gate insulating layer) are omitted. Regarding the top view of the semiconductor device, ... Figure 1A Similarly, some of the constituent elements are omitted in the following figures.

[0114] The semiconductor device 10 includes a transistor 100, an insulating layer 110, and an insulating layer 109. The insulating layer 109 is disposed on the substrate 102, and the transistor 100 is disposed on the insulating layer 109.

[0115] Transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. Conductive layer 104 serves as a gate electrode, and insulating layer 106 serves as a gate insulating layer. Conductive layer 112a serves as one of a source electrode and a drain electrode, and conductive layer 112b serves as the other. In semiconductor layer 108, the region between the source electrode and the drain electrode, where the gate insulating layer overlaps with the gate electrode, serves as a channel formation region. Additionally, in semiconductor layer 108, the region in contact with the source electrode serves as a source region, and the region in contact with the drain electrode serves as a drain region.

[0116] Figures 2A to 2C A perspective view of the semiconductor device 10 is shown. Figure 2B Show along Figure 2A The cross-section of the dotted line C1-C2 shown. Figure 2C It was omitted. Figure 2A A perspective view of the conductive layer 104 and the insulating layer 106 shown. Figures 2A to 2CIn the diagram, a portion of the insulating layer is shown in perspective, with its outline indicated by dashed lines. This is a perspective view of a semiconductor device, and... Figure 2A Similarly, in the following figures, portions of the insulating layer are shown in a transparent manner and their outlines are indicated by dashed lines.

[0117] A conductive layer 112a is disposed on the insulating layer 109, an insulating layer 110 is disposed on the conductive layer 112a, and a conductive layer 112b is disposed on the insulating layer 110. The conductive layer 112a has a region that contacts the insulating layer 109. The insulating layer 110 contacts and is held by the conductive layers 112a and 112b. The conductive layer 112a has a region that overlaps with the conductive layer 112b through the insulating layer 110.

[0118] like Figure 1B As shown, the insulating layer 110 has an end portion 72 that contacts the top surface of the conductive layer 112a. In the insulating layer 110, the area where the side surface of the insulating layer 110 contacts the top surface of the conductive layer 112a corresponds to the end portion 72. The conductive layer 112a includes a region where the insulating layer 110 is provided and a region where the insulating layer 110 is not provided. Furthermore, the insulating layer 110 has a side surface 70 on the conductive layer 112a. The lower end portion of the side surface 70 is the end portion 72.

[0119] A semiconductor layer 108 is disposed on conductive layers 112a, 112b, and insulating layer 110. The semiconductor layer 108 has a region that contacts the top and side surfaces of conductive layer 112b, the side surface (here, side surface 70) of insulating layer 110, and the top surface of conductive layer 112a. The semiconductor layer 108 is connected to both conductive layer 112a and conductive layer 112b. The semiconductor layer 108 has a shape that extends along the top and side surfaces of conductive layer 112b, side surface 70, and the top surface of conductive layer 112a. The semiconductor layer 108 is disposed across the region of conductive layer 112a where the insulating layer 110 is disposed and the region of conductive layer 112a where the insulating layer 110 is not disposed.

[0120] Semiconductor layer 108 includes a first region contacting conductive layer 112a, a second region contacting side surface 70, and a third region contacting conductive layer 112b. The first region is adjacent to the second region, and the second region is adjacent to the third region. Alternatively, the first region is continuous with the second region, and the second region is continuous with the third region. The first region serves as one of the source and drain regions, and the third region serves as the other. The channel formation region is located in the second region.

[0121] Figure 3A Show along Figure 2A The cross-sectional view of the dotted line D1-D2 shown. Figure 3B and Figure 3C Show Figure 3A Enlarged image. Figure 4A Show along Figure 2A The cross-sectional view shown is the dotted line E1-E2. Figure 4B Show Figure 4A A magnified image. Additionally... Figures 3A to 3C It is a cross-sectional view along the surface containing the channel-forming region. Figure 4A and Figure 4B It is a cross-sectional view along the face containing the source and drain regions.

[0122] like Figure 1C , Figure 3B and Figure 4B As shown, the semiconductor layer 108 includes an end 80 that contacts the top surface of the conductive layer 112a, an end 84 that contacts the side surface 70, an end 86 that contacts the side surface of the conductive layer 112b, and an end 82 that contacts the top surface of the conductive layer 112b. End 80 is the end of the surface of the semiconductor layer 108 that contacts the top surface of the conductive layer 112a. End 84 is the end of the surface of the semiconductor layer 108 that contacts the side surface 70. End 86 is the end of the surface of the semiconductor layer 108 that contacts the side surface of the conductive layer 112b. End 82 is the end of the surface of the semiconductor layer 108 that contacts the top surface of the conductive layer 112b.

[0123] There are no particular limitations on the semiconductor material used for semiconductor layer 108. For example, a semiconductor composed of a single element or a compound semiconductor can be used. Examples of semiconductors composed of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon-germanium. In addition, examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors (OS). Note that these semiconductor materials may also contain impurities as dopants.

[0124] There are no particular restrictions on the crystallinity of the semiconductor material used for semiconductor layer 108; amorphous semiconductors, single-crystal semiconductors, or semiconductors with crystallinity other than single crystal (microcrystalline semiconductors, polycrystalline semiconductors, or semiconductors with crystalline regions in a portion thereof) can be used. When using single-crystal semiconductors or crystalline semiconductors, the degradation of transistor characteristics can be suppressed, so they are preferred.

[0125] Semiconductor layer 108 can be made of silicon, for example. Examples of silicon include monocrystalline silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low-temperature polycrystalline silicon (LTPS). Transistors using amorphous silicon as the channel formation region can be formed on a large glass substrate and can be manufactured at low cost. Transistors using polycrystalline silicon in the channel formation region have high field-effect mobility and can operate at high speeds. Furthermore, compared to transistors using amorphous silicon, transistors using microcrystalline silicon in the channel formation region have higher field-effect mobility and can operate at high speeds. Note that transistors using silicon in the channel formation region are sometimes referred to as Si transistors, and transistors using LTPS in the channel formation region are referred to as LTPS transistors.

[0126] Semiconductor layer 108 preferably comprises a metal oxide (also known as an oxide semiconductor) exhibiting semiconductor properties. Compared to transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have very high field-effect mobility. Furthermore, OS transistors have extremely low off-state currents, allowing them to retain the charge stored in the capacitor connected in series with the transistor for extended periods. In addition, the power consumption of the semiconductor device can be reduced by using OS transistors. Alternatively, when an oxide semiconductor is used as the semiconductor layer, it can also be referred to as an oxide semiconductor layer or a metal oxide layer.

[0127] As the insulating layer 110, one or both of inorganic and organic insulating layers can be used. Examples of materials suitable for organic insulating layers include acrylic resin and polyimide resin. The insulating layer 110 preferably comprises one or more inorganic insulating layers. Examples of materials suitable for inorganic insulating layers include oxides, nitrides, oxynitrides, and oxynitrides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of oxynitrides include silicon oxynitride and aluminum oxynitride.

[0128] Note that in this specification, etc., oxynitrides refer to materials in which the oxygen content is greater than the nitrogen content in their composition. Nitrogen oxides refer to materials in which the nitrogen content is greater than the oxygen content in their composition.

[0129] The insulating layer 110 has a region that contacts the semiconductor layer 108. When a metal oxide is used as the semiconductor layer 108, at least a portion of the region of the insulating layer 110 that contacts the semiconductor layer 108 preferably contains oxygen in order to improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110. Specifically, the region of the insulating layer 110 that contacts the channel forming region of the semiconductor layer 108 preferably contains oxygen. The region of the insulating layer 110 that contacts the channel forming region of the semiconductor layer 108 can suitably use one or more of oxides and oxynitrides.

[0130] When a metal oxide is used in the semiconductor layer 108, it is preferable that at least a portion of the region of the insulating layer 110 in contact with the semiconductor layer 108 releases oxygen by heating. Thus, oxygen is supplied from the insulating layer 110 to the semiconductor layer 108, which can reduce oxygen vacancies (V) in the semiconductor layer 108. O Oxygen vacancy) and defects where hydrogen enters an oxygen vacancy (hereinafter also denoted as V). O H).

[0131] An insulating layer 106, serving as the gate insulating layer of the transistor 100, is disposed such that it covers the semiconductor layer 108. The insulating layer 106 includes regions that contact the top surface and side surface of the semiconductor layer 108, as well as the side surface 70. Additionally, the insulating layer 106 includes regions that contact the top surface and side surface of the conductive layer 112a, the top surface and side surface of the conductive layer 112b, and the top surface of the insulating layer 109.

[0132] like Figure 3C As shown, the insulating layer 110 includes a region 90 on its side 70 where a semiconductor layer 108 is disposed and a region 92 where a semiconductor layer 108 is not disposed. In region 90, the semiconductor layer 108 is in contact with the insulating layer 110. The insulating layer 106 has a region opposite the side 70, separated by the semiconductor layer 108. On the other hand, in region 92, the insulating layer 106 is in contact with the insulating layer 110.

[0133] The conductive layer 104, used as the gate electrode of the transistor 100, includes a region disposed on and in contact with the top surface of the insulating layer 106. The conductive layer 104 has a region that overlaps with the semiconductor layer 108 across the insulating layer 106. Additionally, the conductive layer 104 has a region that faces the side surface 70 across the insulating layer 106 and the semiconductor layer 108. The conductive layer 104 is disposed such that it at least covers the region of the semiconductor layer 108 in contact with the side surface 70. Therefore, this region can be used as the channel formation region of the transistor 100.

[0134] The conductive layer 104 preferably covers the entire semiconductor layer 108. For example... Figure 1AAs shown, the conductive layer 104 preferably covers the semiconductor layer 108 when viewed from above. By covering the semiconductor layer 108 with the conductive layer 104, damage to the semiconductor layer 108 can be suppressed when the layer is formed on the transistor 100. This allows for the realization of a transistor with good electrical characteristics and high reliability. Furthermore, the semiconductor layer 108 may also have areas not covered by the conductive layer 104.

[0135] Alternatively, the following structure can be adopted: a step is formed between the region on the conductive layer 112a where the insulating layer 110 and the conductive layer 112b are provided and the region where the insulating layer 110 and the conductive layer 112b are not provided, and a semiconductor layer 108, an insulating layer 106 and a conductive layer 104 are provided along the step.

[0136] In transistor 100, the source electrode and drain electrode are located at different heights relative to the surface of substrate 102, and drain current flows in a direction perpendicular or substantially perpendicular to the surface of substrate 102. Alternatively, in transistor 100, drain current flows in the longitudinal direction. Therefore, one embodiment of the transistor of the present invention can also be described as a longitudinal channel transistor, a vertical transistor, or a VFET (Vertical Field Effect Transistor).

[0137] The channel length of transistor 100 can be controlled by the thickness of the insulating layer 110 disposed between conductive layers 112a and 112b. Therefore, transistors with channel lengths shorter than the minimum exposure dimensions of the exposure apparatus used to manufacture transistors can be manufactured with high precision. Furthermore, characteristic inhomogeneities among multiple transistors 100 can be reduced. Therefore, the semiconductor device 10 operates stably, and reliability is improved. Moreover, when transistor characteristic inhomogeneities are reduced, circuit design freedom is increased, and the operating voltage of the semiconductor device can be reduced. This, in turn, reduces the power consumption of the semiconductor device.

[0138] Because the source electrode, semiconductor layer, and drain electrode can be stacked, the area occupied by a transistor of one aspect of the present invention can be much smaller than that of a so-called planar transistor in which the semiconductor layer is configured as a planar shape.

[0139] Conductive layers 112a, 112b, and 104 can all be used as wiring, and transistor 100 can be disposed in the area where these wirings overlap. That is, in a circuit including transistor 100 and wiring, the area occupied by transistor 100 and wiring can be reduced. Therefore, a semiconductor device with a small footprint can be provided.

[0140] For example, when a semiconductor device according to one aspect of the present invention is used in the pixel circuit of a display device, the occupied area of ​​the pixel circuit can be reduced, thereby enabling a high-definition display device. Furthermore, for example, when a semiconductor device according to one aspect of the present invention is used in the driving circuit of a display device (e.g., one or both of a gate line driving circuit and a source line driving circuit), the occupied area of ​​the driving circuit can be reduced, thereby enabling a display device with a narrow bezel.

[0141] Figure 5A Show Figure 1B An enlarged view of the transistor 100 and its vicinity is shown. An insulating layer 109 is disposed between the transistor 100 and the insulating layer 110 and the substrate 102. The insulating layer 109 has a region in contact with the conductive layer 112a, the insulating layer 110, and the insulating layer 106. The insulating layer 109 can be made of a material used as the insulating layer 110.

[0142] The insulating layer 109 preferably has barrier properties. The insulating layer 109 is preferably made of a material from which impurities (e.g., water and hydrogen) in the substrate 102 do not diffuse easily. Thus, the diffusion of impurities from the substrate 102 into the transistor 100 can be suppressed.

[0143] Furthermore, in this specification and the like, a barrier film refers to a membrane that has barrier properties. Barrier properties refer to having one or both of the following functions: the ability to inhibit the diffusion of a target substance, thereby suppressing the substance's permeability through the membrane (also known as low permeability); or the ability to trap or fix (also known as gettering) the substance. For example, an insulating layer with barrier properties can be called a barrier insulating layer.

[0144] The insulating layer 109 used as the barrier film can, for example, be one or more of an oxide containing one or both of aluminum and hafnium, an oxide containing magnesium, an oxide containing gallium, an aluminum nitride, a silicon nitride, and a silicon oxide nitride. Specifically, the insulating layer 109 can suitably be one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, zinc gallium oxide, aluminum nitride, silicon nitride, and silicon oxynitride.

[0145] The insulating layer 109 is preferably made of a material that contains and releases impurities (e.g., water and hydrogen) that reduce the resistance of the semiconductor layer 108. The impurities released by the insulating layer 109 diffuse into the region of the conductive layer 112a that contacts the insulating layer 109. Furthermore, when the impurities diffuse into the conductive layer 112a and then into the region of the semiconductor layer 108 that contacts the conductive layer 112a, this region contains impurities, thereby reducing the resistance of that region. In other words, the resistance of either the source region or the drain region can be reduced. This allows for the realization of transistors with high on-state current, thereby enabling high-speed semiconductor devices.

[0146] When a metal oxide is used for the semiconductor layer 108, it is more preferable that the impurities released from the insulating layer 109 contain hydrogen. When hydrogen in the insulating layer 109 diffuses through the conductive layer 112a to the semiconductor layer 108, the region of the semiconductor layer 108 in contact with the conductive layer 112a contains hydrogen, and the carrier concentration in this region increases. That is, the resistance of one of the source and drain regions can be reduced. The insulating layer 109 preferably contains, for example, silicon and hydrogen. Typically, the insulating layer 109 preferably uses silicon nitride containing hydrogen.

[0147] The insulating layer 109 is more preferably made of a material that releases impurities that reduce the resistance of the conductive layer 112a. This reduces the resistance of the conductive layer 112a.

[0148] The conductive layer 112a can, for example, use a conductive metal oxide (also known as an oxide conductor). Examples of oxide conductors (OC) include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also known as ITSO), gallium-added zinc oxide, and In-Ga-Zn oxide. In particular, indium-containing oxide conductors are suitable for the conductive layer 112a due to their high conductivity.

[0149] When a metal oxide is used for the conductive layer 112a, it is more preferable that the impurities released from the insulating layer 109 contain hydrogen. The impurities released from the insulating layer 109 diffuse into the conductive layer 112a, thus concentrating the conductive layer 112a with impurities. This increases the carrier concentration in the conductive layer 112a, thereby reducing resistance. Furthermore, the conductive layer 112a can be used for wiring, thereby enabling a semiconductor device with low wiring resistance. Additionally, the impurities that reduce the resistance of the conductive layer 112a can be the same as those that reduce the resistance of the semiconductor layer 108. Alternatively, the impurities can be different. Furthermore, it is more preferable that the conductive layer 112a allows impurities to pass through easily. Moreover, it is more preferable that the conductive layer 112a does not readily adsorb impurities.

[0150] The thickness T109 of the insulating layer 109 is preferably 5 nm or more and 100 nm or less, more preferably 10 nm or more and 100 nm or less, more preferably 20 nm or more and 100 nm or less, and even more preferably 20 nm or more and 50 nm or less. Figure 5A As shown, the thickness T109 can be the shortest distance between the surface of the insulating layer 109 (here, the top surface of the substrate 102) and the top surface of the insulating layer 109 when viewed from the cross section.

[0151] When the thickness T109 is relatively large, the amount of impurities released from the insulating layer 109 is excessive, and the amount of impurities diffusing into the semiconductor layer 108 also increases, resulting in oxygen vacancies (V) generated by these impurities. O ) and V O The amount of H may be greater than the oxygen vacancies repaired by the oxygen supplied from the insulation layer 110b (V O ) and V O The amount of H. On the other hand, when the thickness T109 is thinner, the amount of impurities diffusing into the conductive layer 112a and the semiconductor layer 108 decreases, which may lead to a higher resistance in the conductive layer 112a and a higher resistance in either the source region or the drain region. By keeping the thickness T109 within the above range, the oxygen vacancies (V) in the channel formation region can be suppressed. O ) and V O Increasing H reduces its resistance. Furthermore, the thickness T109 is not limited to the range described above.

[0152] Note that a structure without insulation layer 109 can also be used.

[0153] The insulating layer 110 preferably has a laminated structure. Figure 1B Examples are shown of insulating layer 110 including insulating layer 110a, insulating layer 110b on insulating layer 110a, and insulating layer 110c on insulating layer 110b. Insulating layer 110a, insulating layer 110b, and insulating layer 110c can all use the materials listed in the description of insulating layer 110.

[0154] The region in semiconductor layer 108 that contacts insulating layer 110b serves as a channel formation region. Insulating layer 110b preferably contains oxygen, and preferably uses one or more of the oxides and oxynitrides described above. Typically, insulating layer 110b preferably uses one or both of silicon oxide and silicon oxynitride.

[0155] The insulating layer 110b is more preferably made of a material that releases oxygen when heated. Oxygen can be supplied to the semiconductor layer 108 by the release of oxygen from the insulating layer 110b due to heat applied during the manufacturing process of the semiconductor device 10. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies (V) are filled. O This can reduce oxygen vacancies (V) O Additionally, it can reduce V. O H. Therefore, transistors exhibiting good electrical characteristics and high reliability can be realized.

[0156] For example, oxygen can be supplied to the insulating layer 110b by heating or plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied by depositing a film on the top surface of the insulating layer 110b using a sputtering method in an oxygen-containing atmosphere. This film can then be removed. Furthermore, the method for supplying oxygen to the insulating layer 110b will be specifically described in Embodiment 2.

[0157] The deposition of the insulating layer 110b is preferably performed using sputtering or plasma-enhanced chemical vapor deposition (PECVD). In particular, by using sputtering as the deposition gas and avoiding the use of gases containing hydrogen (e.g., hydrogen and ammonia), a film with extremely low hydrogen content can be formed. This suppresses the supply of hydrogen to the channel formation region, thereby stabilizing the electrical characteristics of the transistor 100.

[0158] An insulating layer 110a is disposed between the insulating layer 110b and the conductive layers 112a and 109. An insulating layer 110c is disposed between the insulating layer 110b and the conductive layer 112b. The amount of impurities (e.g., hydrogen and water) released from each of the insulating layers 110a and 110c is preferably minimal. Furthermore, both the insulating layers 110a and 110c are preferably impermeable to substances. In other words, the insulating layers 110a and 110c act as barrier films. Specifically, both the insulating layers 110a and 110c are preferably impermeable to impurities. Therefore, the diffusion of impurities contained in the insulating layers 110a and 110c into the channel formation region can be suppressed. Thus, a transistor exhibiting good electrical characteristics and high reliability can be realized.

[0159] Both insulating layers 110a and 110c are preferably made of materials that are not easily permeable to oxygen. This suppresses the diffusion of oxygen contained in insulating layer 110b through insulating layer 110a to the conductive layer 112a side. Similarly, it suppresses the diffusion of oxygen contained in insulating layer 110b through insulating layer 110c to the conductive layer 112b side. Consequently, the amount of oxygen supplied from insulating layer 110b to the channel formation region of semiconductor layer 108 increases, thereby reducing the oxygen vacancies (V) in the channel formation region. O ) and V O H. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be realized. Furthermore, the oxidation of the conductive layer 112a due to oxygen contained in the insulating layer 110b, which would otherwise increase the resistance of the conductive layer 112a, can be suppressed. Similarly, the oxidation of the conductive layer 112b due to oxygen contained in the insulating layer 110b, which would otherwise increase the resistance of the conductive layer 112b, can be suppressed. Therefore, a transistor with a large on-state current can be realized.

[0160] Both insulating layers 110a and 110c can be made of the materials mentioned above as barrier films. For example, insulating layers 110a and 110c can suitably be one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, zinc gallium oxide, aluminum nitride, silicon nitride, and silicon oxynitride. Furthermore, insulating layers 110a and 110c can be made of the same material. Alternatively, insulating layers 110a and 110c can be made of different materials.

[0161] In this specification, different materials refer to materials whose constituent elements are partially or wholly different, or materials whose constituent elements are the same but whose composition is different.

[0162] One or more of the insulating layers 110a, 110b, and 110c may be in a laminated structure. For example, insulating layer 110c may be in a laminated structure of an alumina film and a silicon nitride film on the alumina film.

[0163] The thickness T110c of the insulating layer 110c is preferably 3 nm or more and 500 nm or less, more preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 20 nm or more and 300 nm or less, more preferably 50 nm or more and 300 nm or less, more preferably 100 nm or more and 300 nm or less, and more preferably 100 nm or more and 200 nm or less. For example... Figure 5A As shown, the thickness T110c can be the shortest distance between the surface of the insulating layer 110c that is formed (here, the top surface of the insulating layer 110b) and the top surface of the insulating layer 110c when viewed from the cross section.

[0164] The thickness T110c is preferably a value that at least acts as a barrier film against oxygen. The thickness T110c can be thinner than the thickness T110a. When the thickness T110c of the insulating layer 110c is thicker, sometimes the amount of impurities released from the insulating layer 110c increases, and the amount of impurities diffusing into the channel formation region also increases. On the other hand, when the thickness T110c is thinner, sometimes oxygen contained in the insulating layer 110b diffuses through the insulating layer 110c to the conductive layer 112b side, reducing the amount of oxygen supplied to the channel formation region. By setting the thickness T110c within the above range, the amount of oxygen supplied to the channel formation region can be increased, thereby reducing the oxygen vacancies (V) in the channel formation region. O ) and V O H. Furthermore, it can suppress the increase in resistance of the conductive layer 112b due to oxidation of the conductive layer 112b caused by oxygen contained in the insulating layer 110b. Note that the thickness T110c is not limited to the range described above.

[0165] The thickness T110a of the insulating layer 110a is preferably 3 nm or more and 500 nm or less, more preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 20 nm or more and 300 nm or less, more preferably 50 nm or more and 300 nm or less, more preferably 100 nm or more and 300 nm or less, more preferably 100 nm or more and 250 nm or less, and more preferably 150 nm or more and 250 nm or less. For example... Figure 5A As shown, the thickness T110a can be the shortest distance between the surface of the insulating layer 110a that is formed (here, the top surface of the conductive layer 112a) and the top surface of the insulating layer 110a when viewed from the cross section.

[0166] When the thickness T110a of the insulating layer 110a is thin, oxygen contained in the insulating layer 110b may diffuse through the insulating layer 110a to the conductive layer 112a side, reducing the amount of oxygen supplied to the channel formation region. When the thickness T110a is thick, the amount of impurities released from the insulating layer 110a may increase, and the amount of impurities diffused into the channel formation region may also increase. By setting the thickness T110a within the above range, the amount of oxygen supplied to the channel formation region can be increased, thereby reducing the oxygen vacancies (V) in the channel formation region. O ) and V O H. Furthermore, it can suppress the increase in resistance of the conductive layer 112a due to oxidation of the conductive layer 112a caused by oxygen contained in the insulating layer 110b. Note that the thickness T110a is not limited to the range described above.

[0167] Thickness T110a can be thicker than thickness T110c. When the region of semiconductor layer 108 in contact with insulating layer 110a is used as a source region or drain region, increasing the thickness T110a can make the distance from the source region or drain region to the gate electrode more uniform. This further makes the electric field applied to the gate electrode in the channel formation region more uniform.

[0168] like Figure 6 As shown, it is preferable that the thickness T110a is thicker than the total thickness T107 of the semiconductor layer 108 and the insulating layer 106 on the conductive layer 112a. Alternatively, it is preferable that the thickness T110a is equal to the thickness T107. This allows the height of the bottom surface of the conductive layer 104 on the conductive layer 112a to be the same as or lower than the height of the top surface of the insulating layer 110a. This makes the distance from the source or drain region to the gate electrode more uniform, thereby making the electric field applied to the gate electrode in the channel formation region more uniform. The thickness T107 can be considered as the shortest distance between the formed surface of the semiconductor layer 108 (here, the top surface of the conductive layer 112a) and the top surface of the insulating layer 106 when viewed in cross-section. Alternatively, the thickness T107 can be thicker than the thickness T110a.

[0169] At least one of the regions of semiconductor layer 108 that contact the insulating layer 110a and the region that contact the insulating layer 110c can also be a region with low resistance compared to the channel formation region (hereinafter also referred to as a low-resistance region). This region can also be described as a region with high carrier concentration and high oxygen vacancy density compared to the channel formation region. By using a material that releases impurities (e.g., water and hydrogen) in the insulating layer 110a, the region of semiconductor layer 108 that contacts the insulating layer 110a contains impurities, making this region a low-resistance region. Semiconductor layer 108 can have a structure that includes a low-resistance region between the region that contacts the conductive layer 112a (one of the source and drain regions) and the channel formation region. Similarly, by using an impurity-releasing material as the insulating layer 110c, the region of semiconductor layer 108 that contacts the insulating layer 110c contains impurities, making this region a low-resistance region. Semiconductor layer 108 can have a structure that includes a low-resistance region between the region that contacts the conductive layer 112b (the other of the source and drain regions) and the channel formation region. The low-resistance region can be used as a buffer region to mitigate the drain electric field. Note that the aforementioned low-resistance region can also be used as the source or drain region.

[0170] Note that sometimes impurities released from insulating layer 110a diffuse into the channel formation region through insulating layer 110b or through one of the source and drain regions of semiconductor layer 108. Similarly, impurities released from insulating layer 110c sometimes diffuse into the channel formation region through the other of the source and drain regions of semiconductor layer 108. However, at least the region of semiconductor layer 108 in contact with insulating layer 110b is supplied with oxygen from insulating layer 110b, thus reducing the oxygen vacancies (V) in the channel formation region. O ) and V O H. This allows for the suppression of threshold voltage drift, enabling the realization of transistors with low cutoff current and high on-state current. Consequently, low-power and high-performance semiconductor devices can be achieved. Note that the drain current flowing when the gate voltage (Vg) is 0V is denoted as the cutoff current.

[0171] However, when the amount of impurities released from insulating layers 110a and 110c is excessive, the semiconductor layer 108 contains more impurities. As a result, oxygen vacancies (V0) in the semiconductor layer 108 increase. O ) and V O The amount of H may be greater than the oxygen vacancies repaired by the oxygen supplied from the insulation layer 110b (V O ) and V O The amount of H. When the material that releases impurities is used in insulating layers 110a and 110c, it is more preferable that the amount of impurities released from them is small.

[0172] The insulating layer 110a includes regions that contact the top surface of the insulating layer 109 and the top and side surfaces of the conductive layer 112a. This suppresses the diffusion of impurities contained in the insulating layer 109 and the conductive layer 112a through the insulating layer 110b into the channel formation region of the semiconductor layer 108.

[0173] The insulating layer 109 preferably includes regions with a higher hydrogen content than the insulating layer 110a. The film density of the insulating layer 110a is preferably higher than that of the insulating layer 109. For details regarding the insulating layer 109, please refer to the descriptions of the insulating layers 110d and 110e.

[0174] Note that sometimes impurities released from insulating layer 109 diffuse into the channel formation region through conductive layer 112a and either the source or drain region of semiconductor layer 108. However, at least the region of semiconductor layer 108 in contact with insulating layer 110b is supplied with oxygen from insulating layer 110b, thus reducing oxygen vacancies (V) in the channel formation region. O ) and V O H. Therefore, threshold voltage drift can be suppressed, enabling the realization of transistors with low cutoff current and high on-state current. This, in turn, allows for the realization of semiconductor devices with low power consumption and high performance.

[0175] The insulating layer 109 preferably includes a region with a higher hydrogen content than the insulating layer 110a. Secondary ion mass spectrometry (SIMS) can be used, for example, to analyze the hydrogen content of the insulating layer 110.

[0176] By differentiating the deposition conditions of insulating layer 109 and insulating layer 110a, the amount of hydrogen released can be adjusted. Specifically, one or more of the following can be differed between insulating layer 109 and insulating layer 110a: deposition power (deposition power density), deposition pressure, type of deposition gas, deposition gas flow rate ratio, deposition temperature, and distance between the substrate and the electrode. For example, by making the deposition power density of insulating layer 109 lower than that of insulating layer 110a, the hydrogen content in insulating layer 109 can be greater than that in insulating layer 110a. This increases the amount of hydrogen released from insulating layer 109 when heated.

[0177] The hydrogen content in the deposition gas used to form the insulating layer 109 is preferably higher than that in the deposition gas used to form the insulating layer 110a. Specifically, when depositing a silicon nitride film or a silicon oxynitride film as the insulating layer 109 and the insulating layer 110a using PECVD, the ammonia flow rate ratio (hereinafter also referred to as the ammonia flow rate ratio) of the overall deposition gas used to form the insulating layer 109 is preferably higher than that of the deposition gas used to form the insulating layer 110a. By depositing the insulating layer 109 under conditions of a high ammonia flow rate ratio, the hydrogen content in the insulating layer 109 can be increased. In addition, the amount of hydrogen released from the insulating layer 109 when heated can be increased.

[0178] As described above, it is more preferable that the film density of insulating layer 110a is higher than that of insulating layer 109. This suppresses the diffusion of hydrogen from insulating layer 109 through insulating layers 110a and 110b into the channel formation region of semiconductor layer 108. The film density can be evaluated, for example, using Rutherford backscattering spectrometry (RBS) or X-ray reflectivity (XRR). Differences in film density can sometimes be evaluated using cross-sectional transmission electron microscopy (TEM) images. In TEM observation, a higher film density results in a darker (deeper) transmission electron (TE) image, while a lower film density results in a lighter (brighter) TE image. Therefore, in TE images, insulating layer 110a sometimes appears darker (darker) than insulating layer 109. Note that even though insulating layers 109 and 110a use the same material, their film densities are different, so these boundaries can sometimes be observed in cross-sectional TEM images with different contrasts.

[0179] Note that the insulating layer 110 is shown here as a three-layer stacked structure, but the invention is not limited to this. The insulating layer 110 preferably includes at least an insulating layer 110b. Alternatively, a structure excluding one or both of the insulating layers 110a and 110c may be used. Furthermore, the insulating layer 110 may also have a stacked structure of four or more layers.

[0180] [Semiconductor layer 108]

[0181] Specifically, the metal oxide that can be used in semiconductor layer 108 will be described. Examples of metal oxides include indium oxide (also referred to as indium oxide, In-O, IO), gallium oxide (also referred to as gallium oxide), and zinc oxide (also referred to as zinc oxide). The metal oxide preferably contains at least indium. In addition, the metal oxide preferably contains one or both of indium and zinc. Furthermore, the metal oxide preferably contains one or more selected from indium, element M, and zinc. In addition, element M is a metallic element or half-metal element with a high bonding energy with oxygen, for example, a metallic element or half-metal element with a higher bonding energy with oxygen than indium. Specifically, examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably any one or more of the elements mentioned above, more preferably one or more selected from gallium, aluminum, tin, and yttrium, and even more preferably one or more of gallium, aluminum, and tin. These elements have high bond energies with oxygen, and their ionic radii are approximately the same as those of indium or zinc, so they are more preferred. In addition, since tin is tetravalent, it can improve carrier mobility, so it is more preferred. Note that in this specification, etc., metallic elements and half-metallic elements are sometimes collectively referred to as "metallic elements," and the "metallic elements" described in this specification, etc., sometimes include half-metallic elements.

[0182] Semiconductor layer 108 may be made of, for example, indium oxide, indium zinc oxide (also known as In-Zn oxide, IZO (registered trademark)), indium tin oxide (also known as In-Sn oxide, ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (also known as In-W oxide, IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (also known as In-Ga-Sn oxide, IGTO), gallium zinc oxide (also known as Ga-Zn oxide, GZO), aluminum zinc oxide (also known as... Al-Zn oxide (AZO), indium aluminum zinc oxide (also known as In-Al-Zn oxide, IAZO), indium tin zinc oxide (also known as In-Sn-Zn oxide, ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (also known as In-Ga-Zn oxide, IGZO), indium gallium tin zinc oxide (also known as In-Ga-Sn-Zn oxide, IGZTO), indium gallium aluminum zinc oxide (also known as In-Ga-Al-Zn oxide, IGAZO, IGZAO, or IAGZO), etc. Alternatively, silicon-containing indium tin oxide (also known as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc., can be used.

[0183] Note that metal oxides can adopt structures that replace indium or include one or more metals with high period numbers in the periodic table, in addition to indium. There is a tendency that the greater the orbital overlap of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, by including metals with high period numbers, the field-effect mobility of transistors can sometimes be improved. Examples of metals with high period numbers include those belonging to the 5th and 6th periods. Specifically, examples of such metals include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0184] Metal oxides can also contain one or more non-metallic elements. When metal oxides contain non-metallic elements, the field-effect mobility of transistors can sometimes be improved due to increased carrier concentration or narrower band gap. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0185] Increasing the proportion of indium atoms in a metal oxide relative to the sum of the atomic numbers of all metal elements can improve the field-effect mobility of a transistor. Furthermore, it allows for the realization of transistors with high on-state currents.

[0186] In this specification, the ratio of the number of indium atoms to the total number of atoms of all contained metallic elements is sometimes described as the indium content. The same applies to other metallic elements. When multiple elements are contained as element M, the sum of the ratios of the number of atoms of element M to the total number of atoms of all contained metallic elements can be described as the content of element M.

[0187] When the zinc content in a metal oxide is increased, the metal oxide becomes highly crystallinity, which suppresses the diffusion of impurities within the metal oxide. Therefore, variations in the electrical characteristics of the transistor are suppressed, thereby improving reliability.

[0188] Increasing the content of element M in metal oxides can result in metal oxides with large band gaps. Furthermore, suppressing the formation of oxygen vacancies (V) in metal oxides can also achieve this. O ), caused by oxygen vacancies (V O Carrier generation is suppressed, thereby suppressing threshold voltage drift in the transistor. This reduces the cutoff current, enabling normally-off transistors. Furthermore, transistors with low off-state current can be achieved. Additionally, variations in the transistor's electrical characteristics are suppressed, thus improving reliability.

[0189] The electrical characteristics and reliability of a transistor vary depending on the composition of the metal oxide used in the semiconductor layer 108. Therefore, by changing the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, a semiconductor device with both excellent electrical characteristics and high reliability can be realized.

[0190] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably greater than or equal to the atomic ratio of element M. Examples of such atomic ratios for the metal elements in this In-M-Zn oxide include: In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:1, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, and In:M:Zn = 5:1:8. The following compositions are considered: In:M:Zn = 5:1:9, In:M:Zn = 6:1:6, In:M:Zn = 10:1:1, In:M:Zn = 10:1:3, In:M:Zn = 10:1:4, In:M:Zn = 10:1:6, In:M:Zn = 10:1:7, In:M:Zn = 10:1:8, In:M:Zn = 5:2:5, In:M:Zn = 10:1:10, In:M:Zn = 20:1:10, In:M:Zn = 40:1:10, and their vicinity. Note that vicinity composition includes a range of ±30% of the desired atomic ratio. Increasing the atomic ratio of indium in metal oxides can improve the on-state current or field-effect mobility of transistors.

[0191] In In-M-Zn oxides, the atomic ratio of In can also be less than the atomic ratio of element M. Examples of such In-M-Zn oxide atomic ratios include In:M:Zn = 1:3:2, In:M:Zn = 1:3:3, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, and compositions close to these ratios. By increasing the proportion of M atoms in the metal oxide, oxygen vacancies (V0) can be suppressed. O The generation of ).

[0192] Note that when element M contains multiple elements, the sum of the atomic ratios of these elements can be set as the atomic ratio of element M.

[0193] By using materials with a high indium content in semiconductor layer 108, the on-state current or field-effect mobility of the transistor can be improved. Furthermore, by including element M, oxygen vacancies (V0) can be suppressed. OThe content of element M (the ratio of the number of atoms of element M to the sum of the number of atoms of all contained metallic elements) is preferably 0.1% or more and 25% or less, more preferably 0.1% or more and 20% or less, more preferably 0.1% or more and 10% or less, more preferably 0.1% or more and 8% or less, more preferably 0.1% or more and 6% or less, and more preferably 0.1% or more and 4% or less. This allows for the realization of transistors with excellent electrical characteristics. For example, metal oxides with In:M:Zn = 40:1:10 and its vicinity are preferably used. Element M is preferably any one or more of the above-mentioned elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium. Specifically, metal oxides with In:Sn:Zn = 40:1:10 and its vicinity can be used appropriately. Alternatively, metal oxides with In:Al:Zn = 40:1:10 and its vicinity can be used appropriately.

[0194] Here, by using a metal oxide with a polycrystalline structure as the semiconductor layer 108, grain boundaries become recombination centers, trapping charge carriers, thus sometimes reducing the on-state current of the transistor. Furthermore, when a metal oxide with a polycrystalline structure is used as the semiconductor layer 108, the surface roughness of the semiconductor layer 108 sometimes increases. Consequently, the steps on the formed surfaces of layers (e.g., insulating layer 106) on the semiconductor layer 108 sometimes become larger, leading to problems such as breaks or voids in the layer. When using a metal oxide with a composition that easily becomes polycrystalline in the semiconductor layer 108, it is preferable to include elements that inhibit crystallization. This can suppress the semiconductor layer 108 from becoming polycrystalline, thereby enabling the realization of transistors with high on-state currents. Furthermore, the coverage of the layers (e.g., insulating layer 106) formed on the semiconductor layer 108 can be improved, thereby suppressing problems such as breaks or voids in the layer.

[0195] For example, compared to indium tin oxide (ITO), silicon-containing indium tin oxide (ITSO) is less likely to form a polycrystalline structure, so it can be appropriately used for semiconductor layer 108. When using ITSO, the silicon content (the ratio of the number of silicon atoms to the sum of the number of atoms of all contained metal elements) is preferably 1% or more and 20% or less, more preferably 3% or more and 20% or less, more preferably 3% or more and 15% or less, and more preferably 5% or more and 15% or less. As the ratio of the number of atoms of metal elements, for example, In:Sn:Si = 45:5:4, In:Sn:Si = 95:5:8, and metal oxides near them can be appropriately used. When silicon-containing indium tin oxide (ITSO) is used as semiconductor layer 108, it is preferable to have crystallinity. Furthermore, semiconductor layer 108 can include amorphous regions or be amorphous.

[0196] Metal oxides that do not contain element M can be used for semiconductor layer 108. When the metal oxide is an In-Zn oxide, examples of the atomic ratios of the metal elements include In:Zn = 1:1, In:Zn = 2:1, In:Zn = 1:2, In:Zn = 3:1, In:Zn = 3:2, In:Zn = 2:3, In:Zn = 4:1, In:Zn = 4:3, In:Zn = 5:1, In:Zn = 5:2, In:Zn = 5:3, In:Zn = 5:4, In:Zn = 5:6, In:Zn = 5:7, In:Zn = 5:8, In:Zn = 5:9, In:Zn = 7:1, In:Zn = 10:1, In:Zn = 10:3, In:Zn = 10:7, and compositions near these ratios. Furthermore, the atomic ratio of In is more preferably greater than that of Zn. By increasing the atomic ratio of In in the metal oxide, the on-state current or field-effect mobility of the transistor can be improved.

[0197] In the analysis of the composition of semiconductor layer 108, methods such as energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS or ESCA), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES) can be used. Alternatively, multiple methods can be combined. Peak separation of the obtained spectra is preferred to identify and quantify elements. Note that due to the influence of analytical precision, the actual content of elements with low content may differ from the content obtained from the analysis. For example, when the content of element M is low, the content of element M obtained from the analysis may be lower than the actual content, making it difficult to quantify the content of element M, or the content of element M may be below the detection limit.

[0198] Metal oxide films are best deposited using sputtering or atomic layer deposition (ALD). Note that when using sputtering to deposit metal oxide films, the composition of the deposited film sometimes differs from that of the sputtering target. In particular, the zinc content in the deposited metal oxide film can sometimes be reduced to about 50% of the zinc content in the sputtering target.

[0199] Semiconductor layer 108 is preferably made of a crystalline metal oxide. Examples of crystalline metal oxide structures include CAAC (c-axis aligned crystal) structures, polycrystalline structures, and nano-crystal (nc) structures. By using a crystalline metal oxide, the defect state density in semiconductor layer 108 can be reduced, thereby enabling a highly reliable semiconductor device.

[0200] Semiconductor layer 108 preferably uses CAAC-OS or nc-OS.

[0201] The CAAC-OS has multiple layered crystals. The c-axis of these crystals is oriented in the normal direction of the surface to which they are formed. Semiconductor layer 108 preferably has layered crystals parallel to or substantially parallel to the surface to which it is formed. For example, semiconductor layer 108 preferably has layered crystals parallel to or substantially parallel to the top surface of conductive layer 112b in the region contacting that surface, and layered crystals parallel to or substantially parallel to the side surface in the region contacting that surface. In particular, semiconductor layer 108 preferably includes layered crystals parallel to or substantially parallel to the side surface 70 of the insulating layer 110 in the region contacting that surface. By employing this structure, the layered crystals of semiconductor layer 108 are parallel to or substantially parallel to the channel length direction of transistor 100, thus enabling the realization of a transistor with a large on-state current.

[0202] By using highly crystalline metal oxides in the channel formation region, the defect state density in the channel formation region can be reduced. On the other hand, by using low-crystallinity metal oxides, transistors capable of carrying large currents can be realized.

[0203] The higher the substrate temperature during metal oxide film deposition, the more crystalline the metal oxide film can be deposited. The substrate temperature during deposition can be adjusted, for example, according to the temperature of the stage on which the substrate is placed. In addition, the higher the oxygen flow rate ratio (hereinafter also referred to as oxygen flow ratio) relative to the overall deposition gas used for deposition or the oxygen partial pressure in the processing chamber, the more crystalline the metal oxide film can be deposited.

[0204] The crystallinity of the semiconductor layer 108 can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Furthermore, multiple of these methods can be combined for analysis.

[0205] When a metal oxide is used as the semiconductor layer 108, it is preferable to minimize the Vc in the channel formation region. OH is made to be a high-purity intrinsic or substantially high-purity intrinsic. Thus, in order to obtain V... O For metal oxides with sufficiently reduced H, it is important to: remove impurities such as water and hydrogen from the metal oxide (sometimes described as dehydration or dehydrogenation); and supply oxygen to the metal oxide to repair oxygen vacancies (V). O ). By V O Metal oxides with sufficiently low levels of impurities such as hydrogen (H) used in the channel formation region of transistors can impart stable electrical characteristics. Note that sometimes oxygen is supplied to the metal oxide to repair oxygen vacancies (V0). O The treatment of ) is called oxidation treatment.

[0206] When a metal oxide is used as the semiconductor layer 108, the carrier concentration in the channel formation region is preferably 1 × 10⁻⁶. 18 cm -3 Below, less than 1×10 is preferred. 17 cm -3 Further optimization of less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 Further preferred is less than 1×10 12 cm -3 There is no lower limit to the carrier concentration in the channel formation region; for example, it can be set to 1 × 10⁻⁶. -9 cm -3 .

[0207] OS transistors exhibit minimal changes in electrical characteristics due to radiation exposure, meaning they possess high radiation tolerance and can therefore be appropriately used in environments where radiation exposure is possible. OS transistors can also be described as having high reliability against radiation. For example, OS transistors can be appropriately used in the pixel circuitry of X-ray flat panel detectors. Furthermore, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton radiation, and neutron radiation).

[0208] Semiconductor layer 108 may also contain layered materials used as semiconductors. Layered materials are a general term for a group of materials with layered crystal structures. A layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked together by bonds weaker than covalent and ionic bonds, such as van der Waals bonds. Layered materials have high conductivity per unit layer, that is, high two-dimensional conductivity. By using a material that serves as a semiconductor and has high two-dimensional conductivity in the channel formation region, transistors with large on-state currents can be provided.

[0209] Examples of the aforementioned layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen elements (elements belonging to Group 16). Furthermore, examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as channel forming regions in transistors include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten telluride (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), and zirconium selenide (typically ZrSe2).

[0210] Semiconductor layer 108 may employ a stacked structure comprising two or more metal oxide layers. The compositions of the two or more metal oxide layers comprising semiconductor layer 108 may be identical or substantially identical. By employing a stacked structure of metal oxide layers with identical compositions, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs. When the compositions of the two or more metal oxide layers comprising semiconductor layer 108 are identical or substantially identical, it is sometimes impossible to clearly identify the boundaries (interfaces) of these metal oxide layers.

[0211] Reference Figure 5A and Figure 5B Explain the channel length and channel width of transistor 100. Figure 5B This is a top view of the semiconductor device 10. Here, the area of ​​the semiconductor layer 108 that contacts the side of the insulating layer 110b will be described as the channel formation area.

[0212] Figure 5A The channel length L100 of transistor 100 is indicated by a dashed double arrow. The channel length L100 of transistor 100, viewed in cross-section, corresponds to the length of the region where the semiconductor layer 108 contacts the side of the insulating layer 110b. In other words, the channel length L100 is determined by the thickness T110b of the insulating layer 110b and the angle θ110b between the side of the semiconductor layer 108 of the insulating layer 110b and the surface of the insulating layer 110b to which it is formed (here, the top surface of the insulating layer 110a). Therefore, the channel length L100 can be set to be smaller than the minimum size of the exposure apparatus, enabling the realization of micro-sized transistors. Specifically, transistors with extremely short channel lengths that cannot be achieved by the exposure apparatuses used in the mass production of existing flat panel displays (e.g., with a minimum size of approximately 2 μm or 1.5 μm) can be realized. Furthermore, transistors with channel lengths less than 10 nm can be realized without using the very expensive exposure apparatuses used in the most advanced LSI technology.

[0213] The channel length L100 can be, for example, 5nm or more, 7nm or more, or 10nm or more and less than 3μm, or less than 2.5μm, less than 2μm, less than 1.5μm, less than 1.2μm, less than 1μm, less than 500nm, less than 300nm, less than 200nm, less than 100nm, less than 50nm, less than 30nm, or less than 20nm. For example, the channel length L100 can be set to 100nm or more and less than 1μm.

[0214] By shortening the channel length L100, the on-state current of the transistor 100 can be increased. Using the transistor 100, circuits capable of high-speed operation can be manufactured. Furthermore, the circuit's footprint can be reduced. Therefore, a miniaturized semiconductor device can be realized. For example, when using a semiconductor device according to one aspect of the present invention in a large display device or a high-definition display device, the signal delay of each wiring can be reduced even with an increased number of wirings, thereby suppressing display unevenness. In addition, since the circuit's footprint can be reduced, the bezel of the display device can be minimized.

[0215] The channel length L100 can be controlled by adjusting the thickness T110b and angle θ110b of the insulating layer 110b.

[0216] The thickness T110b of the insulating layer 110b can be, for example, greater than 5 nm, greater than 7 nm, or greater than 10 nm and less than 3 μm, less than 2.5 μm, less than 2 μm, less than 1.5 μm, less than 1.2 μm, less than 1 μm, less than 500 nm, less than 300 nm, less than 200 nm, less than 100 nm, less than 50 nm, less than 30 nm, or less than 20 nm.

[0217] The side surface of the insulating layer 110 on the semiconductor layer 108 side is preferably tapered. The angle θ110b is preferably less than 90 degrees. By reducing the angle θ110b, the coverage of the layer (e.g., semiconductor layer 108) formed on the insulating layer 110 can be improved. In addition, when the angle θ110b is less than 90 degrees, the smaller the angle θ110b, the longer the channel length L100 can be; the larger the angle θ110b, the shorter the channel length L100 can be.

[0218] Angle θ110b can be, for example, greater than 30 degrees, greater than 35 degrees, greater than 40 degrees, greater than 45 degrees, greater than 50 degrees, greater than 55 degrees, greater than 60 degrees, greater than 65 degrees, or greater than 70 degrees but less than 90 degrees, less than 85 degrees, or less than 80 degrees. Angle θ110b can also be less than 75 degrees, less than 70 degrees, less than 65 degrees, or less than 60 degrees.

[0219] Note that, although in Figure 1BThe isoelectric angle θ110b is less than 90 degrees, but one aspect of the invention is not limited to this. The angle θ110b can be 90 degrees or approximately 90 degrees. Thus, the occupancy area of ​​the semiconductor device can be reduced while shortening the channel length L100 of the transistor 100.

[0220] Although Figure 1B The diagram shows a structure where the shape of the side surface 70 is a straight line when viewed in cross-section; however, the invention is not limited to this. When viewed in cross-section, the shape of the side surface 70 may be curved. Alternatively, the shape of the side surface 70 may include both straight and curved regions.

[0221] The top surface shape of the conductive layer 112b is preferably the same as or substantially the same as the top surface shape of the insulating layer 110. Figure 1A The diagram shows a structure where the top surface shape of the conductive layer 112b is identical to that of the insulating layer 110. The conductive layer 112b and the insulating layer 110 can be formed using the same mask layer. For example, an insulating film becoming the insulating layer 110 and a conductive film becoming the conductive layer 112b are deposited on the insulating film, and a mask layer (e.g., a photoresist mask) is formed on the conductive film. Then, the conductive film and the insulating film are processed using the mask layer as a mask, thereby forming a conductive layer 112b and an insulating layer 110 with identical or substantially identical top surface shapes. By processing the insulating film becoming the insulating layer 110 and the conductive film becoming the conductive layer 112b using the same process, manufacturing costs can be reduced. Note that although... Figure 1A Examples of the top surface shapes of conductive layer 112b and insulating layer 110 are shown in the figure, but there are no particular restrictions on the top surface shapes of conductive layer 112b and insulating layer 110.

[0222] Preferably, the side surface 112b on the semiconductor layer 108 side and the side surface 70 are flat (i.e., these two surfaces are flush). This improves the coverage of the layers (e.g., semiconductor layer 108) disposed on the insulating layer 110 and the conductive layer 112b. Note that the side surface 112b on the semiconductor layer 108 side and the side surface 70 may also be discontinuous. Furthermore, the top surface shape of the conductive layer 112b may not be the same as the top surface shape of the insulating layer 110.

[0223] Here, the conductive layer 112b preferably does not have a region that contacts the side surface 70. When the conductive layer 112b contacts the side surface 70, the channel length L100 of the transistor 100 is shorter than the length of the side surface of the insulating layer 110b, so sometimes controlling the channel length L100 becomes difficult. Therefore, it is preferable that the top surface shape of the conductive layer 112b is the same as or substantially the same as the top surface shape of the insulating layer 110, or that the insulating layer 110 covers the conductive layer 112b when viewed from above (also known as when viewed from a plane).

[0224] The channel width of transistor 100 is the width of the region where the semiconductor layer 108 and the conductive layer 104 overlap in a direction orthogonal to the channel length direction. Figure 5B The double-headed arrow with double-dotted lines in the middle shows the channel width W100 of transistor 100.

[0225] When the semiconductor layer 108 and the conductive layer 104 are formed using photolithography, the channel width W100 is greater than or equal to the minimum exposure size of the exposure apparatus. For example, the channel width W100 can be 20 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 500 nm or more, or 1 μm or more but less than 500 μm, less than 200 μm, less than 100 μm, less than 50 μm, less than 20 μm, less than 10 μm, less than 5 μm, less than 20 μm, less than 10 μm, or less than 5 μm.

[0226] Note that this description uses the region of semiconductor layer 108 in contact with insulating layer 110b as an example of a channel forming region, but the invention is not limited to this. The region of semiconductor layer 108 in contact with insulating layer 110a can also be used as a channel forming region. Similarly, the region in contact with insulating layer 110c can also be used as a channel forming region.

[0227] [Conductive layer 112a, conductive layer 112b, conductive layer 104]

[0228] Conductive layers 112a, 112b, and 104 can have a single-layer structure or a stacked structure of two or more layers. Examples of materials that can be used for conductive layers 112a, 112b, and 104 include one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys composed of one or more of the aforementioned metals. Conductive materials with low resistivity containing one or more of copper, silver, gold, and aluminum can be used for conductive layers 112a, 112b, and 104. In particular, copper or aluminum has advantages in mass production and is therefore preferred.

[0229] The conductive layers 112a, 112b, and 104 can be made of oxide conductors. Oxide conductors can be found as described above.

[0230] Oxygen vacancies are formed in metal oxides that possess semiconductor properties. Adding hydrogen to these vacancies creates donor levels near the conduction band. As a result, the conductivity of the metal oxide increases, making it a conductor. Metal oxides that can become conductors are called oxide conductors.

[0231] The conductive layers 112a, 112b, and 104 can be constructed using a stacked structure of a conductive film containing the aforementioned oxide conductor (metal oxide) and a conductive film containing a metal or alloy. By using a conductive film containing a metal or alloy, wiring resistance can be reduced.

[0232] As conductive layers 112a, 112b, and 104, Cu-X alloy films (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can be used. By using Cu-X alloy films, processing can be performed using wet etching, thereby reducing manufacturing costs.

[0233] Alternatively, conductive layers 112a, 112b, and 104 can be made of the same material. Or, different materials can be used for at least one of them.

[0234] Conductive layers 112a and 112b include regions that contact the semiconductor layer 108. When an oxide semiconductor is used as the semiconductor layer 108, there is a concern that if an easily oxidizable metal (e.g., aluminum) is used as conductive layer 112a or conductive layer 112b, an insulating oxide (e.g., aluminum oxide) forms between the conductive layer 112a or conductive layer 112b and the semiconductor layer 108, hindering their conduction. Therefore, conductive layers 112a and 112b are preferably made of conductive materials that are not easily oxidized, conductive materials that maintain low resistance even when oxidized, or oxide conductors.

[0235] Conductive layers 112a and 112b are preferably made of, for example, titanium, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, or oxides containing lanthanum and nickel. These materials are preferred because they are conductive materials that are not easily oxidized or maintain low resistance even when oxidized. Note that when conductive layers 112a or 112b have a stacked structure, it is preferable to use conductive materials that are not easily oxidized at least in the layers in contact with semiconductor layer 108.

[0236] The conductive layers 112a and 112b can use the aforementioned oxide conductors. Specifically, indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, or gallium-added zinc oxide, etc., can be used as oxide conductors. In particular, indium-containing oxide conductors are suitable for conductive layers 112a and 112b due to their high conductivity.

[0237] The conductive layers 112a and 112b may also use nitride conductors. Examples of nitride conductors include tantalum nitride and titanium nitride.

[0238] The conductive layer 112a, conductive layer 112b and conductive layer 104 can have a single-layer structure or a stacked structure of two or more layers.

[0239] exist Figure 7A and Figure 7B In the middle, the conductive layer 112a has a two-layer structure of conductive layer 112a_1 and conductive layer 112a_2 on conductive layer 112a_1.

[0240] The conductive layer 112a_2, including the region in contact with the semiconductor layer 108, is preferably made of a conductive material that is not easily oxidized, a conductive material that maintains low resistance even if oxidized, or an oxide conductor. Materials exemplified as conductive layer 112a can be used for the conductive layer 112a.

[0241] The conductive layer 112a_1 does not include the region in contact with the semiconductor layer 108, therefore there are no particular limitations on the materials used. For example, the conductive layer 112a_1 is preferably made of a material with a lower resistivity than the conductive layer 112a_2. This reduces the resistance of the conductive layer 112a. For example, the conductive layer 112a_2 can suitably use In-Sn-Si oxide (ITSO), and the conductive layer 112a_1 can suitably use copper or tungsten.

[0242] like Figure 7A As shown, the end of conductive layer 112a_2 can be aligned or substantially aligned with the end of conductive layer 112a_1. For example, a first film as conductive layer 112a_1 and a second film as conductive layer 112a_2 are deposited and processed using the same mask layer, thereby forming conductive layer 112a. By processing the first and second films in the same process, manufacturing costs can be reduced.

[0243] The end of the electrical layer 112a_2 may not be aligned with the end of the conductive layer 112a_1. For example... Figure 7BAs shown, conductive layer 112a_2 can be provided to cover conductive layer 112a_1. Conductive layer 112a_2 includes regions that contact the top and side surfaces of conductive layer 112a_1. Conductive layer 112a_2 can also be described as having a region that protrudes beyond the end of conductive layer 112a_1. For example, conductive layer 112a_1 can be formed, a film to form conductive layer 112a_2 can be deposited on conductive layer 112a_1, and conductive layer 112a_2 can be formed by processing this film. By making conductive layer 112a_2 protrude beyond the end of conductive layer 112a_1, the step of the formed surface of the layer (e.g., insulating layer 110) on conductive layer 112a is reduced, thereby improving the coverage of the layer. This can suppress problems such as breaks or voids in the layer.

[0244] Note that, although Figure 7A and Figure 7B The illustration shows an example where the thicknesses of the layers constituting conductive layer 112a are the same or substantially the same, but the invention is not limited to this. The thicknesses of the layers constituting conductive layer 112a may also be different. Alternatively, some layers may have different thicknesses. For example, by making the layer using a material with low resistivity thicker than the other layers, the resistance of conductive layer 112a can be reduced, which is therefore more preferable. Specifically, a material with a lower resistivity than conductive layer 112a_2 can be used for conductive layer 112a_1, and the thickness of conductive layer 112a_1 can be made thicker than the thickness of conductive layer 112a_2. This reduces the resistance of conductive layer 112a.

[0245] Figure 7C and Figure 7D The structure shown is a three-layer structure of conductive layer 112a having conductive layer 112a_3, conductive layer 112a_1 on conductive layer 112a_3 and conductive layer 112a_2 on conductive layer 112a_1.

[0246] like Figure 7C As shown, the end of conductive layer 112a_1 can contact the top surface of conductive layer 112a_3. Conductive layer 112a_2 has regions that contact the top and side surfaces of conductive layer 112a_1 and the top surface of conductive layer 112a_3. That is, conductive layers 112a_2 and 112a_3 have regions that protrude beyond the end of conductive layer 112a_1. Alternatively, it can be said that the top, side, and bottom surfaces of conductive layer 112a_1 are surrounded by conductive layers 112a_2 and 112a_3. Conductive layer 112a_3 is preferably made of a material with high adhesion to the surface on which it is formed (here, the surface of substrate 102).

[0247] As described above, conductive layer 112a_1 is preferably made of a material with low resistivity. However, depending on the material, the adhesion between conductive layer 112a_1 and the surface to which it is formed (e.g., the surface of substrate 102) is low, which may lead to a decrease in the manufacturing yield of the semiconductor device. By using a material with higher adhesion to the surface to which it is formed as conductive layer 112a_3, the manufacturing yield of the semiconductor device can be improved. Note that the thickness of conductive layer 112a_3 is preferably sufficient to improve the adhesion to the surface to which it is formed, and can be smaller than the thickness of conductive layers 112a_1 and 112a_2. By reducing the thickness of conductive layer 112a_3, manufacturing costs can be reduced.

[0248] like Figure 7C As shown, the end of conductive layer 112a_2 can be aligned or substantially aligned with the end of conductive layer 112a_3. For example, a first film is deposited to form conductive layer 112a_3, a conductive layer 112a_1 is formed on the first film, and a second film is deposited on the first film and conductive layer 112a_1 to form conductive layer 112a_2. Furthermore, by processing the first film and the second film using the same mask layer, a conductive layer 112a including conductive layer 112a_3, conductive layer 112a_1, and conductive layer 112a_2 is formed. By processing the first film and the second film using the same process, manufacturing costs can be reduced.

[0249] For example, conductive layer 112a_3 is suitable for using In-Sn-Si oxide (ITSO), conductive layer 112a_1 is suitable for using copper, and conductive layer 112a_2 is suitable for using In-Sn-Si oxide (ITSO). When a glass substrate is used for substrate 102, the adhesion between the glass substrate and the ITSO film is higher than that between the glass substrate and the copper film. In addition, by using the same material for conductive layers 112a_2 and 112a_3, the processing of conductive layers 112a_2 and 112a_3 through the same process becomes easier, thereby improving the manufacturing yield of semiconductor devices.

[0250] like Figure 7D As shown, the end of conductive layer 112a_1 can be aligned or substantially aligned with the end of conductive layer 112a_3. For example, a first film is deposited to form conductive layer 112a_3, and a second film is deposited on the first film to form conductive layer 112a_1. The first and second films are processed using the same mask layer, thereby forming conductive layer 112a_3 and conductive layer 112a_1. Conductive layer 112a_2 is formed on conductive layer 112a_3 and conductive layer 112a_1, thus forming conductive layer 112a. By processing the first and second films using the same process, manufacturing costs can be reduced.

[0251] Although examples of conductive layer 112a having a two- or three-layer stacked structure are shown herein, the invention is not limited to this. Conductive layer 112a may also have a four- or more-layered stacked structure.

[0252] Note that the structure of conductive layer 112a shown here can be used for other structural examples.

[0253] [Insulation layer 106]

[0254] The insulating layer 106 preferably comprises one or more inorganic insulating layers. The insulating layer 106 may be made of a material that can be used for the insulating layer 110.

[0255] The insulating layer 106 has regions that contact the semiconductor layer 108, conductive layers 112a, 112b, conductive layer 104, insulating layer 109, and insulating layer 110. When a metal oxide is used for the semiconductor layer 108, the film constituting the insulating layer 106 that is at least in contact with the semiconductor layer 108 preferably uses the aforementioned oxide or oxynitride. When the insulating layer 106 has a single-layer structure, silicon oxide, silicon oxynitride, or aluminum oxide can be used.

[0256] Note that in microtransistors, leakage current sometimes increases when the gate insulating layer is thin. By using a material with a relatively high permittivity (also known as a high-k material) in the gate insulating layer, it is possible to achieve low voltage operation of the transistor while maintaining the physical thickness. Examples of high-k materials that can be used for insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0257] Figure 1B The diagram shows that the insulating layer 106 is a single-layer structure, but this is not the only aspect of the invention. The insulating layer 106 may be a multilayer structure with two or more layers. Figure 8A and Figure 8B The insulating layer 106 is shown to have a two-layer structure, having an insulating layer 106a and an insulating layer 106b on the insulating layer 106a.

[0258] When the insulating layer 106 has a stacked structure, the insulating layer on the semiconductor layer 108 side (here, insulating layer 106a) is preferably an oxide or an oxynitride. Insulating layer 106a can, for example, be one or more of silicon oxide, silicon oxynitride, and aluminum oxide. Alternatively, insulating layer 106a can be a nitride or an oxide oxynitride. Insulating layer 106a is, for example, suitable for using aluminum nitride.

[0259] Preferably, one or more of the layers constituting the insulating layer 106 are barrier films. By providing barrier films, the diffusion of metallic components in the conductive layer 104 and impurities (e.g., water and hydrogen) contained in the layers formed on the transistor 100 through the insulating layer 106 into the semiconductor layer 108 can be suppressed. Furthermore, the diffusion of oxygen in the insulating layer 110b through the insulating layer 106 into the conductive layer 104 can be suppressed. As a result, the amount of oxygen supplied from the insulating layer 110b to the channel formation region of the semiconductor layer 108 increases, thereby reducing the oxygen vacancies (V) in the channel formation region. O ) and V O H. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be realized. Furthermore, the oxidation of the conductive layer 104 caused by oxygen in the insulating layer 110b, which would increase the resistance of the conductive layer 104, can be suppressed. As a result, a transistor exhibiting good electrical characteristics and high reliability can be realized. The aforementioned materials can be used as the barrier film. One or more of the layers constituting the insulating layer 106 are suitable, for example, one or more of silicon nitride, aluminum oxide, and aluminum nitride.

[0260] When the insulating layer 106 has a stacked structure, for example, silicon oxynitride can be used for insulating layer 106a and silicon nitride can be used for insulating layer 106b. Alternatively, silicon oxynitride can be used for insulating layer 106a and aluminum oxide can be used for insulating layer 106b. Alternatively, silicon oxynitride can be used for insulating layer 106a and aluminum nitride can be used for insulating layer 106b. Alternatively, aluminum oxide can be used for insulating layer 106a and silicon oxynitride can be used for insulating layer 106b. Alternatively, aluminum nitride can be used for insulating layer 106a and silicon oxynitride can be used for insulating layer 106b. Alternatively, aluminum nitride can be used for insulating layer 106a and silicon oxynitride can be used for insulating layer 106b.

[0261] An example of a two-layer laminated structure for insulating layer 106 is shown here, but the invention is not limited to this. Insulating layer 106 may have a three-layer or higher laminated structure.

[0262] Note that the structure of insulating layer 106 shown here can also be used for other structural examples.

[0263] [Substrate 102]

[0264] While there are no particular restrictions on the material of the substrate 102, it must at least possess heat resistance capable of withstanding subsequent heat treatments. For example, single-crystal or polycrystalline semiconductor substrates made of silicon or silicon carbide, compound semiconductor substrates such as silicon-germanium, SOI substrates, glass substrates, quartz substrates, sapphire substrates, ceramic substrates, or resin substrates can be used as substrate 102. Alternatively, substrate 102 can be a substrate on which semiconductor elements are disposed. A substrate with an insulating film formed on its surface can also be used as substrate 102. Note that there are no particular restrictions on the shape of the substrate 102; for example, it can also be circular or square.

[0265] The substrate 102 can be a flexible substrate, and transistors such as transistors 100 can be formed directly on the flexible substrate. Alternatively, a release layer can be provided between the substrate 102 and the transistors such as transistors 100. By providing a release layer, a portion or all of a semiconductor device can be fabricated on the release layer and then separated from the substrate 102 and transferred to another substrate. In this case, transistors such as transistors 100 can also be transferred to a substrate with low heat resistance or a flexible substrate.

[0266] The following describes a semiconductor device whose structure differs from the example described above. Sometimes, descriptions of parts that overlap with the example described above will be omitted. Furthermore, in the accompanying drawings, parts having the same function as those in the example described above will be depicted using the same shaded lines, and sometimes reference numerals will not be used.

[0267] <Structure Example 2>

[0268] Figure 9A A cross-sectional view of a semiconductor device 10A according to one embodiment of the present invention is shown. A top view of the semiconductor device 10A can be seen in [reference needed]. Figure 1A . Figure 9A It is along Figure 1A The cross-sectional view of the section between the dotted and dashed lines A1-A2 in the figure.

[0269] Semiconductor device 10A includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10A and... Figure 1B The main difference between the semiconductor device 10 shown is that the insulating layer 110 is in side contact with the insulating layer 109.

[0270] like Figure 9A As shown, the end of the insulating layer 109 can be aligned or substantially aligned with the end of the conductive layer 112a. For example, the insulating layer 109 and the conductive layer 112a can be formed by depositing an insulating film as the insulating layer 109 and a conductive film as the conductive layer 112a and processing them using the same mask layer. Manufacturing costs can be reduced by processing the insulating film and the conductive film using the same process.

[0271] Here, if too much impurity is released from the insulating layer 109, it may lead to an increase in the amount of impurity diffusing into the channel formation region. By providing the insulating layer 109 on a portion of the substrate 102 and not providing the insulating layer 109 on another portion, the area of ​​the region where the insulating layer 109 is provided can be adjusted. This allows for adjustment of the amount of impurity released from the insulating layer 109. By reducing the area of ​​the region where the insulating layer 109 is provided, the amount of impurity released from the insulating layer 109 is reduced, thereby reducing the amount of impurity diffusing into the channel formation region.

[0272] The end of the insulating layer 109 may not be aligned with the end of the conductive layer 112a. For example... Figure 9B As shown, the insulating layer 109 may have a region that protrudes beyond the end of the conductive layer 112a. The end of the conductive layer 112a contacts the top surface of the insulating layer 109. By employing this structure, the steps of the surfaces on which the layers (e.g., insulating layer 110) are formed on the conductive layer 112a and the insulating layer 109 are reduced, thereby improving the coverage of the layers. This helps to suppress problems such as breaks or voids in the layers.

[0273] Note that the structure of the insulating layer 109 shown here can also be used in other structural examples.

[0274] <Structure Example 3>

[0275] Figure 10A A cross-sectional view of a semiconductor device 10B according to one embodiment of the present invention is shown. A top view of the semiconductor device 10B can be seen from [reference needed]. Figure 1A . Figure 10A It is along Figure 1A The cross-sectional view of the section along the dotted line A1-A2 is shown.

[0276] Semiconductor device 10B includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10B differs from others in that insulating layer 110 includes insulating layer 110d and insulating layer 110e. Figure 1B The semiconductor device 10 shown is different.

[0277] The insulating layer 110 includes an insulating layer 110d, an insulating layer 110a on the insulating layer 110d, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c on the insulating layer 110b, and an insulating layer 110e on the insulating layer 110c. The insulating layers 110d and 110e can use the materials mentioned for the insulating layer 109. For example, silicon nitride films or silicon oxynitride films can be suitably used for the insulating layers 110d and 110e. Alternatively, the insulating layers 110d and 110e can use the same material. Or, the insulating layers 110d and 110e can use different materials.

[0278] An insulating layer 110d is disposed between the insulating layer 110a and the conductive layer 112a and the insulating layer 109. The insulating layer 110d is disposed such that it covers the conductive layer 112a and the insulating layer 109. The insulating layer 110d has a region that contacts the top surface and side surface of the conductive layer 112a, the top surface of the insulating layer 109, and the side surface of the semiconductor layer 108.

[0279] An insulating layer 110e is disposed between the conductive layer 112b and the insulating layer 110c. The insulating layer 110e has a region that contacts the top surface of the insulating layer 110c, the bottom surface of the conductive layer 112b, and the side surface of the semiconductor layer 108.

[0280] More preferably, insulating layers 110d and 110e use materials that release impurities (e.g., water and hydrogen) that reduce the resistance of semiconductor layer 108. This allows the region of semiconductor layer 108 in contact with insulating layer 110d to be a low-resistance region. Semiconductor layer 108 may have a structure that includes a low-resistance region between the region in contact with conductive layer 112a (one of the source and drain regions) and the channel formation region. Similarly, when an impurity-releasing material is used for insulating layer 110e, the region of semiconductor layer 108 in contact with insulating layer 110e contains impurities, and this region can be a low-resistance region. Semiconductor layer 108 may have a structure that includes a low-resistance region between the region in contact with conductive layer 112b (the other of the source and drain regions) and the channel formation region. By providing a low-resistance region between the source or drain region and the channel formation region, hot carrier degradation can be suppressed. Note that these low-resistance regions can also be used as source or drain regions.

[0281] When the region of the semiconductor layer 108 that contacts the insulating layer 110d is used as a source region or a drain region, the distance from the source region to the gate electrode and the distance from the drain region to the gate electrode of the semiconductor layer 108 can be further made uniform. As a result, the electric field applied to the gate electrode in the channel formation region can be further made uniform.

[0282] The insulating layer 110a preferably releases minimal impurities and is not easily permeable by impurities. This suppresses the diffusion of impurities through the insulating layers 110a and 110b into the channel formation region of the semiconductor layer 108. Similarly, the insulating layer 110c preferably releases minimal impurities and is not easily permeable by impurities. This suppresses the diffusion of impurities through the insulating layers 110c and 110b into the channel formation region of the semiconductor layer 108. This allows for the realization of a transistor with good electrical characteristics and high reliability.

[0283] When a metal oxide is used in semiconductor layer 108, it is preferable that the impurities released from insulating layers 110d and 110e contain hydrogen. Hydrogen reacts with oxygen atoms bonded to the metal oxide to form water, thereby creating oxygen vacancies (V0).O Furthermore, hydrogen enters an oxygen vacancy (V). O ) defects (V O H) acts as a donor to generate electrons as charge carriers. As a result, the carrier concentration in the regions of semiconductor layer 108 that are in contact with insulating layer 110d and insulating layer 110e is increased, thereby reducing resistance.

[0284] The insulating layer 110d preferably includes a region with a higher hydrogen content than the insulating layer 110a. The film density of the insulating layer 110a is preferably higher than that of the insulating layer 110d. Reference can be made to the descriptions of the insulating layers 109 and 110a.

[0285] Similarly, insulating layer 110e preferably includes regions with a higher hydrogen content than insulating layer 110c. The film density of insulating layer 110c is preferably higher than that of insulating layer 110e. Insulating layers 110e and 110c can be referred to in the description of insulating layers 109 and 110a.

[0286] More preferably, insulating layer 110d uses a material that releases impurities that reduce the resistance of conductive layer 112a. This reduces the resistance of conductive layer 112a. Similarly, insulating layer 110e more preferably uses a material that releases impurities that reduce the resistance of conductive layer 112b. This reduces the resistance of conductive layer 112b. For example, when metal oxides are used in conductive layers 112a and 112b, it is more preferable that the impurity contains hydrogen. This increases the carrier concentration in conductive layers 112a and 112b, thereby reducing their resistance. Conductive layers 112a and 112b can be used for wiring, thereby enabling semiconductor devices with low wiring resistance. Insulating layers 110d and 110e can be described with reference to the description of insulating layer 109.

[0287] Alternatively, a structure excluding one or both of insulating layers 110d and 110e may be used. Note that although an example of a five-layer stacked structure of insulating layer 110 is shown here, one aspect of the invention is not limited thereto. Insulating layer 110 may also be a single-layer structure, or a stacked structure of two, three, four, or more layers. For example, as Figure 10B As shown, the insulating layer 110 can be four layers: insulating layer 110a, insulating layer 110b, insulating layer 110c, and insulating layer 110e.

[0288] Note that the structure of insulating layer 110 shown here can also be used for other structural examples.

[0289] <Structure Example 4>

[0290] Figure 11AA cross-sectional view of a semiconductor device 10C according to one embodiment of the present invention is shown. A top view of the semiconductor device 10C can be seen from [reference needed]. Figure 1A . Figure 11A It is along Figure 1A The cross-sectional view of the section along the dotted line A1-A2 is shown.

[0291] Semiconductor device 10C includes transistor 100A, insulating layer 110, and insulating layer 109. Transistor 100A differs from others in that its semiconductor layer 108 has a stacked structure. Figure 1B The transistor 100 shown is different.

[0292] Figure 11A An example of a three-layer structure is shown, comprising semiconductor layer 108a, semiconductor layer 108b on semiconductor layer 108a, and semiconductor layer 108c on semiconductor layer 108b.

[0293] Semiconductor layers 108a, 108b, and 108c can each be made of materials exemplified as semiconductor layer 108. Semiconductor layers 108a, 108b, and 108c preferably comprise metal oxides exhibiting semiconductor properties.

[0294] The band gaps of the first metal oxide contained in semiconductor layer 108a, the second metal oxide contained in semiconductor layer 108b, and the third metal oxide contained in semiconductor layer 108c are preferably 2.0 eV or more, and more preferably 2.5 eV or more.

[0295] The band gap of the first metal oxide is preferably larger than that of the second metal oxide. The band gap of the third metal oxide is preferably larger than that of the second metal oxide. Semiconductor layer 108b is sandwiched between semiconductor layers 108a and 108c, which have larger band gaps, and can employ an embedded channel structure. Thus, in semiconductor layer 108, the main current path is semiconductor layer 108b.

[0296] For example, the difference between the band gap of the first metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, more preferably 0.3 eV or more, and more preferably 0.5 eV or more. For example, the difference between the band gap of the third metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, more preferably 0.3 eV or more, and more preferably 0.5 eV or more.

[0297] The conduction band bottom of the first metal oxide is preferably closer to the vacuum level than the conduction band bottom of the second metal oxide. The conduction band bottom of the third metal oxide is preferably closer to the vacuum level than the conduction band bottom of the second metal oxide. In other words, the electron affinity of the first metal oxide is preferably less than the electron affinity of the second metal oxide. The electron affinity of the third metal oxide is preferably less than the electron affinity of the second metal oxide.

[0298] The band gaps of the first, second, and third metal oxides can be evaluated using optical methods such as spectrophotometry, spectral ellipsography, photoluminescence, X-ray photoelectron spectroscopy (XPS or ESCA), or X-ray absorption fine structure (XAFS). Furthermore, multiple methods can be combined for analysis. Here, the electron affinity or conduction band bottom can be calculated from the ionization potential, which is the difference between the vacuum level and the valence band top energy, and the band gap. The ionization potential can be evaluated, for example, using ultraviolet photoelectron spectroscopy (UPS).

[0299] Here, trap levels caused by impurities or defects may form at and near the interface between the insulating layer 110 and the semiconductor layer 108. Examples of such impurities include residual components of the etchant or etching gas used when processing the insulating film that will become the insulating layer 110, and components of the conductive layers 112a and 112b that adhere to the sides of the insulating layer 110 during the processing of the insulating film. By providing the semiconductor layer 108a between the semiconductor layer 108b and the insulating layer 110, the semiconductor layer 108b can be moved away from these trap levels.

[0300] Sometimes, the interface between the insulating layer 106 and the semiconductor layer 108, and its vicinity, is damaged during the formation of the insulating layer 106. This can potentially create a trap level at or near the interface between the insulating layer 106 and the semiconductor layer 108. By placing a semiconductor layer 108c between the semiconductor layer 108b and the insulating layer 106, the semiconductor layer 108b can be moved away from this trap level.

[0301] By sandwiching semiconductor layer 108b, which serves as the main current path of semiconductor layer 108, between semiconductor layers 108a and 108c, the trap energy levels at and near the interface of semiconductor layer 108b can be reduced. This allows for the realization of transistors with high on-state current and high reliability. Consequently, a semiconductor device that simultaneously achieves low power consumption and high performance can be obtained.

[0302] The composition of the first metal oxide is preferably different from that of the second metal oxide. The composition of the third metal oxide is also preferably different from that of the second metal oxide. By changing the composition of the metal oxides, the band gap can be adjusted. Specifically, the content of element M in both the first and third metal oxides is preferably higher than the content of element M in the second metal oxide. This allows the band gaps of both the first and third metal oxides to be larger than that of the second metal oxide.

[0303] The indium content in the second metal oxide is preferably higher than that in the first metal oxide and the third metal oxide. Therefore, a transistor with a large on-state current can be realized.

[0304] For example, when the first and second metal oxides are In-M-Zn oxides, the composition of the first metal oxide can be set to In:M:Zn = 1:1:1 (atomic ratio) or close to it, and the composition of the second metal oxide can be set to In:M:Zn = 40:1:10 (atomic ratio) or close to it. Alternatively, the composition of the first metal oxide can be set to In:M:Zn = 1:1:1 (atomic ratio) or close to it, and the composition of the second metal oxide can be set to In:M:Zn = 10:1:10 (atomic ratio) or close to it. Alternatively, the composition of the first metal oxide can be set to In:M:Zn = 1:1:1 (atomic ratio) or close to it, and the composition of the second metal oxide can be set to In:M:Zn = 10:1:40 (atomic ratio) or close to it. As element M, one or more of gallium, aluminum, and tin are particularly preferred. Furthermore, element M in the first metal oxide, element M in the second metal oxide, and element M in the third metal oxide can be the same. Alternatively, some or all of them may be different. Furthermore, if one or more of the first metal oxide, the second metal oxide, and the third metal oxide contain multiple elements M, the elements of that element M may be the same as those contained in the other metal oxides, or some or all of them may be different.

[0305] More specifically, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Sn:Zn = 40:1:10 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Sn:Zn = 10:1:10 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 [atomic ratio] or near, the composition of the second metal oxide can be set to In:Sn:Zn = 10:1:40 [atomic ratio] or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 [atomic ratio] or near.

[0306] The second metal oxide may not contain element M. For example, the second metal oxide may be an In-Zn oxide, and the first and third metal oxides may be In-M-Zn oxides. Specifically, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Zn = 4:1 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Zn = 1:1 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 [atomic ratio] or near, the composition of the second metal oxide can be set to In:Zn = 1:4 [atomic ratio] or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:1:1 [atomic ratio] or near.

[0307] Figure 11B An enlarged view of semiconductor layer 108, side surface 70, and its vicinity is shown. Figure 11BIn the diagram, solid double arrows indicate the thicknesses T108a, T108b, and T108c of semiconductor layer 108a, semiconductor layer 108b, and semiconductor layer 108c, respectively. Here, the thickness of semiconductor layer 108 is defined as the shortest distance between insulating layer 110 and insulating layer 106 when viewed in cross-section. Specifically, the thicknesses of each layer of semiconductor layer 108 are shown at the midpoint between the height of the top surface and the height of the bottom surface of insulating layer 110.

[0308] By increasing the thickness T108b of the semiconductor layer 108b in the main current path, a transistor with a large on-state current can be realized. The thickness T108b is preferably greater than the thicknesses T108a and T108c. However, when the thickness T108b is too large, the oxygen vacancies (V0) in the semiconductor layer 108b... O ) and V O The amount of H may exceed the oxygen vacancies repaired by oxygen supplied from the insulation layer 110 (V O ) and V O The amount of H. The thickness T108b of the semiconductor layer 108b is preferably 1 nm or more and 50 nm or less, more preferably 3 nm or more and 30 nm or less, more preferably 3 nm or more and 20 nm or less, more preferably 5 nm or more and 20 nm or less, and more preferably 5 nm or more and 15 nm or less.

[0309] The thickness T108c of semiconductor layer 108c is preferably thicker than the thickness T108a of semiconductor layer 108a. By increasing the thickness T108c, the semiconductor layer 108b can be moved away from trap energy levels that may form at and near the interface between insulating layer 106 and semiconductor layer 108. In addition, damage to semiconductor layer 108b during the formation of insulating layer 106 can be suppressed. When the thickness T108c is too large, the distance between the conductive layer 104, which serves as the gate electrode, and semiconductor layer 108b sometimes becomes longer, resulting in a smaller on-state current. The thickness T108c of semiconductor layer 108c is preferably 1 nm or more and 30 nm or less, more preferably 1 nm or more and 20 nm or less, more preferably 1 nm or more and 10 nm or less, and more preferably 2 nm or more and 10 nm or less.

[0310] Here, oxygen contained in the insulating layer 110 is supplied to the semiconductor layer 108b via the semiconductor layer 108a. Therefore, it is preferable that the semiconductor layer 108a facilitates oxygen permeation. By making the thickness T108a of the semiconductor layer 108a smaller than the thickness T108c of the semiconductor layer 108c, the oxygen contained in the insulating layer 110 can be efficiently supplied to the semiconductor layer 108b. This reduces the number of oxygen vacancies (V0) in the semiconductor layer 108b, which serves as the main current path. O ) and V OH. When the thickness T108a is too thin, the distance between the interface between the insulating layer 110 and the semiconductor layer 108, and the trap energy level near the interface, and the semiconductor layer 108b, which serves as the main current path, becomes shorter, resulting in a smaller on-state current. Additionally, reliability may sometimes decrease. The thickness T108a of the semiconductor layer 108a is preferably 0.1 nm or more and 10 nm or less, more preferably 0.3 nm or more and 5 nm or less, more preferably 0.5 nm or more and 5 nm or less, and even more preferably 0.5 nm or more and 3 nm or less.

[0311] Semiconductor layers 108a, 108b, and 108c are preferably crystalline. By making semiconductor layer 108a crystalline, the crystallinity of semiconductor layer 108b formed thereon can sometimes be improved. Similarly, by making semiconductor layer 108b crystalline, the crystallinity of semiconductor layer 108c formed thereon can sometimes be improved.

[0312] The band gap of the first metal oxide may be different from that of the third metal oxide.

[0313] The band gap of the third metal oxide is more preferably larger than that of the first metal oxide. By using a material with a large band gap in the semiconductor layer 108c located on the side of the conductive layer 104 used as the gate electrode, the generation and induction of charge carriers in the semiconductor layer 108c and at the interface between the semiconductor layer 108c and the gate insulating layer (here, the insulating layer 106) can be suppressed, thereby enabling a transistor with high reliability. For example, by suppressing the generation and induction of charge carriers in the semiconductor layer 108c and at its interface due to light incident on the transistor, changes in the electrical characteristics of the transistor relative to light can be suppressed.

[0314] Semiconductor layer 108a has a region that contacts conductive layers 112a and 112b, which serve as source and drain electrodes, respectively. By making the band gap of the first metal oxide included in semiconductor layer 108a smaller than the band gap of the third metal oxide, the contact resistance between semiconductor layer 108a and conductive layer 112a, and between semiconductor layer 108a and conductive layer 112b, can be reduced. Therefore, a transistor with a large on-state current can be realized.

[0315] The difference between the band gap of the first metal oxide and the band gap of the third metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more. The conduction band bottom of the third metal oxide is preferably closer to the vacuum level than the conduction band bottom of the first metal oxide. In other words, the electron affinity of the third metal oxide is preferably less than the electron affinity of the first metal oxide.

[0316] Furthermore, the content of element M in the third metal oxide is preferably higher than that in the first metal oxide. This allows the band gap of the third metal oxide to be larger than that of the first metal oxide.

[0317] When the first, second, and third metal oxides are In-M-Zn oxides, for example, the composition of the first metal oxide can be set to In:M:Zn = 1:1:1 [atomic ratio] or near, the composition of the second metal oxide can be set to In:M:Zn = 40:1:10 [atomic ratio] or near, and the composition of the third metal oxide can be set to In:M:Zn = 1:3:4 [atomic ratio] or near. Alternatively, the composition of the first metal oxide can be set to In:M:Zn = 1:1:1 [atomic ratio] or near, the composition of the second metal oxide can be set to In:M:Zn = 10:1:10 [atomic ratio] or near, and the composition of the third metal oxide can be set to In:M:Zn = 1:3:4 [atomic ratio] or near.

[0318] More specifically, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Sn:Zn = 40:1:10 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:3:4 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Sn:Zn = 10:1:10 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:3:4 (atomic ratio) or near.

[0319] The second metal oxide may not contain element M. For example, the second metal oxide may be an In-Zn oxide, and the first and third metal oxides may be In-M-Zn oxides. Specifically, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Zn = 4:1 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:3:4 (atomic ratio) or near. Alternatively, the composition of the first metal oxide can be set to In:Ga:Zn = 1:1:1 (atomic ratio) or near, the composition of the second metal oxide can be set to In:Zn = 1:1 (atomic ratio) or near, and the composition of the third metal oxide can be set to In:Ga:Zn = 1:3:4 (atomic ratio) or near.

[0320] Figure 11A Examples of a three-layer structure, comprising semiconductor layer 108a, semiconductor layer 108b, and semiconductor layer 108c, are shown, but the invention is not limited to this. For example, a structure may be provided that does not include one or both of semiconductor layers 108a and 108c. Specifically, as... Figure 12A As shown, semiconductor layer 108 can have a two-layer structure consisting of semiconductor layer 108a and semiconductor layer 108b. Alternatively, as... Figure 12B As shown, semiconductor layer 108 can have a two-layer structure of semiconductor layer 108b and semiconductor layer 108c. Alternatively, semiconductor layer 108 can also have a stacked structure of four or more layers.

[0321] Note that the structure of semiconductor layer 108 shown here can also be used for other structural examples.

[0322] <Structure Example 5>

[0323] Figure 13A A top view of a semiconductor device 10D according to one aspect of the present invention is shown. Figure 13B Showing along Figure 13A The cross-sectional view of the section along the dotted-dash line B1-B2 is shown. The cross-sectional view along the section along the dotted-dash line A1-A2 can be found by referring to... Figure 1B .

[0324] Figures 14A to 14C A three-dimensional view of a semiconductor device 10D is shown. Figure 14B Show along Figure 14A The cross-section of the dotted line C1-C2 shown. Figure 14C It was omitted. Figure 14A A perspective view of the conductive layer 104 and the insulating layer 106 shown.

[0325] Semiconductor device 10D includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10D is primarily connected to insulating layer 109 at the point where the top surface of insulating layer 106 contacts insulating layer 110. Figure 1B The semiconductor device 10 shown is different.

[0326] Figure 14A The diagram shows a structure where the top surface shape of the conductive layer 112b differs from that of the insulating layer 110. A portion of the end of the conductive layer 112b contacts the top surface of the insulating layer 110. The insulating layer 110 has a region that protrudes beyond the conductive layer 112b. In a top view, it is preferable that the insulating layer 110 covers the conductive layer 112b. Figure 14C As shown, the insulating layer 110 includes a region on its top surface where a conductive layer 112b is provided and a region where a conductive layer 112b is not provided. In the region where a conductive layer 112b is not provided, the insulating layer 106 is in contact with the top surface of the insulating layer 110.

[0327] For example, an insulating film forming an insulating layer 110 and a conductive layer forming a conductive layer 112b are deposited on the insulating film, and a mask layer (e.g., a photoresist mask) is formed on the conductive layer and the insulating film. Then, the conductive layer and the insulating film are processed using the mask layer as a mask, thereby forming a conductive layer 112b and an insulating layer 110 with consistent or substantially consistent top surface shapes. Preferably, the side surface 70 of the conductive layer 112b on the semiconductor layer 108 side is flat (i.e., the two surfaces are flush). Note that the side surface 70 of the conductive layer 112b on the semiconductor layer 108 side may also be discontinuous.

[0328] Figure 15A Show along Figure 14A The cross-sectional view of the dotted line D1-D2 shown. Figure 15B and Figure 15C Show Figure 15A An enlarged image. For example... Figure 15B and Figure 15C As shown, the semiconductor layer 108 has an end 84 that contacts the side surface 70. In addition, the semiconductor layer 108 contacts the insulating layer 110 in region 90, and the insulating layer 106 contacts the insulating layer 110 in region 92.

[0329] When the insulating layer 110 and the conductive layer 112b are formed using different mask layers, the layout freedom of the insulating layer 110 can be increased. For example, the oxygen supply from the insulating layer 110 (e.g., the insulating layer 110b) to the semiconductor layer 108 can be increased by increasing the area of ​​the insulating layer 110. This reduces the oxygen vacancies (V0) in the channel formation region. O ) and V O H.

[0330] Although Figure 14AThe diagram shows a structure in which a transistor (here, transistor 100) is disposed in the insulating layer 110, but one aspect of the invention is not limited thereto. The insulating layer 110 may also contain multiple transistors. For example, multiple transistors may be provided that include a semiconductor layer 108 in contact with side 70. Furthermore, in addition to transistors including semiconductor layers 108 in contact with side 70, transistors may also be provided that include semiconductor layers in contact with sides of the insulating layer 110 different from side 70.

[0331] Note that the structure of conductive layer 112b and insulating layer 110 shown here can also be used for other structural examples.

[0332] <Structure Example 6>

[0333] Figure 16A A top view of a semiconductor device 10E according to one aspect of the present invention is shown. Figure 16B Show along Figure 16A The cross-sectional view of the section along the dashed line A1-A2 is shown. The cross-sectional view along the dashed line B1-B2 can be found by referring to... Figure 13B .

[0334] Figure 17A , Figure 17B and Figure 18 A perspective view of semiconductor device 10E is shown. Figure 17B Show along Figure 17A The cross-section of the dotted line C1-C2 shown. Figure 18 The text is incomplete and contains errors. A more accurate translation would require the full context. Figure 17A A perspective view of the conductive layer 104 and the insulating layer 106 shown.

[0335] Semiconductor device 10D includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10D differs from others primarily in that insulating layer 110 has a slot (slit). Figure 1B The semiconductor device 10 shown is different.

[0336] The insulating layer 110 has a slit 137 that reaches the conductive layer 112a and the insulating layer 109. For example... Figure 16B As shown, the insulating layer 110 includes a pair of opposing side surfaces (side surface 70 and side surface 70a) sandwiching a slit 137. Side surface 70 includes a region on the conductive layer 112a and a region on the insulating layer 109. Similarly, side surface 70a includes a region on the conductive layer 112a and a region on the insulating layer 109. The insulating layer 110 has an end surface 72 and an end surface 72a that contact the top surface of the conductive layer 112a. The lower end surface of side surface 70 on the conductive layer 112a is end surface 72, and the lower end surface of side surface 70a is end surface 72a.

[0337] A conductive layer 112b and a conductive layer 112bS are provided on the insulating layer 110. The conductive layer 112bS is the remaining portion of the conductive layer 112b that was broken off when the slit 137 was formed. The conductive layer 112b is provided on the insulating layer 110 on the side 70, and the conductive layer 112bS is provided on the insulating layer 110 on the side 70a. Note that a structure without the conductive layer 112bS can also be used.

[0338] The semiconductor layer 108 has a region that contacts the top and side surfaces of the conductive layer 112b, the top and side surfaces of the conductive layer 112bS, side surface 70, side surface 70a, and the top surface of the conductive layer 112a. The semiconductor layer 108 is connected to the conductive layer 112a and to the conductive layer 112b. The semiconductor layer 108 has a shape that extends along the top and side surfaces of the conductive layer 112b, the top and side surfaces of the conductive layer 112bS, side surface 70, side surface 70a, and the top surface of the conductive layer 112a. The semiconductor layer 108 is disposed such that it spans both the region on the conductive layer 112a where an insulating layer 110 is disposed and the region on the conductive layer 112a where no insulating layer 110 is disposed. Furthermore, the semiconductor layer 108 is disposed not only on side surface 70 but also on side surface 70a.

[0339] Figure 19 Show along Figure 17A The cross-sectional view of the dotted line D1-D2 shown. Figure 20A and Figure 20B Show Figure 19 Enlarged image. Figure 21 Show along Figure 17A The cross-sectional view shown is the dotted line E1-E2. Figure 22 Show Figure 21 A magnified image. Additionally... Figures 19 to 20B It is a cross-sectional view along the surface containing the channel-forming region. Figure 21 and Figure 22 It is a cross-sectional view along the face containing the source and drain regions.

[0340] like Figure 14C , Figure 20A and Figure 22 As shown, the semiconductor layer 108 has an end 80 that contacts the top surface of the conductive layer 112a, an end 84 that contacts the side surface 70, an end 86 that contacts the side surface of the conductive layer 112b, and an end 82 that contacts the top surface of the conductive layer 112b. Additionally, the semiconductor layer 108 has an end 86a that contacts the side surface of the conductive layer 112bS and an end that contacts the top surface of the conductive layer 112bS.

[0341] like Figure 20BAs shown, the insulating layer 110 includes a region 90 on side 70 where a semiconductor layer 108 is disposed and a region 92 where a semiconductor layer 108 is not disposed. Additionally, the insulating layer 110 includes a region 90a on side 70a where a semiconductor layer 108 is disposed and a region 92a where a semiconductor layer 108 is not disposed. In regions 90 and 90a, the semiconductor layer 108 is in contact with the insulating layer 110. The insulating layer 106 has a region opposite to the side 70, separated by the semiconductor layer 108. In regions 92 and 92a, the insulating layer 106 is in contact with the insulating layer 110.

[0342] An insulating layer 106 is disposed on the semiconductor layer 108, and a conductive layer 104 is disposed on the insulating layer 106. The conductive layer 104 has a region that faces the side surface 70 through the insulating layer 106. Additionally, the conductive layer 104 has a region that faces the side surface 70a through the insulating layer 106. Note that the conductive layer 112bS does not contact the conductive layer 112b, nor is it connected to the source electrode or drain electrode; therefore, the region of the semiconductor layer 108 that contacts the side surface 70a is not used as the channel formation region of the transistor 100. The region that contacts the side surface 70a of the semiconductor layer 108 is used as the channel formation region of the transistor 100.

[0343] The conductive layer 104 preferably covers not only the channel formation region but also the entire semiconductor layer 108. Therefore, when the layer is formed on the transistor 100, damage to the semiconductor layer 108 can be suppressed. Alternatively, the semiconductor layer 108 may also have regions not covered by the conductive layer 104.

[0344] Figure 16A The diagram shows that the insulating layer 110 has a structure with a slit 137 extending in one direction. Note that there are no particular restrictions on the shape of the top surface of the slit 137.

[0345] Although Figure 16A The diagram shows a structure in which a transistor (here, transistor 100) is disposed in the insulating layer 110, but the present invention is not limited to this. The insulating layer 110 may also contain multiple transistors. For example, multiple transistors may be disposed in the region of the semiconductor layer 108 that contacts the side surface 70, serving as a channel forming region. In addition to the transistors in the region of the semiconductor layer 108 that contacts the side surface 70, transistors may also be disposed in the region of the semiconductor layer 108 that contacts the side surface 70a, serving as a channel forming region. Furthermore, transistors may be disposed comprising semiconductor layers that are in side contact with the insulating layer 110, different from the side surfaces 70 and 70a. Thus, a semiconductor device with high-density transistor integration can be realized.

[0346] Note that the structure of insulating layer 110 and slit 137 shown here can also be used in other structural examples.

[0347] Figure 23A An example of a structure different from semiconductor device 10E is shown. Figure 23A This is a top view of semiconductor device 10F. Figure 23B Show along Figure 23A The cross-sectional view of the section along the dashed line A1-A2 is shown. The cross-sectional view along the dashed line B1-B2 can be found by referring to... Figure 13B .

[0348] Figure 24A and Figure 24B A perspective view of semiconductor device 10F is shown. Figure 24B Show along Figure 24A The cross-section of the dotted line C1-C2 is shown. (The details are omitted.) Figure 24A The three-dimensional view of the conductive layer 104 and the insulating layer 106 shown can be referred to Figure 18 .

[0349] Semiconductor device 10F includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10F differs primarily from [other devices] in that the end of conductive layer 104 is located within slit 137. Figure 16B The semiconductor device 10E shown is different.

[0350] The conductive layer 104 is not disposed on the side surface 70a. Furthermore, the conductive layer 104 does not have a region overlapping with the conductive layer 112bS. This reduces the parasitic capacitance between the conductive layer 112bS and the conductive layer 104. Consequently, a high-speed semiconductor device can be realized.

[0351] Note that the structure of conductive layer 104 shown here can also be used for other structural examples.

[0352] Figure 25A An example of a structure different from semiconductor device 10E is shown. Figure 25A This is a top view of the 10G semiconductor device. Figure 25B Show along Figure 25A The cross-sectional view of the section along the dashed line A1-A2 is shown. The cross-sectional view along the dashed line B1-B2 can be found by referring to... Figure 13B .

[0353] Semiconductor device 10G includes transistor 100, insulating layer 110, and insulating layer 109. Semiconductor device 10G differs from others in that it does not have a conductive layer 112bS. Figure 16A The semiconductor device 10E shown is different.

[0354] The semiconductor layer 108 includes a region that contacts the top and side surfaces of the conductive layer 112b, the side surface 70, the top and side surfaces 70a of the conductive layer 112a, and the top surface of the insulating layer 110 continuous with the side surface 70a. By not providing the conductive layer 112bS, parasitic capacitance between the conductive layer 112bS and the conductive layer 104 is not formed. Therefore, a high-speed semiconductor device can be provided.

[0355] In addition, the structure of conductive layer 112bS shown here can also be used for other structural examples.

[0356] <Structure Example 7>

[0357] Figure 26A A top view of a semiconductor device 10H according to one embodiment of the present invention is shown. Figure 26B Show along Figure 26A The cross-sectional view of the section along the dotted line A1-A2 shown is shown. Figure 26C This shows a cross-sectional view along the dashed line B1-B2.

[0358] Figure 27A , Figure 27B and Figure 28 A perspective view of semiconductor device 10H is shown. Figure 27B Show along Figure 27A The cross-section of the dotted line C1-C2 shown. Figure 28 It was omitted. Figure 27A A perspective view of the conductive layer 104 and the insulating layer 106 shown.

[0359] Semiconductor device 10H includes transistor 100B, insulating layer 110, and insulating layer 109. Semiconductor device 10H differs from [other device] in that it has openings in conductive layer 112b and insulating layer 110. Figure 1B The semiconductor device 10 shown is different.

[0360] The conductive layer 112b and the insulating layer 110 have an opening 141 leading to the conductive layer 112a. The opening 141 includes an opening in the conductive layer 112b and an opening in the insulating layer 110. Alternatively, the opening 141 exposes the side surface of the conductive layer 112b, the side surface of the insulating layer 110 (i.e., side surface 70), and the top surface of the conductive layer 112a.

[0361] Figure 29 Show along Figure 27A The cross-sectional view of the section of the dotted line D1-D2 shown. Figure 30A and Figure 30B Show Figure 29 Enlarged image. Figure 31 Show along Figure 27A The cross-sectional view of the section along the dotted line E1-E2 is shown. Figure 32 Show Figure 31 A magnified image. Additionally... Figures 29 to 30B It is a cross-sectional view of the surface including the channel formation region. Figure 31 and Figure 32 It is a cross-sectional view of the face containing the source region and the drain region.

[0362] A semiconductor layer 108 is disposed across the opening 141. For example... Figure 26C , Figure 30A and Figure 32 As shown, the semiconductor layer 108 has an end 80 that contacts the top surface of the conductive layer 112a, an end 84 and an end 84a that contact the side surface 70, an end 86 and an end 86a that contact the side surface of the conductive layer 112b, and an end 82 that contacts the top surface of the conductive layer 112b.

[0363] like Figure 30B As shown, the insulating layer 110 includes regions 90 and 90a on side 70 where a semiconductor layer 108 is disposed, and region 92 where no semiconductor layer 108 is disposed. In regions 90 and 90a, the semiconductor layer 108 is in contact with the insulating layer 110. In region 92, the insulating layer 106 is in contact with the insulating layer 110.

[0364] An insulating layer 106 is disposed on the semiconductor layer 108, and a conductive layer 104 is disposed on the insulating layer 106. The semiconductor layer 108, the insulating layer 106, and the conductive layer 104 all have regions located within the opening 141.

[0365] Reference Figure 33A and Figure 33B Explain the channel length and channel width of transistor 100. Figure 33A yes Figure 26B An enlarged view of transistor 100B is shown. Figure 33B This is a top view of semiconductor device 10H.

[0366] The semiconductor layer 108 includes regions 97 and 97a that are in contact with the side surface 70. Both regions 97 and 97a serve as channel formation regions for the transistor 100B. Figure 33A The double-headed dashed arrow in the diagram represents the channel length L100 of transistor 100B. The detailed description of channel length L100 can be omitted as previously described.

[0367] Figure 33B The double-headed arrows with double dots and dashes indicate the width W1 of the region in region 97 where the semiconductor layer 108 and the conductive layer 104 overlap, and the width W2 of the region in region 97a where the semiconductor layer 108 and the conductive layer 104 overlap, in a direction orthogonal to the channel length direction. The channel width W100 of transistor 100B is the sum of width W1 and width W2.

[0368] Although Figure 26A Examples of openings 141 with a rounded quadrilateral top surface shape are shown in the figures, but the present invention is not limited to this. There are no limitations on the shape of the top surface of the opening 141; for example, it can be a circle, ellipse, triangle, quadrilateral (including rectangles, rhombuses, squares), pentagon, or other polygons or rounded polygons. Furthermore, the polygon can also be a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees). Additionally, when the top surface of the opening 141 is circular, the processing accuracy during the formation of the opening 141 can be improved, thereby enabling the formation of a fine opening 141. Note that in this specification, the circle is not limited to a perfect circle.

[0369] An opening 141 is provided only in the semiconductor layer 108 and its surrounding area, while an insulating layer 110 is provided in the area outside of this region. This increases the area of ​​the region where the insulating layer 110 is provided, thereby reducing the unevenness formed between the regions where the insulating layer 110 is provided and those where it is not. This improves the coverage of the layers provided on the transistor 100 and the insulating layer 110, and suppresses problems such as breaks or voids in the layer.

[0370] Note that the structure of the opening 141 shown here can also be used in other structural examples.

[0371] This embodiment can be appropriately combined with other embodiments. Furthermore, in this specification, where multiple structural examples are shown in one embodiment, these structural examples can be appropriately combined.

[0372] (Implementation Method 2)

[0373] In this embodiment, refer to Figures 34A to 37D This invention describes a method for manufacturing a semiconductor device according to one aspect of the present invention. Note that, regarding the materials and forming methods of each constituent element, some parts that are the same as those described in Embodiment 1 above are sometimes omitted.

[0374] Note that thin films (insulating films, semiconductor films, conductive films, etc.) constituting semiconductor devices can be deposited using methods such as sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulsed laser deposition (PLD), and atomic layer deposition (ALD). Examples of CVD methods include plasma-enhanced chemical vapor deposition (PECVD) and thermal CVD. Furthermore, as a type of thermal CVD, metal-organic chemical vapor deposition (MOCVD) is also available.

[0375] Thin films (insulating films, semiconductor films, and conductive films, etc.) constituting semiconductor devices can be formed using wet deposition methods such as spin coating, dip coating, spray coating, inkjet coating, dispenser coating, screen printing, offset printing, doctor knife coating, slot coating, roller coating, curtain coating, or doctor blade coating.

[0376] When processing thin films that constitute semiconductor devices, photolithography and other methods can be used. Alternatively, nanoimprint lithography, sandblasting, and lift-off methods can be used to process the thin films. In addition, island-shaped thin films can be directly formed by deposition methods that use metal masks or other masking methods.

[0377] Photolithography typically involves two methods. One method involves forming a resist mask on the thin film to be processed, processing the film through etching, and then removing the resist mask. The other method involves depositing a photosensitive thin film, followed by exposure and development to process the film into the desired shape.

[0378] In photolithography, the light used for exposure can be, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm), or a mixture of these. Additionally, ultraviolet light, KrF lasers, or ArF lasers can also be used. Furthermore, immersion lithography can be employed. Extreme ultraviolet (EUV) light or X-rays can also be used as the light for exposure. Alternatively, an electron beam can be used instead of the light for exposure. Extreme ultraviolet light, X-rays, or electron beams are preferred because they allow for extremely fine processing. Note that when exposure is performed by scanning with a beam such as an electron beam, a photomask is not required.

[0379] As a method for etching thin films, one or more of the following methods can be used: dry etching, wet etching, and sandblasting.

[0380] <Manufacturing Method Example 1>

[0381] Here, refer to Figures 34A to 36B illustrate Figures 1A to 1C An example of a method for manufacturing the semiconductor device 10 shown. Figures 34A to 36B It is along Figure 1A The cross-sectional view between the dotted and dashed lines A1-A2 is shown.

[0382] First, an insulating layer 109 is deposited on the substrate 102. The insulating layer 109 is preferably deposited using sputtering or PECVD.

[0383] Next, a conductive film is deposited on the insulating layer 109 to form a conductive layer 112a, and the conductive film is processed to form the conductive layer 112a. Figure 34A The conductive film is preferably deposited using a sputtering method.

[0384] Next, an insulating film 110af, which becomes an insulating layer 110a, and an insulating film 110bf, which becomes an insulating layer 110b, are deposited on the conductive layer 112a. Figure 34B ).

[0385] The deposition of insulating films 110af and 110bf is preferably performed using sputtering or PECVD. It is preferable to deposit insulating film 110bf after depositing insulating film 110af without exposing the surface of insulating film 110af to the atmosphere. This helps to suppress the adhesion of atmospheric impurities to the surface of insulating film 110af. Examples of such impurities include water and organic matter. For example, it is preferable to continuously deposit insulating film 110bf using the same apparatus after depositing insulating film 110af.

[0386] The substrate temperature during the deposition of insulating films 110af and 110bf is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. By keeping the substrate temperature during the deposition of insulating films 110af and 110bf within the above range, the amount of impurities (e.g., water and hydrogen) released from the insulating films 110af and 110bf themselves can be reduced, thereby suppressing impurity diffusion into the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be realized.

[0387] Note that since insulating films 110af and 110bf are formed before semiconductor layer 108, there is no need to worry about oxygen in semiconductor layer 108 being removed due to the heat applied during the deposition of insulating films 110af and 110bf.

[0388] After depositing insulating films 110af and 110bf, a heat treatment can be performed. By performing a heat treatment, impurities (e.g., water and hydrogen) can be removed from the insulating film 110af, the insulating film 110bf, and their surfaces.

[0389] After depositing the insulating film 110bf, oxygen can be supplied to the insulating film 110bf. Methods for supplying oxygen include, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment. For plasma treatment, an apparatus that plasmaizes oxygen gas at high-frequency power is suitable. Examples of apparatuses that plasmaize gas at high-frequency power include PECVD apparatuses, plasma etching apparatuses, and plasma ashing apparatuses. Plasma treatment is preferably performed in an oxygen-containing atmosphere. For example, plasma treatment is preferably performed in an atmosphere containing one or more of oxygen, nitrous oxide (N2O), nitrogen dioxide (NO2), carbon monoxide, and carbon dioxide. The amount of oxygen supplied can be adjusted, for example, by the power and processing time of the plasma treatment. Figure 34C The arrows in the diagram schematically indicate the supply of oxygen to the insulating film 110bf.

[0390] After depositing the insulating film 110bf, nitrogen can be supplied to the insulating film 110bf. The method of supplying nitrogen can refer to the previous description of the oxygen supply method. Preferably, the nitrogen supply method utilizes plasma treatment in a nitrogen-containing atmosphere. For example, plasma treatment is preferably performed in an atmosphere containing one or more of nitrogen, nitrous oxide (N2O), and nitrogen dioxide (NO2). The nitrogen supply amount can be adjusted, for example, according to the power and treatment time in the plasma treatment.

[0391] In the insulating layer (here, insulating film 110bf or subsequent insulating layer 110b), nitrogen reacts with oxygen to produce nitrogen oxides (NO). X (where X is a real number greater than 0). Examples of nitrogen oxides include N₂O, NO, and NO₂. In the insulating layer, nitrogen oxides form energy levels located within the band gap of the metal oxide. For example, the migration energy level for NO₂, which moves between a state with zero charge and a state with -1 charge, is located within the band gap of indium oxide. Therefore, when nitrogen oxides (e.g., NO₂) diffuse to or near the interface between the insulating layer and the semiconductor layer containing the metal oxide, this energy level traps electrons. As a result, a negative charge (also denoted as a negative fixed charge) is formed at or near the interface between the insulating layer and the semiconductor layer, thereby increasing the threshold voltage of the transistor in the positive direction. Thus, normally-off transistors can be implemented, thereby realizing low-power semiconductor devices.

[0392] Increasing the amount of oxide nitride can increase the threshold voltage on the positive side. However, excessive oxide nitride can increase the fluctuation of the threshold voltage when the transistor gate is positively biased, potentially leading to decreased reliability. Therefore, the amount of oxide nitride is preferably within a range that does not affect reliability.

[0393] The amount of nitrogen oxides can be assessed, for example, using thermal desorption spectroscopy (TDS) to measure the amount released or electron spin resonance (ESR) to measure the electron spin. TDS can be used to assess the release of NO (mass-to-charge ratio, also denoted as m / z = 30), N₂O (m / z = 44), and NO₂ (m / z = 46). Note that sometimes it is difficult to quantify the amount of NO₂ released using TDS. In such cases, the amount of NO₂ can be assessed by evaluating the amount of NO and N₂O released. ESR utilizes the ESR signal derived from NO₂. Since N atoms have seven electrons and O atoms have eight electrons, the electrons of the NO₂ molecule have an open-shell structure. Therefore, because the neutral NO₂ molecule has isolated electrons, it can be measured using ESR. Furthermore, because... 14 N has one nuclear spin, so it is related to 14 The peak of the ESR signal related to N splits into three. At this point, the split width of the ESR signal is the hyperfine coupling constant.

[0394] There are no particular restrictions on the order of oxygen and nitrogen supply treatments; oxygen can be supplied after nitrogen, or nitrogen can be supplied after oxygen. Alternatively, oxygen and nitrogen can be supplied using the same treatment. For example, oxygen and nitrogen can be supplied by plasma treatment in an atmosphere containing nitrogen and oxygen. For example, plasma treatment using nitrous oxide (N2O) is preferred, as it can efficiently generate nitrogen oxides.

[0395] Furthermore, this plasma treatment can be performed after the deposition of the insulating film 110bf without exposing the surface of the insulating film 110bf to the atmosphere. For example, when the insulating film 110bf is deposited using a PECVD apparatus, it is preferable to perform this plasma treatment within the PECVD apparatus. This can improve productivity. Specifically, N2O plasma treatment can be performed continuously after the insulating film 110bf is deposited using a PECVD apparatus.

[0396] Next, preferably, film 130 is deposited on insulating film 110bf. Figure 34D The deposition of film 130 is suitable for sputtering. By depositing film 130 in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf.

[0397] There are no limitations on the conductivity of the film 130. The film 130 can be at least one of insulating film, semiconductor film and conductive film. For example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO) or silicon-containing indium tin oxide (ITSO) can be used as film 130.

[0398] The film 130 is preferably made of an oxide material containing one or more elements that are the same as those in the semiconductor layer 108. In particular, an oxide semiconductor that can be used in the semiconductor layer 108 is preferred.

[0399] When depositing membrane 130, the higher the oxygen flow rate ratio of the deposition gas introduced into the processing chamber of the deposition apparatus or the higher the oxygen partial pressure in the processing chamber, the greater the amount of oxygen supplied to the insulating membrane 110bf. The oxygen flow rate ratio or oxygen partial pressure is preferably 50% or more and 100% or less, more preferably 60% or more and 100% or less, further preferably 70% or more and 100% or less, even more preferably 80% or more and 100% or less, and still more preferably 90% or more and 100% or less. In particular, it is preferable to set the oxygen flow rate ratio to 100% so that the oxygen partial pressure is as close as possible to 100%.

[0400] Thus, by depositing film 130 using sputtering in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf during film deposition while preventing oxygen detachment from the insulating film 110bf. As a result, more oxygen can be confined within the insulating film 110bf. Furthermore, more oxygen can be supplied to the semiconductor layer 108 through subsequent heat treatment. Consequently, oxygen vacancies and Vo in the semiconductor layer 108 can be reduced. O H, which can realize transistors that exhibit good electrical characteristics and high reliability.

[0401] Heating can be performed after the deposition of membrane 130. By performing heating after the deposition of membrane 130, oxygen can be effectively supplied from membrane 130 to insulating membrane 110bf.

[0402] The heat treatment temperature is preferably 150°C or higher and lower than the strain point of the substrate, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, and oxygen. Clean dry air (CDA) can be used as the nitrogen-containing or oxygen-containing atmosphere. Note that the content of hydrogen, water, etc., in this atmosphere is preferably as low as possible. As this atmosphere, a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower, is preferred. By using an atmosphere with the lowest possible content of hydrogen, water, etc., the absorption of hydrogen, water, etc., by the insulating films 110af and 110bf can be prevented as much as possible. This heat treatment can be performed using an oven, a rapid thermal annealing (RTA) apparatus, etc. Using an RTA apparatus can shorten the heat treatment time.

[0403] Additionally, oxygen can be supplied to the insulating film 110bf through film 130 after deposition of film 130 or after the aforementioned heat treatment. As a method of supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment can be used. Regarding plasma treatment, please refer to the above description, so its detailed explanation is omitted.

[0404] Next, remove membrane 130 ( Figure 34E There are no particular limitations on the method for removing film 130, but wet etching is preferred. By using wet etching, the etching of insulating film 110bf can be suppressed during the removal of film 130. This suppresses the thinning of insulating film 110bf, thereby ensuring a uniform thickness of insulating layer 110b.

[0405] The oxygen supply treatment of the insulating film 110bf is not limited to the methods described above. For example, oxygen free radicals, oxygen atoms, oxygen atom ions, or oxygen molecular ions can be supplied to the insulating film 110bf using ion doping, ion implantation, or plasma treatment. Furthermore, after depositing a film that inhibits oxygen desorption on the insulating film 110bf, oxygen can be supplied to the insulating film 110bf through this film. Preferably, this film is removed after oxygen supply. As the aforementioned film that inhibits oxygen desorption, conductive or semiconductor films containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten can be used.

[0406] Next, an insulating film 110cf (which becomes an insulating layer 110c) is deposited on the insulating film 110bf. Figure 35A The deposition of insulating film 110cf can be referred to the relevant record of the deposition of insulating film 110af.

[0407] When the insulating layer 110c uses oxides or oxynitrides, oxygen can be supplied to the insulating film 110bf by depositing the insulating film 110cf in an oxygen-containing atmosphere. The deposition of the insulating film 110cf is preferably performed using a sputtering method. For example, as the insulating film 110cf, an alumina film can be deposited using an aluminum target in an oxygen-containing atmosphere by sputtering. When depositing the insulating film 110cf, the higher the oxygen flow rate ratio of the deposition gas introduced into the processing chamber of the deposition apparatus or the higher the oxygen partial pressure in the processing chamber, the greater the amount of oxygen supplied to the insulating film 110bf. The oxygen flow rate ratio or oxygen partial pressure is preferably 50% or more and 100% or less, more preferably 60% or more and 100% or less, further preferably 70% or more and 100% or less, even more preferably 80% or more and 100% or less, and still more preferably 90% or more and 100% or less. In particular, it is preferable to set the oxygen flow rate ratio to 100% so that the oxygen partial pressure is as close as possible to 100%.

[0408] By depositing the insulating film 110cf in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf during the deposition of the insulating film 110cf while preventing oxygen detachment from the insulating film 110bf. As a result, more oxygen can be trapped within the insulating film 110bf. Furthermore, a greater supply of oxygen can be achieved to the semiconductor layer 108 through subsequent heat treatment. Consequently, oxygen vacancies and Vo in the semiconductor layer 108 can be reduced. O H, which can realize transistors that exhibit good electrical characteristics and high reliability.

[0409] Alternatively, heat treatment can be performed after the deposition of the insulating film 110cf. By performing heat treatment after the deposition of the insulating film 110cf, oxygen can be effectively supplied from the insulating film 110cf to the insulating film 110bf.

[0410] Next, a conductive film 112bf is deposited on the insulating film 110cf to form a conductive layer 112b. Figure 35B The deposition of the conductive film 112bf is preferably performed using sputtering.

[0411] Next, the conductive film 112bf, insulating film 110cf, insulating film 110bf, and insulating film 110af are processed to form conductive layer 112b, insulating layer 110c, insulating layer 110b, and insulating layer 110a. Figure 35C Thus, an insulating layer 110 is formed, comprising insulating layers 110a, 110b, and 110c. The conductive layer 112b can be formed, for example, using a wet etching method. The insulating layer 110 can be formed, for example, using a dry etching method.

[0412] The conductive layer 112b and the insulating layer 110 can be formed, for example, using the same photoresist mask. After depositing the insulating film 112bf to form the insulating layer 110 and the conductive film 112bf, a photoresist mask is formed on the conductive film 112bf. The conductive film 112bf and the insulating film are then processed using this photoresist mask, thereby forming the conductive layer 112b and the insulating layer 110. Using the same photoresist mask to form both the conductive layer 112b and the insulating layer 110 can improve productivity. Furthermore, the top surface shape of the conductive layer 112b and the insulating layer 110 can be made identical or substantially identical. Alternatively, different photoresist masks can be used to form both the conductive layer 112b and the insulating layer 110.

[0413] Next, a metal oxide film 108f, forming a semiconductor layer 108, is deposited in a manner that covers conductive layers 112a, conductive layers 112b, and an insulating layer 110. Figure 35D The metal oxide film 108f is disposed in such a manner that it contacts the top surface of the conductive layer 112a, the top and side surfaces of the conductive layer 112b, and the side surface of the insulating layer 110.

[0414] The metal oxide film 108f is preferably deposited using a sputtering method with a metal oxide target. Alternatively, the metal oxide film 108f is preferably deposited using an ALD method. By using the ALD method, a metal oxide film can be deposited on the sides of the insulating layer 110 and the conductive layer 112b with high coverage. Furthermore, the ALD method allows for easy control of the deposition rate, thereby enabling the deposition of thin films with high yield. Therefore, the ALD method is particularly preferred when the metal oxide film 108f is thin. Alternatively, the metal oxide film 108f can also be deposited using a CVD method instead of sputtering and ALD.

[0415] The metal oxide film 108f is preferably a dense film with as few defects as possible. Furthermore, the metal oxide film 108f is preferably a high-purity film, wherein hydrogen-containing impurities are minimized. In particular, a crystalline metal oxide film is preferably used as the metal oxide film 108f.

[0416] When depositing the metal oxide film 108f, oxygen gas is preferably used. By using oxygen gas, it is suitable to supply oxygen to the insulating layer 110. For example, when an oxide or oxynitride is used in the insulating layer 110b, oxygen can be appropriately supplied to the insulating layer 110b.

[0417] By supplying oxygen to the insulating layer 110b, and then supplying oxygen to the semiconductor layer 108 in subsequent processes, the oxygen vacancies and Vo in the semiconductor layer 108 can be reduced. O H.

[0418] When depositing a 108f metal oxide film, oxygen gas and inert gas (e.g., helium, argon, xenon, etc.) can be mixed. Note that the higher the oxygen flow rate ratio or oxygen partial pressure of the deposition gas during metal oxide film deposition, the higher the crystallinity of the metal oxide film can be, enabling the realization of highly reliable transistors. On the other hand, the lower the oxygen flow rate ratio or oxygen partial pressure, the more likely a metal oxide film with low crystallinity and high conductivity can be achieved, thereby enabling the realization of transistors with large on-state current.

[0419] Here, when the oxygen flow ratio or oxygen partial pressure is high, the metal oxide film sometimes exhibits a polycrystalline structure. In a polycrystalline metal oxide film, grain boundaries become recombination centers, trapping charge carriers, thus sometimes reducing the on-state current of the transistor. Therefore, it is preferable to adjust the oxygen flow ratio or oxygen partial pressure to prevent the metal oxide film 108f from exhibiting a polycrystalline structure. Since the composition of the metal oxide film predisposes to polycrystalline structures, it is preferable to adjust the oxygen flow ratio or oxygen partial pressure according to the composition of the metal oxide film 108f. However, the invention is not limited to this, and a polycrystalline metal oxide can also be used. When the grain boundaries of the polycrystalline metal oxide film do not affect the transistor characteristics, the reliability of a transistor using a polycrystalline metal oxide can be further improved compared to a transistor using a metal oxide with low crystallinity.

[0420] Higher substrate temperatures during metal oxide film deposition result in higher crystallinity, leading to denser metal oxide films. This allows for the formation of highly reliable transistors. Conversely, lower substrate temperatures result in lower crystallinity, leading to more conductive metal oxide films. This allows for the formation of transistors with high on-state current.

[0421] The substrate temperature for depositing the metal oxide film 108f is preferably above room temperature (e.g., 25°C) and below 250°C, more preferably above room temperature and below 200°C, and even more preferably above room temperature and below 140°C. For example, the substrate temperature is preferably above room temperature and below 140°C, which can improve productivity. When the metal oxide film is formed at room temperature or without heating the substrate, crystallinity can be reduced.

[0422] Note that at high substrate temperatures, metal oxide films sometimes exhibit a polycrystalline structure. It is preferable to vary the substrate temperature according to the composition of the material used in the metal oxide film 108f.

[0423] When using ALD methods, thermal ALD or PEALD (Plasma Enhanced ALD) are preferred. Thermal ALD offers extremely high coverage and is therefore preferred. Furthermore, PEALD not only offers high coverage but also allows for low-temperature deposition, making it a preferred method as well.

[0424] Metal oxide films can be deposited, for example, using a precursor containing the constituent metal elements and an oxidant, and employing the ALD method.

[0425] For example, when depositing In-Ga-Zn oxide films, three precursors can be used: one containing indium, one containing gallium, and one containing zinc. Alternatively, two precursors can be used: one containing indium, and one containing both gallium and zinc.

[0426] Examples of indium-containing precursors include triethylindium, trimethylindium, tris(2,2,6,6-tetramethyl-3,5-heptadecanoic acid)indium, cyclopentadienylindium, indium(III) chloride, (3-(dimethylamino)propyl)dimethylindium, and [1,1,1-trimethyl-N-(trimethylsilyl)amide]-indium.

[0427] Examples of gallium-containing precursors include trimethyl gallium, triethyl gallium, gallium trichloride, tris(dimethylamide) gallium(III), gallium acetylacetonate(III), tris(2,2,6,6-tetramethyl-3,5-heptadecanoate) gallium, dimethyl gallium chloride, and diethyl gallium chloride.

[0428] As aluminum-containing precursors, aluminum chloride and trimethylaluminum can be used, for example.

[0429] Examples of tin-containing precursors include tin(IV) chloride and tetra(dimethylamide)tin.

[0430] Examples of zinc-containing precursors include dimethyl zinc, diethyl zinc, bis(2,2,6,6-tetramethyl-3,5-heptadecanoic acid) zinc, and zinc chloride.

[0431] Examples of oxidizing agents include ozone, oxygen, and water.

[0432] As a method for controlling the composition of the obtained membrane, one or more of the following can be adjusted: the type of source gas, the flow rate ratio of the source gas, the time the source gas flows through, and the order in which the source gas flows through. By adjusting these parameters, the composition of the metal oxide film 108f can be controlled. Furthermore, by adjusting these parameters, a metal oxide film 108f with a continuously varying composition can be deposited.

[0433] Before depositing the metal oxide film 108f, it is preferable to perform at least one of a treatment to remove water, hydrogen, and organic matter adsorbed on the surface of the insulating layer 110 and a treatment to supply oxygen to the insulating layer 110. For example, a heating treatment can be performed at a temperature of 70°C or higher and 200°C or lower under a reduced pressure atmosphere. Alternatively, a plasma treatment in an oxygen-containing atmosphere can be performed. Alternatively, oxygen can be supplied to the insulating layer 110 by performing plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (N₂O). When performing plasma treatment containing nitrous oxide gas, organic matter on the surface of the insulating layer 110 can be appropriately removed and oxygen can be supplied to the insulating layer 110. Preferably, after such treatment, the metal oxide film 108f is continuously deposited in a manner that does not expose the surface of the insulating layer 110 to the atmosphere.

[0434] Note that when the semiconductor layer 108 has a stacked structure, it is preferable to deposit the upper metal oxide film continuously after depositing the previously deposited metal oxide film in a manner that does not expose its surface to the atmosphere.

[0435] When the semiconductor layer 108 has a stacked structure, all layers constituting the semiconductor layer 108 can be deposited using the same method (e.g., sputtering or ALD). Alternatively, different deposition methods can be used depending on the layer. For example, the first metal oxide layer can be deposited using sputtering, and the second metal oxide layer can be deposited using ALD.

[0436] Next, the metal oxide film 108f is processed into islands to form the semiconductor layer 108. Figure 36A ).

[0437] When forming the semiconductor layer 108, a wet etching method can be appropriately used. At this time, sometimes a portion of the conductive layer 112b in the region that does not overlap with the semiconductor layer 108 is etched, resulting in a smaller thickness.

[0438] Preferably, the heat treatment is performed after depositing the metal oxide film 108f or after processing the metal oxide film 108f into a semiconductor layer 108. Through heat treatment, hydrogen and water contained in or adsorbed on the surface of the metal oxide film 108f or semiconductor layer 108 can be removed. Furthermore, through heat treatment, the film quality of the metal oxide film 108f or semiconductor layer 108 can sometimes be improved (e.g., reduction of defects or improvement of crystallinity).

[0439] Oxygen can be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108 through heat treatment. More preferably, the heat treatment is performed before processing into the semiconductor layer 108. Details regarding the heat treatment can be found above, so further explanation is omitted.

[0440] Note that this heat treatment is not always necessary. Alternatively, a heat treatment performed in a later process can be used instead of this one. Sometimes, a heat treatment performed in a later process (e.g., a deposition process) can be used as the heat treatment for this process.

[0441] Next, an insulating layer 106 is deposited covering the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. Figure 36B The deposition of insulating layer 106 is suitable for methods such as PECVD, sputtering, or ALD.

[0442] When an oxide semiconductor is used in the semiconductor layer 108, the insulating layer 106 is preferably used as a barrier film to suppress oxygen diffusion. By preventing oxygen diffusion, the diffusion of oxygen from the upper side of the insulating layer 106 into the conductive layer 104 in the semiconductor layer 108 can be suppressed, thereby preventing the oxidation of the conductive layer 104. As a result, a transistor exhibiting good electrical characteristics and high reliability can be realized.

[0443] By increasing the temperature at which the insulating layer 106 is deposited as the gate insulating layer, an insulating layer with fewer defects can be formed. However, when the temperature at which the insulating layer 106 is deposited is high, oxygen escapes from the semiconductor layer 108, sometimes leading to oxygen vacancies and V in the semiconductor layer 108. O H increases. The substrate temperature during the deposition of the insulating layer 106 is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, and even more preferably 300°C or higher and 400°C or lower. By keeping the substrate temperature during the deposition of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced while oxygen detachment from the semiconductor layer 108 can be suppressed. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be realized.

[0444] The surface of the semiconductor layer 108 can be plasma-treated before the deposition of the insulating layer 106. This plasma treatment reduces impurities such as water adsorbed on the surface of the semiconductor layer 108. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, resulting in a transistor with high reliability. In particular, it is preferable that the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the deposition of the insulating layer 106. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, etc. The plasma treatment and the deposition of the insulating layer 106 are preferably performed continuously without exposure to the atmosphere.

[0445] Next, a conductive layer 104 is formed on the insulating layer 106. Figure 1B The deposition of the conductive film that becomes the conductive layer 104 can be achieved, for example, by sputtering, thermal CVD (including MOCVD) or ALD.

[0446] The semiconductor device 10 of one aspect of the present invention can be manufactured through the above-described process.

[0447] <Manufacturing Method Example 2>

[0448] right Figures 26A to 26C An example of a method for manufacturing the semiconductor device 10H shown will be described. Figures 37A to 37D Show along Figure 26AThe cross-sectional view between the dotted and dashed lines A1-A2 is shown.

[0449] First, the deposition of the conductive film 112bf is performed in the same manner as in <Manufacturing Method Example 1>. The manufacturing method up to the deposition of the conductive film 112bf can be referred to in the above-described Manufacturing Method Example 1. Figures 34A to 35B The relevant explanations are omitted here.

[0450] Next, conductive film 112bf is processed to form conductive layer 112B. Figure 37A The conductive layer 112B subsequently becomes the conductive layer 112b. The formation of the conductive layer 112B can be suitable for example using a wet etching method.

[0451] Next, a portion of the conductive layer 112B, insulating film 110af, insulating film 110bf, and insulating film 110cf are removed to form an opening 141 reaching the conductive layer 112a. Figure 37B Thus, a conductive layer 112b and an insulating layer 110 are formed. The conductive layer 112b can be formed, for example, by wet etching. The insulating layer 110 can be formed, for example, by dry etching.

[0452] Next, a metal oxide film 108f is deposited over the opening 141 to form a semiconductor layer 108. Figure 37C The deposition of the 108f metal oxide film can be referred to in previous records.

[0453] Next, the metal oxide film 108f is processed into islands, thereby forming the semiconductor layer 108. Figure 37D The manufacturing method after the formation of semiconductor layer 108 can be referred to in <Manufacturing Method Example 1>.

[0454] The semiconductor device 10H of one aspect of the present invention can be manufactured through the above-described process.

[0455] (Implementation Method 3)

[0456] In this embodiment, refer to Figure 38 Figure 46 illustrates a display device according to one aspect of the present invention.

[0457] The display device in this embodiment can be a high-resolution display device or a large-screen display device. Therefore, the display device in this embodiment can be used as a display unit for devices such as: electronic devices with large screens, such as televisions, desktop or laptop computers, monitors for computers, digital signage, large game machines such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game consoles; portable information terminals; and sound reproduction devices.

[0458] The display device in this embodiment can be a high-definition display device. Therefore, for example, the display device in this embodiment can be used as the display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type devices, as well as the display unit of wearable devices that can be worn on the head, such as VR devices such as head-mounted displays (HMDs) and AR devices such as glasses-type devices.

[0459] One aspect of the semiconductor device of the present invention can be used in a display device or a module including the display device. Examples of modules including the display device include modules in which the display device is mounted with connectors such as flexible printed circuit boards (FPC) or TCP (Tape Carrier Package), and modules in which integrated circuits (ICs) are mounted via COG (Chip On Glass) or COF (Chip On Film) methods.

[0460] The display device in this embodiment can also have the function of a touch panel. For example, various detection elements (or sensor elements) capable of detecting the approach or contact of a detection object such as a finger can also be used as the display device.

[0461] Examples of sensor types include capacitive, resistive film, surface acoustic wave, infrared, optical, and pressure-sensitive types.

[0462] As electrostatic capacitive types, there are surface-type electrostatic capacitive types and projection-type electrostatic capacitive types. Furthermore, as projection-type electrostatic capacitive types, there are self-capacitance types and mutual-capacitance types. Mutual-capacitance types are preferred because they allow for simultaneous multi-point sensing.

[0463] Examples of touch panels include Out-Cell, On-Cell, and In-Cell types. Note that an In-Cell type touch panel refers to a structure in which electrodes constituting the detection element are provided on one or both of the substrate supporting the display element and the opposing substrate.

[0464] <Display Device 50A>

[0465] Figure 38 This is a 3D view of display device 50A.

[0466] The display device 50A has a structure that bonds substrate 152 and substrate 151. Figure 38 In the image, substrate 152 is represented by a dashed line.

[0467] The display device 50A includes a display section 162, a connection section 140, a circuit section 164, a conductive layer 165, etc. Figure 38An example is shown where display device 50A is equipped with IC173 and FPC172. Therefore, it is also possible to... Figure 38 The structure shown is called a display module including display device 50A, IC and FPC.

[0468] The connecting portion 140 is disposed on the outer side of the display portion 162. The connecting portion 140 may be disposed along one or more edges of the display portion 162. There may also be one or more connecting portions 140. Figure 38 An example is shown in which the connection portion 140 is arranged around the four sides of the display portion 162. In the connection portion 140, the common electrode of the display element is connected to the conductive layer, and a potential can be supplied to the common electrode.

[0469] The circuit section 164 may include, for example, a scan line driving circuit (also known as a gate driver). Alternatively, the circuit section 164 may include both a scan line driving circuit and a signal line driving circuit (also known as a source driver).

[0470] The conductive layer 165 has the function of supplying signals and power to the display unit 162 and the circuit unit 164. The signals and power are input to the conductive layer 165 from the outside via FPC 172 or from IC 173.

[0471] Figure 38 An example is shown where IC 173 is mounted on substrate 151 using a COG (Chip-on-Glass) method. IC 173 can be, for example, an IC that includes one or both of a scan line drive circuit and a signal line drive circuit. Note that the display device 50A and the display module do not necessarily need to have an IC mounted on them. Alternatively, the IC can also be mounted on an FPC using a COF (Chip-on-Flass) method, etc.

[0472] One aspect of the semiconductor device of the present invention can be used, for example, in one or both of the display section 162 and the circuit section 164 of the display device 50A. Oxide-semiconductor (OS) transistors can be applied to the channel formation region of the transistors included in the display device. By using OS transistors, a low-power display device can be realized. Alternatively, the semiconductor device of one aspect of the present invention can be used in both the display section 162 and the circuit section 164, meaning that all transistors included in the display device are OS transistors. Thus, by using OS transistors as all transistors included in the display device, the effect of reducing manufacturing costs is achieved.

[0473] For example, when the semiconductor device of one aspect of the present invention is used in the pixel circuit of a display device, the occupied area of ​​the pixel circuit can be reduced, thereby enabling a high-definition display device. Furthermore, for example, when the semiconductor device of one aspect of the present invention is used in the driving circuit of a display device (e.g., one or both of a gate line driving circuit and a source line driving circuit), the occupied area of ​​the driving circuit can be reduced, thereby enabling a display device with a narrow bezel. Additionally, the semiconductor device of one aspect of the present invention has excellent electrical characteristics; by using this semiconductor device in a display device, the reliability of the display device can be improved.

[0474] Display unit 162 is an image display area in display device 50A, including a plurality of pixels 201 arranged periodically. Figure 38 The image shown is a magnified view of pixel 201.

[0475] There are no particular limitations on the arrangement of pixels in the display device of this embodiment, and various methods can be used. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.

[0476] Figure 38 The pixel 201 shown includes a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light. Note that there is no particular limitation on the number of sub-pixels included in a pixel.

[0477] Subpixels 11R, 11G, and 11B all include a display element and a circuit that controls the driving of the display element.

[0478] Various components can be used as display elements, such as liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements using shutter-based or optical interference methods, as well as display elements employing microencapsulation, electrophoresis, electrowetting, or electronic powder fluid (registered trademark) methods, can be used. Furthermore, QLED (Quantum-dot LED) technology, which utilizes a light source and employs quantum dot materials for color conversion, can also be used.

[0479] Examples of display devices using liquid crystal elements include transmissive liquid crystal displays, reflective liquid crystal displays, and transflective liquid crystal displays.

[0480] Examples of display device modes that can be used with liquid crystal elements include Vertical Alignment (VA) mode, FFS (Fringe Field Switching) mode, IPS (In-Plane-Switching) mode, TN (Twisted Nematic) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (Anti-Ferroelectric Liquid Crystal) mode, ECB (Electrically Controlled Birefringence) mode, and guest-host mode. Examples of VA modes include MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, and ASV (Advanced Super View) mode.

[0481] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low-molecular-weight liquid crystals, high-molecular-weight liquid crystals, polymer-dispersed liquid crystals (PDLCs), polymer network liquid crystals (PNLCs), ferroelectric liquid crystals, and antiferroelectric liquid crystals. These liquid crystal materials exhibit cholesteric, smectic, cubic, chiral nematic, isotropic, and blue phases, depending on the conditions. Furthermore, either positive or negative liquid crystals can be used as liquid crystal materials, and the choice can be made based on the mode or design used.

[0482] Examples of light-emitting elements include self-emissive light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), and semiconductor lasers. For example, small LEDs and micro LEDs can be used as LEDs.

[0483] Light-emitting materials contained in light-emitting elements include, for example, substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials), and inorganic compounds (quantum dot materials, etc.).

[0484] The light-emitting element can emit colors such as infrared, red, green, blue, cyan, magenta, yellow, or white. Furthermore, when the light-emitting element has a microcavity structure, the color purity can be further improved.

[0485] In a light-emitting element, one electrode is used as the anode and the other electrode is used as the cathode.

[0486] The display device of one aspect of the present invention may also adopt any of the following structures: a top emission type that emits light in the direction opposite to that of the substrate on which the light-emitting element is formed, a bottom emission type that emits light in the direction of the substrate on which the light-emitting element is formed, and a dual emission type that emits light in both directions.

[0487] Figure 39A An example of a cross-section of a portion of the display device 50A including the region of FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the region including the end is shown.

[0488] Figure 39A The display device 50A shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, and 130B, etc., between substrates 151 and 152. Light-emitting element 130R is a display element included in sub-pixel 11R that emits red light, light-emitting element 130G is a display element included in sub-pixel 11G that emits green light, and light-emitting element 130B is a display element included in sub-pixel 11B that emits blue light.

[0489] The display device 50A adopts an SBS structure. In the SBS structure, the materials and structures of each light-emitting element can be optimized separately, increasing the freedom of material and structure selection, and making it easier to improve brightness and reliability.

[0490] The display device 50A adopts a top-emitting type. In the top-emitting type, transistors and the like can be arranged in a manner that overlaps with the light-emitting area of ​​the light-emitting element, so the pixel aperture ratio can be further improved compared with the bottom-emitting type.

[0491] Transistors 205D, 205R, 205G, and 205B are all formed on substrate 151. These transistors can be manufactured using the same process. Alternatively, transistors 205D, 205R, 205G, and 205B can also be transistors with different structures.

[0492] In this embodiment, an example of using OS transistors as transistors 205D, 205R, 205G, and 205B is shown. Transistors 205D, 205R, 205G, and 205B can be transistors according to one aspect of the present invention. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include transistors according to one aspect of the present invention. By using transistors according to one aspect of the present invention in the display unit 162, pixel size can be reduced, thereby achieving high definition. Furthermore, by using transistors according to one aspect of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced, thereby achieving narrow bezels. For details regarding transistors according to one aspect of the present invention, please refer to the description of the above embodiment.

[0493] Specifically, transistors 205D, 205R, 205G, and 205B all include a conductive layer 104 serving as a gate, an insulating layer 106 serving as a gate insulating layer, conductive layers 112a and 112b serving as source and drain, a semiconductor layer 108 comprising a metal oxide, and an insulating layer 110. Here, the multiple layers obtained by processing the same conductive film are shaded with the same lines. The insulating layer 110 is located between conductive layers 112a and 112b. The insulating layer 106 is located between conductive layer 104 and semiconductor layer 108.

[0494] Note that the transistors included in the display device of this embodiment are not limited to the transistors of one aspect of the present invention. For example, transistors including one aspect of the present invention and transistors with other structures may also be combined.

[0495] The display device of this embodiment may include, for example, any one or more of planar transistors, interleaved transistors, and anti-interleaved transistors. The transistors included in the display device of this embodiment have either a top-gate or bottom-gate structure. Alternatively, gates may be disposed above and below the semiconductor layer forming the channel.

[0496] The display device in this embodiment may also include Si transistors.

[0497] To increase the luminous brightness of the light-emitting element included in a pixel circuit, it is necessary to increase the current flowing through the light-emitting element. This requires increasing the source-drain voltage of the driving transistor included in the pixel circuit. Because the source-drain breakdown voltage of an OS transistor is higher than that of a Si transistor, a higher voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor in the pixel circuit, the current flowing through the light-emitting element can be increased, thereby improving the luminous brightness of the light-emitting element.

[0498] When a transistor operates in the saturation region, an OS transistor, compared to a Si transistor, allows for a smaller change in the source-drain current in response to changes in the gate-source voltage. Therefore, by using an OS transistor as the driving transistor in a pixel circuit, the current flowing through the source-drain can be precisely determined based on the gate-source voltage change, thus controlling the amount of current flowing through the light-emitting element. This, in turn, increases the grayscale level of the pixel circuit.

[0499] Regarding the saturation of current flowing through a transistor when it operates in the saturation region, compared to a Si transistor, an OS transistor can maintain a stable current (saturation current) even when the source-drain voltage is gradually increased. Therefore, by using an OS transistor as a driving transistor, a stable current can flow through the light-emitting element even if the current-voltage characteristics of the element, for example, become non-uniform. In other words, when an OS transistor operates in the saturation region, the source-drain current remains almost constant even when the source-drain voltage is changed, thus stabilizing the brightness of the light-emitting element.

[0500] The transistors included in the circuit section 164 and the transistors included in the display section 162 can have the same structure or different structures. The multiple transistors included in the circuit section 164 can have the same structure or two or more different structures. Similarly, the multiple transistors included in the display section 162 can have the same structure or two or more different structures.

[0501] All transistors included in the display unit 162 can be OS transistors, all transistors included in the display unit 162 can be Si transistors, some transistors included in the display unit 162 can be OS transistors and the remaining transistors can be Si transistors.

[0502] For example, by using both LTPS transistors and OS transistors in the display section 162, a display device with low power consumption and high driving capability can be realized. Furthermore, the structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO. As a more preferred example, a structure can be described as follows: using an OS transistor as a switch to control the conduction / non-conduction between wirings, and using an LTPS transistor to control current.

[0503] For example, one of the transistors included in the display unit 162 is used as a transistor to control the current flowing through the light-emitting element and can also be called a driving transistor. One of the source and drain of the driving transistor is connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as this driving transistor. This increases the current flowing through the light-emitting element in the pixel circuit.

[0504] On the other hand, one of the other transistors included in the display unit 162 is used as a switch to control the selection and non-selection of pixels, and can also be referred to as a selection transistor. The gate of the selection transistor is connected to a gate line, and one of its source and drain is connected to a source line (signal line). An OS transistor is preferably used as the selection transistor. Therefore, even at significantly low frame rates (e.g., below 1 fps), the grayscale of the pixels can be maintained, thereby reducing power consumption by stopping the driver when displaying static images.

[0505] An insulating layer 218 is provided to cover transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided on the insulating layer 218.

[0506] The insulating layer 218 is preferably used as a protective layer for the transistor. The insulating layer 218 is preferably made of a material that does not readily diffuse impurities such as water and hydrogen. Therefore, the insulating layer 218 can be used as a barrier film. By employing this structure, impurities can be effectively suppressed from diffusing into the transistor from the outside, thereby improving the reliability of the display device.

[0507] The insulating layer 218 preferably comprises one or more inorganic insulating layers. The insulating layer 218 can be made of a material suitable for the insulating layer 110. Additionally, the barrier film can be referred to in the previous description.

[0508] The insulating layer 235 is preferably used as a planarization layer and is suitable for use with an organic insulating film. Materials suitable for use as organic insulating films include, for example, acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimide amide resin, silicone resin, benzocyclobutene resin, phenolic resin, and precursors of these resins. Furthermore, the insulating layer 235 can also be a laminated structure of organic and inorganic insulating films. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. Therefore, when processing pixel electrodes 111R, 111G, 111B, etc., the formation of recesses in the insulating layer 235 can be suppressed. Alternatively, recesses can be formed in the insulating layer 235 during the processing of pixel electrodes 111R, 111G, 111B, etc. Additionally, pixel electrodes 111R, 111G, and 111B are sometimes collectively referred to as pixel electrode 111.

[0509] Light-emitting elements 130R, 130G, and 130B are disposed on the insulating layer 235.

[0510] The light-emitting element 130R includes a pixel electrode 111R on an insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Figure 39A The light-emitting element 130R shown emits red light (R). The EL layer 113R includes a light-emitting layer that emits red light.

[0511] The light-emitting element 130G includes a pixel electrode 111G on an insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Figure 39A The light-emitting element 130G shown emits green light (G). The EL layer 113G includes a light-emitting layer that emits green light.

[0512] The light-emitting element 130B includes a pixel electrode 111B on an insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Figure 39A The light-emitting element 130B shown emits blue light (B). The EL layer 113B includes a light-emitting layer that emits blue light.

[0513] Note that in Figure 39A The EL layers 113R, 113G, and 113B are shown with the same thickness, but this is not a limitation. The thicknesses of the EL layers 113R, 113G, and 113B can also be different. For example, it is preferable to set the thickness to enhance the optical path of the light emitted by the EL layers 113R, 113G, and 113B. This allows for the realization of a microcavity structure to improve the color purity of the light emitted from each light-emitting element.

[0514] Pixel electrode 111R is connected to the conductive layer 112b of transistor 205R through openings provided in insulating layers 106, 218, and 235. Similarly, pixel electrode 111G is connected to the conductive layer 112b of transistor 205G, and pixel electrode 111B is connected to the conductive layer 112b of transistor 205B.

[0515] Each end of pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 serves as a partition wall. The insulating layer 237 can be configured as a single layer or a multilayer structure using one or both of inorganic and organic insulating materials. For example, the insulating layer 237 can use materials suitable for insulating layer 218 and insulating layer 235. The insulating layer 237 electrically insulates the pixel electrodes from the common electrode. Furthermore, the insulating layer 237 electrically insulates adjacent light-emitting elements.

[0516] An insulating layer 237 is provided at least in the display section 162. The insulating layer 237 can be provided not only in the display section 162, but also in the connecting section 140 and the circuit section 164. Furthermore, the insulating layer 237 can also be provided to extend to the end of the display device 50A.

[0517] The common electrode 115 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by multiple light-emitting elements is connected to the conductive layer 123 disposed in the connection portion 140. The conductive layer 123 is preferably a conductive layer formed using the same material as the pixel electrodes 111R, 111G, and 111B and through the same process as the pixel electrodes 111R, 111G, and 111B.

[0518] In one aspect of the display device of the present invention, a conductive film that transmits visible light is used as the electrode on the light-extracting side of both the pixel electrode and the common electrode. Furthermore, a conductive film that reflects visible light is preferably used as the electrode on the non-light-extracting side.

[0519] The electrode on the side that does not extract light can also be a conductive film that transmits visible light. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer can also be reflected by the reflective layer and extracted from the display device.

[0520] Metals, alloys, conductive compounds, and mixtures thereof can be appropriately used as materials for the pair of electrodes forming the light-emitting element. Specifically, examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys appropriately combined with them. Additionally, examples of such materials include indium tin oxide (also known as In-Sn oxide, ITO), In-Si-Sn oxide (also known as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Furthermore, examples of such materials include aluminum alloys (Al-Ni-La) and silver alloys (Al-Ni-La), as well as silver alloys (Al-Pd-Cu, APC), as well as silver alloys (Al-Ni-La). In addition, as materials, examples include elements belonging to Group 1 or Group 2 of the periodic table (e.g., lithium, cesium, calcium, strontium), rare earth metals such as europium and ytterbium, alloys of these elements in appropriate combinations, and graphene.

[0521] The light-emitting element preferably employs a microcavity resonator (microcavity) structure. Therefore, one of the pair of electrodes included in the light-emitting element preferably includes an electrode with visible light transmittance and reflectance (semi-transmittance-semi-reflectance electrode), and the other preferably includes an electrode with visible light reflectance (reflection electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can resonate between the two electrodes, and the light emitted from the light-emitting element can be enhanced.

[0522] The transparent electrode has a light transmittance of 40% or more. For example, it is preferable to use an electrode with a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more as the transparent electrode of the light-emitting element. The semi-transmissive-semi-reflective electrode has a visible light reflectance of 10% or more and 95% or less, preferably 30% or more and 80% or less. The reflective electrode has a visible light reflectance of 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1 × 10⁻⁶. -2 Below Ωcm.

[0523] EL layers 113R, 113G, and 113B are all configured as islands. Figure 39A In this configuration, the ends of adjacent EL layers 113R overlap with the ends of EL layers 113G, the ends of adjacent EL layers 113G overlap with the ends of EL layers 113B, and the ends of adjacent EL layers 113R overlap with the ends of EL layers 113B. For example... Figure 39AAs shown, when using a high-precision metal mask to deposit island-shaped EL layers, the ends of adjacent EL layers sometimes overlap, but the present invention is not limited to this. That is, adjacent EL layers may also be separated without overlapping. In addition, in a display device, there may be both regions where adjacent EL layers overlap and regions where adjacent EL layers are separated without overlapping.

[0524] The EL layers 113R, 113G, and 113B all include at least a light-emitting layer. This light-emitting layer contains one or more light-emitting materials. Suitable light-emitting materials are those that emit light in colors such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red. Additionally, materials that emit near-infrared light can also be used as light-emitting materials.

[0525] Examples of luminescent materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0526] In addition to the luminescent material (guest material), the luminescent layer may also contain one or more organic compounds (host material, auxiliary material, etc.). As one or more organic compounds, one or both of the following can be used: a material with high hole transport (hole transport material) and a material with high electron transport (electron transport material). Furthermore, as one or more organic compounds, bipolar materials (materials with both high electron and hole transport properties) or TADF materials can also be used.

[0527] For example, the luminescent layer preferably comprises a combination of a phosphorescent material, a hole transport material that readily forms an exciton complex, and an electron transport material. By employing such a structure, ExTET (Exciplex-Triplet Energy Transfer), which utilizes energy transfer from the exciton complex to the luminescent material (phosphorescent material), can be efficiently obtained. Furthermore, by selecting a combination of light whose wavelength overlaps with the absorption band of the lowest energy side of the luminescent material and is formed by the exciton complex, energy transfer can be facilitated, thereby achieving efficient luminescence. By employing the above structure, high efficiency, low-voltage operation, and long lifetime of the luminescent element can be simultaneously achieved.

[0528] In addition to the light-emitting layer, the EL layer may also include one or more of the following: a layer containing a material with high hole injection capability (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a material with high electron blocking capability (electron blocking layer), a layer containing a material with high electron injection capability (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a material with high hole blocking capability (hole blocking layer). Furthermore, the EL layer may also include one or both of a bipolar material and a TADF material.

[0529] Light-emitting elements can use low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the light-emitting element can be formed by methods such as vapor deposition (including vacuum vapor deposition), transfer printing, printing, inkjet printing, and coating.

[0530] Light-emitting elements can be either single-structure (with only one light-emitting unit) or series-structure (containing multiple light-emitting units). Each light-emitting unit includes at least one light-emitting layer. A series structure has multiple light-emitting units connected in series via a charge-generating layer. The charge-generating layer functions to inject electrons into one of the two light-emitting units and holes into the other when a voltage is applied between a pair of electrodes. By employing a series structure, light-emitting elements capable of emitting light with high brightness can be realized. Furthermore, the series structure improves reliability because it reduces the current required to achieve the same brightness compared to a single structure. Alternatively, the series structure can also be referred to as a stacked structure.

[0531] exist Figure 39A When using a series-connected light-emitting element, it is preferred that the EL layer 113R includes a plurality of light-emitting units that emit red light, the EL layer 113G includes a plurality of light-emitting units that emit green light, and the EL layer 113B includes a plurality of light-emitting units that emit blue light.

[0532] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded together by an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. For example, a solid sealing structure or a hollow sealing structure can be used to seal the light-emitting elements. Figure 39A In this configuration, the space between substrate 152 and substrate 151 is filled with adhesive layer 142, thus employing a solid sealing structure. Alternatively, a hollow sealing structure can be used, where the space is filled with an inert gas (such as nitrogen or argon). In this case, adhesive layer 142 can also be arranged in a manner that does not overlap with the light-emitting element. Furthermore, a resin different from that used for the frame-shaped adhesive layer 142 can be used to fill the space.

[0533] The protective layer 131 is provided at least in the display section 162, and preferably in a manner that covers the entire display section 162. The protective layer 131 is preferably provided in a manner that covers not only the display section 162 but also the connection section 140 and the circuit section 164. Furthermore, the protective layer 131 is preferably provided in a manner that extends to the end of the display device 50A. On the other hand, in order to allow the FPC 172 to connect with the conductive layer 166, there is a region in the connection section 197 where the protective layer 131 is not provided.

[0534] By providing a protective layer 131 on the light-emitting elements 130R, 130G, and 130B, the reliability of the light-emitting elements can be improved.

[0535] The protective layer 131 can be a single-layer structure or a stacked structure of two or more layers. Furthermore, there are no limitations on the conductivity of the protective layer 131. At least one of insulating films, semiconductor films, and conductive films can be used as the protective layer 131.

[0536] When the protective layer 131 includes an inorganic film, it can suppress the deterioration of the light-emitting element, such as preventing the oxidation of the common electrode 115 and suppressing impurities (moisture, oxygen, etc.) from entering the light-emitting element, thereby improving the reliability of the display device.

[0537] The protective layer 131 preferably comprises one or more inorganic insulating layers. The protective layer 131 can be made of materials suitable for the insulating layer 110. In particular, the protective layer 131 preferably uses nitrides or oxynitrides, and more preferably nitrides.

[0538] As the protective layer 131, an inorganic film comprising ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may also be used. This inorganic film preferably has high resistance; specifically, it preferably has a higher resistance than the common electrode 115. The inorganic film may also contain nitrogen.

[0539] When the light emitted by the light-emitting element is extracted through the protective layer 131, the visible light transmittance of the protective layer 131 is preferably high. For example, ITO, IGZO and alumina are inorganic materials with high visible light transmittance, and are therefore preferred.

[0540] As a protective layer 131, for example, a stacked structure of an alumina film and a silicon nitride film on the alumina film, or a stacked structure of an alumina film and an IGZO film on the alumina film can be used. By using this stacked structure, impurities (such as water and oxygen) can be suppressed from entering the EL layer side.

[0541] Furthermore, the protective layer 131 may also include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of organic films that can be used in the protective layer 131 include organic insulating films that can be used in the insulating layer 235.

[0542] A connection portion 197 is provided in a region where substrates 151 and 152 do not overlap. In the connection portion 197, conductive layer 165 is connected to FPC 172 through conductive layer 166 and connection layer 242. Figure 39A The example shown is a conductive layer 165 obtained by processing the same conductive film as conductive layer 112b. The example shown is a conductive layer 166 obtained by processing the same conductive film as pixel electrodes 111R, 111G, and 111B. The connection between conductive layers 165 and 166 can adopt the same structure as the connection between pixel electrode 111 and conductive layer 112b. Specifically, Figure 39AAn example is shown where an opening is provided on the upper layer of conductive layer 165, and conductive layer 166 contacts the top surface of conductive layer 165 in this opening. Conductive layer 166 is exposed on the top surface of connection portion 197. Therefore, connection portion 197 can be connected to FPC 172 via connection layer 242.

[0543] The display device 50A is a top-emitting type. The light emitted by the light-emitting element is projected onto one side of the substrate 152. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B contain materials that reflect visible light, and the counter electrode (common electrode 115) contains materials that allow visible light to pass through.

[0544] Preferably, a light-shielding layer 117 is provided on the surface of the substrate 152 on the substrate 151 side. The light-shielding layer 117 may be provided between adjacent light-emitting elements, in the connection portion 140, and in the circuit portion 164, etc.

[0545] Alternatively, a coloring layer such as a color filter can be provided on the surface of the substrate 151 side of the substrate 152 or on the protective layer 131. When a color filter is provided overlapping with the light-emitting element, the color purity of the light emitted from the pixel can be improved.

[0546] A coloring layer is a colored layer that selectively transmits light in a specific wavelength range while absorbing light in other wavelength ranges. For example, a red (R) filter that transmits light in the red wavelength range, a green (G) filter that transmits light in the green wavelength range, and a blue (B) filter that transmits light in the blue wavelength range can be used. Each coloring layer can be made of one or more of the following materials: metal, resin, pigment, and dye. The coloring layer is formed at the desired location using methods such as printing, inkjet printing, or etching using lithography.

[0547] Furthermore, various optical components can be disposed on the outer side of the substrate 152 (the side opposite to the side of the substrate 151). Examples of optical components include polarizers, retardation plates, light diffusion layers (diffusion films, etc.), antireflective layers, and condensing films. Additionally, surface protective layers such as antistatic films to suppress dust adhesion, water-repellent films to prevent dirt accumulation, hard coatings to prevent damage during use, and impact absorption layers can also be disposed on the outer side of the substrate 152. For example, a glass layer or a silicon dioxide layer (SiO2) can be provided as a surface protective layer. x A protective layer (such as a diamond-like carbon layer) is preferred as it can prevent the surface from getting dirty or damaged. Other materials that can be used as a surface protective layer include DLC, alumina, polyester, or polycarbonate. Furthermore, a material with high transmittance of visible light is preferred. Additionally, a material with high hardness is preferred for the surface protective layer.

[0548] Substrates 151 and 152 can be made of glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. The substrate on the side from which light is emitted from the light-emitting element uses a material that allows the light to pass through. By using a flexible material for substrates 151 and 152, the flexibility of the display device can be improved, thereby realizing a flexible display. A polarizer can also be used as at least one of substrates 151 and 152.

[0549] The substrates 151 and 152 may be made of materials such as: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyethersulfone (PES) resins, polyamide resins (nylon, aromatic polyamides, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers. Alternatively, at least one of the substrates 151 and 152 may be made of glass with a flexible thickness.

[0550] When a circular polarizer is superimposed on a display device, it is preferable to use a substrate with high optical isotropy as the substrate included in the display device. A substrate with high optical isotropy has lower birefringence (or, in other words, less birefringence). Examples of thin films with high optical isotropy include cellulose triacetate (TAC) films, cyclic olefin polymer (COP) films, cyclic olefin copolymer (COC) films, and acrylic resin films.

[0551] As the adhesive layer 142, various curing adhesives can be used, such as UV-curing adhesives, reactive curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. In particular, materials with low moisture permeability, such as epoxy resins, are preferred. Furthermore, two-component mixed resins can also be used. Additionally, adhesive sheets can also be used.

[0552] As the connecting layer 242, anisotropic conductive film (ACF) or anisotropic conductive paste (ACP) can be used.

[0553] <Display device 50B>

[0554] Figure 39B An example of a cross-section of the display section 162 of the display device 50B is shown. The main difference between the display device 50B and the display device 50A is that each color sub-pixel uses a light-emitting element, including an EL layer 113 shared by the light-emitting element, and a coloring layer (color filter, etc.). Figure 39B The structure shown can be combined with Figure 39A The diagram shows the structure including the area of ​​FPC172, the circuit section 164, the stacked structure of the substrate 151 to the insulating layer 235 of the display section 162, the connection section 140, and the end section. Note that in the description of the display device described later, parts that are the same as those described previously are sometimes omitted.

[0555] Figure 39B The display device 50B shown includes light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light.

[0556] The light-emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130R is extracted as red light through the color layer 132R and sent to the outside of the display device 50B.

[0557] The light-emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130G is extracted as green light through the coloring layer 132G and emitted to the outside of the display device 50B.

[0558] The light-emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130B is extracted as blue light through the color layer 132B and emitted to the outside of the display device 50B.

[0559] The light-emitting elements 130R, 130G, and 130B share an EL layer 113 and a common electrode 115. Compared with a structure in which each color sub-pixel has a different EL layer, the structure in which each color sub-pixel shares an EL layer 113 can reduce the number of manufacturing steps.

[0560] For example, Figure 39B The light-emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light-emitting elements 130R, 130G, and 130B is transmitted through the coloring layers 132R, 132G, and 132B, thereby obtaining light of the desired color.

[0561] White light-emitting elements preferably include two or more light-emitting layers. When white light emission is achieved using two light-emitting layers, the light-emitting layers can be selected such that the emission colors of the two light-emitting layers are complementary. For example, by making the emission colors of the first light-emitting layer and the second light-emitting layer complementary, a structure in which the entire light-emitting element emits white light can be obtained. Furthermore, when white light emission is achieved using three or more light-emitting layers, a structure in which the entire light-emitting element emits white light can be obtained by combining the emission colors of the three or more light-emitting layers.

[0562] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting material that emits blue light and a light-emitting layer containing a light-emitting material that emits visible light with a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0563] The light-emitting element emitting white light is preferably arranged in a series structure. Specifically, it can adopt: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red and green light and a light-emitting unit emitting blue light; a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and a light-emitting unit emitting blue light; or a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and a light-emitting unit emitting red light and a light-emitting unit emitting blue light, etc. For example, regarding the number of layers and color order of the light-emitting units, examples include a two-level structure with B and Y stacked from the anode side, a two-level structure with B and light-emitting unit X stacked, a three-level structure with B, Y, and B stacked, and a three-level structure with B, X, and B stacked. Regarding the number of layers and color order of the light-emitting layers in light-emitting unit X, examples include a two-layer structure with R and Y stacked from the anode side, a two-layer structure with R and G stacked, a two-layer structure with G and R stacked, a three-layer structure with G, R, and G stacked, or a three-layer structure with R, G, and R stacked. Additionally, other layers can be placed between the two light-emitting layers.

[0564] In addition, by employing a microcavity structure, light-emitting elements that emit white light can sometimes enhance specific colors such as red, green, or blue to emit light.

[0565] Or, for example Figure 39BThe light-emitting elements 130R, 130G, and 130B shown emit blue light. At this time, the EL layer 113 includes one or more light-emitting layers that emit blue light. Regarding the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, regarding the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or 130G can be converted into longer wavelength light and extracted as red or green light. Preferably, a color layer 132R is provided between the color conversion layer on the light-emitting element 130R and the substrate 152, and a color layer 132G is provided between the color conversion layer on the light-emitting element 130G and the substrate 152. Sometimes, a portion of the light emitted by the light-emitting element is transmitted without being converted by the color conversion layer. By extracting light from the transmitted color conversion layer via the color layer, the color purity of the light presented by the sub-pixel can be improved by the color layer absorbing light other than the desired color light.

[0566] <Display Device 50C>

[0567] Figure 40 The main difference between the display device 50C and the display device 50B shown is that the former is a bottom-emitting type display device.

[0568] The light emitted by the light-emitting element is projected onto one side of the substrate 151. The substrate 151 is preferably made of a material with high visible light transmittance. On the other hand, there are no restrictions on the transmittance of the material used for the substrate 152.

[0569] A light-shielding layer 117 is preferably formed between the substrate 151 and the transistor. Figure 40 An example is shown below: A light-shielding layer 117 is disposed on a substrate 151, an insulating layer 153 is disposed on the light-shielding layer 117, and transistors 205D, 205R (not shown), 205G, and 205B are disposed on the insulating layer 153. Additionally, coloring layers 132R, 132G, and 132B are disposed on the insulating layer 218, and an insulating layer 235 is disposed on the coloring layers 132R, 132G, and 132B.

[0570] The light-emitting element 130R, which overlaps with the color layer 132R, includes a pixel electrode 111R, an EL layer 113, and a common electrode 115.

[0571] The light-emitting element 130G, which overlaps with the color layer 132G, includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.

[0572] The light-emitting element 130B, which overlaps with the color layer 132B, includes a pixel electrode 111B, an EL layer 113, and a common electrode 115.

[0573] Pixel electrodes 111R, 111G, and 111B each use a material with high visible light transmittance. The common electrode 115 preferably uses a material that reflects visible light. Because a metal with low resistance can be used for the common electrode 115 in a bottom-emitting display device, voltage drops caused by the resistance of the common electrode 115 can be suppressed, thereby achieving high display quality.

[0574] One aspect of the transistor of the present invention can be miniaturized to reduce its footprint, thus enabling an increase in pixel aperture ratio or a reduction in pixel size in bottom-emitting structure display devices.

[0575] <Display Device 50D>

[0576] Figure 41A The main difference between the display device 50D shown and the display device 50A is that the former includes a light-receiving element 130S.

[0577] The display device 50D includes a light-emitting element and a light-receiving element in each pixel. Preferably, in the display device 50D, an organic EL element is used as the light-emitting element and an organic photodiode is used as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be mounted in a display device using an organic EL element.

[0578] In the display device 50D, where each pixel includes a light-emitting element and a light-receiving element, the pixel has a light-receiving function, so the display device can detect the contact or proximity of an object while displaying an image. Therefore, the display unit 162 has one or both of the following functions: image display and sensing. For example, instead of displaying an image using all the sub-pixels included in the display device 50D, a portion of the sub-pixels can be used as a light source to emit light, another portion of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display the image.

[0579] Therefore, since there is no need to separately provide a light-receiving part and a light source with the display device 50D, the number of components in the electronic device can be reduced. For example, there is no need to separately install biometric devices or electrostatic capacitive touch panels for scrolling, etc., in the electronic device. Therefore, by using the display device 50D, an electronic device with reduced manufacturing costs can be provided.

[0580] When a light-receiving element is used as an image sensor, the display device 50D can use the light-receiving element to capture images. For example, an image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes and artery shapes), or faces.

[0581] The light-receiving element can be used in touch sensors (also known as direct touch sensors) or non-contact sensors (also known as hover sensors, hover touch sensors, or non-touch sensors). Touch sensors can detect objects (fingers, hands, or pens, etc.) when they are in direct contact with the display device. Non-contact sensors, on the other hand, can detect objects even when they are not in contact with the display device.

[0582] The light-emitting element 130S includes a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from outside the display device 50D.

[0583] The pixel electrode 111S is connected to the conductive layer 112b of the transistor 205S through an opening provided in the insulating layer 106, the insulating layer 218 and the insulating layer 235.

[0584] The end of the pixel electrode 111S is covered by an insulating layer 237.

[0585] The common electrode 115 is a continuous film shared by the light-receiving element 130S, the light-emitting element 130R (not shown), the light-emitting element 130G, and the light-emitting element 130B. The common electrode 115 shared by the light-emitting element and the light-receiving element is connected to the conductive layer 123 provided in the connecting portion 140.

[0586] The functional layer 113S includes at least an active layer (also called a photoelectric conversion layer). The active layer contains a semiconductor. Examples of such semiconductors include inorganic semiconductors such as silicon and organic semiconductors containing organic compounds. In this embodiment, an example of using an organic semiconductor as the semiconductor contained in the active layer is shown. Because an organic semiconductor can be used, the light-emitting layer and the active layer can be formed in the same way (e.g., vacuum evaporation) and can share the same manufacturing equipment, which is preferred.

[0587] The functional layer 113S may also include a layer containing a material with high hole transport, a material with high electron transport, or a bipolar material as a layer other than the active layer. Furthermore, it is not limited to this; it may also include a layer containing a material with high hole injection, a hole blocking material, a material with high electron injection, or an electron blocking material. For example, the materials described above that can be used in light-emitting elements can be used as the functional layer 113S.

[0588] The light-receiving element can use low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the light-receiving element can be formed by methods such as vapor deposition (including vacuum vapor deposition), transfer printing, printing, inkjet printing, and coating.

[0589] Figure 41B and Figure 41C The display device 50D shown includes a layer 353 with light-receiving elements, a circuit layer 355, and a layer 357 with light-emitting elements between substrates 151 and 152.

[0590] Layer 353 includes, for example, a light-receiving element 130S. Layer 357 includes, for example, light-emitting elements 130R, 130G, and 130B.

[0591] Circuit layer 355 includes circuitry for driving the light-receiving element and circuitry for driving the light-emitting element. Circuit layer 355 may include, for example, transistors 205R, 205G, and 205B. In addition, one or more of the following may be disposed in circuit layer 355: switches, transistors, capacitors, resistors, wiring, terminals, etc.

[0592] Figure 41B This is an example of using the light-receiving element 130S as a touch sensor. For example... Figure 41B As shown, when a finger 352 touches the display device 50D and reflects light emitted by the light-emitting element in layer 357, the light-receiving element in layer 353 detects the reflected light. Thus, it can be detected that the finger 352 is touching the display device 50D.

[0593] Figure 41C This is an example of using the light-receiving element 130S as a non-contact sensor. For example... Figure 41C As shown, when a finger 352 approaches (i.e. does not touch) the display device 50D and reflects light emitted by the light-emitting element in layer 357, the light-receiving element in layer 353 detects the reflected light.

[0594] <Display Device 50E>

[0595] Figure 42A The display device 50E shown is an example of a display device employing an MML (Metal Mask Less) structure. That is, the display device 50E includes light-emitting elements manufactured without high-precision metal masks.

[0596] In display devices employing the MML structure, the island-shaped light-emitting layers in the light-emitting elements are formed by depositing a light-emitting layer across the entire surface and then processing it using photolithography. Therefore, it is possible to achieve display devices with high resolution or high aperture ratios that have been difficult to achieve until now. Furthermore, since the light-emitting layers can be formed separately for each color, extremely vivid, high-contrast, and high-quality display devices can be achieved. For example, when using three light-emitting elements—one emitting blue light, one emitting green light, and one emitting red light—to construct a display device, three island-shaped light-emitting layers can be formed by repeatedly depositing the light-emitting layers three times and processing them using photolithography.

[0597] Because devices with MML structures can be manufactured without metal masks, the resolution limitations imposed by the alignment accuracy of metal masks can be exceeded. Furthermore, manufacturing devices without metal masks eliminates the need for equipment related to metal mask fabrication and the metal mask cleaning process. Additionally, in photolithography, the same equipment used in transistor manufacturing can be used, eliminating the need for specialized equipment for manufacturing devices with MML structures. Thus, by utilizing MML structures, manufacturing costs can be reduced, making them suitable for mass production.

[0598] In display devices with MML structures, it is not necessary to use special pixel arrangements such as Pentile arrangement to improve sharpness in a pseudo-method. Thus, a display device can be realized in which a so-called stripe arrangement in which each sub-pixel of R, G, and B is arranged in one direction and has high sharpness (e.g., 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more).

[0599] In addition, by setting a sacrificial layer on the light-emitting layer, the damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting element.

[0600] By employing a deposition process using a range mask and a processing process using a resist mask, light-emitting elements can be manufactured with a simpler process.

[0601] Note that the stacked structure of substrate 151 to insulating layer 235 and the stacked structure of protective layer 131 to substrate 152 are the same as those of display device 50A, so the description is omitted.

[0602] exist Figure 42A In the middle, light-emitting elements 130R, 130G, and 130B are disposed on the insulating layer 235.

[0603] The light-emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. Figure 42A The light-emitting element 130R shown emits red light (R). Layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, layer 133R and common layer 114 can be collectively referred to as the EL layer. One or both of conductive layers 124R and conductive layers 126R can be referred to as pixel electrodes.

[0604] The light-emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. Figure 42A The light-emitting element 130G shown emits green light (G). Layer 133G includes a light-emitting layer that emits green light. In the light-emitting element 130G, layer 133G and common layer 114 can be collectively referred to as the EL layer. One or both of conductive layer 124G and conductive layer 126G can be referred to as pixel electrodes.

[0605] The light-emitting element 130B includes a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. Figure 42A The light-emitting element 130B shown emits blue light (B). Layer 133B includes a light-emitting layer that emits blue light. In the light-emitting element 130B, layer 133B and common layer 114 can be collectively referred to as the EL layer. One or both of conductive layers 124B and conductive layers 126B can be referred to as pixel electrodes.

[0606] In this specification, the island-shaped layers disposed for each light-emitting element in the EL layer included in the light-emitting element are referred to as layer 133R, layer 133G, or layer 133B, and the layer shared by multiple light-emitting elements is referred to as common layer 114. Furthermore, in this specification, layers 133R, 133G, and 133B, which do not include common layer 114, are sometimes referred to as island-shaped EL layers, or EL layers formed in an island shape. Additionally, light-emitting elements manufactured without a metal mask may not include a common layer, or all layers constituting the EL layer may be formed in an island shape.

[0607] Layers 133R, 133G, and 133B are separated from each other. By setting island-shaped EL layers in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintended light emission caused by crosstalk can be suppressed, thereby enabling a display device with very high contrast.

[0608] In addition, Figure 42A In the diagram, the thicknesses of layers 133R, 133G, and 133B are shown as having the same thickness, but this is not a limitation. The thicknesses of layers 133R, 133G, and 133B can also be different.

[0609] Conductive layer 124R is connected to conductive layer 112b of transistor 205R through an opening in insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, conductive layer 124G is connected to conductive layer 112b of transistor 205G, and conductive layer 124B is connected to conductive layer 112b of transistor 205B.

[0610] The conductive layers 124R, 124G, and 124B are formed to cover the openings provided in the insulating layer 235. The recesses of the conductive layers 124R, 124G, and 124B are respectively filled with layer 128.

[0611] Layer 128 has the function of planarizing the recesses of conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B, which are connected to the conductive layers 124R, 124G, and 124B, are provided on conductive layers 124R, 124G, and 124B. Therefore, the areas overlapping with the recesses of conductive layers 124R, 124G, and 124B can also be used as light-emitting areas, thereby improving the pixel aperture ratio. Conductive layers 124R and 126R are preferably conductive layers used as reflective electrodes.

[0612] Layer 128 can be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be suitably used for layer 128. In particular, layer 128 is preferably formed using an insulating material, and especially preferably using an organic insulating material. For example, an organic insulating material suitable for the aforementioned insulating layer 237 can be used as layer 128.

[0613] Although Figure 42A An example is shown where the top surface of layer 128 has a flat portion, but there are no particular limitations on the shape of layer 128. The top surface of layer 128 may have at least one of the following shapes: convex surface, concave surface, and plane.

[0614] The height of the top surface of layer 128 and the top surface of conductive layer 124R can be the same, approximately the same, or different. For example, the height of the top surface of layer 128 can be lower or higher than the height of the top surface of conductive layer 124R.

[0615] The end of conductive layer 126R can also be aligned with the end of conductive layer 124R, and can also cover the side surface of the end of conductive layer 124R. Each end of conductive layer 124R and conductive layer 126R preferably has a tapered shape. Specifically, each end of conductive layer 124R and conductive layer 126R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, layer 133R disposed along the side surface of the pixel electrode has an inclined portion. By making the side surface of the pixel electrode tapered, good coverage of the EL layer disposed along the side surface of the pixel electrode can be achieved.

[0616] The conductive layers 124G, 126G, 124B, and 126B are the same as the conductive layers 124R and 126R, so detailed descriptions are omitted.

[0617] The top and side surfaces of conductive layer 126R are covered by layer 133R. Similarly, the top and side surfaces of conductive layer 126G are covered by layer 133G, and the top and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire area where conductive layers 126R, 126G, and 126B are disposed can be used as the light-emitting area of ​​light-emitting elements 130R, 130G, and 130B, thereby improving the pixel aperture ratio.

[0618] A portion of the top surface and side surface of each of layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is disposed on layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is disposed on the common layer 114. Both the common layer 114 and the common electrode 115 are continuous films shared by multiple light-emitting elements.

[0619] exist Figure 42A In the middle, there is no space between conductive layer 126R and layer 133R. Figure 39A The insulating layer 237 is shown. In other words, the display device 50E does not have an insulating layer (also called a separator, dam, spacer, etc.) that contacts the pixel electrode and covers the top end of the pixel electrode. The same applies to the space between conductive layers 126G and 133G, and between conductive layers 126B and 133B. Therefore, the spacing between adjacent light-emitting elements can be very small. This allows for a high-definition or high-resolution display device. Furthermore, a mask for forming this insulating layer is not required, thereby reducing the manufacturing cost of the display device.

[0620] Layers 133R, 133G, and 133B all include a light-emitting layer. Preferably, layers 133R, 133G, and 133B include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer). Additionally, layers 133R, 133G, and 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer). Furthermore, layers 133R, 133G, and 133B preferably include a light-emitting layer, a carrier blocking layer, and a carrier transport layer on the carrier blocking layer. More preferably, the carrier transport layer is disposed on the light-emitting layer. More preferably, the carrier blocking layer is disposed on the light-emitting layer. When the surfaces of layers 133R, 133G, and 133B are exposed to the atmosphere during the manufacturing process of the display device, by disposing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer is not exposed on top, thereby suppressing the exposure of the light-emitting layer to the atmosphere. This reduces damage to the light-emitting layer, thereby improving the reliability of the light-emitting element.

[0621] The common layer 114 may include, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may be a stack of either an electron transport layer and an electron injection layer, or a stack of either a hole transport layer and a hole injection layer. Light-emitting elements 130R, 130G, and 130B share the common layer 114.

[0622] Each side of layer 133R, layer 133G, and layer 133B is covered by insulating layer 125. Insulating layer 127 covers each side of layer 133R, layer 133G, and layer 133B through insulating layer 125.

[0623] By covering the sides (or even part of the top surface) of at least one of the insulating layers 125 and 127, including the insulating layers 133R, 133G, and 133B, contact between the common layer 114 (or the common electrode 115) and the pixel electrode, as well as the sides of the layers 133R, 133G, and 133B, short circuits in the light-emitting element can be suppressed. This improves the reliability of the light-emitting element.

[0624] The insulating layer 125 preferably has areas that contact each side of layers 133R, 133G, and 133B. By adopting a structure in which the insulating layer 125 contacts layers 133R, 133G, and 133B, film peeling of layers 133R, 133G, and 133B can be prevented, thereby improving the reliability of the light-emitting element.

[0625] The insulating layer 127 is disposed on the insulating layer 125 in such a way that it fills the recess of the insulating layer 125. The insulating layer 127 preferably covers at least a portion of the side surface of the insulating layer 125.

[0626] By providing insulating layers 125 and 127, the spaces between adjacent island-shaped layers can be filled, thus reducing the unevenness of the formed surfaces of layers (e.g., carrier injection layers, common electrodes, etc.) on the island-shaped layers and further achieving planarization. Therefore, the coverage of the carrier injection layer or common electrode, etc., can be improved.

[0627] A common layer 114 and a common electrode 115 are disposed on layers 133R, 133G, 133B, insulating layer 125, and insulating layer 127. Before the insulating layers 125 and 127 are disposed, steps are formed in areas where pixel electrodes and island EL layers are disposed and in areas where pixel electrodes and island EL layers are not disposed (areas between light-emitting elements). A display device according to one aspect of the present invention can flatten these steps by including insulating layers 125 and 127, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection due to disconnection can be suppressed. Alternatively, the increase in resistance caused by localized thinning of the common electrode 115 due to steps can be suppressed.

[0628] The top surface of the insulating layer 127 preferably has high flatness. The top surface of the insulating layer 127 may also have at least one shape selected from planar, convex, and concave surfaces. For example, the top surface of the insulating layer 127 preferably has a convex surface shape with a large radius of curvature.

[0629] The insulating layer 125 can be a single-layer structure or a stacked structure of two or more layers. The insulating layer 125 preferably includes one or more inorganic insulating layers. The insulating layer 125 can use materials suitable for the insulating layer 110. In particular, a high selectivity ratio of alumina to the EL layer during etching is preferred, as it functions to protect the EL layer during the formation of the insulating layer 127. Specifically, by using an inorganic insulating film such as an alumina film, hafnium oxide film, or silicon oxide film formed using the ALD method for the insulating layer 125, an insulating layer 125 with fewer pinholes and good protection of the EL layer can be formed. Alternatively, the insulating layer 125 can also be a stacked structure of a film formed using the ALD method and a film formed using sputtering. For example, the insulating layer 125 can be a stacked structure of an alumina film formed using the ALD method and a silicon nitride film formed using sputtering.

[0630] The insulating layer 125 preferably functions as a barrier layer against at least one of water and oxygen. The insulating layer 125 preferably functions as a barrier against the diffusion of at least one of water and oxygen. Additionally, the insulating layer 125 preferably functions as a trapping or immobilizing (gettering) of at least one of water and oxygen.

[0631] When the insulating layer 125 is used as a barrier insulating layer, it can have a structure that inhibits the entry of impurities (typically at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. By adopting this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0632] The impurity concentration in the insulating layer 125 is preferably low. This prevents impurities from mixing into the EL layer from the insulating layer 125 and causing EL layer degradation. Furthermore, by reducing the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is preferable that one of the hydrogen concentration and carbon concentration in the insulating layer 125 is sufficiently low, and preferably both the hydrogen concentration and carbon concentration are sufficiently low.

[0633] The insulating layer 127 disposed on the insulating layer 125 has the function of flattening the unevenness of the insulating layer 125 formed between adjacent light-emitting elements where the height difference is large. In other words, by including the insulating layer 127, the flatness of the surface on which the common electrode 115 is formed is improved.

[0634] As the insulating layer 127, it is suitable to use an insulating layer containing organic materials. As the organic material, a photosensitive resin is preferably used, for example, a photosensitive resin composition including acrylic resin is preferred. Note that in this specification, acrylic resin does not only refer to polymethacrylate or methacrylate resin, but sometimes also refers to acrylic polymers in a broader sense.

[0635] The insulating layer 127 can also be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin, and precursors of the above resins. Alternatively, the insulating layer 127 can also be made of organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin. Furthermore, a photoresist can be used as the photosensitive resin. Both positive and negative photosensitive materials can be used as the photosensitive resin.

[0636] The insulating layer 127 can also be made of a material that absorbs visible light. By absorbing the light emitted from the light-emitting element through the insulating layer 127, light leakage (stray light) from the light-emitting element to adjacent light-emitting elements can be suppressed. Therefore, the display quality of the display device can be improved. In addition, the display quality can be improved even without using a polarizer in the display device, so it is possible to achieve a lighter and thinner display device.

[0637] Examples of materials that absorb visible light include pigments such as black, dyes, light-absorbing resins (e.g., polyimide), and resins suitable for use in color filters (color filter materials). In particular, resin materials formed by layering or mixing two or more colors of color filter materials are preferred as they improve the effect of blocking visible light. Especially, by mixing three or more colors of color filter materials, a black or near-black resin layer can be achieved.

[0638] <Display Device 50F>

[0639] Figure 42B An example of a cross-section of the display section 162 of the display device 50F is shown. The main difference between the display device 50F and the display device 50E is that each color sub-pixel has a color layer (color filter, etc.). Figure 42B The structure shown can be combined with Figure 42A The structure shown includes the area of ​​FPC172, the circuit section 164, the stacked structure of the substrate 151 to the insulating layer 235 of the display section 162, the connection section 140, and the end section.

[0640] Figure 42B The display device 50F shown includes light-emitting elements 130R, 130G, and 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light.

[0641] The light emitted by the light-emitting element 130R is extracted as red light through the coloring layer 132R and emitted to the outside of the display device 50F. Similarly, the light emitted by the light-emitting element 130G is extracted as green light through the coloring layer 132G and emitted to the outside of the display device 50F. The light emitted by the light-emitting element 130B is extracted as blue light through the coloring layer 132B and emitted to the outside of the display device 50F.

[0642] Light-emitting elements 130R, 130G, and 130B each include a layer 133. These three layers 133 are formed using the same process and the same material. Furthermore, these three layers 133 are separated from each other. By providing island-shaped EL layers in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintended light emission caused by crosstalk can be suppressed, thereby enabling a display device with very high contrast.

[0643] For example, Figure 42B The light-emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the coloring layers 132R, 132G, and 132B, thereby obtaining light of the desired color.

[0644] Or, for example Figure 42B The light-emitting elements 130R, 130G, and 130B shown emit blue light. At this time, layer 133 includes one or more light-emitting layers that emit blue light. Regarding the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, regarding the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or 130G can be converted into longer wavelength light and extracted as red or green light. Preferably, a color layer 132R is provided between the color conversion layer on the light-emitting element 130R and the substrate 152, and a color layer 132G is provided between the color conversion layer on the light-emitting element 130G and the substrate 152. By extracting light transmitted through the color conversion layer via the color layer, the color purity of the light emitted by the sub-pixel can be improved by the color layer absorbing light other than the desired color light.

[0645] <Display device 50G>

[0646] Figure 43 The main difference between the display device 50G and the display device 50F shown is that the former is a bottom-emitting type display device.

[0647] The light emitted by the light-emitting element is projected onto one side of the substrate 151. The substrate 151 is preferably made of a material with high visible light transmittance. On the other hand, there are no restrictions on the transmittance of the material used for the substrate 152.

[0648] A light-shielding layer 117 is preferably formed between the substrate 151 and the transistor. Figure 43 An example is shown below: A light-shielding layer 117 is disposed on a substrate 151, an insulating layer 153 is disposed on the light-shielding layer 117, and transistors 205D, 205R (not shown), 205G, and 205B are disposed on the insulating layer 153. Additionally, coloring layers 132R, 132G, and 132B are disposed on the insulating layer 218, and an insulating layer 235 is disposed on the coloring layers 132R, 132G, and 132B.

[0649] The light-emitting element 130R, which overlaps with the coloring layer 132R, includes a conductive layer 124R, a conductive layer 126R, a layer 133, a common layer 114, and a common electrode 115.

[0650] The light-emitting element 130G, which overlaps with the coloring layer 132G, includes a conductive layer 124G, a conductive layer 126G, a layer 133, a common layer 114, and a common electrode 115.

[0651] The light-emitting element 130B, which overlaps with the coloring layer 132B, includes a conductive layer 124B, a conductive layer 126B, a layer 133, a common layer 114, and a common electrode 115.

[0652] The conductive layers 124R, 124G, 124B, 126R, 126G, and 126B each use materials with high visible light transmittance. The common electrode 115 preferably uses a material that reflects visible light. Because low-resistance metals or the like can be used for the common electrode 115 in a bottom-emitting display device, voltage drops caused by the resistance of the common electrode 115 can be suppressed, thereby achieving high display quality.

[0653] One aspect of the transistor of the present invention can be miniaturized to reduce its footprint, thus enabling an increase in pixel aperture ratio or a reduction in pixel size in bottom-emitting structure display devices.

[0654] <Display device 50H>

[0655] Figure 44A The display device 50H shown is a VA mode liquid crystal display device.

[0656] The substrate 151 and substrate 152 are bonded together using an adhesive layer 144. Furthermore, liquid crystal 262 is sealed within the area surrounded by the substrate 151, substrate 152, and adhesive layer 144. Polarizer 260a is located on the outer surface of substrate 152, and polarizer 260b is located on the outer surface of substrate 151. Additionally, although not shown, a backlight source can be provided outside polarizer 260a or outside polarizer 260b.

[0657] The substrate 151 is provided with transistors 205D, 205R, 205G, a connection portion 197, spacers 224, etc. Transistor 205D is provided in the circuit portion 164, and transistors 205R and 205G are provided in the display portion 162. The conductive layer 112b of transistors 205R and 205G serves as the pixel electrode of the liquid crystal element 60.

[0658] The substrate 152 is provided with coloring layers 132R and 132G, a light-shielding layer 117, an insulating layer 225, and a conductive layer 263. The conductive layer 263 serves as the common electrode of the liquid crystal element 60.

[0659] Transistors 205D, 205R, and 205G each include a conductive layer 112a, a semiconductor layer 108, an insulating layer 106, a conductive layer 104, and a conductive layer 112b. Conductive layer 112a serves as one of the source and drain electrodes, and conductive layer 112b serves as the other of the source and drain electrodes. Conductive layer 104 serves as the gate electrode. A portion of the insulating layer 106 serves as the gate insulating layer.

[0660] As described above, in this embodiment, an example of using OS transistors as transistors 205D, 205R, and 205G is shown. Transistors 205D, 205R, and 205G can be transistors according to one aspect of the present invention. That is, in the display device 50H, both the display unit 162 and the circuit unit 164 include transistors according to one aspect of the present invention. By using transistors according to one aspect of the present invention in the display unit 162, pixel size can be reduced, thereby achieving high definition. Furthermore, by using transistors according to one aspect of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced, thereby achieving narrow bezels. For details regarding transistors according to one aspect of the present invention, please refer to the description of the above embodiment.

[0661] Transistors 205D, 205R, and 205G are covered by insulating layer 218. Insulating layer 218 serves as a protective layer for transistors 205D, 205R, and 205G.

[0662] The sub-pixels included in the display unit 162 include transistors, liquid crystal elements 60, and coloring layers. For example, a sub-pixel that emits red light includes transistor 205R, liquid crystal elements 60, and a coloring layer 132R that transmits red light. Similarly, a sub-pixel that emits green light includes transistor 205G, liquid crystal elements 60, and a coloring layer 132G that transmits green light. Although not shown, a sub-pixel that emits blue light also includes transistors, liquid crystal elements 60, and a coloring layer that transmits blue light.

[0663] The liquid crystal element 60 includes a conductive layer 112b, a conductive layer 263, and liquid crystal 262 sandwiched therebetween.

[0664] A conductive layer 264 is disposed on the substrate 151 on the same plane as the conductive layer 112a. The conductive layer 264 has a region overlapping the conductive layer 112b with the insulating layer 110 (insulating layers 110a, 110b, and 110c) in between. A storage capacitor is formed by the conductive layer 112b, the conductive layer 264, and the insulating layer 110 between them. Note that it is sufficient to have one or more insulating layers between the conductive layer 112b and the conductive layer 264, or one or two of the insulating layers 110 can be removed by etching.

[0665] An insulating layer 225 is provided on the substrate 152 side to cover the coloring layers 132R and 132G and the light-shielding layer 117. The insulating layer 225 can also be used as a planarization layer. The insulating layer 225 can make the surface of the conductive layer 263 approximately flat, thereby making the alignment state of the liquid crystal 262 consistent.

[0666] Additionally, in the conductive layer 263 and insulating layer 218, an alignment film for controlling the orientation of the liquid crystal 262 may be provided on the surface in contact with the liquid crystal 262. (Ref) Figure 46A and Figure 46B Orientation film 265 in the middle.

[0667] Conductive layers 112b and 263 transmit visible light. This means the liquid crystal device can be made into a transmissive liquid crystal device. For example, when a backlight is positioned on one side of substrate 152, light from the backlight, polarized by polarizer 260a, passes through substrate 152, conductive layer 263, liquid crystal 262, conductive layer 112b, and substrate 151 to reach polarizer 260b. At this time, the orientation of liquid crystal 262 can be controlled by the voltage applied between conductive layer 112b and conductive layer 263, thereby controlling the optical modulation of the light. In other words, the intensity of the light emitted through polarizer 260b can be controlled. Furthermore, because light outside the specified wavelength region of the incident light is absorbed by the coloring layer, the extracted light becomes, for example, red light.

[0668] Here, either a linear polarizer or a circular polarizer can be used as polarizer 260b. For example, a polarizer formed by stacking a linear polarizer and a quarter-wave phase difference plate can be used. By using a circular polarizer as polarizer 260b, external light reflection can be suppressed.

[0669] Furthermore, when a circular polarizer is used as polarizer 260b, a circular polarizer or a general linear polarizer can also be used as polarizer 260a. The desired contrast ratio can be achieved by adjusting the cell gap, orientation, and driving voltage of the liquid crystal element 60 according to the type of polarizer used for polarizer 260a and polarizer 260b.

[0670] Conductive layer 263 is connected to conductive layer 166b disposed on substrate 151 side via connector 223 in connection portion 140. Conductive layer 166b is connected to conductive layer 165b in an opening provided in insulating layer 110. Thus, potential or signal can be supplied to conductive layer 263 from FPC or IC disposed on substrate 151 side. Figure 44A In the example shown, conductive layer 165b is formed using the same materials and processes as conductive layer 112a, and conductive layer 166b is formed using the same materials and processes as conductive layer 104.

[0671] For example, conductive particles can be used for connector 223. As conductive particles, resin or silica particles with a surface coated with a metallic material can be used. Nickel or gold is preferred as the metallic material because it can reduce contact resistance. Furthermore, particles with two or more metallic materials layered together, such as nickel coated with gold, are preferred. Additionally, connector 223 is preferably made of a material capable of elastic or plastic deformation. In this case, sometimes conductive particles become… Figure 44AAs shown, it has a shape that is flattened longitudinally. By having this shape, the contact area between the connector 223 and the conductive layer to which it is connected can be increased, thereby reducing contact resistance and suppressing problems such as poor contact. The connector 223 is preferably configured to be covered by the adhesive layer 144. For example, it is preferable to disperse the connector 223 in the adhesive layer 144 before curing.

[0672] A connection portion 197 is provided near the end of the substrate 151. In the connection portion 197, the conductive layer 166a is connected to the FPC 172 via the connection layer 242. The conductive layer 166a is connected to the conductive layer 165a in an opening provided in the insulating layer 110. Figure 44A In the example shown, conductive layer 165a is formed using the same materials and processes as conductive layer 112a, and conductive layer 166a is formed using the same materials and processes as conductive layer 104.

[0673] Figure 44B Showing with Figure 44A The connecting part 197 is shown as a different structural example. Figure 44B The diagram shows a structure where the insulating layer 110 is not provided on the conductive layer 165a. Furthermore, the condu...

Claims

1. A semiconductor device, comprising: transistor; First insulating layer; as well as Second insulating layer, The transistor includes a first conductive layer, a second conductive layer, and an oxide semiconductor layer on the first insulating layer. The second insulating layer is located on the first conductive layer. The second insulating layer has an end that contacts the top surface of the first conductive layer. The second conductive layer is located on the second insulating layer. The oxide semiconductor layer has an end that contacts the top surface of the first conductive layer, an end that contacts the side surface of the second insulating layer, an end that contacts the side surface of the second conductive layer, and an end that contacts the top surface of the second conductive layer. Furthermore, the first insulating layer contains hydrogen.

2. The semiconductor device according to claim 1, The transistor includes a third conductive layer and a third insulating layer. The third insulating layer has regions that contact the top and side surfaces of the oxide semiconductor layer. Furthermore, the third conductive layer has a region that faces the side of the second insulating layer, separated by the third insulating layer and the oxide semiconductor layer.

3. A semiconductor device, comprising: transistor; First insulating layer; as well as Second insulating layer, The transistor comprises a first conductive layer, a second conductive layer, a third conductive layer, an oxide semiconductor layer, and a third insulating layer on the first insulating layer. The second insulating layer is located on the first conductive layer. The second insulating layer has an end that contacts the top surface of the first conductive layer. The second conductive layer is located on the second insulating layer. The oxide semiconductor layer has regions that contact the top surface of the first conductive layer, the side surface of the second insulating layer, and the top surface and side surface of the second conductive layer. The third insulating layer has a region that contacts the top and side surfaces of the oxide semiconductor layer and the side surface of the second insulating layer. The third conductive layer has a region that faces the side of the second insulating layer, separated by the third insulating layer and the oxide semiconductor layer. Furthermore, the first insulating layer contains hydrogen.

4. The semiconductor device according to any one of claims 1 to 3, wherein the top surface shape of the second conductive layer is consistent with or substantially consistent with the top surface shape of the second insulating layer.

5. The semiconductor device according to claim 2 or 3, wherein the third insulating layer has a region in contact with the top surface of the second insulating layer.

6. The semiconductor device according to claim 2 or 3, The second insulating layer and the second conductive layer include an opening that extends into the first conductive layer. Furthermore, the oxide semiconductor layer, the third insulating layer, and the third conductive layer all have regions located within the opening.

7. The semiconductor device according to any one of claims 1 to 3, The second insulating layer includes a fourth insulating layer and a fifth insulating layer on the fourth insulating layer. The fourth insulating layer comprises silicon and nitrogen. The fifth insulating layer comprises silicon and oxygen. Furthermore, the first insulating layer comprises silicon and nitrogen.

8. The semiconductor device of claim 7, wherein the first insulating layer has a region containing more hydrogen than the fourth insulating layer.

9. The semiconductor device according to any one of claims 1 to 3, wherein the oxide semiconductor layer comprises indium.

10. The semiconductor device according to any one of claims 1 to 3, wherein the first conductive layer comprises indium and oxygen.

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