Method for manufacturing a support substrate made of a polycrystalline material and method for manufacturing a composite structure comprising said support substrate

Abstract

The invention relates to a method for producing a support substrate made of polycrystalline material, said method comprising the following steps: a) providing a blank disc made of polycrystalline material, having two sides; b) rough grinding at least one of the two sides of the blank disc using a grinding wheel having abrasive grains with an average size greater than or equal to 10 μm, to obtain a surface-ground disc having at least one surface-ground face; c) applying a heat treatment to the surface-ground disc at a treatment temperature higher than the growth temperature of the blank disc used in step a) and lower than the melting point of the polycrystalline material, to obtain an annealed disc; d) thinning the annealed disc from the at least one surface-ground face, said thinning comprising fine grinding using a grinding wheel having abrasive grains with an average size less than 10 μm, to obtain the support substrate.

Description

Technical Field

[0001] This invention relates to the field of semiconductor materials for microelectronic devices. Specifically, this invention relates to a method for preparing a support substrate made of a polycrystalline material (particularly SiC), which can be used to fabricate a composite structure comprising a thin single-crystal layer transferred onto the support substrate. Background Technology

[0002] SiC is being used more and more extensively in the manufacture of innovative devices (power components, RF components, etc.) to meet the growing application demands in the electronics field, particularly in electric vehicles. This is because power devices and integrated power systems based on single-crystal silicon carbide can handle much higher power densities than their conventional silicon counterparts, and can be implemented with a smaller active area.

[0003] However, high-quality single-crystal SiC (c-SiC) substrates intended for use in the microelectronics industry remain expensive and difficult to supply in large sizes. Therefore, it is advantageous to employ a layer transfer scheme to produce composite structures, which typically consist of a thin layer of single-crystal SiC (obtained from a high-quality c-SiC substrate) on a lower-cost support substrate (e.g., made of polycrystalline SiC (p-SiC)). Electronic components can then be fabricated on and / or within this thin layer. It should also be noted that composite structures can provide additional properties and functionality, particularly by providing a support substrate with favorable mechanical, electrical, and / or thermal properties.

[0004] A well-known thin-layer transfer scheme is Smart Cut. TM The process is based on light ion implantation and bonding of the single-crystal donor substrate and the support substrate at the bonding interface by direct bonding.

[0005] To be compatible with thin-layer transfer processes, the supporting substrate must have the lowest possible curvature or deformation. Low curvature is also important for ensuring performance during device fabrication steps (such as photolithography) on / within the thin layer of the composite structure.

[0006] Document FR3132381 proposes a method for manufacturing non-deformable p-SiC wafers.

[0007] Starting with a p-SiC slab separated from its growth substrate, the method includes a heat treatment step at a temperature between 1650°C and 2000°C, followed by a thinning step, which specifically includes extremely coarse grinding, coarse grinding, and fine grinding. The heat treatment readily causes deformation of the slab. The thinning step is then modified to include correcting this deformation through localized, finely tuned material removal.

[0008] Invention Theme

[0009] This invention proposes a method for preparing a support substrate made of polycrystalline materials (particularly p-SiC) as an alternative to prior art methods, which promotes low curvature of the support substrate and minimizes manufacturing costs. This invention also relates to a method for manufacturing a composite structure including the support substrate. Summary of the Invention

[0010] This invention relates to a method for preparing a support substrate (200) made of polycrystalline material, the method comprising the following steps: a) Provide a raw disc made of polycrystalline material, having two sides; b) Use a grinding wheel with an average abrasive grain size greater than or equal to 10 μm to rough grind at least one of the two sides of the blank disc to obtain a polished disc with at least one polishing side. c) Apply heat treatment to the ground wafer at a temperature higher than the growth temperature of the blank wafer used in step a) but lower than the melting point of the polycrystalline material to obtain an annealed wafer. d) Thinning the annealed disc on at least one grinding side, the thinning comprising fine grinding with a grinding wheel having an average abrasive grain size of less than or equal to 10 μm to obtain the support substrate.

[0011] Other advantageous and non-limiting features according to the invention, individually or in any technically feasible combination: ● Step a) includes the following sub-steps: a1) Chemical vapor deposition of a layer formed from the polycrystalline material on a growth substrate. a2) Remove the growth substrate to obtain the blank wafer.

[0012] ● The polycrystalline material is silicon carbide or aluminum nitride.

[0013] ● The heat treatment in step c) is carried out at a temperature greater than or equal to 1600°C for a duration greater than or equal to 10 minutes.

[0014] ● Step b) is applied to both sides of the blank disc, and / or step d) is applied to both sides of the blank disc.

[0015] ● The rough grinding applied to one and / or the other side of the blank disc removes a first thickness greater than or equal to 150 μm.

[0016] ● The heat treatment in step c) is carried out at a temperature greater than or equal to 1700°C, preferably greater than or equal to 1800°C, more preferably greater than or equal to 1850°C, and even more preferably greater than or equal to 2000°C.

[0017] ● The fine grinding applied to one side and / or the other side of the annealed disc in step d) removes a second thickness of less than or equal to 50 μm.

[0018] ● The second thickness is less than or equal to 20 μm, preferably between 5 μm and 20 μm.

[0019] ● The fine grinding in step d) is performed using a grinding wheel with an average abrasive grain size of less than or equal to 5 μm, less than or equal to 4 μm, or even less than or equal to 3 μm.

[0020] ● Step d) After the fine grinding, surface preparation includes polishing, cleaning, annealing, etching, and / or film deposition to obtain a surface finish on the support substrate that is compatible with direct bonding to another substrate.

[0021] ● Step d) includes surface preparation after the fine grinding, which consists only of cleaning and / or annealing and / or plasma activation and / or film deposition to obtain a surface finish on the support substrate that is compatible with direct bonding to another substrate.

[0022] The present invention also relates to a method for manufacturing a composite structure, the method comprising: - As described above, a support substrate made of polycrystalline material is prepared, and - Transfer a thin layer of single-crystal material from the donor substrate onto the supporting substrate.

[0023] The polycrystalline material is advantageously selected from silicon carbide and aluminum nitride.

[0024] The single crystal material is advantageously selected from silicon carbide, gallium nitride, gallium oxide, diamond, silicon, germanium, and indium phosphide.

[0025] The manufacturing method may further include the step of forming electronic components in or on the thin layer. Attached Figure Description

[0026] Other features and advantages of the invention will become apparent from the following detailed description of the invention with reference to the accompanying drawings, wherein: [ Figure 1a ] [ Figure 1a '] [ Figure 1b ] [ Figure 1c ] [ Figure 1d ] Figure 1a , Figure 1a '、 Figure 1b , Figure 1c and Figure 1dA method for preparing a support substrate according to the present invention is shown; [ Figure 2a ] [ Figure 2b ] Figure 2a and Figure 2b A composite structure obtained by the manufacturing method according to the present invention is shown; [ Figure 3a ] [ Figure 3b ] Figure 3a and Figure 3b A cross-sectional image obtained by scanning electron microscopy of the disc ground after step b) of the method according to the invention is shown; in particular, a surface work-hardened layer can be observed.

[0027] In the accompanying drawings, the same reference numerals may be used for the same type of elements. Some drawings are schematic representations and are not drawn to scale for clarity. In particular, layer thickness along the z-axis is not drawn to scale relative to the lateral dimensions along the x and y axes, and the relative thickness of layers with respect to each other is not necessarily reflected in the drawings. Detailed Implementation

[0028] This invention relates to a method for preparing a support substrate 200 made of a polycrystalline material. The material is preferably silicon carbide (SiC) or aluminum nitride (AlN).

[0029] There are various techniques for producing or growing disk-shaped polycrystalline materials to form substrates or wafers, particularly for use in the semiconductor industry. These techniques include fabrication methods such as sintering, physical vapor transport (PVT), chemical vapor deposition (CVD), or high-temperature chemical vapor deposition (HTCVD).

[0030] The first step a) of the preparation method according to the present invention is to provide a blank wafer 2 made of polycrystalline material, which is produced by one of the known techniques described above. The blank wafer 2 has two sides extending substantially parallel to the principal plane (x, y).

[0031] Compared to sintering, CVD fabrication has the particular advantage of producing dense, non-porous wafers; another advantage is that the internal stress of CVD-grown wafers is lower than that present in wafers produced by sintering.

[0032] Step a) preferably includes a first sub-step a1): chemically vapor-depositing (CVD) a polycrystalline material layer 2' on a substrate called growth substrate 2''. Figure 1a ).

[0033] When the polycrystalline material is SiC, the gas mixture used in this technique comprises at least one silicon precursor gas (such as silane or chlorosilane) and / or at least one carbon precursor gas (such as alkane or olefin) and / or at least one silicon and carbon precursor gas (such as methyltrichlorosilane, abbreviated as MTCS), and, if desired, at least one dopant gas. These gases can be diluted in a carrier gas, which can be a reducing gas such as hydrogen and / or an inert gas such as argon. The polycrystalline SiC layer 2' is formed on the growth substrate 2'' by this gas mixture. The latter is preferably composed of fine-grained and purified isostatically pressed graphite to form a 3C-SiC polymorph. The reactor temperature during CVD deposition of SiC should be between about 1000°C and about 1600°C. For example, deposition can be performed on graphite wafers with a nominal diameter close to 150 mm and a thickness greater than 2 mm to ensure that the growth substrate / p-SiC layer assembly is sufficiently flat. Of course, if it is desired to produce support substrates with diameters of 100 mm, 200 mm, etc., the diameter and thickness of the graphite disc 2'' can be varied.

[0034] The next sub-step a2) corresponds to removing the growth substrate 2'' to obtain a blank wafer 2 with polycrystalline material on both sides 2a, 2b. Figure 1a ').

[0035] Returning to the SiC-related example above, the graphite growth substrate 2'' coated with the deposited p-SiC layer 2' is machined and then oxidized in air (typically at 900°C) to remove any graphite residue. It should be noted that the graphite 2'' can also be removed using purely mechanical processing techniques or even primarily through combustion / oxidation. In practice, p-SiC blank wafers 2 are typically obtained on each side of the growth substrate 2''.

[0036] For diameters of 150 mm or 200 mm, the thickness of the polycrystalline material blank wafer 2 provided in step a) is typically between 700 μm and 3000 μm.

[0037] The method then includes step b), which involves rough grinding at least one side 2a, 2b of the blank disc 2 using a grinding wheel suitable for high-level material removal.

[0038] As is known by its own knowledge, a grinding wheel is a rotationally symmetric tool composed of abrasive grains embedded in a bonding matrix. These abrasive grains are, for example, diamond particles. To grind one side of a blank disc 2, the grinding wheel rotates and gradually descends to grind the polycrystalline material, thereby removing material above a certain thickness.

[0039] The grinding in step b) is called "coarse grinding" because it uses a grinding wheel with a large grit size.

[0040] Specifically, the average size (or average diameter) of the abrasive grains is greater than or equal to 10 μm, typically between 10 μm and 160 μm. The average size should be understood as the average value of the abrasive grain size (diameter or equivalent diameter) constituting the grinding wheel.

[0041] In other words, the mesh or grit size of the grinding wheel (which is inversely proportional to the abrasive grain size) is less than or equal to 2000, typically between 100 and 2000.

[0042] The average size of the abrasive grains is preferably greater than or equal to 18 μm, typically between 18 μm and 50 μm (i.e., between 350 and 1000 grit), or even between 50 μm and 160 μm (i.e., between 100 and 350 grit).

[0043] This coarse grinding results in the formation of surface damage areas that can extend for several micrometers, tens of micrometers, or even hundreds of micrometers (e.g., between 15 μm and 600 μm).

[0044] The damaged area comprises two layers: a surface work-hardened layer 21 and an underlying stress layer 22. The work-hardened layer 21 is characterized by significant surface scratches (leading particularly to high surface roughness) and the presence of cracks and stress within the material. Its typical thickness ranges from 0.5 μm to 50 μm, and for the highest abrasive grain average size, it can even be between 5 μm and 50 μm.

[0045] Stress layer 22, as the name suggests, is characterized by the presence of stress in the material, but without cracks. It is located below work-hardened layer 21 and typically has a thickness between 10 μm and 500 μm.

[0046] The thickness of the work-hardened layer 21 and the stress layer 22 depends in particular on the size of the abrasive grains of the grinding wheel.

[0047] The damaged area with its two layers 21 and 22 can be characterized, in particular, by transmission electron microscopy (TEM). The work-hardened layer 21 can also be identified by scanning electron microscopy (SEM). Figure 3a and Figure 3b Two examples are shown, in which cracks can be seen extending into the work-hardened layer 21, with thicknesses of approximately 4 μm and 10 μm, respectively.

[0048] Rough grinding is advantageously performed on both sides 2a, 2b of the blank wafer 2. This is because the blank wafer 2 typically exhibits a large thickness variation (TTV) and needs to be ground on the side where (CVD) growth occurs. Furthermore, the side that initially contacts the growth substrate 2'' has a nucleation region with very small grains, which is prone to generating stress differences with the other side (the side where the grains have grown), and therefore should also preferably be ground.

[0049] The rough grinding preferably removes a thickness (referred to as the first thickness) greater than or equal to 10 μm, greater than or equal to 50 μm, greater than or equal to 150 μm, greater than or equal to 250 μm, greater than or equal to 500 μm, or greater than or equal to 1 mm on one or both sides 2a, 2b of the blank wafer 2. The first thickness is advantageously between 100 μm and 300 μm, especially when the blank wafer 2 provided in step a) is produced by chemical vapor deposition (CVD) technology.

[0050] At the end of this step, a so-called polishing disc 20 is obtained, which has two sides 20a, 20b ( Figure 1b ).

[0051] Following step c), the typical thickness of the polishing disc 20 with a diameter of 150 mm is between 400 μm and 800 μm. For the polishing disc 20 with a diameter of 200 mm, the typical thickness is between 550 μm and 900 μm.

[0052] The next step, c), involves applying a heat treatment to the polished disc 20. The temperature and time of the heat treatment are defined as releasing all or part of the stress present in the stress layer 22 (which is produced by the rough grinding step b). Only one stress layer 22 is mentioned here, but as... Figure 1b As shown, if both sides 20a and 20b of the polishing disc 20 are polished in step b), the polishing disc 20 may have two surface damage areas (and therefore two stress layers 22) on one side and the other side of its sides 20a and 20b.

[0053] The heat treatment was carried out at a temperature higher than the growth / formation temperature of the blank wafer 2 and lower than the melting point of the polycrystalline material.

[0054] Specifically, the temperature applied in step c) is greater than or equal to 1500°C (e.g. in the case of p-AlN), or even greater than or equal to 1600°C (e.g. in the case of p-SiC), and the duration is greater than or equal to 10 minutes.

[0055] The heat treatment in step c) is preferably carried out at temperatures greater than or equal to 1700°C, 1800°C, 1850°C, or even 2000°C. It is also preferred that the duration of the heat treatment is greater than or equal to 30 minutes, 1 hour, or even 2 hours. The annealing atmosphere is advantageously neutral, for example, based on argon. The heat treatment can advantageously be carried out at pressures above atmospheric pressure.

[0056] At the end of this step, the so-called annealed disc 20' is obtained. Figure 1c ).

[0057] This heat treatment, performed after coarse grinding and before fine grinding (in the next step d), allows for the "repair" of all or part of the stress layer 22 in the damaged areas of the polished disc 20 (one or both sides 20a, 20b), and may even partially repair the work-hardened layer 21. This repair results in the rearrangement of the polycrystalline structure and the release (and thus reduction) of stress present in the damaged areas.

[0058] The annealed disc 20' then includes a first annealed layer 21', which was originally the work-hardened layer 21 of the ground disc 20. The first annealed layer 21' extends to the same thickness as the work-hardened layer 21, but benefits from a lower level of defects and stress through heat treatment.

[0059] The annealed wafer 20' also includes a second annealed layer 22' located below the first annealed layer 21', which was originally the stress layer 22 of the ground wafer 20. The stress in the second annealed layer 22' is released in whole or in part, meaning that it is no longer easy (or less easy) to cause wafer deformation in subsequent thinning or heat treatment steps. The second annealed layer 22' extends to the same thickness as the stress layer 22.

[0060] The method then includes step d), which involves thinning the annealed wafer 20' on at least one side that was ground in step b). The purpose of this step is to remove the first annealed layer 21' while retaining at least a portion, preferably all or most (more than 80%, or even more than 90%) of the second annealed layer 22'.

[0061] Step d) involves fine grinding using a grinding wheel with an average abrasive grain size (or average diameter) less than or equal to 10 μm (i.e., a grinding wheel mesh size greater than or equal to 2000). The average abrasive grain size is preferably less than or equal to 8 μm, 7 μm, 6 μm, 5 μm, 4 μm, or even 3 μm (corresponding to grinding wheel mesh sizes greater than or equal to approximately 2400, 2800, 3300, 4000, 5000, or 7000, respectively).

[0062] At the end of step e), a support substrate 200 is obtained. Figure 1d ).

[0063] Applying heat treatment in step c) makes it possible to remove less material by fine grinding in step d). According to the invention, fine grinding is intended to remove all or at least most (typically more than 90% or even more than 95%) of the first annealed layer 21', but not the underlying second annealed layer 22', or only a small portion of it (typically less than 20%, less than 10%, or even less than 5%), because any damage to the curvature that the second annealed layer 22' might cause has been eliminated by step c).

[0064] The thickness (referred to as the second thickness) removed by fine grinding on one or both sides 20a, 20b of the annealed disc 20' is less than or equal to 50 μm or less than or equal to 20 μm, preferably between 5 μm and 20 μm.

[0065] For a diameter of 150 mm, the typical thickness of the finely ground support substrate 200 is between 110 μm and 400 μm; for a diameter of 200 mm, the typical thickness is between 110 μm and 600 μm.

[0066] Very fine-grained grinding wheels experience significant and rapid wear as the thickness removed increases, making it economically unfavorable to remove too much material using them. However, their advantage lies in providing a very favorable initial surface finish (low roughness and low thickness of the induced damage zone).

[0067] Since the thickness to be removed in step d) is small, applying heat treatment directly after coarse grinding makes it economically feasible to use grinding wheels with fine or even very fine abrasive grains (e.g., abrasive grains with an average size of less than or equal to 5 μm, less than or equal to 4 μm, or even less than or equal to 3 μm) for fine grinding.

[0068] For example, step d) can be performed on an annealed p-SiC wafer 20' using a 4000-mesh or even 8000-mesh grinding wheel, with the head of the grinding wheel ("spindle") rotating at 1000 to 2000 rpm, the platform supporting the annealed wafer 20' rotating at approximately 200 to 400 rpm, and the removal speed at 0.1 μm / s to 0.5 μm / s, for example, 0.15 μm / s.

[0069] Following fine grinding, step d) advantageously includes a surface treatment comprising chemical mechanical polishing, cleaning, annealing, chemical etching (wet or dry), and / or film deposition to achieve a surface finish on the support substrate 200 compatible with direct bonding to another substrate. This surface finish typically corresponds to a roughness of less than or equal to 1 nm RMS (measured by atomic force microscopy within a 20 μm x 20 μm scanning range). When fine grinding is performed in step d) using a grinding wheel with an average abrasive grain size of less than or equal to 3 μm, it should be noted that no additional mechanical or chemical mechanical polishing steps are necessary; preferably, only cleaning (or a series of cleaning operations), film deposition, annealing, and / or plasma activation are performed before bonding the support substrate 200 to fabricate the composite structure 100. This is an important advantage because polishing steps are costly and can differentially etch the grains on the polished side, which often degrades the surface quality crucial for bonding.

[0070] Considering the sequential application of steps (b), c) and d), without any other insert steps, starting from a blank wafer 2 of economically feasible thickness and following a simple process that minimizes manufacturing costs, the curvature of the p-SiC support substrate 200 is kept within reasonable limits.

[0071] Curvature can be measured using a confocal white light sensor that scans the surface of the substrate, which is placed on a support of the measuring tool. For a support substrate 200 with a diameter of 150 mm or 200 mm, the curvature is typically less than or equal to 150 μm, 100 μm, or even 50 μm.

[0072] The order of steps b), c), and d) is also economically advantageous because coarse grinding is rapid and the relevant grinding wheels can withstand thick removal without excessive wear. Furthermore, since step d) requires a low removal rate, a high-mesh grinding wheel can be used, which facilitates subsequent surface treatments aimed at achieving a surface finish on the support substrate 200 that is compatible with direct bonding to another substrate.

[0073] The support substrate 200 thus prepared is intended for use in fabricating a composite structure 100. The method for fabricating this structure 100 involves transferring a thin layer 10 made of a single-crystal material onto the support substrate 200. While any known thin-layer transfer process can be used, Smart Cut is particularly suitable. TM The process is based on forming a fragile surface buried in a donor substrate made of a single-crystal material by implanting light ionic species (e.g., H, He, or a combination of both), and direct bonding (via molecular adhesion) between the donor substrate and the support substrate. Separation is then performed along the buried fragile surface, allowing the single-crystal thin layer 10 to be transferred from the donor substrate to the support substrate 200. Figure 2a The remaining portion of the donor substrate is retained for subsequent reuse.

[0074] The single-crystal thin layer 10 may be composed of silicon carbide, diamond, silicon or II-VI or III-V semiconductor compounds (e.g., AlN, GaN, etc.), gallium oxide (Ga2O3) or any wide-bandgap semiconductor material.

[0075] As an example, the thickness of the thin layer 10 of the composite structure 100 is between tens of nm and hundreds of nm, for example, between 50 nm and 800 nm. As will be seen below, epitaxial steps can be performed on the thin layer 10 to thicken it (homogeneous epitaxy) or to grow other materials (heterogeneous epitaxy) to meet the requirements of the electronic component to be manufactured. The thin layer 10 has a resistivity suitable for the target application and the target component.

[0076] In the composite structure 100, the support substrate 200 has the thickness and curvature as described above. The radius of curvature of the support substrate 200 ranges such that the substrate is fully compatible with the specifications of the composite structure 100 on which the single-crystal thin layer 10 is disposed, with the process for manufacturing such structure 100, and with the subsequent fabrication of microelectronic components on and / or therein of the thin layer 10. It should be noted that the curvature of the composite structure 100 remains close to the curvature of the support substrate 200.

[0077] The composite structure 100 may include a continuous or discontinuous intermediate layer 30 disposed between the thin layer 10 and the supporting substrate 200, which is made of at least one metal or semiconductor material. Figure 2b As is known in the method of manufacturing the composite structure 100, the intermediate layer 30 may be formed along the bonding interface on the side of the thin layer 10, the side of the support substrate 200, or both sides prior to bonding the donor substrate and the support substrate 200. The intermediate layer 30 may be made of, for example, silicon, silicon carbide, tungsten, and / or titanium. Its thickness is typically between a few nm and several hundred nm, preferably between 2 nm and 50 nm.

[0078] The resulting composite structure 100 is extremely robust to extremely high-temperature heat treatments that can be applied to improve the quality of the thin layer 10 or to fabricate elements on and / or in the layer 10. The support substrate 200 in the composite structure 100 is stable and its curvature does not increase excessively during and after the high-temperature heat treatment applied to it for manufacturing the composite structure 100.

[0079] The composite structure 100 according to the invention is particularly suitable for producing one (or more) electronic components, especially high-voltage components, such as Schottky diodes, MOSFETs or HEMTs and / or high-frequency (RF) transistors in and / or on thin layers.

[0080] Of course, the present invention is not limited to the described embodiments and examples, and variations may be implemented without departing from the scope of the present invention.

Claims

1. A method for preparing a support substrate (200) made of polycrystalline material, the method comprising the following steps: a) Provide a blank disc (2) made of polycrystalline material, having two sides (2a, 2b); b) Use a grinding wheel with an average abrasive grain size greater than or equal to 10 μm to rough grind at least one of the two sides (2a, 2b) of the blank disc (2) to obtain a grinding disc (20) having at least one grinding side (20a, 20b). c) The polished wafer (20) is subjected to heat treatment at a temperature higher than the growth temperature of the blank wafer (2) used in step a) but lower than the melting point of the polycrystalline material to obtain an annealed wafer (20'). d) Thinning the annealed wafer (20') on at least one grinding side (20a, 20b), the thinning comprising fine grinding with a grinding wheel having an average abrasive grain size of less than or equal to 10 μm to obtain the support substrate (200).

2. The preparation method according to claim 1, wherein step a) comprises the following sub-steps: a1) A layer (2') formed of the polycrystalline material is chemically vapor-deposited on the growth substrate (2''). a2) Remove the growth substrate (2'') to obtain the blank wafer (2).

3. The preparation method according to any one of the preceding claims, wherein the polycrystalline material is silicon carbide (SiC) or aluminum nitride (AlN).

4. The preparation method according to any one of the preceding claims, wherein the heat treatment in step c) is carried out at a temperature greater than or equal to 1600°C for a duration greater than or equal to 10 minutes.

5. The preparation method according to any one of the preceding claims, wherein step b) is applied to both sides of the blank disc (2), and / or step d) is applied to both sides of the blank disc (2).

6. The preparation method according to any one of the preceding claims, wherein the rough grinding applied to one side and / or the other side of the blank disc (2) removes a first thickness greater than or equal to 150 μm.

7. The preparation method according to any one of the preceding claims, wherein the heat treatment in step c) is carried out at a temperature greater than or equal to 1700°C, preferably greater than or equal to 1800°C, more preferably greater than or equal to 1850°C, and even more preferably greater than or equal to 2000°C.

8. The preparation method according to any one of the preceding claims, wherein the fine grinding applied to one side and / or the other side of the annealed disc (20') removes a second thickness of less than or equal to 50 μm.

9. The preparation method according to claim 8, wherein the second thickness is less than or equal to 20 μm, preferably between 5 μm and 20 μm.

10. The preparation method according to any one of the preceding claims, wherein the fine grinding in step d) is performed using a grinding wheel, wherein the average size of the abrasive grains of the grinding wheel is less than or equal to 5 μm, less than or equal to 4 μm, or even less than or equal to 3 μm.

11. The preparation method according to any one of the preceding claims, wherein step d) after the fine grinding includes surface preparation, which includes only cleaning, annealing, plasma activation and / or film deposition to obtain a surface finish on the support substrate (200) that is compatible with direct bonding to another substrate.

12. A method for manufacturing a composite structure (100), the method comprising: - A support substrate (200) made of polycrystalline material is prepared by the method according to any one of claims 1 to 11, and - Transfer a thin layer (10) of single crystal material from the donor substrate (1) onto the support substrate (200).

13. The method for manufacturing the composite structure (100) according to claim 12, wherein the polycrystalline material is silicon carbide (SiC) or aluminum nitride (AlN), and wherein the single crystal material is selected from silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), diamond, silicon, germanium and indium phosphide (InP).

14. The manufacturing method according to any one of claims 12 and 13, the method further comprising forming electronic components in or on the thin layer (10).

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