Compressor control method and circuit

Abstract

The present application relates to a kind of compressor control method and circuit, method includes steps S1, complete low voltage power-on and high voltage power-on initialization, start pre-charge process, step S2, real-time communication fault detection and high voltage overvoltage fault detection are carried out, if no fault and enable effective then start high voltage undervoltage detection sub-process;Step S3, carry out high voltage undervoltage detection sub-process, if no fault then start after delay, step S4, fault detection is continuously executed in the process of compressor operation, execute shutdown protection when triggering any fault, by hierarchical fault detection and pre-charge control process, before the start of compressor, the investigation of various initial faults is completed, gradually raise bus voltage by pre-charge process, avoid the impact current of high voltage power-on instant damages power device, continuously monitor fault state in the process of operation, can trigger protection in first time when abnormality occurs, improve the reliability and security of high voltage high-power compressor operation.

Description

Technical Field

[0001] This invention relates to the field of compressor control, and in particular to a compressor control method and circuit. Background Technology

[0002] Compressor start-up, shutdown, and fault protection control are core technologies of high-voltage variable frequency compressor systems, primarily used to ensure reliable start-up and stable operation of the compressor under high-voltage conditions. Most existing compressor control methods directly issue start-up commands to drive the compressor after power-on. However, this method lacks standardized bus pre-charge management and tiered voltage fault protection logic. High-voltage power-on can easily generate inrush currents that damage power devices, and voltage anomalies can lead to delayed protection or accidental shutdowns, making it difficult to meet the high reliability requirements of high-voltage, high-power compressors. Summary of the Invention

[0003] The purpose of this invention is to provide a compressor control method and circuit to solve the problems existing in the prior art.

[0004] The above-mentioned technical objective of the present invention is achieved through the following technical solution: A compressor control method includes the following steps: Step S1: Complete low-voltage power-on and high-voltage power-on initialization, and begin the pre-charge process; Step S2: Real-time execution of communication fault detection and high voltage overvoltage fault detection. If there is no fault and the enable is effective, start the high voltage undervoltage detection subprocess. Step S3: Perform the high voltage and undervoltage detection sub-process. If there is no fault, start after a delay. Step S4: During compressor operation, fault detection is continuously performed, and shutdown protection is executed when any fault is triggered.

[0005] By adopting the above technical solutions and through the graded fault detection and pre-charge control process, various initial faults can be investigated before the compressor starts. The bus voltage is gradually increased through the pre-charge process to avoid damage to power devices from the inrush current at the moment of high voltage power-on. During operation, the fault status is continuously monitored, and protection can be triggered immediately when an abnormality occurs. This effectively improves the reliability and safety of high-voltage high-power compressor operation and meets the requirements of high-reliability applications.

[0006] In a further embodiment, the high-voltage bus undervoltage detection method in step S3 is as follows: When the bus voltage is below 400V for more than 1 second, an undervoltage fault is reported and the compressor is stopped; when the bus voltage rises to above 420V for more than 2 seconds, the undervoltage fault is automatically cleared.

[0007] By adopting the above technical solution, the undervoltage state of the bus voltage can be accurately determined. By setting a duration threshold, misjudgment caused by instantaneous voltage fluctuations can be avoided. The fault is automatically cleared after the voltage returns to normal without manual intervention to reset, thus improving the automation level and operational stability of the compressor control.

[0008] In a further embodiment, the communication fault detection method in step S2 is as follows: if no valid external communication message is received for 10 seconds, a communication fault is reported and the compressor is controlled to stop. The high voltage overvoltage fault detection method is as follows: when the bus voltage is higher than 750V and the duration exceeds 1 second, an overvoltage fault is reported and the compressor is controlled to stop.

[0009] By adopting the above technical solutions, dangerous operating conditions such as communication interruption and bus overvoltage can be identified in a timely manner. Similarly, by setting a duration threshold, false judgments caused by instantaneous interference can be eliminated. When an abnormal operating condition actually occurs, the shutdown protection is triggered immediately to prevent the fault from escalating and damaging the compressor and downstream power devices.

[0010] This invention also discloses a circuit for a compressor control method, including a sampling circuit, a communication circuit, a drive circuit, a high-voltage power supply filter and pre-charging circuit, a power supply circuit, and an interlock circuit. The sampling circuit is used to collect the compressor's phase current, bus current, bus voltage, and temperature parameters, and is electrically connected to the drive circuit. The communication circuit is electrically connected to the interlock circuit. The input terminal of the high-voltage power supply filter and pre-charging circuit is connected to a high-voltage DC input for high-voltage input electromagnetic filtering and bus capacitor pre-charging. The power supply circuit is electrically connected to the sampling circuit, communication circuit, drive circuit, high-voltage power supply filter and pre-charging circuit, and interlock circuit, respectively. The interlock circuit is used to realize high and low voltage interlock protection and external control interface access.

[0011] By adopting the above technical solution and through the coordinated operation of various functional circuits, stable and reliable hardware support can be provided for the control method, enabling the completion of core functions such as operating parameter acquisition, power drive, power conversion and safety protection, and ensuring the stable execution of graded fault detection and pre-charge control processes.

[0012] In a further embodiment, the sampling circuit includes a first current acquisition unit, a second current acquisition unit, a third current acquisition unit, a voltage acquisition unit, and a temperature acquisition unit. The first current acquisition unit and the second current acquisition unit have the same structure. The first current acquisition unit and the second current acquisition unit are used to acquire phase current. The third current acquisition unit is used to acquire bus current. The temperature acquisition unit is used to acquire the temperature parameters of the compressor.

[0013] By adopting the above technical solutions, various core electrical parameters and temperature status during compressor operation can be comprehensively collected, providing accurate status judgment basis for control logic, enabling fault detection and protection actions to be triggered based on accurate actual operating data, and further improving the reliability and timeliness of control.

[0014] In a further embodiment, the communication circuit includes a CAN communication unit, a signal circuit, a first input circuit, and a second input circuit. The first input circuit and the second input circuit have the same structure. The CAN communication unit is electrically connected to the signal circuit. The CAN communication unit is used to complete data interaction with an external control unit. The signal circuit is used to perform level conversion and shaping processing on the input communication signal. The first input circuit and the second input circuit are used to control the compressor speed and start / stop, respectively.

[0015] By adopting the above technical solution, stable acquisition and processing of communication signals and external switch signals are achieved. It can not only complete stable data interaction with external control units to obtain control commands, but also accurately acquire external input enable and fault signals, providing complete external input support for control logic.

[0016] In a further embodiment, the drive circuit includes a first drive unit, a second drive unit, a third drive unit, and an inverter bridge circuit. The first drive unit, the second drive unit, and the third drive unit have the same structure and are all connected to the inverter bridge circuit. The first drive unit is used to drive the first bridge arm switch of the inverter bridge circuit, the second drive unit is used to drive the second bridge arm switch of the inverter bridge circuit, and the third drive unit is used to drive the third bridge arm switch of the inverter bridge circuit. The inverter bridge circuit is used to invert high-voltage direct current into three-phase alternating current required for compressor operation.

[0017] By adopting the above technical solution, the three arms of the inverter bridge can be driven by three independent drive units respectively, realizing the isolated transmission of drive signals, ensuring the stability and reliability of the switching action of the switching tube, and finally stably outputting three-phase AC power that meets the operating frequency requirements of the compressor, ensuring that the compressor can stably output power according to the control command.

[0018] In a further embodiment, the power supply circuit includes a low-voltage input filter circuit, an isolation circuit, and an LDO circuit. The low-voltage input filter circuit, the isolation circuit, and the LDO circuit are electrically connected to each other. The low-voltage input filter circuit is used to filter the input low-voltage DC power. The isolation circuit is used to achieve electrical isolation between the low-voltage input side and the subsequent circuits. The LDO circuit is used to convert the isolated DC voltage into a stable operating voltage required by each functional circuit.

[0019] By adopting the above technical solutions, a stable, clean, and voltage-compliant power supply can be provided for each functional circuit in the back end. The electrical isolation design can block interference from the low-voltage input side from entering the subsequent control and drive circuits, avoid power supply side interference from affecting the normal operation of the control logic, and further improve the anti-interference capability and working stability of the entire control circuit.

[0020] In a further embodiment, the interlock circuit includes a first filter circuit, an interlock unit, and a plug-in circuit. The first filter circuit is electrically connected to the isolation circuit. The plug-in circuit is electrically connected to the high-voltage power supply filter and pre-charge circuit, the low-voltage input filter circuit, and the second input circuit, respectively. The first filter circuit is used to filter and shape the input interlock control signal. The interlock unit is used to perform logical judgment on the received high and low voltage status signals. Only when both the high and low voltage statuses meet the safety conditions is the subsequent control process allowed to start. The plug-in circuit is used to provide an external interface connection for the interlock circuit.

[0021] By adopting the above technical solution, the logic judgment of high and low pressure safety interlock is realized at the hardware level. The compressor control process is only allowed to start when both high and low pressure states meet the safety requirements. If there is a safety hazard, the subsequent operation is directly blocked. This further improves the safety protection level of the entire compressor control system from the hardware level and avoids safety accidents caused by illegal operation or abnormal status.

[0022] In summary, the present invention has the following beneficial effects: 1. Through the design of a graded fault detection and pre-charge start-up control process, the initial faults such as undervoltage, communication, and overvoltage are checked before the compressor starts. The bus voltage is gradually increased through the pre-charge process to avoid damage to power devices caused by the surge current at the moment of high voltage power-up. The fault status is continuously monitored during operation, and the shutdown protection can be triggered as soon as an abnormality occurs, which improves the reliability and safety of high-voltage high-power compressor operation and is suitable for high reliability application requirements. 2. Through the multi-module integrated hardware circuit design, the core functions such as full parameter acquisition of compressor operation, power drive conversion, and high and low pressure safety interlock are completed, providing stable and reliable hardware support for hierarchical control logic. At the same time, by setting the duration threshold for various fault judgments, it can eliminate false judgments caused by instantaneous voltage and signal fluctuations, improve the accuracy of fault detection, and automatically clear the fault after the voltage returns to normal without manual reset, further improving the level of automation of control. 3. Through the logic design of the interlock circuit, the determination and verification of high and low voltage safety status are realized at the hardware level. The subsequent control process is allowed to start only when both high and low voltage status meet the safety conditions. If there is a safety hazard, the operation is directly blocked. This further improves the safety protection level of the entire control system from the hardware end, and avoids safety accidents caused by abnormal status or illegal operation. Attached Figure Description

[0023] Figure 1 This is a flowchart illustrating the overall process of this invention; Figure 2 This is a flowchart of the pre-filling sub-process of the present invention; Figure 3 This is a flowchart of the communication detection sub-process of the present invention; Figure 4 This is a flowchart of the high-voltage overvoltage detection sub-process of the present invention; Figure 5 This is a flowchart of the high voltage and undervoltage detection sub-process of the present invention; Figure 6 This is a schematic diagram of the sampling circuit of the present invention; Figure 7 This is a schematic diagram of the communication circuit of the present invention; Figure 8 This is a schematic diagram of the driving circuit of the present invention; Figure 9 This is a schematic diagram of the high-voltage power supply filtering and pre-charging circuit of the present invention; Figure 10 This is a schematic diagram of the power supply circuit of the present invention; Figure 11 This is a schematic diagram of the interlocking circuit of the present invention. Detailed Implementation

[0024] The present invention will be further described in detail below with reference to the accompanying drawings.

[0025] It should be noted that in the description of this invention, any descriptions of orientation, such as up, down, front, back, left, right, etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings. They are only for the purpose of facilitating the description of this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed or operated in a specific orientation, and should not be construed as a limitation of this invention.

[0026] Example 1: like Figures 1-5 As shown, a compressor control method includes the following steps: Step S1: System Power-On and High Voltage / Undervoltage Initial Detection. After the process starts, the system sequentially completes the low voltage power-on and high voltage power-on operations. After the low voltage side is connected to an external low voltage DC power supply, it is converted by the power circuit into multiple stable power supplies to power the control, communication, and drive functional modules, completing the initial configuration of each module. On the high voltage side, the DC high voltage input is connected to the bus circuit. The compressor's start permission is controlled by switching the state of the pre-charge flag. In the initial stage of the pre-charge process, the pre-charge flag is set to 0, locking the compressor's start permission and preventing the compressor from starting. This avoids a large current surge caused by a forced start before the bus capacitor has finished charging, which could damage the power devices and the bus capacitor. After the pre-charge process is completed and the bus voltage rises to the preset normal operating threshold, the pre-charge flag is set to 1, releasing the compressor's start lockout and allowing the compressor to receive the start command and enter the standby state.

[0027] Step S2: Real-time execution of communication fault detection and high-voltage overvoltage fault detection. If no fault is found and the enable function is active, the high-voltage undervoltage detection sub-process is initiated. This sub-process continuously verifies the bus voltage status. The system collects bus voltage values ​​in real time and times abnormal voltage conditions. When the bus voltage is detected to be below 400V and this low-voltage condition lasts for more than 1 second, the compressor enable signal status is further assessed. If the compressor enable is active at this time, an undervoltage fault is immediately reported, the drive output is blocked, and the compressor is controlled to perform a shutdown operation to prevent low-voltage operation. In the event of overcurrent damage during compressor operation, the system continuously monitors the bus voltage recovery status after the fault is triggered. When the bus voltage is detected to be higher than 420V and the normal voltage state lasts for more than 2 seconds, the triggered undervoltage fault is automatically cleared and the system returns to normal detection logic. If the initial detection determines that there is no undervoltage fault on the bus, the main process continues to execute subsequent control steps. The requirements for effective enable are: first, 18FECFD0 must be enabled or hard-wired enabled; second, 18FF0C19 must be enabled; and third, the speed of 18FF0C19 must be greater than 0. All three must exist simultaneously for the enable to be effective.

[0028] Step S3: Perform the high-voltage undervoltage detection sub-process. If there is no fault, start after a delay. Then, call the high-voltage undervoltage detection sub-process to continuously verify the bus voltage status. The system collects the bus voltage value in real time and times the abnormal voltage status. When the bus voltage is detected to be below 400V and the low voltage status lasts for more than 1 second, further determine the status of the compressor enable signal. If the compressor enable is in a valid state at this time, immediately report the undervoltage fault and block the drive output, and control the compressor to perform a shutdown operation to avoid overcurrent damage to the compressor under low voltage conditions. After the fault is triggered, the system continuously monitors the bus voltage recovery status. When the bus voltage is detected to be above 420V and the normal voltage status lasts for more than 2 seconds, automatically clear the triggered undervoltage fault and the system returns to normal detection logic. If the initial detection determines that there is no undervoltage fault on the bus, the main process continues to execute the subsequent control steps.

[0029] Step S4: Compressor enable verification and start-up delay control. Under the premise that there are no abnormalities in the fault inspection, the system judges the validity of the compressor enable signal in real time. If the enable signal is invalid, the system maintains the standby state and continuously performs fault detection and enable status judgment in a loop, without triggering the compressor start-up action. When it is confirmed that there are no valid faults in the system and the compressor enable signal switches to the valid state, the system performs a fixed delay of 8 seconds to wait for the bus voltage fluctuation to subside and the working status of each circuit module to stabilize, so as to avoid the electrical fluctuations at the moment of start-up from affecting the reliability of compressor operation. During the delay, various fault statuses are continuously detected synchronously. If any fault is triggered during the delay, the start-up process is immediately terminated and the system returns to step S2 for re-detection.

[0030] Example 2: like Figures 6-11 As shown, a compressor control circuit includes a sampling circuit, a communication circuit, a drive circuit, a high-voltage power supply filter and pre-charging circuit, a power supply circuit, and an interlock circuit. The sampling circuit is connected to the compressor by electrical wires and is used to collect the compressor's temperature, voltage, and current parameters. The sampling circuit is electrically connected to the drive circuit, and the interlock circuit is electrically connected to the communication circuit. The power supply circuit is electrically connected to the sampling circuit, communication circuit, drive circuit, high-voltage power supply filter and pre-charging circuit, and interlock circuit, respectively. This provides a complete hardware platform for the compressor's variable frequency control and full-dimensional fault protection, enabling reliable start-up and shutdown, stable operation, and safety protection of the compressor under high-pressure conditions. The sampling circuit includes a first current acquisition unit, a second current acquisition unit, a third current acquisition unit, a voltage acquisition unit, and a temperature acquisition unit. The first and second current acquisition units have the same structure and are used to acquire phase currents. The third current acquisition unit is used to acquire bus currents. The first current acquisition unit includes resistors R29, R31, R32, R34, R35, R36, R39, capacitors C56, C57, and C58. One end of resistor R34 is connected to the IuSample terminal, and the other end of resistor R34 is connected to one end of resistor R35, one end of capacitor C57, and one end of capacitor C58, respectively. The other end of resistor R35 is connected to one end of resistor R36, one end of resistor R39, and the Iu+ terminal, respectively. The other end of resistor R36 is connected to the A3.3V terminal, the other end of resistor R39 is grounded, the other end of capacitor C58 is grounded, the other end of capacitor C57 is connected to one end of resistor R31, one end of capacitor C56, and one end of resistor R32 respectively, the other end of resistor R31 is connected to the ICOM terminal, the other end of capacitor C56 is grounded, the other end of resistor R32 is connected to one end of resistor R29 and the Iu- terminal respectively, and the other end of resistor R29 is connected to the IuO terminal. By adopting a sampling topology that combines differential voltage division with level rise, the bipolar voltage difference on the sampling resistor is converted into a unipolar positive voltage signal that is adapted to the sampling range of the control chip. C56, C57, and C58 form a three-stage RC filter network, which effectively filters out high-frequency switching interference, improves the accuracy and stability of phase current sampling, and provides accurate current data for compressor field-oriented control and overcurrent protection.

[0031] The third current acquisition unit includes resistors R49, R50, R51, R52, R53, R54, R55, capacitors C64, C65, and C66. One end of resistor R52 is connected to the ICOM terminal. The other end of resistor R52 is connected to one end of resistor R53, one end of capacitor C65, and one end of capacitor C66, respectively. The other end of resistor R53 is connected to one end of resistor R49, one end of resistor R55, and the IBUS+ terminal, respectively. The other end of resistor R54 is connected to the A3.3V terminal. The other end of resistor R55 is connected to... The other end of capacitor C66 is grounded. The other end of capacitor C65 is connected to one end of resistor R50, one end of capacitor C64, and one end of resistor R51. The other end of resistor R50 is connected to the VH- terminal. The other end of capacitor C64 is grounded. The other end of resistor R51 is connected to one end of resistor R49 and the IBUS- terminal. The other end of resistor R49 is connected to the IBUSO terminal. By adopting a differential sampling and level-up architecture, the whole machine bus current signal is obtained based on the bus-side sampling resistor. The output sampled value is used for bus overcurrent protection, input power calculation, and whole machine energy consumption control.

[0032] The voltage acquisition unit includes resistors R28, R30, R33, R37, R38, R40, diode D10, and capacitor C59. One end of resistor R28 is connected to the VH+ terminal, and the other end of resistor R28 is connected to one end of resistor R30. The other end of resistor R30 is connected to one end of resistor R33, and the other end of resistor R33 is connected to one end of resistor R37. The other end of resistor R37 is connected to one end of resistor R40, the anode of diode D10, and one end of resistor R38. Resistor R40... The other end of resistor R38 is connected to the VH- terminal, the cathode of diode D10 is connected to the +3.3V terminal, and the other end of resistor R38 is connected to one end of capacitor C59 and the VBUS terminal respectively. The other end of capacitor C59 is grounded. By using a multi-stage resistor series voltage divider structure, the high-voltage bus voltage of several hundred volts is attenuated to a sampling range of less than 3.3V by a fixed ratio. Diode D10 provides positive clamping protection to prevent voltage spikes from exceeding the sampling range and damaging the downstream control chip. Capacitor C59 is used to smooth the sampling voltage and filter out ripple interference from the high-voltage bus. The temperature acquisition unit includes a thermistor NTC1, a resistor R48, and a capacitor C62. One end of the thermistor NTC1 is connected to the +3.3V terminal, and the other end of the thermistor NTC1 is connected to one end of resistor R48, one end of capacitor C62, and the MOS_TEMP terminal. The other end of resistor R48 is connected to the other end of capacitor C62 and they are all grounded. Because the thermistor NTC1 is mounted close to the surface of the inverter bridge power switching transistor, temperature changes cause a change in resistance, resulting in a synchronous change in the voltage at the voltage divider point. After being filtered by capacitor C62, the output temperature sampling signal is used for power transistor over-temperature protection and temperature derating control.

[0033] The communication circuit includes a CAN communication unit, a signal circuit, a first input circuit, and a second input circuit. The first and second input circuits have the same structure. The CAN communication unit is electrically connected to the signal circuit. The CAN communication unit includes chip U5, diodes D8, D81, and D9, resistors R20, R24, R25, R26, and R27, and capacitors C46, ​​C47, C48, C49, C50, C51, C54, and C55. Chip U5 includes pins STB_N, CANH, CANL, SPLIT, Vbat, WAKE, ERR_N, TXD, GND, Vcc, RXD, Vio, EN, and INH. Pin STB_N is connected to one end of resistor R20. The other end is connected to the LV_5V terminal, pin TXD is connected to the CANLIN-TXD terminal, pin GND is connected to the IGND terminal, pin Vcc is connected to the LV_5V terminal and one end of capacitor C51, the other end of capacitor C51 is connected to the IGND terminal, pin RXD is connected to the CANLIN-RXD terminal, pin Vio is connected to the LV_5V terminal, one end of capacitor C51 and one end of capacitor C50, the other end of capacitor C50 is connected to the other end of capacitor C50 and then to the IGND terminal, pin EN is connected to one end of capacitor C50, pin INH is connected to the anode of diode D9, the cathode of diode D9 is connected to the INH terminal, pin EN and pin Vio are interconnected, pin Vba The pins are connected to the cathode of diode D7 and one end of capacitor C54, respectively. The anode of diode D7 is connected to Vbat, and the other end of capacitor C54 is connected to IGND. The ERR_N pin is connected to one end of resistor R27, and the other end of resistor R27 is connected to IGND. The CANH pin is connected to the fourth pin of common-mode inductor L3. The first pin of common-mode inductor L3 is connected to the cathode of diode D8, one end of capacitor C47, and the CAN_H pin. The anode of diode D8 and the other end of capacitor C47 are connected to IGND. The CANL pin is connected to the third pin of common-mode inductor L3. The second pin of common-mode inductor L3 is connected to the cathode of diode D81, one end of capacitor C49, and C... At the AN_L terminal, the anode of diode D81 and the other end of capacitor C49 are connected to the IGND terminal. The anode of diode D8 is connected to both the anode of diode D81 and the other end of capacitor C49. The SPLIT pin is connected to one end of resistor R25, one end of resistor R26, and one end of capacitor C55. The other end of resistor R25 is connected to one end of capacitor C49. The other end of resistor R26 is connected to pin 1 of common mode inductor L3. The other end of capacitor C55 is connected to the IGND terminal. One end of capacitor C46 is connected to the CANH pin, and the other end of capacitor C46 is connected to the IGND terminal. One end of capacitor C48 is connected to the CANL pin, and the other end of capacitor C48 is connected to the IGND terminal.The common-mode inductor L3, along with the filter capacitor and protection diode on the bus side, forms an EMC protection network to suppress bus common-mode interference and surge impact. Chip U5 implements the transmit and receive conversion of the CAN protocol physical layer, and the resistor-capacitor network matched with pin SPLIT is used to stabilize the bus common-mode level and improve the reliability of long-distance communication. Diode D7 is a reverse power connection protection device to prevent damage to the communication chip from reverse power connection.

[0034] The signal circuit includes chip U4, resistors R13, R117, and R118, and capacitors C41 and C42. Chip U4 includes pins VDD2, Via, Vob, GND2, VDD1, Voa, Vib, and GND1. Pin VDD2 is connected to the LV_5V terminal and one end of capacitor C41, while the other end of capacitor C41 is connected to the IGND terminal. Pin Via is connected to the CANLIN-RXD terminal and one end of resistor R13. The other end of resistor R13 is connected to the LV_5V terminal, pin Vob is connected to the CANLIN-TXD terminal, pin GND2 is connected to the IGND terminal, pin VDD1 is connected to the +3.3V terminal and one end of capacitor C42, the other end of capacitor C42 is connected to the GND terminal, pin Voa is connected to one end of resistor R117, the other end of resistor R117 is connected to the RXD terminal, pin Vib is connected to one end of resistor R118, the other end of resistor R118 is connected to the TXD terminal, and pin GND1 is connected to the GND terminal. Chip U4, a dual-channel digital isolation chip, achieves electrical isolation between the CAN bus side and the control side, blocking interference caused by the high and low voltage ground potential difference, while improving the electrical safety level of the communication circuit and preventing high-voltage side faults from entering the control circuit.

[0035] The first input circuit includes an optocoupler J1, resistors R107, R108, R109, and R114, and a capacitor C107. Optocoupler J1 includes pins 1, 2, 3, and 4. Pin 1 of optocoupler J1 is connected to one end of resistor R108, and the other end of resistor R108 is connected to the Vbat terminal. Pin 2 of optocoupler J1 is connected to one end of resistor R109 and one end of capacitor C107, respectively. The other end of resistor R109 is connected to one end of resistor R114, and the other end of resistor R114 is connected to the PWM terminal. The other end of capacitor C107 is connected to the IGND terminal. Pin 3 of optocoupler J1 is connected to the GND terminal. Pin 4 of optocoupler J1 is connected to one end of resistor R107 and the PWM_OUT terminal, respectively. The other end of resistor R107 is connected to the +3.3V terminal.

[0036] The second input circuit includes an optocoupler J2, resistors R110, R111, R112, and R115, and a capacitor C108. Optocoupler J2 has pins 1, 2, 3, and 4. Pin 1 of optocoupler J2 is connected to one end of resistor R111, and the other end of resistor R111 is connected to the Vbat terminal. Pin 2 of optocoupler J2 is connected to one end of resistor R112 and one end of capacitor C108, respectively. The other end of resistor R112 is connected to one end of resistor R115, and the other end of resistor R115 is connected to the ON / OFF terminal. The other end of capacitor C108 is connected to the IGND terminal. Pin 3 of optocoupler J2 is connected to the GND terminal. Pin 4 of optocoupler J2 is connected to one end of resistor R110 and the ONOFF_OUT output terminal, respectively. The other end of resistor R110 is connected to the +3.3V terminal. Both input circuits use optocouplers to achieve signal isolation transmission. The PWM speed control signal and the ON / OFF start / stop signal are connected to the primary side of the optocoupler through a current-limiting resistor. The secondary side outputs an isolated level signal to the control unit, effectively blocking interference from external lines from entering the control side and improving the reliability of the switch input.

[0037] The driving circuit includes a first driving unit, a second driving unit, a third driving unit, and an inverter bridge circuit. The first driving unit, the second driving unit, and the third driving unit have the same structure. The first driving unit is connected to the UH terminal, the UL terminal, the G1 terminal, the G2 terminal, and the A terminal. The second driving unit is connected to the VH terminal, the VL terminal, the G3 terminal, the G4 terminal, and the B terminal. The third driving unit is connected to the WH terminal, the WL terminal, the G5 terminal, the G6 terminal, and the C terminal. The first driving unit, the second driving unit, and the third driving unit are all connected to the inverter bridge circuit.

[0038] The first driving unit includes chip U6, resistors R14, R15, R56, R57, R58, R59, R60, R61, capacitors C35, C40, C67, diodes D11, D12, and D13. Chip U6 includes pins VDD, HI, LI, SGND, BST, HO, SW, LO, and GND. Pin VDD is connected to the 15V terminal; pin HI is connected to one end of resistor R14 and one end of capacitor C35, with the other end of resistor R14 connected to the UH terminal and the other end of capacitor C35 grounded; pin LI is connected to one end of resistor R15 and one end of capacitor C40, with the other end of resistor R15 connected to the UL terminal and the other end of capacitor C40 grounded; pin SGND is grounded; pin BST is connected to one end of capacitor C67 and the cathode of diode D11, with the other end of capacitor C67 connected to pin SW, and the anode of diode D11 connected to one end of resistor R56, with the other end of resistor R56... One end is connected to the 15V terminal; pins HO and LO are connected to one end of resistor R57 and one end of resistor R58 respectively. The other end of resistor R57 is connected to the anode and G1 terminal of diode D12 respectively, and the other end of resistor R58 is connected to the cathode of diode D12 respectively; pin SW is connected to one end of resistor R59, and the other end of resistor R59 is connected to terminal A; pin LO is connected to one end of resistor R60 and one end of resistor R61 respectively. The other end of resistor R60 is connected to the anode and G2 terminal of diode D13 respectively, and the other end of resistor R61 is connected to the cathode of diode D13 respectively; pin GND is connected to the ICOM terminal. The weak-level PWM signal output from the control side is amplified by chip U6, and the output is a gate drive signal that can directly drive the power switch transistor; the bootstrap capacitor C67 and the bootstrap diode D11 form a high-side floating power supply circuit, which completes the charging of the bootstrap capacitor when the lower bridge arm is turned on, providing an independent drive power supply for the upper bridge arm to be turned on; the resistor in the gate circuit and the parallel diode form a differentiated charging and discharging path, which adjusts the switching speed of the switch transistor and suppresses voltage spikes and electromagnetic interference.

[0039] The inverter bridge circuit includes power switches Q2, Q3, Q4, Q5, Q6, and Q7; resistors R62, R63, R64, R70, R71, R72, R74, R75, R76, R79, R93, R94, R95, R96, R99, and R100; and capacitors C71, C72, and C73. Capacitors C75, C76, and C77, along with connector JP2, and the sources of power switches Q2, Q3, and Q4 are all connected to the VH+ terminal. The gate of power switch Q2 is connected to one end of resistor R93, one end of resistor R62, and terminal G1, respectively. The other end of resistor R93 is connected to one end of capacitor C71, and the other end of capacitor C72 is connected to the other end of resistor R62 and then to terminal A. The drain of power switch Q2 is connected to terminal A and the source of power switch Q5, respectively. The gate of power switch Q3 is connected to one end of resistor R94, one end of resistor R63, and G3. The other end of resistor R94 is connected to one end of capacitor C72. The other ends of resistor R63 and capacitor C72 are both connected to terminal B. The drain of power switch Q3 is connected to terminal B and the source of power switch Q6. The gate of power switch Q4 is connected to one end of resistor R95, one end of resistor R64, and G5. The other end of resistor R95 is connected to one end of capacitor C73. The other ends of resistor R64 and capacitor C73 are both connected to terminal C. The drain of power switch Q4 is connected to terminal C and the source of power switch Q7. The gate of power switch Q5 is connected to one end of resistor R96, one end of resistor R70, and G2 terminal respectively. The other end of resistor R96 is connected to one end of capacitor C75. The other ends of resistor R70 and capacitor C75 are both connected to IuSample terminal. The drain of power switch Q5 is connected to IuSample terminal. IuSample terminal is connected to one end of resistor R75. The other end of resistor R75 is connected to one end of resistor R79. The other end of resistor R79 is connected to VH- terminal. The gate of the power switch Q6 is connected to one end of resistor R99, one end of resistor R71 and G4 respectively. The other end of resistor R99 is connected to one end of capacitor C76. The other ends of resistor R71 and capacitor C76 are both connected to the IvSample terminal. The drain of the power switch Q6 is connected to the IvSample terminal. The IvSample terminal is connected to one end of resistor R76. The other end of resistor R76 is connected to one end of resistor R79. The gate of power switch Q7 is connected to one end of resistor R100, one end of resistor R72, and G6. The other end of resistor R100 is connected to one end of capacitor C77. The other ends of resistor R72 and capacitor C77 are both connected to one end of resistor R79. The drain of power switch Q7 is connected to one end of resistor R79. One end of resistor R74 is connected to VH-, and the other end of resistor R74 is grounded. Pin 1 of connector JP2 is connected to terminal A, pin 2 to terminal B, and pin 3 to terminal C. A three-phase full-bridge topology is used in the inverter bridge. The sources of the three upper-arm power switches are connected to the positive terminal of the high-voltage bus, and the three lower-arm power switches are connected to the negative terminal of the bus through phase current sampling resistors. By controlling the six power switches to turn on and off in an orderly manner according to space vector modulation logic, the high-voltage DC power can be inverted into three-phase AC power with continuously adjustable frequency and amplitude to drive the compressor motor. The series-connected RC network at the gate forms an RC absorption circuit to suppress gate voltage oscillation during switching and improve the reliability of power switch operation.

[0040] The high-voltage power supply filtering and pre-charging circuit includes a power switch Q1, a common-mode inductor L4, diodes D21, D23, D24, D25, and D26, resistors R91, R92, R97, R98, and R116, and capacitors C43, C84, C85, C86, C87, C89, C93, C95, and C114. The VH+1 terminal is connected to one end of capacitor C85, one end of capacitor C89, and the common-mode inductor L4, respectively. Pin 3 of the common mode inductor L4 is connected to the EARTH4 terminal. The other end of capacitor C85 is connected to the EARTH4 terminal. Pin VH-1 is connected to one end of capacitor C86, one end of capacitor C95, and pin 4 of common mode inductor L4. The other end of capacitor C86 is connected to the EARTH4 terminal. The other end of capacitor C89 is connected to the other end of capacitor C95. Pin 2 of common mode inductor L4 is connected to one end of capacitor C84, the anode of diode D21, and pin 2 of power switch Q1. The other end of capacitor C84 is connected to the EARTH3 terminal. Pin 1 of common mode inductor L4 is connected to one end of capacitor C87. The other end of capacitor C87 is connected to the VH- terminal, and the other end of resistor R91, resistor R92, and capacitor C93 are all connected to the cathode of diode D21. The other ends of resistor R91, resistor R92, and capacitor C93 are all connected to the VH+ terminal. Pin 1 of power switch Q1 is connected to the VH+ terminal. Pin 3 of power switch Q1 is connected to the other end of capacitor C114, one end of resistor R97, one end of resistor R98, and one end of resistor R116. The other end of resistor R97 is connected to... Connect the cathodes of diodes D23, D24, and D26. Connect the anode of diode D23 to the HSUBST terminal, the anode of diode D24 to the HSVBST terminal, and the anode of diode D26 to the HSWBST terminal. Connect the other end of capacitor C114 to the other end of resistor R98. Connect the other end of resistor R98 to the anode of diode D25. Connect the cathode of diode D25 to one end of resistor R116. Connect one end of capacitor C43 to the VH+ terminal and the other end of capacitor C43 to the VH- terminal. A common-mode filter network for high-voltage input is formed by using a common-mode inductor L4 and multiple safety capacitors to effectively suppress conducted electromagnetic interference in the high-voltage circuit and meet EMC compliance requirements. The power switch Q1 and the parallel pre-charge resistor form a bus pre-charge circuit. During the initial stage of power-on, Q1 is turned off, and the high-voltage DC current is current-limited to the bus support capacitor through the pre-charge resistor to prevent damage to the capacitor and power devices from the instantaneous large current surge. After pre-charging is completed, Q1 is turned on, and the pre-charge resistor is shorted to enter the normal power supply state. Three independent bootstrap power supply branches provide charging paths for the three-phase upper bridge arm drive circuit, ensuring the continuous stability of the high-end drive power supply.

[0041] The power supply circuit includes a low-voltage input filter circuit, an isolation circuit, and an LDO circuit. The low-voltage input filter circuit, the isolation circuit, and the LDO circuit are electrically connected to each other. The low-voltage input filter circuit includes diodes D1 and D2, common-mode inductors L1, L2, and L6, and capacitors C1, C2, C4, C5, C6, C7, C8, C13, and C14. The LV- terminal is connected to the anode of diode D1, one end of capacitor C4, one end of capacitor C5, and pin 4 of common-mode inductor L1. The LV+ terminal is connected to the anode of diode D2. The cathode of diode D2 is connected to the cathode of diode D1, the other end of capacitor C4, the other end of capacitor C5, and pin 1 of common-mode inductor L1. Pin 3 of common-mode inductor L1 is connected to one end of capacitor C2, one end of capacitor C6, and one end of inductor L2. The other end of capacitor C2 is connected to the EARTH1 terminal. Pin 2 of common-mode inductor L1 is connected to... Connect one end of capacitor C13, the other end of capacitor C6, and one end of inductor L6. Connect the other end of capacitor C13 to the EARTH1 terminal. Connect the other end of inductor L2 to one end of capacitor C1, one end of capacitor C7, and one end of capacitor C8, and connect them to the IGND terminal. Connect the other end of capacitor C1 to the EARTH1 terminal. Connect the other end of inductor L6 to one end of capacitor C14, the other end of capacitor C7, and the other end of capacitor C8, and connect them to the Vbat terminal. Connect the other end of capacitor C14 to the EARTH1 terminal. Diodes D1 and D2 form input reverse connection protection to prevent damage to subsequent circuits from reversed power supply polarity. The common-mode inductor, combined with a multi-stage differential-mode LC filter network, can simultaneously suppress common-mode and differential-mode conducted interference on the low-voltage input side, improving the anti-interference capability of the power input terminal and ensuring a clean power supply to subsequent circuits.

[0042] The isolation circuit includes control chip U3, chip U2, transformer T1, diodes D3, D4, D5, and D6, resistors R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12, and capacitors C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C29, C30, C31, and C3. 2. Capacitor C88; Control chip U3 includes pins GND, SDX / EN, L_COMP, REF, FB, SW, VIN, and PGND; Linear regulator chip U2 includes pins VIN, GND, and VOUT. Pin VIN is connected to Vbat, one end of capacitor C21, one end of capacitor C22, one end of capacitor C23, and one end of resistor R4. The other ends of capacitors C21, C22, and C23 are connected to IGND. Pin SDX / EN... Connect one end of resistor R5, one end of capacitor C25, and one end of resistor R9 respectively. Connect the other end of resistor R5 to the INH terminal. Connect the other ends of capacitor C25 and resistor R9 together to the IGND terminal. Connect pin GND and pin PGND to the IGND terminal. Connect pin L_COMP to one end of resistor R8 and one end of capacitor C26 respectively. Connect the other ends of resistor R8 and capacitor C26 together to the IGND terminal. Connect pin REF to one end of resistor R10. Connect the other end of resistor R10 to the IGND terminal. Connect pin FB to... One end of resistor R7 is connected to pin SW. Pin SW is connected to the anode of diode D5, one end of capacitor C24, and pin 4 of transformer T1. Pins 2 and 1 of transformer T1 are connected, and pins 4 and 5 of transformer T1 are connected. The cathode of diode D5 is connected to the cathode of diode D3, and the anode of diode D3 is connected to Vbat. The other end of capacitor C16 is connected to one end of resistor R4, and the other end of resistor R4 is connected to pin 2 of transformer T1. The other end of capacitor C24 is connected to one end of resistor R11, and the other end of resistor R11 is connected to IGND. Pin 6 of transformer T1 is connected to one end of capacitor C15 and the anode of diode D4. The other end of capacitor C15 is connected to one end of resistor R3. The other end of resistor R3 and the cathode of diode D4 are connected to the 15V terminal. Pins 7 and 8 of transformer T1 are shorted and connected to the anode of diode D6. The cathode of diode D6 is connected to pin VIN of chip U2. The 15V terminal is connected to one end of resistor R6, one end of capacitor C17, one end of capacitor C18, one end of capacitor C19, and one end of capacitor C20. The other ends of capacitors C17, C18, C19, and C20 are all connected to the GND terminal. The other end of resistor R6 is connected to the cathode of diode D6. The VIN pin of chip U2 is connected to the cathode of diode D6, one end of resistor R12, one end of capacitor C29, one end of capacitor C30, and one end of capacitor C32. The other ends of resistor R12, C29, C30, and C32 are all connected to the GND terminal. The GND pin of chip U2 is connected to the GND terminal. The VOUT pin of chip U2 is connected to one end of capacitor C88, one end of capacitor C31, one end of capacitor C27, one end of capacitor C28, and the +3.3V terminal, respectively. The other ends of capacitors C88, C31, C27, and C28 are all connected to the GND terminal. A flyback isolated DC-DC topology is formed by control chip U3 and transformer T1, achieving electrical isolation between the low-voltage input side and the subsequent control and drive sides. The primary-side RCD absorption circuit suppresses voltage spikes when the switching transistor is turned off. The secondary side of the transformer outputs two isolated DC power supplies: one 15V supply directly powers the drive circuit, and the other, after being regulated by linear regulator chip U2, outputs a 3.3V control power supply to power the control chip and sampling circuit.

[0043] The LDO circuit includes chip U1, resistors R1 and R2, capacitors C3, C9, C10, C11, and C12. Chip U1 includes pins VIN, CTL, VOUT, and GND. Pin VIN of chip U1 is connected to one end of resistor R2, one end of capacitor C9, and one end of capacitor C10. The other end of resistor R2 is connected to Vbat. The other ends of capacitors C9 and C10 are connected to IGND. Pin CTL is connected to one end of resistor R1 and one end of capacitor C3. The other end of resistor R1 is connected to INH. The other end of capacitor C3 is connected to IGND. Pin GND is connected to IGND. Pin VOUT is connected to one end of capacitor C11, one end of capacitor C12, and LV_5V. The other ends of capacitors C11 and C12 are connected to IGND. The Vbat voltage is regulated to a stable 5V power supply by chip U1 to power the communication interface and peripheral circuits; the INH signal enables power supply control through the CTL pin, which can shut down the 5V communication power supply in the event of a system fault, thereby improving the system's safety protection level.

[0044] The interlock circuit includes a first filter circuit, an interlock unit, and a plug-in circuit. The first filter circuit includes capacitors C33, C34, C36, C37, C38, C90, C91, C96, and C105; resistors R103, R104, and R105; diode D22; and inductor L5. The IGND terminals are connected to one end of capacitors C37, C38, and C33, respectively. The other ends of capacitors C37 and C38 are connected to the EARTH1 terminal. The other end of capacitor C33 is connected to one end of capacitor C34. The other end of capacitor C34 is connected to one end of capacitor C105. The other end of capacitor C105 is connected to the GND terminal and one end of capacitor C36, respectively. The other end of capacitor C36 is connected to the EARTH2 terminal. The 15V terminal is connected to one end of resistor R103. The other end of resistor R103 is connected to one end of resistor R105, the anode of diode D22, and one end of resistor R104. The other end of resistor R105 is connected to GND. The cathode of diode D22 is connected to the +3.3V terminal. The other end of resistor R104 is connected to one end of capacitor C96 and the AD_15V terminal. The other end of capacitor C96 is connected to GND. The +3.3V terminal is connected to one end of inductor L5. The other end of inductor L5 is connected to one end of capacitor C90, one end of capacitor C91, and the A3.3V terminal. The other ends of capacitors C90 and C91 are connected to GND. A multi-stage safety capacitor is connected between different ground networks to form a safety filtering path to suppress common-mode interference; a resistor voltage divider network performs voltage division sampling on the 15V drive power supply for power supply voltage anomaly monitoring; inductor L5 and matching capacitors form a π-type filter network to provide a low-ripple 3.3V analog power supply for the sampling circuit, further improving sampling accuracy.

[0045] The interlock unit includes connector JP1, resistor R106, and resistor R113. Connector JP1 has pin 1 and pin 2. Pin 1 is connected to one end of resistor R106, and the other end of resistor R106 is connected to the PWM terminal. Pin 2 is connected to one end of resistor R113, and the other end of resistor R113 is connected to the ON / OFF terminal. An external interlock circuit is connected to the system through connector JP1. After passing through the current-limiting resistor, the interlock state is transmitted to the control circuit to achieve hardware-level safety interlock. When the external safety circuit is disconnected, the system immediately locks the drive output, prohibiting the compressor from starting, thus ensuring the safety of equipment maintenance and personnel operation.

[0046] The connector circuit includes connectors P1, CN1, CN2, CN3, and CN4. Connector P1 is a Header 6 type connector, including pins 1, 2, 3, 4, 5, and 6. Pin 1 connects to the CAN_L terminal; pin 2 connects to the CAN_H terminal; pin 3 connects to the LV- terminal; pin 4 connects to the PWM terminal; pin 5 connects to the ON / OFF terminal; and pin 6 connects to the LV+ terminal. Pin 1 of connector CN1 connects to the EARTH1 terminal; pin 1 of connector CN2 connects to the EARTH2 terminal; pin 1 of connector CN3 connects to the EARTH3 terminal; and pin 1 of connector CN4 connects to the EARTH4 terminal. The integrated connector P1 unifies the CAN communication signal, low-voltage power supply, and control signal, simplifying external wiring. Multiple independent grounding connectors correspond to different levels of protective ground and working ground, meeting safety isolation and EMC design requirements and improving the overall grounding reliability.

[0047] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0048] This specific embodiment is merely an explanation of the present invention and is not intended to limit the invention. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but such modifications are protected by patent law as long as they are within the scope of the claims of the present invention.

Claims

1. A compressor control method, characterized in that: Includes the following steps: Step S1: Complete low-voltage power-on and high-voltage power-on initialization, and begin the pre-charge process; Step S2: Perform real-time communication fault detection and high voltage overvoltage fault detection, and if the enable is effective, start the high voltage undervoltage detection subprocess; Step S3: Perform the high voltage and undervoltage detection sub-process. If there is no fault, start the compressor after a delay. Step S4: During compressor operation, fault detection is continuously performed, and shutdown protection is executed when any fault is triggered.

2. The compressor control method according to claim 1, characterized in that: The high-voltage bus undervoltage detection method in step S3: When the bus voltage is below 400V for more than 1 second, an undervoltage fault is reported and the compressor is stopped; when the bus voltage rises to above 420V for more than 2 seconds, the undervoltage fault is automatically cleared.

3. The compressor control method according to claim 2, characterized in that: The communication fault detection method in step S2 is as follows: if no valid external communication message is received for 10 seconds, a communication fault is reported and the compressor is controlled to stop. The high voltage overvoltage fault detection method is as follows: when the bus voltage is higher than 750V and the duration exceeds 1 second, an overvoltage fault is reported and the compressor is controlled to stop.

4. A circuit for a compressor control method according to any one of claims 1-3, characterized in that: It includes sampling circuits, communication circuits, drive circuits, high-voltage power supply filtering and pre-charging circuits, power supply circuits, and interlocking circuits; The sampling circuit is used to collect the phase current, bus current, bus voltage, and temperature parameters of the compressor. The sampling circuit is electrically connected to the drive circuit. The communication circuit is electrically connected to the interlock circuit. The input terminal of the high-voltage power supply filter and pre-charge circuit is connected to the high-voltage DC input for high-voltage input electromagnetic filtering and bus capacitor pre-charging. The power supply circuit is electrically connected to the sampling circuit, communication circuit, drive circuit, high-voltage power supply filter and pre-charge circuit, and interlock circuit respectively. The interlock circuit is used to realize high and low voltage interlock protection and external control interface access.

5. The compressor control method and circuit according to claim 4, characterized in that: The sampling circuit includes a first current acquisition unit, a second current acquisition unit, a third current acquisition unit, a voltage acquisition unit, and a temperature acquisition unit. The first and second current acquisition units have the same structure. The first and second current acquisition units are used to acquire phase current, the third current acquisition unit is used to acquire bus current, and the temperature acquisition unit is used to acquire temperature parameters of the compressor controller.

6. The circuit of the compressor control method according to claim 5, characterized in that: The communication circuit includes a CAN communication unit, a signal circuit, a first input circuit, and a second input circuit. The first input circuit and the second input circuit have the same structure. The CAN communication unit is electrically connected to the signal circuit. The CAN communication unit is used to complete data interaction with an external control unit. The signal circuit is used to perform level conversion and shaping processing on the input communication signal. The first input circuit and the second input circuit are used to control the compressor speed and start / stop, respectively.

7. The circuit of the compressor control method according to claim 4, characterized in that: The drive circuit includes a first drive unit, a second drive unit, a third drive unit, and an inverter bridge circuit. The first drive unit, the second drive unit, and the third drive unit have the same structure and are all connected to the inverter bridge circuit. The first drive unit is used to drive the first bridge arm switch of the inverter bridge circuit, the second drive unit is used to drive the second bridge arm switch of the inverter bridge circuit, and the third drive unit is used to drive the third bridge arm switch of the inverter bridge circuit. The inverter bridge circuit is used to invert high-voltage direct current into three-phase alternating current required for compressor operation.

8. The circuit of the compressor control method according to claim 4, characterized in that: The power supply circuit includes a low-voltage input filter circuit, an isolation circuit, and an LDO circuit. The low-voltage input filter circuit, the isolation circuit, and the LDO circuit are electrically connected to each other. The low-voltage input filter circuit is used to filter the input low-voltage DC power. The isolation circuit is used to achieve electrical isolation between the low-voltage input side and the subsequent circuits. The LDO circuit is used to convert the isolated DC voltage into a stable operating voltage required by each functional circuit.

9. The circuit of the compressor control method according to claim 8, characterized in that: The interlock circuit includes a first filter circuit, an interlock unit, and a plug-in circuit. The first filter circuit is electrically connected to the isolation circuit. The plug-in circuit is electrically connected to the high-voltage power supply filter and pre-charge circuit, the low-voltage input filter circuit, and the second input circuit, respectively. The first filter circuit is used for power supply circuit filtering. The interlock unit is used to perform logical judgment on the received high and low voltage status signals. Only when both the high and low voltage statuses meet the safety conditions is the subsequent control process allowed to start. The plug-in circuit is used to provide an external interface connection for the interlock circuit.

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