A deep-well pump abnormal power-off protection method, system, device and storage medium

Abstract

The application provides a deep-well pump abnormal power-off protection method, system, device and storage medium, and relates to the technical field of deep-well pump control. The method comprises the following steps: detecting an external power supply state, acquiring a bus voltage of a driving board when the external power supply state is abnormally interrupted, judging whether the bus voltage exceeds a first threshold value, executing a software brake when the first threshold value is exceeded, the software brake being to control an inverter switch tube to be turned on so that a motor three-phase winding is short-circuited, monitoring the bus voltage during the execution of the software brake, stopping the execution of the software brake when the bus voltage rises to a second threshold value, and starting a hardware brake, the hardware brake being to connect a braking resistor between positive and negative poles of a direct-current bus, monitoring the bus voltage after the hardware brake is started, stopping the execution of the hardware brake when the bus voltage drops to a third threshold value, and executing the software brake again, and exiting the braking link until the bus voltage continuously falls below the first threshold value. The application improves the protection effect of the deep-well pump abnormal power-off.

Description

Technical Field

[0001] This invention relates to the field of deep well pump control technology, and more specifically, to a method, system, device, and storage medium for abnormal power failure protection of a deep well pump. Background Technology

[0002] In the field of deep well pump drive control, when the external power supply is abnormally interrupted and the pump body structure is not equipped with a check valve, a water column of 100 meters underground will backflow, driving the impeller and motor rotor to rotate continuously, causing the motor to operate in a generator state. The generated back electromotive force is fed back to the DC bus via the inverter, causing the bus voltage to rise sharply. In severe cases, it can exceed the withstand voltage limit of the power devices on the drive board and damage the equipment. Therefore, existing technologies mainly determine whether it is in a generator state by detecting the bus voltage amplitude, and activate the braking resistor to discharge energy when the voltage is too high; or use a short-circuit braking method to short-circuit the three-phase windings of the motor to consume mechanical energy.

[0003] In related technologies, the difficulty in identifying backflow generation after an abnormal power outage leads to inappropriate intervention timing of protection mechanisms. Furthermore, while short-circuit braking can consume mechanical energy to some extent, continuous operation results in significant temperature rise in the motor windings, which can accelerate insulation aging and even cause burnout risks with prolonged and repeated use. Relying solely on resistive energy dissipation lacks the ability to flexibly adjust braking intensity based on dynamic changes in bus voltage, easily leading to insufficient energy release or voltage drops due to excessive discharge. Therefore, existing solutions struggle to balance efficiency and safety. In conclusion, existing technologies cannot meet the practical needs for timely, accurate, and safe protection of deep well pump drive plates under abnormal power outage and backflow conditions. Summary of the Invention

[0004] The problem addressed by this invention is how to improve the protection effect against abnormal power failure in deep well pumps.

[0005] To address the aforementioned problems, this invention provides a method, system, device, and storage medium for abnormal power failure protection of deep well pumps.

[0006] In a first aspect, the deep well pump abnormal power failure protection method of the present invention includes: S1: Detect the external power supply status, and when the external power supply status is abnormally interrupted, obtain the bus voltage of the drive board; S2: Determine whether the bus voltage exceeds the first threshold; and when the bus voltage exceeds the first threshold, execute software braking, wherein the software braking is to control the inverter switching transistor to conduct so that the three-phase windings of the motor are short-circuited; S3: During the execution of the software braking, the bus voltage is monitored; and when the bus voltage rises to the second threshold, the software braking is stopped and the hardware braking is started, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus. S4: After the hardware brake is activated, the bus voltage is monitored; and when the bus voltage drops to the third threshold, the hardware brake is stopped and the software brake is activated again. S5: Repeat steps S2 to S4 until the bus voltage is continuously lower than the first threshold, then exit the braking phase; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

[0007] Optionally, the step of detecting the external power supply status and obtaining the bus voltage of the driver board when the external power supply status is abnormally interrupted includes: Detect the voltage signal at the external AC power supply terminal; The external AC power supply is interrupted based on the voltage signal. When the external AC power supply is interrupted, the voltage value across the DC bus capacitor of the drive board is collected and the voltage value is used as the bus voltage. The bus voltage is used to characterize whether the deep well pump is in a reverse power generation state after the external power supply is interrupted.

[0008] Optionally, determining whether the external AC power supply is interrupted based on the voltage signal includes: Obtain the voltage sampling value of the external AC power supply terminal; The voltage sample value is compared with a preset power outage determination threshold. When the voltage sample value is lower than the preset power outage determination threshold for a consecutive preset number of sampling periods, the external AC power supply is determined to be interrupted. The voltage sample value includes at least one of the effective voltage value, peak voltage value, or average voltage value after rectification and filtering at the external AC power supply terminal.

[0009] Optionally, when the bus voltage exceeds the first threshold, software braking is executed. The software braking involves controlling the inverter switching transistors to turn on, thereby short-circuiting the three-phase windings of the motor, including: When the bus voltage exceeds the first threshold, the lower bridge arm switch of the inverter is controlled to conduct with a preset duty cycle, so that the three-phase windings of the motor are short-circuited through the lower bridge arm to perform energy-saving braking on the motor. The preset duty cycle is dynamically adjusted according to the amplitude of the bus voltage; the higher the bus voltage, the larger the preset duty cycle.

[0010] Optionally, during the execution of the software braking, the bus voltage is monitored, and when the bus voltage rises to a second threshold, the software braking is stopped and hardware braking is initiated. The hardware braking involves connecting a braking resistor between the positive and negative terminals of the DC bus, including: During the execution of the software braking, the bus voltage is continuously collected at a preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has risen to the second threshold. When the bus voltage rises to the second threshold, the output of the software brake control signal used to control the conduction of the inverter switching transistor is stopped, so as to stop the short-circuit braking of the three-phase winding of the motor; and a switching signal for triggering the switching to the hardware brake is generated. In response to the switching signal, a hardware brake enable signal is output to the drive circuit. The drive circuit controls the switching transistor connected in series in the branch where the braking resistor is located to turn on, so that the braking resistor is connected between the positive and negative terminals of the DC bus.

[0011] Optionally, after activating the hardware brake, monitoring the bus voltage; and when the bus voltage drops to a third threshold, stopping the hardware brake and re-activating the software brake, includes: During the execution of the hardware braking, the bus voltage is continuously collected according to the preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has dropped to the third threshold. When the bus voltage drops to the third threshold, the output of the hardware brake enable signal to the drive circuit is stopped, so as to control the switch in the branch where the braking resistor is connected to turn off, so that the braking resistor is disconnected from the positive and negative terminals of the DC bus. Simultaneously, the software braking control signal is re-output to control the lower bridge arm switch of the inverter to conduct with the preset duty cycle, so that the three-phase windings of the motor are short-circuited again, and the software braking is executed again.

[0012] Optionally, the step of cyclically executing the above-described switching control steps between software braking and hardware braking until the bus voltage remains below the first threshold, and then exiting the braking phase, includes: During each switch to perform the software braking or the hardware braking, the bus voltage is continuously collected at the preset sampling frequency; During the cyclic switching control of the software braking and the hardware braking, it is determined in real time whether the bus voltage is continuously lower than the first threshold. When the bus voltage remains below the first threshold for a period of time that reaches a preset time threshold, it is determined that the backflow power generation state has been eliminated. In response to the judgment that the reverse power generation state has been eliminated, the output of the software brake control signal and the output of the hardware brake enable signal are stopped to exit the braking phase. Wherein, the preset time threshold is greater than or equal to the sampling period of the bus voltage.

[0013] Secondly, the present invention provides a deep well pump abnormal power failure protection system, comprising: The power supply detection unit is used to detect the external power supply status and, when the external power supply status is abnormally interrupted, to obtain the bus voltage of the drive board. The software braking execution unit is used to determine whether the bus voltage exceeds a first threshold; and when the bus voltage exceeds the first threshold, it executes software braking, wherein the software braking is to control the inverter switching transistor to turn on so as to short-circuit the three-phase windings of the motor. The first monitoring and switching unit is used to monitor the bus voltage during the execution of the software braking; and when the bus voltage rises to a second threshold, to stop the execution of the software braking and start the hardware braking, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus. The second monitoring and switching unit is used to monitor the bus voltage after the hardware braking is activated; and when the bus voltage drops to a third threshold, to stop the hardware braking and then activate the software braking again. A cyclic control unit is used to cyclically execute the control steps from the software braking execution unit to the second monitoring switching unit until the bus voltage is continuously lower than the first threshold, then the braking phase is exited; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

[0014] Thirdly, an electronic device according to the present invention includes: a processor and a memory, the memory being used to store a computer program; When the computer program is loaded by the processor, it causes the processor to execute the aforementioned deep well pump abnormal power failure protection method.

[0015] Fourthly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the above-described method for protecting a deep well pump from abnormal power failure is implemented.

[0016] The deep well pump abnormal power failure protection method, system, equipment and storage medium of the present invention can accurately identify the backflow power generation condition after abnormal power failure by detecting the external power supply status and obtaining the bus voltage when abnormal interruption occurs. This avoids the problem of inappropriate intervention timing of the protection mechanism caused by simply relying on the bus voltage amplitude, and ensures that the protection action is triggered only under the actual backflow condition, thereby improving the pertinence and reliability of the protection mechanism.

[0017] By setting a first threshold as the activation condition for software braking and monitoring whether the bus voltage rises to a second threshold during the software braking process, real-time assessment of the backflow energy accumulation is achieved. When the bus voltage exceeds the second threshold, hardware braking is switched in a timely manner, effectively preventing the bus voltage from continuing to rise and exceeding the withstand voltage limit of the power devices, thus ensuring the safety of key components on the drive board.

[0018] By stopping the hardware braking and switching back to the software braking when the bus voltage drops to the third threshold, the alternating cyclic control of software braking and hardware braking is realized. This avoids the problems of significant temperature rise of motor windings, accelerated insulation aging, and even burnout caused by relying solely on the continuous action of short-circuit braking (software braking). It also overcomes the defects of insufficient energy release or excessive discharge causing voltage drop due to the lack of dynamic adjustment capability of relying solely on resistor energy dissipation (hardware braking).

[0019] By cyclically switching between software braking and hardware braking, the braking process is only discontinued when the bus voltage remains below the first threshold. This ensures that the braking intensity is adaptively adjusted to the dynamic changes in the bus voltage throughout the entire backflow energy release process, guaranteeing both braking efficiency and system safety. This achieves a comprehensive protection effect for the deep well pump drive plate that is timely, accurate, and safe. Attached Figure Description

[0020] Figure 1 This is a flowchart illustrating the deep well pump abnormal power failure protection method according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of the deep well pump abnormal power failure protection system according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0021] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Although some embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present invention. It should be understood that the accompanying drawings and embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of protection of the present invention.

[0022] It should be understood that the various steps described in the method embodiments of the present invention may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present invention is not limited in this respect.

[0023] The term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to"; the term "based on" means "at least partially based on"; the term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments"; and the term "optionally" means "optional embodiments". Definitions of other terms will be given in the following description. It should be noted that the concepts of "first," "second," etc., mentioned in this invention are used only to distinguish different devices, modules, or units, and are not intended to limit the order of functions performed by these devices, modules, or units or their interdependencies.

[0024] It should be noted that the terms "a" and "a plurality of" used in this invention are illustrative rather than restrictive. Those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0025] Combination Figure 1 As shown in the figure, an embodiment of the present invention provides a method for abnormal power failure protection of a deep well pump, comprising: S1: Detect the external power supply status, and when the external power supply status is abnormally interrupted, obtain the bus voltage of the driver board.

[0026] Specifically, the external power supply status is detected by real-time acquisition of the voltage signal from the external AC power supply terminal through a voltage sampling circuit, and the acquired voltage signal is judged by a software algorithm. When an external AC power supply interruption is detected, the bus voltage of the drive board is obtained. This bus voltage is the voltage across the DC bus capacitor of the drive board, which is used to characterize whether the deep well pump is in a reverse-flow generation state after the external power supply interruption. The software algorithm can use methods such as mean filtering or hysteresis comparison to eliminate misjudgments caused by voltage fluctuations. For example, when the external AC power supply is normal, the bus voltage is kept stable after rectification by the external power supply. However, when the external power supply is abnormally interrupted and the deep well pump experiences reverse flow, the motor is in a generation state and feeds back the back electromotive force to the DC bus, causing the bus voltage to rise accordingly. Through this step, the reverse flow condition after the abnormal power outage can be accurately identified in the first instance, providing an accurate triggering premise for subsequent protection actions.

[0027] S2: Determine whether the bus voltage exceeds the first threshold; and when the bus voltage exceeds the first threshold, execute software braking, wherein the software braking is to control the inverter switching transistor to conduct so that the three-phase windings of the motor are short-circuited.

[0028] Specifically, the acquired bus voltage is compared with a preset first threshold. If the bus voltage exceeds the first threshold, software braking is triggered. This software braking involves controlling the lower arm switch of the inverter to conduct with a preset duty cycle, short-circuiting the three-phase windings of the motor through the lower arm, thereby performing energy-consuming braking on the motor to dissipate the mechanical energy generated by backflow. The first threshold is a safety threshold for determining whether to enter the braking phase, and it is pre-calibrated based on the withstand voltage characteristics of the power devices on the drive board and the safe operating range of the system. Optionally, the preset duty cycle can be dynamically adjusted according to the amplitude of the bus voltage. The higher the bus voltage, the larger the preset duty cycle, to enhance the braking intensity. For example, when the bus voltage is 600V, the preset duty cycle can be set to 50%, while when the bus voltage rises to 650V, the preset duty cycle can be increased to 70% to achieve initial adaptive adjustment of the braking intensity.

[0029] S3: During the execution of the software braking, the bus voltage is monitored; and when the bus voltage rises to the second threshold, the software braking is stopped and the hardware braking is started, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus.

[0030] Specifically, during the software braking process, the bus voltage is continuously sampled at a preset sampling frequency, and it is determined in real time whether the bus voltage has risen to the second threshold. When the bus voltage rises to the second threshold, the output of the software braking control signal used to control the inverter switching transistors is immediately stopped to stop the short-circuit braking of the motor's three-phase windings, thus avoiding excessive temperature rise of the motor windings due to continuous short-circuit braking. At the same time, in response to this switching signal, a hardware braking enable signal is output to the drive circuit. The drive circuit controls the switching transistor connected in series in the branch where the braking resistor is located to turn on, so that the braking resistor is connected to the positive DC bus. Between the negative terminals; the braking resistor converts the electrical energy generated by the reverse power generation into heat energy for discharge, thereby quickly suppressing the further rise of the bus voltage; wherein, the second threshold is the upper limit of the voltage used to trigger the switch to hardware braking, which is greater than the first threshold and less than the maximum withstand voltage of the power device on the drive board, so as to ensure timely switching of braking mode within the safe range of the power device; for example, if the withstand voltage of the power tube is 1200V, the first threshold is 540V, and the second threshold can be set to 700V, which ensures timely switching before the voltage rises further, and also reserves sufficient safety margin for the connection of hardware braking.

[0031] S4: After the hardware brake is activated, the bus voltage is monitored; and when the bus voltage drops to the third threshold, the hardware brake is stopped and the software brake is activated again.

[0032] Specifically, after the hardware braking is initiated, the bus voltage continues to be continuously sampled at a preset sampling frequency, and it is determined in real time whether the bus voltage has dropped to the third threshold. When the bus voltage drops to the third threshold, the output of the hardware braking enable signal to the drive circuit is immediately stopped to control the switch in the branch where the braking resistor is connected in series to turn off, so that the braking resistor is disconnected from the positive and negative poles of the DC bus, avoiding excessive voltage drop due to excessive discharge. At the same time, the software braking control signal is re-output to control the lower bridge arm switch of the inverter to conduct with a preset duty cycle, so that the three-phase windings of the motor are short-circuited again, and the software braking is executed again to continue to consume the remaining mechanical energy. The third threshold is less than or equal to the first threshold, and it is used to control when the hardware braking is disengaged and when the software braking is re-engaged. For example, if the third threshold is set to 500V, when the hardware braking discharges the bus voltage to 500V, the braking resistor is disconnected and the system switches back to software braking, thereby achieving a smooth connection between the two braking methods, which ensures discharge efficiency and prevents system instability caused by excessive voltage drop.

[0033] S5: Repeat steps S2 to S4 until the bus voltage is continuously lower than the first threshold, then exit the braking phase; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

[0034] Specifically, the process follows steps S2 to S4 in a cyclical manner. During each switch between software braking and hardware braking, the bus voltage is continuously monitored at a preset sampling frequency, and the braking action for the next stage is decided in real time based on the current threshold range of the bus voltage. During the cyclical switching control between software braking and hardware braking, it is determined in real time whether the bus voltage remains below the first threshold. When the bus voltage remains below the first threshold for a preset time threshold, it is determined that the backflow generation state has been eliminated. In response to this determination, the output of the software braking control signal is stopped, and the output of the hardware braking enable signal is simultaneously stopped to completely shut down the system. All braking measures are closed, and the braking phase is exited. A preset time threshold is set to be greater than or equal to the bus voltage sampling period to prevent false exits due to instantaneous voltage fluctuations. For example, the preset sampling frequency is 1kHz, and the preset time threshold can be set to 100ms. This means that the safe exit condition is met only when the bus voltage is below the first threshold for 100 consecutive sampling periods. Furthermore, after exiting the braking phase, the system continues to monitor the bus voltage. If external power supply has not yet been restored and the bus voltage exceeds the first threshold again due to other factors, the system can re-enter the braking phase at any time, achieving continuous full-cycle protection.

[0035] For example, a deep well pump is installed 100 meters underground, and the pump body structure does not have a check valve. The rated voltage of the DC bus capacitor of the drive board is 800V, and the maximum withstand voltage of the inverter power transistor is 1200V. The system is preset with the following settings: first threshold U1 is 540V, second threshold U2 is 700V, third threshold U3 is 500V, preset sampling frequency is 1kHz, and preset time threshold is 100ms (i.e., 100 consecutive sampling cycles).

[0036] In the initial state, the deep well pump operates with normal external AC power supply, and the DC bus voltage is stable at around 540V. The power supply detection unit continuously collects the voltage signal from the external AC power supply terminal and compares the sampled voltage value with a preset power failure judgment threshold to determine whether the external power supply is normal.

[0037] Suppose that at time t0, the external AC power supply is suddenly and abnormally interrupted. Since the deep well pump lacks a check valve, water from a 100-meter column begins to backflow. This reverse water flow drives the impeller and motor rotor to rotate continuously, causing the motor to enter generator mode. The resulting back electromotive force is fed back to the DC bus capacitor via the inverter, and the bus voltage gradually increases from 540V. The power supply detection unit detects that the effective voltage at the external AC power supply terminal remains below the power outage threshold for several consecutive sampling periods, thus determining that the external AC power supply has been abnormally interrupted. Simultaneously, the bus voltage monitoring unit obtains the current bus voltage as 580V.

[0038] Upon entering stage S2, the system compares the acquired bus voltage of 580V with the first threshold U1=540V, determining that 580V exceeds 540V, thus meeting the conditions for entering the braking phase. The system then triggers software braking, controlling the inverter's lower arm switch to conduct with a preset duty cycle of 50%, short-circuiting the motor's three-phase windings through the lower arm to perform energy-dissipative braking on the motor to consume the mechanical energy generated by the backflow.

[0039] During the S3 phase, while the software braking is in effect, the bus voltage monitoring unit continuously samples the bus voltage at a sampling frequency of 1kHz. Although the software braking provides some energy-saving braking, the bus voltage continues to rise due to the large potential energy of the backflow water column. When the bus voltage reaches 700V, the system determines that the bus voltage has risen to the second threshold U2, immediately stops outputting the software braking control signal, and releases the short-circuit braking of the three-phase windings. Simultaneously, the system outputs a hardware braking enable signal to the drive circuit, controlling the MOS switch in the branch where the braking resistor is located to turn on, connecting the braking resistor between the positive and negative terminals of the DC bus. This begins to convert the electrical energy generated by the backflow power generation into heat energy for discharge, and the rising trend of the bus voltage is immediately curbed and gradually decreases.

[0040] Entering stage S4, during the hardware braking execution, the bus voltage monitoring unit continues to collect the bus voltage at a sampling frequency of 1kHz. When the collected bus voltage drops to 500V, the system determines that the bus voltage has dropped to the third threshold U3, immediately stops outputting the hardware braking enable signal, controls the MOS switch in the braking resistor branch to turn off, and disconnects the braking resistor from the positive and negative terminals of the DC bus; at the same time, it re-outputs the software braking control signal, controls the inverter lower bridge arm switch to turn on again with a preset duty cycle, re-short-circuits the three-phase windings of the motor, and executes software braking again to continue consuming the remaining mechanical energy.

[0041] Entering stage S5, the system cyclically executes the aforementioned switching control process. In the first cycle, when the bus voltage rises from 540V to 700V, the system switches from software braking to hardware braking; subsequently, when the bus voltage is discharged to 500V, the system switches back from hardware braking to software braking. In the second cycle, the system repeats the above process, switching to hardware braking again when the bus voltage rises from 540V to 700V, and switching back to software braking when it drops to 500V. This switching is repeated, and each cycle further consumes the potential energy of the backflowing water column, gradually reducing the motor rotor speed. In each cycle, the system dynamically adjusts the preset duty cycle of the software braking according to the current bus voltage amplitude: when the bus voltage approaches 700V, the duty cycle is appropriately increased to 70% to enhance braking intensity; when the bus voltage just drops to 540V, the duty cycle is appropriately decreased to 40% to avoid excessive braking. After several cycles, when the rotor speed drops to a low level, the back electromotive force generated by the motor is insufficient to significantly raise the bus voltage. At this point, the bus voltage monitoring unit detects that the bus voltage is below 540V for 100 consecutive sampling cycles (i.e., 100ms). Based on this, the system determines that the backflow generation state has been eliminated, and immediately stops outputting software brake control signals and hardware brake enable signals, completely shutting down all braking measures and exiting the braking phase. Subsequently, since the motor has stopped or is running at extremely low speed, the backflow voltage decreases further, and the main control board power supply voltage naturally drops below a safe value.

[0042] After exiting the braking phase, the system continues to monitor the bus voltage. If the bus voltage exceeds 540V again due to residual water hammer or other factors, the system will immediately re-enter the braking phase and execute the cyclic control process from S2 to S5 again to achieve continuous protection throughout the entire cycle. Furthermore, in other optional embodiments of the present invention, the third threshold U3 can also be set equal to the first threshold U1, for example, both set to 540V. In this case, when the hardware braking discharges the bus voltage to 540V, it switches back to software braking, thus achieving a smooth transition between the two braking methods. The specific value of the third threshold can be flexibly configured based on the withstand voltage characteristics of the power devices on the driver board, the power parameters of the braking resistor, and the system's tolerance to voltage drop amplitude. The present invention does not impose specific limitations on this.

[0043] The deep well pump abnormal power failure protection method in this embodiment can accurately identify the backflow power generation condition after an abnormal power failure by detecting the external power supply status and obtaining the bus voltage when the power supply is abnormally interrupted. This avoids the problem of inappropriate intervention timing of the protection mechanism caused by simply relying on the bus voltage amplitude. It ensures that the protection action is triggered only under the actual backflow condition, thereby improving the pertinence and reliability of the protection mechanism.

[0044] By setting a first threshold as the activation condition for software braking and monitoring whether the bus voltage rises to a second threshold during the software braking process, real-time assessment of the backflow energy accumulation is achieved. When the bus voltage exceeds the second threshold, hardware braking is switched in a timely manner, effectively preventing the bus voltage from continuing to rise and exceeding the withstand voltage limit of the power devices, thus ensuring the safety of key components on the drive board.

[0045] By stopping the hardware braking and switching back to the software braking when the bus voltage drops to the third threshold, the alternating cyclic control of software braking and hardware braking is realized. This avoids the problems of significant temperature rise of motor windings, accelerated insulation aging, and even burnout caused by relying solely on the continuous action of short-circuit braking (software braking). It also overcomes the defects of insufficient energy release or excessive discharge causing voltage drop due to the lack of dynamic adjustment capability of relying solely on resistor energy dissipation (hardware braking).

[0046] By cyclically switching between software braking and hardware braking, the braking process is only discontinued when the bus voltage remains below the first threshold. This ensures that the braking intensity is adaptively adjusted to the dynamic changes in the bus voltage throughout the entire backflow energy release process, guaranteeing both braking efficiency and system safety. This achieves a comprehensive protection effect for the deep well pump drive plate that is timely, accurate, and safe.

[0047] Optionally, the step of detecting the external power supply status and obtaining the bus voltage of the driver board when the external power supply status is abnormally interrupted includes: Detect the voltage signal at the external AC power supply terminal; The external AC power supply is interrupted based on the voltage signal. When the external AC power supply is interrupted, the voltage value across the DC bus capacitor of the drive board is collected and the voltage value is used as the bus voltage. The bus voltage is used to characterize whether the deep well pump is in a reverse power generation state after the external power supply is interrupted.

[0048] Specifically, the voltage signal from the external AC power supply is acquired in real time through a voltage sampling circuit. This voltage sampling circuit can be set on the AC input side of the driver board to convert the voltage amplitude of the external AC power into a low-voltage signal that can be recognized by the microprocessor. Then, the acquired voltage signal is compared with a preset power-off judgment threshold to determine whether the external AC power supply has been interrupted. The voltage signal can be any one of the effective voltage value, peak voltage value, or average voltage value after rectification and filtering of the external AC power supply. The power-off judgment threshold is pre-calibrated according to the corresponding signal type. In order to improve the accuracy of the judgment, the external AC power supply is finally determined to be interrupted only when the voltage signal is detected to be lower than the power-off judgment threshold for a consecutive preset number of sampling periods. For example, if the sampling frequency is set to 1kHz, the power supply interruption is confirmed when the voltage sampling value is lower than the power-off judgment threshold for 50 consecutive sampling periods (i.e., 50ms), so as to eliminate the misjudgment that may be caused by instantaneous voltage fluctuations. When an external AC power supply interruption is confirmed, the voltage value across the DC bus capacitor on the drive board is immediately acquired through the bus voltage sampling circuit and used as the bus voltage. This bus voltage is used to characterize whether the deep well pump is in a reverse-flow generation state after the external power supply is interrupted. When the external power supply is abnormally interrupted and the deep well pump experiences reverse flow, the motor is in a generation state and feeds back the back electromotive force to the DC bus. The bus voltage will be significantly higher than the steady-state value under normal power supply. Therefore, the severity of the reverse-flow generation condition can be accurately identified by the amplitude of the bus voltage. For example, when the external AC power supply is normal, the DC bus voltage is stable at around 540V. However, when the external power supply is interrupted and reverse flow occurs, the bus voltage will gradually rise from 540V to 600V, 700V, or even higher. Based on this, it is possible to clearly determine whether reverse flow has occurred and its severity. Furthermore, since the external power supply has been interrupted, the DC power on the drive board at this time comes entirely from the back electromotive force feedback generated by the reverse power generation. Therefore, there are no interference factors such as sudden changes in the power grid. The sampled value of the bus voltage truly reflects the accumulation state of the reverse energy, providing a reliable data basis for the precise intervention of the subsequent braking stage.

[0049] In this optional embodiment, by first detecting the voltage signal at the external AC power supply terminal and determining whether the external AC power supply is interrupted, and only acquiring the bus voltage after confirming a power outage, it is possible to effectively distinguish between voltage fluctuations when the external power supply is normal and bus voltage increases caused by backflow. This avoids the problem of inappropriate intervention timing of protection mechanisms due to the difficulty in identifying backflow generation conditions after abnormal power outages in existing technologies. Simultaneously, by comparing the collected voltage signal with a preset power outage judgment threshold, and only determining a power outage when the signal is consistently below the threshold for a preset number of consecutive sampling periods, time redundancy effectively eliminates misjudgments that may be caused by instantaneous voltage fluctuations, improving the accuracy and reliability of power supply status detection. In addition, by collecting the voltage value across the DC bus capacitor as the bus voltage, and using this bus voltage to characterize the reverse power generation status, the system can accurately identify whether reverse power generation has occurred and its severity immediately after a power outage. Since the external power supply has been interrupted, the DC power on the drive board at this time comes entirely from the back electromotive force feedback generated by the reverse power generation, and there are no interference factors such as sudden changes in the power grid. The sampled value of the bus voltage truly reflects the accumulation state of the reverse energy, providing a reliable data basis for the precise intervention of subsequent software braking and hardware braking coordinated protection actions. This achieves precise matching between the protection mechanism triggering timing and the reverse power generation condition, effectively avoiding over-protection or under-protection, and improving the pertinence and effectiveness of the entire protection strategy.

[0050] Optionally, determining whether the external AC power supply is interrupted based on the voltage signal includes: Obtain the voltage sampling value of the external AC power supply terminal; The voltage sample value is compared with a preset power outage determination threshold. When the voltage sample value is lower than the preset power outage determination threshold for a consecutive preset number of sampling periods, the external AC power supply is determined to be interrupted. The voltage sample value includes at least one of the effective voltage value, peak voltage value, or average voltage value after rectification and filtering at the external AC power supply terminal.

[0051] Specifically, the voltage sample value from the external AC power supply terminal is acquired. This voltage sample value can be at least one of the following: the effective value of the voltage, the peak value of the voltage, or the average value of the voltage after rectification and filtering. The specific signal type selected depends on the design of the voltage sampling circuit. For example, when the voltage sampling circuit uses an RMS conversion chip, the effective value of the voltage can be directly acquired; when a peak detection circuit is used, the peak value of the voltage can be acquired; and when a rectification and filtering circuit is used, the average value of the voltage after rectification and filtering can be acquired. Then, the acquired voltage sample value is compared with a preset power-off judgment threshold. This preset power-off judgment threshold is pre-calibrated based on the type of voltage sample value selected and the normal fluctuation range of the external power supply. For example, when the external AC power supply is normal, it is 220V±10%. If the effective value of the voltage is selected as the sample value, the preset power-off judgment threshold can be set to 70% to 80% of the rated effective value, such as 150V. That is, when the effective value of the voltage is lower than 150V, the power supply is considered to be interrupted. To ensure reliable judgment and prevent false alarms caused by instantaneous power grid fluctuations or voltage dips, the system only determines that external AC power supply has been interrupted when the voltage sample value remains below a preset power outage threshold for a consecutive preset number of sampling periods. Both the sampling period and the preset number can be flexibly set according to the actual power grid environment. For example, a sampling frequency of 1kHz (i.e., a sampling period of 1ms) and a preset number of 50 sampling periods (i.e., consecutive 50ms) can be used. Only when the voltage sample value collected for 50 consecutive times is below the preset power outage threshold is the external AC power supply confirmed to be interrupted. Alternatively, if the power grid experiences frequent instantaneous fluctuations, the preset number can be increased to 100 sampling periods to further improve anti-interference capabilities. If a faster interruption response is required, the preset number can be reduced to 20 sampling periods to improve detection sensitivity. This judgment method ensures real-time power outage detection and effectively eliminates false triggers caused by instantaneous voltage fluctuations or power grid dips, thus improving the reliability of the system protection.

[0052] In this optional embodiment, the voltage sample value is compared with a preset power outage judgment threshold, and a power outage is determined only when the voltage is lower than the threshold for a consecutive preset number of sampling periods. By using the logic and judgment of multiple consecutive sampling results, the risk of misjudgment caused by interference factors such as instantaneous fluctuations in the power grid or voltage dips is effectively eliminated, and the accuracy of power outage detection is improved. At the same time, the voltage sample value can be flexibly selected from at least one of the effective voltage value, voltage peak value, or voltage average value after rectification and filtering, so that the judgment method can be adapted to different types of voltage sampling circuits, with good versatility and adaptability, providing a reliable triggering premise for accurate identification of subsequent backflow conditions and timely intervention of braking protection.

[0053] Optionally, when the bus voltage exceeds the first threshold, software braking is executed. The software braking involves controlling the inverter switching transistors to turn on, thereby short-circuiting the three-phase windings of the motor, including: When the bus voltage exceeds the first threshold, the lower bridge arm switch of the inverter is controlled to conduct with a preset duty cycle, so that the three-phase windings of the motor are short-circuited through the lower bridge arm to perform energy-saving braking on the motor. The preset duty cycle is dynamically adjusted according to the amplitude of the bus voltage; the higher the bus voltage, the larger the preset duty cycle.

[0054] Specifically, when the bus voltage exceeds the first threshold, the system triggers software braking, which controls the inverter's lower arm switch to conduct with a preset duty cycle, shorting the three-phase windings of the motor through the lower arm, thereby performing energy-consuming braking on the motor. The inverter's lower arm switch is usually an IGBT or MOSFET, with one switch for each phase lower arm. When all three lower arms are turned on simultaneously, the three-phase windings are shorted. At this time, the motor rotor continues to rotate under the drive of the backflowing water column, and the stator winding generates an induced current in the rotating magnetic field. This induced current interacts with the rotor magnetic field to generate a reverse braking torque, thereby converting the mechanical energy generated by the backflow into electrical energy and then into heat energy on the windings for consumption. The preset duty cycle is dynamically adjusted according to the amplitude of the bus voltage. The higher the bus voltage, the stronger the back electromotive force and the greater the mechanical energy generated by the backflow. At this time, a larger duty cycle is required to enhance the strength of the short-circuit braking. For example, when the bus voltage is 580V (just exceeding the first threshold of 540V), the preset duty cycle can be set to 40% to provide moderate braking strength to avoid impact. When the bus voltage rises to 650V, the preset duty cycle increases to 60% to enhance the braking effect and suppress the voltage from continuing to rise. When the bus voltage approaches 700V, the preset duty cycle further increases to 75% to maximize the consumption of mechanical energy and slow down the rate of voltage rise. Optionally, the specific value of the preset duty cycle can be achieved through a lookup table. This involves pre-storing a table showing the correspondence between bus voltage ranges and duty cycle values ​​in the system, allowing the system to obtain the corresponding duty cycle in real-time based on the current bus voltage. Alternatively, it can be achieved through PID control. This involves using the deviation between the bus voltage and a first threshold as input, performing PID calculations, and outputting a duty cycle control value. Higher bus voltages and larger deviations result in a larger output duty cycle, thus achieving continuous adaptive adjustment of braking intensity. Through this dynamic adjustment mechanism, the software brake can provide matching braking effects under different backflow intensities, avoiding excessive braking at low voltages leading to current surges and insufficient braking force at high voltages leading to protection failures.

[0055] In this optional embodiment, the three-phase windings are short-circuited by controlling the inverter's lower bridge arm switch to conduct with a preset duty cycle. This eliminates the need for additional braking components, allowing the inverter itself to achieve energy-saving braking. The structure is simple and the response is rapid. At the same time, the preset duty cycle is dynamically adjusted according to the bus voltage amplitude, and the higher the bus voltage, the larger the duty cycle. This ensures that the braking intensity is matched to the strength of the backflow energy in real time, avoiding unnecessary current surges and winding heating caused by a fixed duty cycle at low voltages, and insufficient braking force at high voltages. This improves the adaptability and effectiveness of software braking under different operating conditions.

[0056] Optionally, during the execution of the software braking, the bus voltage is monitored, and when the bus voltage rises to a second threshold, the software braking is stopped and hardware braking is initiated. The hardware braking involves connecting a braking resistor between the positive and negative terminals of the DC bus, including: During the execution of the software braking, the bus voltage is continuously collected at a preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has risen to the second threshold. When the bus voltage rises to the second threshold, the output of the software brake control signal used to control the conduction of the inverter switching transistor is stopped, so as to stop the short-circuit braking of the three-phase winding of the motor; and a switching signal for triggering the switching to the hardware brake is generated. In response to the switching signal, a hardware brake enable signal is output to the drive circuit. The drive circuit controls the switching transistor connected in series in the branch where the braking resistor is located to turn on, so that the braking resistor is connected between the positive and negative terminals of the DC bus.

[0057] Specifically, during software braking, the system continuously samples the bus voltage at a preset sampling frequency. This preset sampling frequency needs to balance the system's response speed and the controller's computational load, and can be flexibly set according to actual needs. For example, in conventional applications, it can be set to 1kHz, that is, the bus voltage is sampled once every 1ms. In scenarios requiring higher response speed, it can be set to 5kHz or 10kHz to capture the changing trend of the bus voltage more promptly. Based on the sampled bus voltage, the system determines in real time whether the bus voltage has risen to a second threshold. This second threshold is greater than the first threshold and less than the maximum withstand voltage of the power devices on the driver board. The specific value can be comprehensively calibrated based on the withstand voltage margin of the power devices and the thermal capacity of the braking resistor. For example, when the power transistor withstand voltage is 1200V and the first threshold is 540V, the second threshold can be set to 700V, that is, the bus voltage is allowed to rise from 540V to 700V under software braking, and within this range, the power devices are still in a safe operating range. When the bus voltage rises to the second threshold, the system immediately stops outputting the software braking control signal used to control the inverter switching transistors to turn on. This clears the drive pulse of the inverter lower bridge arm switching transistor, restoring the three-phase windings from a short-circuited state to an open-circuit state, thereby stopping the short-circuit braking of the motor's three-phase windings and preventing the motor windings from overheating due to continuous short-circuit braking, which would accelerate insulation aging. At the same time, the system generates a switching signal to trigger the switch to hardware braking. This switching signal can be a software flag or a hardware interrupt trigger signal. In response to the switching signal, the system outputs a hardware braking enable signal to the drive circuit. This drive circuit is typically implemented using an isolated drive circuit composed of transistors or optocouplers, used to control the conduction of the switching transistor connected in series in the branch containing the braking resistor. The switching transistor is usually a MOSFET or IGBT, and its gate is controlled by the level output by the drive circuit. When the enable signal is received, the switching transistor conducts, connecting the braking resistor between the positive and negative terminals of the DC bus. This braking resistor is a power resistor, and its resistance and power are pre-selected according to the maximum braking power requirement of the system. For example, for a system with a maximum bus voltage of 700V and a desired discharge power of 2kW, a braking resistor with a resistance of approximately 250Ω and a power of 2.5kW can be selected. After being connected, the braking resistor converts the electrical energy generated by the reverse-flow generator into heat energy for rapid discharge, thereby suppressing the continued rise of the bus voltage and ensuring that the power devices always operate within a safe voltage range.

[0058] In this optional embodiment, by continuously monitoring the bus voltage at a preset sampling frequency during software braking, the dynamic trend of the bus voltage can be grasped in real time, providing timely and accurate data for the decision to switch braking modes. When the bus voltage rises to the second threshold, software braking is immediately stopped and hardware braking is switched. This avoids the problem of excessive temperature rise of the motor windings caused by continuous short-circuit braking, and the energy is quickly discharged by the braking resistor to suppress further rise of the bus voltage, ensuring that the power devices always operate within the safe voltage range. This achieves seamless connection between the two braking modes in terms of time and function.

[0059] Optionally, after activating the hardware brake, monitoring the bus voltage; and when the bus voltage drops to a third threshold, stopping the hardware brake and re-activating the software brake, includes: During the execution of the hardware braking, the bus voltage is continuously collected according to the preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has dropped to the third threshold. When the bus voltage drops to the third threshold, the output of the hardware brake enable signal to the drive circuit is stopped, so as to control the switch in the branch where the braking resistor is connected to turn off, so that the braking resistor is disconnected from the positive and negative terminals of the DC bus. Simultaneously, the software braking control signal is re-output to control the lower bridge arm switch of the inverter to conduct with the preset duty cycle, so that the three-phase windings of the motor are short-circuited again, and the software braking is executed again.

[0060] Specifically, during the hardware braking process, the system continuously collects the bus voltage at a preset sampling frequency. This preset sampling frequency is consistent with the sampling frequency during the software braking process to ensure that the data sampling in the hardware braking phase and the software braking phase have the same resolution and comparability. For example, when the sampling frequency is set to 1kHz in the software braking phase, the hardware braking phase also uses a sampling frequency of 1kHz, that is, the bus voltage is collected once every 1ms. Based on the collected bus voltage, the system determines in real time whether the bus voltage has dropped to the third threshold. This third threshold is less than or equal to the first threshold. For example, if the first threshold is 540V, the third threshold can be set to 500V. That is, the braking resistor needs to discharge the bus voltage from the second threshold of 700V to 500V before allowing the hardware braking to be disengaged. The specific value of the third threshold needs to take into account two factors. If the value is too high (close to the first threshold), the bus voltage may quickly rise back to the second threshold after switching back to software braking, resulting in too frequent switching. If the value is too low, a longer discharge time is required, which increases the thermal burden on the braking resistor. Therefore, a compromise can be made based on the power parameters of the braking resistor and the system's requirements for the switching frequency, for example, between 500V and 540V. When the bus voltage drops to the third threshold, the system immediately stops outputting the hardware brake enable signal to the drive circuit to control the switch in the branch where the braking resistor is connected in series to turn off, so that the braking resistor is disconnected from the positive and negative terminals of the DC bus, avoiding excessive voltage drop due to excessive discharge. At the same time, the system re-outputs the software brake control signal to control the lower bridge arm switch of the inverter to conduct with a preset duty cycle, so that the three-phase windings of the motor are short-circuited again, and the software brake is executed again to continue to consume the remaining mechanical energy. The preset duty cycle used when re-executing the software brake can be re-determined according to the amplitude of the current bus voltage. Since the bus voltage has dropped to 500V at this time, which is far below the first threshold of 540V, it indicates that the reverse energy has been initially consumed. The preset duty cycle can be set to a lower value, such as 30%, to continue braking in a smooth manner and avoid excessive current surge caused by a sudden connection of a large duty cycle short circuit.

[0061] In this optional embodiment, by promptly disconnecting the braking resistor and switching back to software braking when the bus voltage drops to the third threshold, the problem of excessive bus voltage drop and system instability caused by the continuous connection of the braking resistor is avoided. At the same time, the software braking is re-executed with a preset duty cycle, which can smoothly continue to consume the remaining mechanical energy after the hardware braking. This achieves a smooth alternation between hardware braking and software braking and a phased and orderly release of energy, improving the smoothness and safety of braking.

[0062] Optionally, the step of cyclically executing the above-described switching control steps between software braking and hardware braking until the bus voltage remains below the first threshold, and then exiting the braking phase, includes: During each switch to perform the software braking or the hardware braking, the bus voltage is continuously collected at the preset sampling frequency; During the cyclic switching control of the software braking and the hardware braking, it is determined in real time whether the bus voltage is continuously lower than the first threshold. When the bus voltage remains below the first threshold for a period of time that reaches a preset time threshold, it is determined that the backflow power generation state has been eliminated. In response to the judgment that the reverse power generation state has been eliminated, the output of the software brake control signal and the output of the hardware brake enable signal are stopped to exit the braking phase. Wherein, the preset time threshold is greater than or equal to the sampling period of the bus voltage.

[0063] Specifically, during each switch between software braking and hardware braking, the system continuously acquires the bus voltage at a preset sampling frequency. For example, when the preset sampling frequency is 1kHz, regardless of whether the system is in the software braking or hardware braking phase, it continuously acquires the real-time value of the bus voltage at a rate of once every 1ms, ensuring that the monitoring of the bus voltage is not interrupted or has a blind spot due to the switching of braking methods. During the cyclic switching control process between software braking and hardware braking, the system determines in real time whether the bus voltage is continuously lower than a first threshold. That is, in each sampling cycle, the system compares the currently acquired bus voltage with the first threshold and records the number of consecutive samplings or the continuous duration of the bus voltage being lower than the first threshold. When the bus voltage remains below the first threshold for a preset time threshold, the system determines that the backflow generation state has been eliminated. The preset time threshold is greater than or equal to the bus voltage sampling period. For example, when the sampling frequency is 1kHz and the sampling period is 1ms, the preset time threshold can be set to 100ms. This means that the bus voltage needs to be detected as below the first threshold for 100 consecutive sampling periods (100ms) before the exit condition is met, rather than exiting immediately after only one or a few samplings below the threshold, thus avoiding false exits due to instantaneous fluctuations in the bus voltage. In response to the determination that the backflow generation state has been eliminated, the system stops outputting the software braking control signal and simultaneously stops outputting the hardware braking enable signal. That is, the inverter's lower bridge arm switch drive pulse is completely blocked, and the switch in the branch containing the braking resistor is also turned off. All braking measures are completely shut down to exit the braking phase. Optionally, the specific value of the preset time threshold can be adjusted according to the different requirements of the system for exit response speed and anti-interference capability. If a fast exit is required to reduce energy loss during braking, the preset time threshold can be set to a shorter value, such as 20ms. If the power grid environment where the system is located has high noise and the bus voltage sampling is easily interfered with, the preset time threshold can be appropriately extended to 200ms to improve the reliability of exit judgment.

[0064] In this optional embodiment, by continuously monitoring the bus voltage during the cyclic switching control process and determining whether it is continuously lower than the first threshold, the backflow is eliminated and braking is exited only when the preset time threshold is reached. The time redundancy judgment effectively avoids false exit caused by instantaneous fluctuations in the bus voltage, ensuring that the braking circuit will not terminate prematurely when the backflow energy is not fully discharged. At the same time, after exiting, all braking measures are completely shut down, avoiding unnecessary energy consumption and device heat loss, and achieving a safe and stable termination of the braking process.

[0065] Combination Figure 2 As shown, an embodiment of the present invention provides a deep well pump abnormal power failure protection system, comprising: The power supply detection unit is used to detect the external power supply status and, when the external power supply status is abnormally interrupted, to obtain the bus voltage of the drive board. The software braking execution unit is used to determine whether the bus voltage exceeds a first threshold; and when the bus voltage exceeds the first threshold, it executes software braking, wherein the software braking is to control the inverter switching transistor to turn on so as to short-circuit the three-phase windings of the motor. The first monitoring and switching unit is used to monitor the bus voltage during the execution of the software braking; and when the bus voltage rises to a second threshold, to stop the execution of the software braking and start the hardware braking, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus. The second monitoring and switching unit is used to monitor the bus voltage after the hardware braking is activated; and when the bus voltage drops to a third threshold, to stop the hardware braking and then activate the software braking again. A cyclic control unit is used to cyclically execute the control steps from the software braking execution unit to the second monitoring switching unit until the bus voltage is continuously lower than the first threshold, then the braking phase is exited; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

[0066] The advantages of the deep well pump abnormal power failure protection system of the present invention compared with the prior art are the same as the advantages of the above-mentioned deep well pump abnormal power failure protection method compared with the prior art, and will not be repeated here.

[0067] Combination Figure 3 As shown, an electronic device according to an embodiment of the present invention includes: a processor and a memory, wherein the memory is used to store computer programs; When the computer program is loaded by the processor, it causes the processor to execute the aforementioned deep well pump abnormal power failure protection method.

[0068] The electronic device of the present invention has the same advantages over the prior art as the above-mentioned deep well pump abnormal power failure protection method over the prior art, and will not be repeated here.

[0069] An embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method for protecting a deep well pump from abnormal power failure.

[0070] The computer-readable storage medium of the present invention has the same advantages over the prior art as the above-mentioned deep well pump abnormal power failure protection method over the prior art, and will not be repeated here.

[0071] While the present invention has been disclosed above, its scope of protection is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, and all such changes and modifications will fall within the scope of protection of the present invention.

Claims

1. A method for abnormal power failure protection of a deep well pump, characterized in that, include: S1: Detect the external power supply status, and when the external power supply status is abnormally interrupted, obtain the bus voltage of the drive board; S2: Determine whether the bus voltage exceeds the first threshold; and when the bus voltage exceeds the first threshold, execute software braking, wherein the software braking is to control the inverter switching transistor to conduct so that the three-phase windings of the motor are short-circuited; S3: During the execution of the software braking, the bus voltage is monitored; and when the bus voltage rises to the second threshold, the software braking is stopped and the hardware braking is started, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus. S4: After the hardware brake is activated, the bus voltage is monitored; and when the bus voltage drops to the third threshold, the hardware brake is stopped and the software brake is activated again. S5: Repeat steps S2 to S4 until the bus voltage is continuously lower than the first threshold, then exit the braking phase; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

2. The method for abnormal power failure protection of a deep well pump according to claim 1, characterized in that, The detection of the external power supply status, and the acquisition of the bus voltage of the driver board when the external power supply is abnormally interrupted, includes: Detect the voltage signal at the external AC power supply terminal; The external AC power supply is interrupted based on the voltage signal. When the external AC power supply is interrupted, the voltage value across the DC bus capacitor of the drive board is collected and the voltage value is used as the bus voltage. The bus voltage is used to characterize whether the deep well pump is in a reverse power generation state after the external power supply is interrupted.

3. The method for abnormal power failure protection of a deep well pump according to claim 2, characterized in that, The step of determining whether the external AC power supply is interrupted based on the voltage signal includes: Obtain the voltage sampling value of the external AC power supply terminal; The voltage sample value is compared with a preset power outage determination threshold. When the voltage sample value is lower than the preset power outage determination threshold for a consecutive preset number of sampling periods, the external AC power supply is determined to be interrupted. The voltage sample value includes at least one of the effective voltage value, peak voltage value, or average voltage value after rectification and filtering at the external AC power supply terminal.

4. The method for abnormal power failure protection of a deep well pump according to claim 1, characterized in that, When the bus voltage exceeds the first threshold, software braking is executed. Software braking involves controlling the inverter switching transistors to short-circuit the three-phase windings of the motor, including: When the bus voltage exceeds the first threshold, the lower bridge arm switch of the inverter is controlled to conduct with a preset duty cycle, so that the three-phase windings of the motor are short-circuited through the lower bridge arm to perform energy-saving braking on the motor. The preset duty cycle is dynamically adjusted according to the amplitude of the bus voltage; the higher the bus voltage, the larger the preset duty cycle.

5. The method for abnormal power failure protection of a deep well pump according to claim 4, characterized in that, During the execution of the software braking process, the bus voltage is monitored, and when the bus voltage rises to a second threshold, the software braking is stopped and hardware braking is initiated. The hardware braking involves connecting a braking resistor between the positive and negative terminals of the DC bus, including: During the execution of the software braking, the bus voltage is continuously collected at a preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has risen to the second threshold. When the bus voltage rises to the second threshold, the output of the software brake control signal used to control the conduction of the inverter switching transistor is stopped, so as to stop the short-circuit braking of the three-phase winding of the motor; and a switching signal for triggering the switching to the hardware brake is generated. In response to the switching signal, a hardware brake enable signal is output to the drive circuit. The drive circuit controls the switching transistor connected in series in the branch where the braking resistor is located to turn on, so that the braking resistor is connected between the positive and negative terminals of the DC bus.

6. The method for abnormal power failure protection of a deep well pump according to claim 5, characterized in that, After initiating the hardware braking, the bus voltage is monitored; and when the bus voltage drops to a third threshold, the hardware braking is stopped, and the software braking is executed again, including: During the execution of the hardware braking, the bus voltage is continuously collected according to the preset sampling frequency; Based on the collected bus voltage, it is determined in real time whether the bus voltage has dropped to the third threshold. When the bus voltage drops to the third threshold, the output of the hardware brake enable signal to the drive circuit is stopped, so as to control the switch in the branch where the braking resistor is connected to turn off, so that the braking resistor is disconnected from the positive and negative terminals of the DC bus. Simultaneously, the software braking control signal is re-output to control the lower bridge arm switch of the inverter to conduct with the preset duty cycle, so that the three-phase windings of the motor are short-circuited again, and the software braking is executed again.

7. The method for abnormal power failure protection of a deep well pump according to claim 6, characterized in that, The cycle of executing the above-described software braking and hardware braking switching control steps until the bus voltage remains below the first threshold, then exiting the braking phase, includes: During each switch to perform the software braking or the hardware braking, the bus voltage is continuously collected at the preset sampling frequency; During the cyclic switching control of the software braking and the hardware braking, it is determined in real time whether the bus voltage is continuously lower than the first threshold. When the bus voltage remains below the first threshold for a period of time that reaches a preset time threshold, it is determined that the backflow power generation state has been eliminated. In response to the judgment that the reverse power generation state has been eliminated, the output of the software brake control signal and the output of the hardware brake enable signal are stopped to exit the braking phase. Wherein, the preset time threshold is greater than or equal to the sampling period of the bus voltage.

8. A deep well pump abnormal power failure protection system, characterized in that, include: The power supply detection unit is used to detect the external power supply status and, when the external power supply status is abnormally interrupted, to obtain the bus voltage of the drive board. The software braking execution unit is used to determine whether the bus voltage exceeds a first threshold; and when the bus voltage exceeds the first threshold, it executes software braking, wherein the software braking is to control the inverter switching transistor to turn on so as to short-circuit the three-phase windings of the motor. The first monitoring and switching unit is used to monitor the bus voltage during the execution of the software braking; and when the bus voltage rises to a second threshold, to stop the execution of the software braking and start the hardware braking, wherein the hardware braking is to connect the braking resistor connected between the positive and negative terminals of the DC bus. The second monitoring and switching unit is used to monitor the bus voltage after the hardware braking is activated; and when the bus voltage drops to a third threshold, to stop the hardware braking and then activate the software braking again. A cyclic control unit is used to cyclically execute the control steps from the software braking execution unit to the second monitoring switching unit until the bus voltage is continuously lower than the first threshold, then the braking phase is exited; wherein, the first threshold is less than the second threshold, and the third threshold is less than or equal to the first threshold.

9. An electronic device, characterized in that, include: Processor and memory, the memory being used to store computer programs; When the computer program is loaded by the processor, it causes the processor to execute the deep well pump abnormal power failure protection method as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the deep well pump abnormal power failure protection method as described in any one of claims 1 to 7.

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