Display module and display device

Abstract

The application provides a display module and a display device. The display module comprises a display panel and a backlight module arranged on the back of the display panel. The backlight module comprises a backlight lamp plate. The backlight lamp plate comprises a glass substrate and a plurality of light emitting chips. The surface of the glass substrate is provided with a first conductor and a second conductor which are electrically connected with the light emitting chips, are arranged adjacently and have a potential difference. The first conductor and the second conductor are flatly arranged on the surface of the glass substrate and extend on the glass substrate along respective extension directions. The first conductor and / or the second conductor are provided with a geometric perturbation structure along the extension direction, so as to block a continuous electrolyte path between the first conductor and the second conductor, so that the length of a continuous path segment between the first conductor and the second conductor in the extension direction is less than a critical path length. Based on the embodiment of the application, the continuous electrolyte water film and the directional electric field between the conductors can be broken, the electrochemical migration corrosion can be inhibited and the product reliability can be improved without reducing the wiring density.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to display modules and display devices. Background Technology

[0002] In recent years, with the rapid development of micron-level light-emitting diode (Mini-LED) display technology, the market has placed higher demands on the reliability and wiring density of single-layer copper trace backlight products on glass substrates. Typically, in backlight boards, adjacent copper traces with potential differences are often laid out in parallel straight lines over long distances. Under high temperature and humidity environments, these traces are prone to forming continuous adsorbed water films and directional electric fields, which can trigger electrochemical migration corrosion and lead to short circuits or abnormal lighting. However, simply increasing the trace spacing will reduce the wiring density.

[0003] Therefore, how to suppress electrochemical migration corrosion while ensuring high wiring density is a technical problem that urgently needs to be solved in the current display technology field. Summary of the Invention

[0004] This application provides a display module and display device that can break the continuous electrolyte water film and directional electric field between conductors, thereby suppressing electrochemical migration corrosion and improving product reliability without reducing wiring density.

[0005] In a first aspect, a display module is provided, comprising a display panel and a backlight module disposed on the back of the display panel. The backlight module includes a backlight board, which includes a glass substrate and a plurality of light-emitting chips arranged in an array on the glass substrate. A first conductor and a second conductor, electrically connected to the light-emitting chips and arranged adjacently with a potential difference, are disposed on the surface of the glass substrate. The first conductor and the second conductor are flat against the surface of the glass substrate and extend along their respective extension directions on the glass substrate. The first conductor and / or the second conductor are provided with a geometric disturbance structure along their extension directions to block the continuous electrolyte path between the first conductor and the second conductor, thereby reducing the length of the continuous path segment between the first conductor and the second conductor in the extension direction. Less than the critical path length .

[0006] In conjunction with the first aspect, in some implementations of the first aspect, the geometric perturbation structure includes an offset segment disposed on the first conductor and / or the second conductor; a first spacing between the first conductor and the second conductor at the offset segment is greater than or equal to a second spacing at the non-offset segment, so as to divide the parallel trace region between the first conductor and the second conductor into multiple segments, each with a length less than the critical path length. Continuous path segments.

[0007] In conjunction with the first aspect, in some implementations of the first aspect, the offset segment of the first conductor and the offset segment of the second conductor are offset toward the same side perpendicular to the extension direction, so that the first spacing is equal to the second spacing.

[0008] In conjunction with the first aspect, in some implementations of the first aspect, multiple offset segments are periodically distributed in the extension direction.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the geometric perturbation structure includes setting the first conductor and / or the second conductor as a broken line structure, a sawtooth structure, or a wavy structure.

[0010] In conjunction with the first aspect, in some implementations of the first aspect, both the first conductor and the second conductor adopt a sawtooth structure, and the path tortuosity of the sawtooth structure is... satisfy: Among them, path tortuosity It is the ratio of the actual path length of the sawtooth structure to the horizontal span length in the extension direction.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the path tortuosity of the sawtooth structure satisfy: .

[0012] In conjunction with the first aspect, in some implementations of the first aspect, the length of the continuous path segment is the geometric length or horizontal span length of the first conductor and the second conductor in the extension direction.

[0013] In conjunction with the first aspect, in some implementations of the first aspect, both the first conductor and the second conductor are single-layer copper traces; critical path length The range of values ​​for satisfies: .

[0014] In conjunction with the first aspect, in some implementations of the first aspect, the second spacing d between the first conductor and the second conductor satisfies: .

[0015] In conjunction with the first aspect, in some implementations of the first aspect, the first conductor and the second conductor include multiple components, each light-emitting chip is connected across the corresponding first conductor and the second conductor, and the anode and cathode at the bottom of the light-emitting chip are electrically connected to the corresponding first conductor and the second conductor, respectively.

[0016] In conjunction with the first aspect, in some implementations of the first aspect, the backlight board further includes a driver chip; the first conductor is a power line for providing anode power to the light-emitting chip, or a signal line for providing power to the driver chip; the second conductor is a signal line, data line, or clock line for providing control signals, data signals, or clock signals to the driver chip.

[0017] In a second aspect, a display device is provided, the display device including a housing and a display module according to any one of the first aspects, the housing forming a receiving cavity; the display module being received in the receiving cavity to provide display content to the display device.

[0018] The display module provided in this application alters the spatial geometric extension morphology of the conductors on the glass substrate surface by setting a geometric disturbance structure along the extension direction of the first conductor and / or the second conductor. This geometric disturbance breaks the physical environment of continuous adsorption of water film electrolyte between the original long-distance parallel traces, blocking the continuity of the continuous electrolyte path. At the same time, the length of the continuous path segment between the two conductors in the extension direction is controlled within a preset critical path length, so that the continuous physical link of ions migrating towards the opposite electrode under the drive of the electric field is divided into short-distance discrete local regions. This weakens the driving force for the directional migration of metal ions in the conductor towards the cathode and the deposition of dendrites, thereby reducing the probability of electrochemical migration corrosion, slowing down the growth rate of trace leakage current, delaying short circuits and lamp abnormalities caused by electrochemical migration, and thus improving product reliability. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the structure of a display module proposed in an embodiment of this application.

[0020] Figure 2 This is a partial cross-sectional schematic diagram of a display module proposed in an embodiment of this application.

[0021] Figure 3 This is a partial cross-sectional schematic diagram of another display module proposed in the embodiments of this application.

[0022] Figure 4 This is a partial cross-sectional schematic diagram of another display module proposed in the embodiments of this application.

[0023] Figure 5 This is a partial cross-sectional schematic diagram of another display module proposed in the embodiments of this application.

[0024] Figure 6 This is a partial cross-sectional schematic diagram of another display module proposed in the embodiments of this application.

[0025] Figure 7 This is a partial cross-sectional schematic diagram of another display module proposed in the embodiments of this application.

[0026] Figure 8 This is a schematic diagram showing the relationship between the length of the continuous path segment and the electrochemical migration failure time in the embodiments of this application.

[0027] Figure 9This is a schematic diagram of the structure of a display device proposed in an embodiment of this application.

[0028] Explanation of reference numerals in the attached figures: Display module 100, backlight module 10, lower polarizer 20, array substrate 30, liquid crystal layer 40, color filter substrate 50, upper polarizer 60; display panel 70; first conductor 80; second conductor 90; glass substrate 11; geometric disturbance structure 12; offset section 13; parallel trace area 14; housing 117; display device 200; backlight panel 15; light-emitting chip 16; driver chip 17. Detailed Implementation

[0029] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0030] This application will present various aspects, embodiments, or features relating to a system comprising multiple devices, components, modules, etc. It should be understood and appreciated that individual systems may include additional devices, components, modules, etc., and / or may not include all the devices, components, modules, etc. discussed in conjunction with the accompanying drawings. Furthermore, combinations of these approaches are also possible.

[0031] Furthermore, in the embodiments of this application, the words "exemplary," "for example," etc., are used to indicate that they are examples, illustrations, or descriptions. Any embodiment or design scheme described as "exemplary" in the embodiments of this application should not be construed as being better or more advantageous than other embodiments or design schemes. Specifically, the use of the term "exemplary" is intended to present the concept in a concrete manner.

[0032] The business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0033] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0034] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0035] Figure 1 This is a schematic diagram of the structure of a display module 100 proposed in an embodiment of this application.

[0036] like Figure 1 As shown, this application embodiment provides a display module 100. Specifically, this application embodiment is described using the display module 100 including a display panel and a backlight module 10 as an example. The display module 100 includes a backlight module 10, a lower polarizer 20, an array substrate 30, a liquid crystal layer 40, a color filter substrate 50, and an upper polarizer 60 arranged sequentially; wherein, the array substrate 30, the liquid crystal layer 40, and the color filter substrate 50 together constitute the display panel of the display module 100.

[0037] Specifically, the backlight module 10 is disposed at the bottom layer of the display module 100 to provide a uniform surface light source. The backlight module 10 includes a glass substrate, a driving circuit disposed on the surface of the glass substrate, and an array of light-emitting devices. A first conductor 80 and a second conductor 90 are disposed adjacently on the surface of the glass substrate and have a potential difference. The first conductor 80 and the second conductor 90 are flat against the surface of the glass substrate and extend on the glass substrate along their respective extension directions.

[0038] A lower polarizer 20 is attached to the upper surface of the backlight module 10 to convert the natural light emitted by the backlight module 10 into linearly polarized light. The transmission axis of the lower polarizer 20 is along the first polarization direction. An array substrate 30 (i.e., a TFT substrate) is disposed above the lower polarizer 20. The array substrate 30 includes a first glass substrate, a thin-film transistor array formed on the first glass substrate, pixel electrodes, data lines, scan lines, and an alignment film (not specifically shown in the figure). The array substrate 30 is used to apply a voltage to each pixel to drive the liquid crystal molecules in the liquid crystal layer 40 to twist. The liquid crystal layer 40 is sandwiched between the array substrate 30 and the color filter substrate 50. The liquid crystal layer 40 contains nematic liquid crystal molecules, which change their alignment direction under the action of an applied electric field, thereby changing the rotation angle of the polarized light passing through it. A color filter substrate 50 (i.e., CF substrate) is disposed above the liquid crystal layer 40. The color filter substrate 50 includes a second glass substrate, a black matrix formed on the second glass substrate, color resists (including red, green, and blue color resists), a common electrode, and an alignment film (not specifically shown in the figure). The black matrix is ​​used to block light leakage in the non-display area and prevent color mixing between different color resists. The color resists are used to filter the backlight into red, green, and blue primary colors. An upper polarizer 60 is attached to the upper surface of the color filter substrate 50. The transmission axis of the upper polarizer 60 is perpendicular to the transmission axis of the lower polarizer 20 (i.e., intersecting) to form a normally black mode; in other embodiments, the transmission axes of the two can also be arranged parallel to form a normally white mode. The upper polarizer 60 is used to analyze the polarization state of the light after passing through the liquid crystal layer 40 and determine whether the light is emitted, thereby forming a bright and dark image in the display area. In recent years, with the rapid development of display technology, the market has placed increasingly higher demands on the reliability and wiring density of display backlight products and high-density integrated circuits.

[0039] In the backlight module or substrate wiring of display modules, a single-layer metal (e.g., single-layer copper) wiring structure is often used to reduce thickness and cost. The surface of the glass substrate has strong hydrophilicity, and it easily forms a continuous adsorbed water film under high temperature and humidity environments. When adjacent traces with a high potential difference (e.g., power traces and signal traces) are arranged parallel over a long distance, a stable directional electric field and a continuous electrolyte path are easily formed. Under these conditions, metal ions in the high-potential conductor easily migrate and deposit to the low-potential conductor under the drive of the electric field, initiating electrochemical migration corrosion, leading to abnormal lighting, a surge in leakage current, or even short-circuit failure.

[0040] Furthermore, while electrochemical migration risks are typically mitigated by simply increasing the spacing between conductors, backlight modules require the arraying and integration of thousands of tiny light-emitting chips on a glass substrate to achieve highly precise localized light control. In such high-density backlight modules, the wiring spacing between the first and second conductors is usually compressed to the micrometer level. Under this high-density layout, increasing the spacing between the first and second conductors to mitigate electrochemical migration risks would reduce the wiring density of the substrate, making it difficult to meet the layout requirements of high-density display driving and precise backlight zoning.

[0041] Specifically, to eliminate localized dark areas on the backlight's light-emitting surface and ensure uniform light emission, the die-bonding spacing between adjacent light-emitting chips is compressed to an extremely small range, and the pin positions at the bottom of the light-emitting chips are strictly limited by physical dimensions. Increasing the lateral wiring spacing of the conductors would prevent the traces from accurately aligning with the chip electrodes, or would encroach on the die-bonding areas of adjacent chips, disrupting the optical zoning layout of the backlight module. Secondly, an insulating layer covers the conductors, with tiny soldering openings only at the soldering locations. Increasing the trace spacing would result in insufficient safety margin between the boundary of the insulating openings and the edge of the metal traces, easily causing solder bridging and short circuits during die bonding and reflow soldering, reducing process yield. In addition, besides the light-emitting chips, the backlight board also contains power lines, data lines, and signal lines of the driver chips. On a glass substrate with single-layer copper wiring, the wiring channels are extremely limited. Blindly increasing the spacing of a certain type of conductor will inevitably squeeze the passage space of other signal lines, preventing the entire backlight board from achieving high-density circuit topology wiring. However, under the strong electric field of micron-level wiring spacing and high operating voltage, electrochemical migration corrosion is easily triggered. That is, in a closed and humid environment, a small amount of water is adsorbed on the surface of the glass substrate to form a continuous, extremely thin water film electrolyte. When the first conductor and the second conductor with a high potential difference extend parallel to each other over a long distance, the metal on the first conductor (e.g., the anode) is oxidized and dissolved into metal ions under the strong electric field, and then migrates directionally to the second conductor (e.g., the cathode) in the water film electrolyte. The metal dendrites are reduced and deposited on the cathode and grow into dendritic metal dendrites, which then penetrate the wiring gap, resulting in a surge in wiring leakage current, abnormal lighting of the light-emitting chip, and even short-circuit failure.

[0042] Therefore, how to block electrochemical migration paths and inhibit metal ion corrosion while ensuring the substrate wiring density is a technical problem that urgently needs to be solved in the current display technology field.

[0043] Figure 2 This is a partial cross-sectional schematic diagram of a display module 100 proposed in an embodiment of this application. Figure 3 This is a partial cross-sectional schematic diagram of another display module 100 proposed in the embodiments of this application. Figure 4 This is a partial cross-sectional schematic diagram of another display module 100 proposed in this application embodiment. Wherein, Figure 2The following explanation uses a 3-column LED chip 16 as an example. Each column can be equipped with multiple LED chips 16. Figure 3 The following example uses two columns of LED chips 16, with each column containing three LED chips 16, for illustration.

[0044] like Figures 1 to 4 As shown, this application embodiment provides a display module 100, which includes a display panel 70 and a backlight module 10 disposed on the back of the display panel 70. The backlight module 10 includes a backlight board 15, which includes a glass substrate 11 and a plurality of light-emitting chips 16 arranged on the glass substrate 11. A first conductor 80 and a second conductor 90 electrically connected to the light-emitting chips 16, arranged adjacently and having a potential difference, are disposed on the surface of the glass substrate 11. The first conductor 80 and the second conductor 90 are flatly attached to the surface of the glass substrate 11 and extend along their respective directions ( Figure 3 The first conductor 80 and / or the second conductor 90 are provided with a geometric disturbance structure 12 along the extension direction to block the continuous electrolyte path between the first conductor 80 and the second conductor 90, thereby reducing the length of the continuous path segment between the first conductor 80 and the second conductor 90 in the extension direction. Less than the critical path length .

[0045] It should be understood that, such as Figure 4 As shown, the length of the continuous path segment This can include the length L1 of the non-offset segment or the length L2 of the offset segment 13; wherein, L1 and L2 each satisfy that they are less than or equal to the critical path length. .

[0046] It should be understood that L2 refers to the horizontal span length between the first conductor 80 and the second conductor 90 in the extension direction, or in other words, L2 is the length of the first conductor 80 and the second conductor 90 in the direction of electric field driving ( Figure 2 The projection length (in the Y direction) of the first conductor 80 and the second conductor 90 within the plane of the glass substrate 11. Alternatively, L2 refers to the physical length obtained by projecting the actual trace segment of the geometric disturbance structure 12 (such as a sawtooth structure, a zigzag structure, or a wavy structure) of the first conductor 80 and the second conductor 90 perpendicularly into the direction perpendicular to the extension direction (i.e., the electric field driving direction / lateral direction from the high-potential conductor to the low-potential conductor). The display panel 70 includes a display area and a non-display area surrounding the display area. In this embodiment, the first conductor 80 and the second conductor 90 can be disposed in the non-display area for transmitting drive current or control signals; alternatively, the first conductor 80 and the second conductor 90 can also be disposed in the display area (such as the gridded light-emitting area of ​​the backlight module 10) to provide power supply and signal control for light-emitting devices (such as Mini-LED chips).

[0047] The potential difference between the first conductor 80 and the second conductor 90 refers to the voltage difference between the first conductor 80 and the second conductor 90 when the display module 100 is powered on or transmitting signals.

[0048] In some embodiments, such as Figure 2 and Figure 3 As shown, the first conductor 80 and the second conductor 90 include multiple components, and each light-emitting chip 16 is connected across the corresponding first conductor 80 and second conductor 90. The anode and cathode at the bottom of the light-emitting chip 16 are electrically connected to the corresponding first conductor 80 and second conductor 90, respectively. For example, the anode and cathode at the bottom of the light-emitting chip 16 can be connected to the first conductor 80 and the second conductor 90, respectively, through flip-chip bonding pads.

[0049] Figure 5 This is a partial cross-sectional schematic diagram of another display module 100 proposed in the embodiments of this application.

[0050] In some embodiments, such as Figure 5 As shown, the backlight panel 15 also includes a driver chip 17; the first conductor 80 is a power line for providing anode power to the light-emitting chip 16, or a signal line for providing power to the driver chip 17; the second conductor 90 is a signal line, data line, or clock line for providing control signals, data signals, or clock signals to the driver chip 17.

[0051] For example, the first conductor 80 can be a power supply line with an operating voltage of [voltage value missing]. The second conductor 90 can be a signal line, with an operating voltage of [voltage value missing]. .

[0052] For example, the first conductor 80 is a high-voltage power supply line, such as a power supply line with an operating voltage of 24V; the second conductor 90 can be a low-voltage signal line, such as a data output line or clock signal line with an operating voltage of 1.8V or 3.3V.

[0053] The driver chip 17 is bonded to the surface edge or partition control area of ​​the glass substrate 11 and is used to output drive current and control signals to perform time-division or partition light emission control on multiple light-emitting chips 16.

[0054] To achieve high-density circuit integration in the backlight panel 15, a first conductor 80 and a second conductor 90 are arranged in parallel on the surface of the glass substrate 11. Both the first conductor 80 and the second conductor 90 are flatly attached to the surface of the glass substrate 11. The first conductor 80 and the second conductor 90 perform different electrical functions, resulting in the following two implementation methods: like Figure 5As shown, in the first embodiment, the first conductor 80 is configured as an anode power line (VLED), directly connected to the power management module and the anode pads on the bottom of each LED chip 16, for transmitting the high-voltage driving voltage of the LED. The operating voltage of the anode power line is 12V to 36V. The second conductor 90 is configured as a signal line, data line, or clock line, one end of which is electrically connected to the signal pin of the driver chip 17, and the other end extends along the extension direction (X direction) to other driver chips or the main control board, for transmitting high-frequency control signals, data signals, or clock signals. The operating voltage of the data line and clock line is 0V to 3.3V.

[0055] In this scenario, the first conductor 80 and the second conductor 90 are arranged adjacently and in parallel, with a high potential difference between them. With a micrometer-level wiring spacing, a strong local electric field will be generated between the two conductors. In a closed, humid environment, without the geometric perturbation structure 12, the water film electrolyte adsorbed on the surface of the glass substrate 11 will form a long continuous path between the two conductors. Under the strong electric field, the copper metal on the first conductor 80 will rapidly oxidize and dissolve into copper ions, which will then migrate and deposit in the water film towards the second conductor 90, forming copper dendrites. This can cause a short circuit between the data line or clock line and the high-voltage power line, instantly burning out the signal pins of the driver chip 17. Therefore, this embodiment provides a geometric perturbation structure 12 on the first conductor 80 and / or the second conductor 90 to divide the parallel wiring area between the first conductor 80 and the second conductor 90 into multiple continuous path segments. The horizontal span length of each continuous path segment along its extension direction is controlled within the critical path length. The geometric perturbation structure 12 disrupts the horizontal adsorption physical environment of the continuous water film, cuts off the physical link of copper ions' cross-regional directional migration, fundamentally eliminates the electrochemical migration short circuit between the high-voltage anode power line (VLED) and the low-voltage signal line (Data / Clock), and protects the driver chip 17 from being broken down by high voltage.

[0056] In a second embodiment, the first conductor 80 is configured as a power signal line (e.g., VDD / VCC) to power the driver chip 17, with an operating voltage of 3.3V to 5V, used to provide operating power to the internal logic circuits of the driver chip 17. The second conductor 90 is configured as a control signal line, data line, or clock line, with an operating voltage of 0V to 1.8V, or maintained at 0 volts (GND level) when the driver chip 17 is in a low-level sleep state.

[0057] In this scenario, the first conductor 80 and the second conductor 90 also have a potential difference of 3.3V to 5V, and the two lines run closely through the micro-dense wiring area at the bottom of the driver chip 17. By setting a geometric disturbance structure 12 between the first conductor 80 and the second conductor 90, the length of the continuous parallel trace is divided into independent intervals of less than 2.0 mm, which suppresses micro-leakage and electrochemical migration between the power line and the high-speed data / clock line, reduces the growth rate of the trace leakage current, and thus ensures the anti-interference and high stability of the control signal transmission of the driver chip 17.

[0058] The first conductor 80 and the second conductor 90 extend on the glass substrate 11 along their respective extension directions. In other words, the first conductor 80 and the second conductor 90 are arranged in parallel or nearly parallel along their respective main transmission axes on the plane of the glass substrate 11.

[0059] Geometric disturbance structure 12 refers to geometric abrupt structures that disrupt the long-distance straight line pattern, including lateral offset segments, sawtooth broken line structures, trapezoidal wave structures, wavy curve structures, or periodically expanding spacing structures set on the line.

[0060] A continuous electrolyte path refers to a liquid or semi-liquid continuous water film channel formed by the adsorption of water vapor in the gap region between the first conductor 80 and the second conductor 90 under high temperature and high humidity conditions due to the hydrophilic properties of the glass substrate 11 surface. This water film channel provides an electrolyte medium environment for the directional migration of metal anode ions to the cathode.

[0061] It should be understood that the high temperature and high humidity environment here can be an environment of 85℃ and 85% relative humidity.

[0062] Extension direction ( Figure 3 The X direction in the figure refers to the conduction direction of the first conductor 80 and the second conductor 90 on the substrate plane; while the electric field driving direction ( Figure 3 The Y direction in the figure refers to the direction of the electric field lines from the high-voltage first conductor 80 to the low-voltage second conductor 90, which is perpendicular to the direction of extension in the planar physical space.

[0063] The continuous path segment length refers to the horizontal span length or actual parallel segment geometric length of the first conductor 80 and the second conductor 90, which can form a stable directional electric field and a continuous water film in the direction of electric field driving when they are arranged in parallel while maintaining their initial spacing. When the routing has geometric disturbances, the continuous path segment length refers to the horizontal span length of each individual segment after being interrupted by the geometric disturbances.

[0064] Critical path length refers to the path length threshold at which the probability of electrochemical migration corrosion failure abruptly changes or the failure time drops sharply under given ambient temperature, humidity, and voltage difference conditions.

[0065] The display module 100 provided in this application changes the spatial geometric extension shape of the conductors on the surface of the glass substrate 11 by setting a geometric disturbance structure 12 along the extension direction of the first conductor 80 and / or the second conductor 90. This geometric disturbance breaks the physical environment of continuous adsorption of water film electrolyte between the original long-distance parallel traces and blocks the continuity of the continuous electrolyte path. At the same time, the length of the continuous path segment between the two conductors in the extension direction is controlled within a preset critical path length, so that the continuous physical link of ions migrating to the opposite pole under the drive of the electric field is divided into short-distance discrete local regions. This weakens the driving force for the directional migration of metal ions in the conductor to the cathode and the deposition to form dendrites, thereby reducing the probability of electrochemical migration corrosion, slowing down the growth rate of trace leakage current, delaying short circuits and lamp abnormalities caused by electrochemical migration, and thus improving product reliability.

[0066] In some embodiments, such as Figures 1 to 5 As shown, the geometric disturbance structure 12 includes an offset segment 13 disposed on the first conductor 80 and / or the second conductor 90; the first spacing between the first conductor 80 and the second conductor 90 at the offset segment 13 is greater than or equal to the second spacing at the non-offset segment, so as to divide the parallel trace region 14 between the first conductor 80 and the second conductor 90 into multiple segments, each with a length less than the critical path length. Continuous path segments.

[0067] It should be understood that the parallel trace region 14 refers to the trace space where the first conductor 80 and the second conductor 90 do not shift laterally, remain straight, and extend in parallel. In this embodiment, by introducing a geometric disturbance structure 12 at predetermined intervals along the extension direction, the originally long-distance continuous parallel trace region 14 is divided into multiple physically independent parallel trace sub-regions by the geometric disturbance structure 12. Figure 4 Each L1 segment in the middle.

[0068] In some embodiments, combined with such Figures 1 to 5 The routing layout shown can be specifically represented by the geometric disturbance structure 12 as an offset segment 13 set on the first conductor 80 and / or the second conductor 90.

[0069] In the non-offset section region, the first conductor 80 and the second conductor 90 maintain their initial parallel arrangement, and the relative distance between them is defined as the second spacing (i.e., the initial spacing d). However, in the region where the offset section 13 is provided, the relative distance between the first conductor 80 and / or the second conductor 90 is increased by offsetting their positions and is defined as the first spacing (i.e., the local spacing). The first spacing is greater than the second spacing.

[0070] in, In The value of can be very small, for example, The value can be 0.1mm, which means that without affecting the wiring density between the first conductor 80 and the second conductor 90, the parallel wiring area 14 between the first conductor 80 and the second conductor 90 can be divided into multiple lengths.

[0071] like Figure 4 In one specific arrangement shown, the offset segment 13 of the first conductor 80 and the offset segment 13 of the second conductor 90 are laterally bent to the same side perpendicular to the extension direction (e.g., simultaneously offset upwards or downwards along the Y direction). By creating a local difference in the bending amplitude or phase of the two (or bending only one side of the conductor), the spatial distance between them is increased in the region where the offset segment 13 is located, thus forming a first gap.

[0072] The second spacing (initial spacing d) area is a high-density parallel layout area, which easily accumulates water vapor and forms an adsorbed water film in high temperature and humidity environments. When the trace extends to offset segment 13, the spacing abruptly increases from the second spacing to the first spacing ( The electric field strength decreases as the spacing increases, and the physical morphology of the continuous water film on the substrate surface is broken at the abrupt spacing locations.

[0073] By introducing offset segments 13 at regular intervals along the extension direction, the originally long, continuous, parallel, low-pitch trace region is divided into multiple independent parallel trace sub-regions by these offset segments 13. The length of the continuous path segment in the electric field driving direction of each sub-region is controlled within a preset critical path length. the following.

[0074] For example, assuming the first conductor 80 is a 24V power supply line and the second conductor 90 is a 1.8V data signal line, both need to be run in parallel for 8mm on the glass substrate 11. If the total length remains... The second spacing is a straight line parallel to each other, with a continuous parallel length of 8mm (much greater than the critical path length of 2.5mm). In the aging test, severe copper trace corrosion and short circuits will occur within 500 hours due to electrochemical migration. In the embodiment of this application, on the 8mm trace path, respectively on the second spacing... , No. Passing the exam At each location, a short offset segment 13 is set to locally increase the spacing at these locations. The first spacing. These three offset segments 13 divide the entire 8mm trace into four segments, each with a length of... Parallel routing area 14. Due to the length of each continuous path segment ( All are less than the critical path length ( This can block the physical link between copper ions at the anode and the cathode.

[0075] Figure 6 This is a partial cross-sectional schematic diagram of another display module 100 proposed in the embodiments of this application.

[0076] In some embodiments, such as Figure 1 and Figure 6 As shown, the offset segment 13 of the first conductor 80 and the offset segment 13 of the second conductor 90 are offset to the same side perpendicular to the extension direction, so that the first gap is equal to the second gap.

[0077] In a plane lateral direction perpendicular to the extension direction (e.g., longitudinal or Y-axis direction), the offset segment 13 of the first conductor 80 and the offset segment 13 of the second conductor 90 have the same bending protrusion direction (e.g., both towards the same direction). Figure 6 (Top / Same Side Offset).

[0078] Although both are offset to the same side, by creating spatial differences in bending amplitude, phase change start point, or local offset amount between the offset segment 13 of the first conductor 80 and the offset segment 13 of the second conductor 90, the second spacing between the first conductor 80 and the second conductor 90 at the offset segment 13 position is the same as the first spacing. That is, without affecting the wiring density between the first conductor 80 and the second conductor 90, the parallel routing area 14 between the first conductor 80 and the second conductor 90 can be divided into multiple lengths.

[0079] Figure 7 This is a partial cross-sectional schematic diagram of another display module 100 proposed in the embodiments of this application.

[0080] In some embodiments, such as Figures 1 to 7 As shown, multiple offset segments 13 are periodically distributed in the extension direction.

[0081] When multiple offset segments 13 are periodically distributed in the extension direction, the first conductor 80 and / or the second conductor 90 cyclically arrange the offset segments 13 along the extension direction with a fixed spatial repeating period P.

[0082] The repetition period (i.e., the distance between the starting points of two adjacent offset segments 13) can be set to a fixed value. To ensure the anti-corrosion effect, the repetition period P must satisfy the requirement that the length of each non-offset segment area (i.e., the parallel trace segment maintaining the second spacing d) is... All are less than the critical path length For example, when the critical path length At that time, the period P can be set to This makes the length of a single parallel trace... Controlled Within.

[0083] Under the periodic distribution pattern, the lateral offset of each offset segment 13 The bending angle and the length of the offset segment 13 itself are all kept consistent.

[0084] The periodic distribution can form a regular and uniform geometric disturbance in the wiring area of ​​the entire glass substrate 11. This regular arrangement not only simplifies the manufacturing process, but also makes the electric field intensity distribution and stress distribution on the surface of the glass substrate 11 highly regular, eliminating local electric field overheating or local stress concentration points, and further improving the yield and electrical performance stability of the backlight board during mass production.

[0085] Optionally, based on the complex device layout requirements on the backlight panel of the display module 100, multiple offset segments 13 are distributed non-periodically (i.e., irregular / unequally spaced) in the extension direction.

[0086] The distance along the line between two adjacent offset segments 13 These are variables that are mutually unequal or locally unequal. Although the distances of each segment are not exactly the same, the design includes an upper limit constraint, meaning that the maximum distance along the route must still be less than the critical path length. (like ).

[0087] Lateral offset at each offset segment 13 The size can be adjusted according to the size of the glass substrate 11. In areas with ample space, a larger offset can be used (e.g., increasing the spacing to...). In compact areas, smaller offsets can be used (such as increasing the spacing to...). ).

[0088] The surface of the Mini-LED glass substrate 11 is typically densely covered with die-bonding pads, vias, driver IC mounting areas, and structural positioning holes. The non-periodic offset segment 13 can randomly bend and detour to follow the edge contours of these devices, thus achieving layout avoidance while breaking long-distance parallel electric fields and water films.

[0089] For example, in In the electrochemical migration accelerated aging test under high temperature and high humidity environment, the following was adopted: The periodic offset segment 13, the electrochemical migration failure time of the trace is changed from that of the straight trace. Upgraded to above.

[0090] For example, in In the electrochemical migration accelerated aging test under high temperature and high humidity environment, the following was adopted: The non-periodic offset segment 13 with random span distribution also achieved a power-on aging lifespan of [missing information]. The above methods successfully avoided vias in the die-bonding region, improving the board space utilization rate by approximately [percentage missing] compared to periodic layouts. .

[0091] In some embodiments, such as Figures 1 to 7 As shown, the geometric disturbance structure 12 includes setting the first conductor 80 and / or the second conductor 90 as a broken line structure, a sawtooth structure, or a wavy structure.

[0092] Alternatively, the geometric disturbance structure 12 includes a sawtooth structure with periodic bends or a wave-like structure with a smooth curve, wherein the amplitude of the wave-like structure is less than the second gap between the first conductor 80 and the second conductor 90.

[0093] For example, such as Figure 4 As shown, the conductor consists of multiple straight segments connected end to end at specific angles (such as obtuse or right angles), forming a multi-angled zigzag trace.

[0094] For example, the geometric disturbance structure 12 includes setting the first conductor 80 and / or the second conductor 90 as a wave-like structure, that is, the conductors are continuous smooth curves tangent to sine waves, cosine waves or circular arcs along the extension direction.

[0095] For example, such as Figure 7 As shown, the conductor has a sawtooth pattern (such as a triangular waveform, trapezoidal waveform, etc.) with continuous periodic or non-periodic alternating bends along the extension direction.

[0096] When the first conductor 80 and / or the second conductor 90 adopt the above structure, the traces no longer extend along a single axis, but instead break the parallel electric field and adsorbed water film that are continuously arranged along the extension direction through dense geometric bends, preventing electrochemical migration and connection.

[0097] In some embodiments, such as Figure 7 As shown, both the first conductor 80 and the second conductor 90 adopt a sawtooth structure, and the path tortuosity of the sawtooth structure is... satisfy: Among them, path tortuosity It is the ratio of the actual path length of the sawtooth structure to the horizontal span length in the extension direction.

[0098] For example, The value can be 1.2, 1.4, 1.6, 1.8 or 2.

[0099] The actual path length is the total actual trace path length of the first conductor 80 (or the second conductor 90) within a single cycle or a specified area.

[0100] For example, taking the overall conduction path direction of the first conductor 80 and the second conductor 90 as the X-axis (extension direction), and the direction perpendicular to the X-axis in the plane of the glass substrate 11 as the Y-axis (lateral, i.e., electric field driving direction), when the first conductor 80 and the second conductor 90 adopt a sawtooth or zigzag structure, the trace is composed of multiple oblique line segments connected end to end in sequence. The span of a single oblique line segment in the Y-axis direction is the projected length of the oblique line segment in the electric field driving direction, or the horizontal span length.

[0101] It should be understood that path tortuosity This reflects the degree of curvature of the wiring in space. The larger the value, the more severe the bending of the trace, the longer the actual path, the more the electric field lines are dispersed, and the shorter the continuous projected path in the electric field driving direction is cut.

[0102] when When the line is set to a straight line (without any geometric disturbance), it indicates that the routing path is completely straight. Therefore... This ensures that the wiring inevitably involves geometric bends and disturbances, which can effectively disrupt the continuous water film and change the direction of the local electric field.

[0103] when When the value exceeds 2, the serrations of the traces become too sharp (too dense serrations or too small bends), which not only increases the circuit impedance and high-frequency signal loss, but may also cause tip discharge or electric field concentration at the serration tips, thus inducing electrochemical corrosion under localized high electric fields. The value is kept below 2, achieving a good balance between corrosion resistance and electrical circuit performance.

[0104] In some embodiments, the path tortuosity of the sawtooth structure satisfy: .

[0105] exist The triangular sawtooth waveform (i.e., the hypotenuse of the sawtooth is perpendicular to the direction of extension) In the included angle, according to the Pythagorean theorem, the ratio of the actual path length to the projected length is exactly 1 / 2. .

[0106] Will Limited to between 1 and 1.414 (the corresponding sawtooth angle is usually in the range of 1 to 1.414). Within this range, the sawtooth structure occupies little lateral space, ensuring an extremely compact wiring density on the glass substrate 11. Simultaneously, it controls the continuous projection length of the traces in the electric field driving direction to within the critical path length, increasing the average failure time of copper ions migrating from the anode to the cathode to more than 1.5 times the original, thus reducing the risk of electrochemical migration short circuits.

[0107] In some embodiments, the first conductor 80 and / or the second conductor 90 may be arranged in a sawtooth structure. In this embodiment, the period P of the sawtooth structure may be set to... The amplitude A can be set to , angle of the broken line Approximately The zigzag structure with its periodic, alternating bends causes the conductor path to change periodically, resulting in a tortuous path. It can be set to 1.15. Due to the increased path tortuosity, the actual path length for ion migration increases; simultaneously, due to the transition effect of the sawtooth bevel, the electric field driving direction continuously undergoes local dynamic changes, thus weakening the ion's directional migration ability. Furthermore, through the design of the sawtooth parameters, the length of the projected continuous path segment in the electric field driving direction is still limited to the critical path length. Within this range, electrochemical migration is suppressed.

[0108] Furthermore, the angle of the broken line structure With path tortuosity The following relationship is satisfied, assuming the deflection angle between one side of the broken line structure and the extension direction is . Then the path tortuosity Angle of broken line Satisfies the following trigonometric function relationships: = .

[0109] From the above relationships, it can be seen that the path tortuosity Angle of broken line There is a negative correlation: the smaller the angle of the broken line (i.e., the sharper the broken line), the greater the path tortuosity; conversely, the larger the angle of the broken line (i.e., the gentler the broken line), the closer the path tortuosity is to 1.

[0110] In some embodiments, such as Figures 1 to 7 As shown, the length of the continuous path segment is the geometric length or horizontal span length of the first conductor 80 and the second conductor 90 in the extension direction.

[0111] When the first conductor 80 and the second conductor 90 form parallel straight line segments extending along the extension direction in a local region, the electric field driving direction (lateral / Y-axis direction) remains constant within this region. In this case, the actual physical geometric straight-line distance between the two conductors within this parallel region (i.e., the length of the overlapping parallel lines along the extension axis) is directly defined as the geometric length of that segment and serves as the length of the continuous path segment in that region.

[0112] When the first conductor 80 and / or the second conductor 90 are non-linear structures (including the aforementioned broken line structure, sawtooth structure, wavy structure, or trace containing bending offset segment 13), the local displacement of the trace changes the direction of the local electric field lines and the distribution path of the water film. In this case, the actual bending length of the conductor along the line cannot be used as the sole criterion. Instead, the length of the continuous projected line segment of the non-linear trace in the electric field driving direction (i.e., the lateral direction perpendicular to the extension direction) is defined as the horizontal span length of the region and is taken as the continuous path segment length of the non-linear region.

[0113] For example, if the first conductor 80 and the second conductor 90 are connected by... The spacing remains straight and extends in parallel. Then it enters an offset segment 13 with increased spacing, then the length of the continuous path segment of this straight parallel segment is... That is, its geometric length .because (where the critical path length is) It meets the requirements for corrosion protection design.

[0114] For example, if the first conductor 80 and the second conductor 90 are both arranged in a sawtooth structure, the actual length along the line of a single set of sawtooth hypotenuses is However, the bevel of the sawtooth is perpendicular to the direction of extension. The included angle, and the continuous length of its projection in the direction of electric field driving (lateral). At this point, the length of the continuous path segment is... Based on the continuous length of the projection Similarly satisfied The constraints can prevent dendrite penetration and short circuits caused by electrochemical migration.

[0115] In some embodiments, such as Figures 1 to 7 As shown, both the first conductor 80 and the second conductor 90 are single-layer copper traces; critical path length The range of values ​​for satisfies: .

[0116] In this embodiment, both the first conductor 80 and the second conductor 90 can be flatly mounted on the surface of the glass substrate 11 using a single-layer copper trace configuration. This single-layer copper trace architecture eliminates the need for multi-layer metal insulating vias and complex multi-layer masking processes, reducing the manufacturing cost and thickness of the backlight panel. However, because single-layer copper lacks a top insulating passivation layer or multi-layer dielectric coating, and because copper is extremely reactive in the presence of potential differences and moisture, it is highly susceptible to copper anodic dissolution and the formation of copper dendrites through electrochemical migration.

[0117] For example, critical path length It can be 2.0mm, 2.2mm, 2.4mm, 2.8mm or 3.0mm.

[0118] For example, critical path length It can be 2.5mm.

[0119] The hydrophilic properties of the single-layer copper material, the glass substrate 11 surface, and the typical operating voltage difference (such as...) and Composition Under potential difference, accelerated aging tests showed that when the length of the parallel trace reached... Within this range, the electric field strength and ion migration rate within the adsorbed water film reach the critical breakthrough point, and the failure time exhibits a sharp drop. Therefore, The quantitative definition is within this range.

[0120] For example, the length of a continuous path segment It can be 2.0mm, 1.8mm, 1.6mm, 1.4mm, 1.2mm or 1.0mm.

[0121] By limiting the length of continuous path segments (whether the actual geometric length of straight parallel segments or the projected continuous length of polygonal / zigzag segments in the electric field driving direction) to 2.0 mm or less, it is ensured that the actual effective continuous migration path is always less than the lower limit of the critical path length under any layout condition.

[0122] For example, in the single-layer copper wiring of the Mini-LED glass-based backlight panel, the first conductor 80 and the second conductor 90 extend on the glass substrate 11. By laying an offset segment 13 with a local displacement every 1.8 mm (or laying the trace in an angled sawtooth pattern), the entire line is divided into multiple continuous path segments. The sub-region.

[0123] At temperature relative humidity Electrically powered tests were conducted in an accelerated aging environment. Comparative example (unlimited) ): Continuous straight single-layer copper traces are used ( ), powered on approximately This means that obvious copper dendrite penetration and a sharp increase in leakage current short circuit are observed between the two conductors.

[0124] This embodiment ( The length of the continuous path segment of a single-layer copper trace is controlled to 1.8mm to meet the requirements. After more than 1000 hours of aging operation under power, no electrochemical migration corrosion occurred, and the leakage current of the wiring remained consistently at [value missing]. It achieves a higher level of safety and its lifespan is increased to more than 2.3 times that of the original.

[0125] Figure 8 This is a schematic diagram showing the relationship between the length of the continuous path segment and the electrochemical migration failure time in the embodiments of this application.

[0126] Table 1

[0127] Combination Figure 8 In accordance with Table 1, in this embodiment of the application, the temperature is set to... The relative humidity is set to The voltage difference between adjacent first conductor 80 and second conductor 90 is 24V, and the trace spacing is... .

[0128] Under these experimental conditions, by changing the length of the continuous path segment between the first conductor 80 and the second conductor 90 in the direction of electric field driving... (Take measurements of 0.5mm, 1mm, 2mm, 3mm, 5mm, and 10mm respectively), test and record the failure corrosion time of the traces due to short circuit failure caused by electrochemical migration. (Unit: hours)

[0129] When the length of continuous path segments Controlled within critical path length Within a certain range, the failure corrosion time tends to increase as the path length shortens. When When shortened to 2mm, the failure time reaches approximately 750 hours; when When the thickness is further reduced to 1 mm and 0.5 mm, the failure time is increased to over 900 to 1000 hours, thus improving the reliability of corrosion protection.

[0130] When the length of consecutive path segments exceeds Subsequently, the failure corrosion time decreased sharply and rapidly dropped below 500 hours. For example, when the length of a continuous path segment... When the thickness reaches 3mm, the failure time drops sharply to approximately 500 hours; when the length of the continuous path segment... When the thickness is increased to 5mm and 10mm, the failure time decreases further and tends to a lower flat area (approximately). ).

[0131] This example illustrates that electrochemical migration corrosion does not increase linearly with trace length, but rather has a defined critical path length. That is, once the threshold is exceeded, the continuous adsorption of water film and the stable electric field will accelerate the directional deposition of metal ions and dendrite penetration.

[0132] In some embodiments, such as Figures 1 to 8 As shown, the second spacing d between the first conductor 80 and the second conductor 90 satisfies: .

[0133] The second spacing d is the shortest straight-line distance between the side edges of the first conductor 80 and the side edges of the second conductor 90 in the plane of the glass substrate 11 (in the direction perpendicular to the extension direction) during the non-offset segment.

[0134] The value of the second spacing d can be... , , , or .

[0135] Limited by the process limitations of single-layer copper yellow photolithography on glass substrate 11, if the trace spacing is less than Side etching during exposure and etching processes can easily lead to microscopic copper bridge defects or interference short circuits at the edges of traces, reducing the yield of photolithography.

[0136] If the second spacing d is greater than Although it can reduce the electric field strength, it will occupy the board space on the surface of the glass substrate 11, squeeze the wiring channels of the Mini-LED die bonding pads and other driving traces, and cannot meet the requirements of the ultra-narrow bezel and high partition density of the backlight module 10.

[0137] exist At this spacing, a strong lateral electric field will be formed between the first conductor 80 and the second conductor 90, which is a high-risk area for electrochemical migration in high-temperature and high-humidity environments. This embodiment, by combining this spacing with the aforementioned geometric perturbation structure 12, satisfies the requirements of high-density micron-level wiring while also meeting the requirements of high reliability and corrosion resistance.

[0138] Figure 9 This is a schematic diagram of the structure of a display device 200 proposed in an embodiment of this application.

[0139] like Figure 9 As shown, this application also provides a display device 200, which includes a housing 117 and a display module 100 in any of the above embodiments. The housing 117 forms a receiving cavity; the display module 100 is received in the receiving cavity to provide display content to the display device 200.

[0140] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display module, characterized in that, The device includes a display panel and a backlight module disposed on the back of the display panel. The backlight module includes a backlight board, and the backlight board includes a glass substrate and a plurality of light-emitting chips arranged in an array on the glass substrate. The surface of the glass substrate is provided with a first conductor and a second conductor that are electrically connected to the light-emitting chip, are arranged adjacently and have a potential difference, the first conductor and the second conductor are flat against the surface of the glass substrate and extend on the glass substrate along their respective extension directions; Wherein, the first conductor and / or the second conductor are provided with a geometric disturbance structure along the extension direction to block the continuous electrolyte path between the first conductor and the second conductor, such that the length of the continuous path segment between the first conductor and the second conductor in the extension direction is reduced. Less than the critical path length .

2. The display module according to claim 1, characterized in that, The geometric perturbation structure includes an offset segment disposed on the first conductor and / or the second conductor; The first spacing between the first conductor and the second conductor at the offset segment is greater than or equal to the second spacing at the non-offset segment, so as to divide the parallel trace area between the first conductor and the second conductor into multiple segments, each with a length less than the critical path length. Continuous path segments.

3. The display module according to claim 2, characterized in that, The offset segment of the first conductor and the offset segment of the second conductor are offset to the same side perpendicular to the extension direction, so that the first spacing is equal to the second spacing.

4. The display module according to claim 2 or 3, characterized in that, The multiple offset segments are periodically distributed in the direction of extension.

5. The display module according to claim 1, characterized in that, The geometric perturbation structure includes setting the first conductor and / or the second conductor as a broken line structure, a sawtooth structure, or a wavy structure.

6. The display module according to claim 5, characterized in that, Both the first conductor and the second conductor adopt a sawtooth structure, and the path tortuosity of the sawtooth structure is... satisfy: ; Among them, the path tortuosity It is the ratio of the actual path length of the sawtooth structure to the horizontal span length in the extension direction.

7. The display module according to claim 6, characterized in that, The path tortuosity of the sawtooth structure satisfy: .

8. The display module according to any one of claims 1 to 5, characterized in that, The length of the continuous path segment is the geometric length or horizontal span length of the first conductor and the second conductor in the extension direction.

9. The display module according to any one of claims 1 to 8, characterized in that, Both the first conductor and the second conductor are single-layer copper traces; The critical path length The range of values ​​for satisfies: .

10. The display module according to any one of claims 1 to 9, characterized in that, The first conductor and the second conductor include multiple components, and each light-emitting chip is connected across the corresponding first conductor and the second conductor. The anode and cathode at the bottom of the light-emitting chip are electrically connected to the corresponding first conductor and the second conductor, respectively.

11. The display module according to claim 10, characterized in that, The backlight panel also includes a driver chip; The first conductor is either a power line for providing anode power to the light-emitting chip, or a signal line for providing power to the driver chip; The second conductor is a signal line, data line, or clock line used to provide control signals, data signals, or clock signals to the driver chip.

12. A display device, characterized in that, include: The outer shell forms a receiving cavity; and The display module as claimed in any one of claims 1 to 11, wherein the display module is housed in the receiving cavity to provide display content to the display device.

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