A switchable all-optical logic gate device based on L-shaped silicon chiral metasurface

CN122902149APending Publication Date: 2026-10-13SHAANXI UNIV OF SCI & TECH
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Patent Information

Application Number
CN202611137389.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-29
Publication Date
2026-10-13

AI Technical Summary

Technical Problem

然而,现有全光逻辑门的研究多集中于通信波段(如1550 nm),在可见光至近红外波段(约500~1200 nm)的探索相对薄弱

Benefits of technology

(1)本发明将圆偏振滤波功能与五种基本全光逻辑门(与门、或门、非门、与非门和或非门)集成于同一基于L型硅手性超表面的可切换全光逻辑门器件中,无需多个器件组合或级联即可实现多种逻辑功能,大幅简化了全光逻辑运算单元的结构复杂度,有利于片上光互连与全光计算系统的小型化集成。

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Abstract

The application discloses a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface, and belongs to integrated optics. The all-optical logic gate device comprises a silicon dioxide substrate and an L-shaped silicon nanorod array arranged on the silicon dioxide substrate; the L-shaped silicon nanorod is composed of a horizontal arm extending along an x direction and a vertical arm extending along a y direction and intersecting perpendicularly. The all-optical logic gate device has high efficient selective transmission on circularly polarized light in a near-infrared wave band, the transmission of left-handed circularly polarized light is significantly inhibited, and right-handed circularly polarized light is selectively transmitted, then through intensity coding and polarization coding two ways, the same polarization transmittance T RR The AND gate, OR gate, NOT gate, NAND gate and NOR gate five basic logic functions are designed and realized, the unified threshold value is detected at the output end, without changing the structure or applying external modulation, and only by switching the working wavelength, the logic operation mode can be changed.
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Description

Technical Field

[0001] This invention belongs to the field of integrated optical technology and relates to a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface. Background Technology

[0002] With the rapid development of technologies such as artificial intelligence, big data, and cloud computing, the global data volume is growing exponentially, placing unprecedented demands on information transmission rates and data processing capabilities. Fields such as optical communication, optical sensing, and optical computing are increasingly demanding miniaturization, multifunctionality, and high integration of devices, urgently requiring novel devices capable of performing multiple optical operations within a limited space. However, traditional optical devices rely on the cumulative phase change of light in a medium to achieve wavefront modulation, and their size is typically large, making it difficult to meet the requirements of compact integration. Furthermore, their functions are fixed by material properties and geometry, and a single device can generally only perform a single optical operation, limiting application flexibility.

[0003] Metasurfaces are a class of two-dimensional optical materials composed of subwavelength artificial structures. Their thickness is much smaller than the operating wavelength, enabling efficient manipulation of light fields within a planar structure. They have become a key technology in fields such as optical communication and information processing. By rationally designing the geometry, size, and spatial arrangement of microstructure units, metasurfaces can independently and flexibly control multiple dimensions of the light field, including amplitude, phase, polarization state, and dispersion. Furthermore, multiple optical functions can be integrated into a single structure, opening new avenues for the miniaturization and multifunctional integration of planar optical devices. Introducing microstructure units with mirror asymmetry allows metasurfaces to acquire chiral optical responses, producing differentiated transmittance (i.e., circular dichroism) for left-handed and right-handed circularly polarized light, thus providing an effective means for selectively controlling polarization states.

[0004] All-optical computing uses photons, rather than electrons, as information carriers. Leveraging the ultra-fast speed and inherent parallelism of light in transmission and processing, it holds the promise of overcoming the physical limitations of traditional electronic computing in terms of bandwidth, power consumption, and heat loss. All-optical logic gates, as the basic operational units of all-optical computing, are the core foundation for realizing on-chip optical information processing. However, current research on all-optical logic gates is largely focused on the communication band (e.g., 1550 nm), with relatively weak exploration in the visible to near-infrared band (approximately 500–1200 nm). Silicon-based materials, due to their low-loss, high refractive index contrast optical properties in the near-infrared band and their high compatibility with standard CMOS processes, are considered an ideal platform for realizing metasurface integrated optoelectronic devices.

[0005] In summary, silicon-based metasurfaces demonstrate great potential for realizing compact, multifunctional photonic devices. If polarization selection and multiple Boolean logic operations can be simultaneously achieved using a single chiral metasurface structure, along with the flexibility of switchable operating wavelengths, it holds promise for providing a simple and efficient hardware solution for on-chip optical computing and polarization-coded information processing. Summary of the Invention

[0006] To address the aforementioned technical problems and deficiencies, this invention provides a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface. This invention simultaneously implements high circular dichroism (CD) polarization filtering and five basic all-optical logic operations within a single device. This device can flexibly switch logic modes between 550 nm and 1050 nm simply by changing the operating wavelength without altering structural parameters or applying external modulation, thereby implementing the five operations: AND, OR, NOT, NAND, and NOR gates.

[0007] In a first aspect, the present invention provides a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface, comprising: a silicon dioxide substrate; an air layer disposed above the silicon dioxide substrate; and an L-shaped silicon nanopillar array formed by a plurality of L-shaped silicon nanopillars periodically arranged on the silicon dioxide substrate; wherein the L-shaped silicon nanopillars are embedded inside the air layer;

[0008] The L-shaped silicon nanopillar is formed by the perpendicular intersection of a horizontal arm extending along the x-direction and a vertical arm extending along the y-direction. The all-optical logic gate device employs intensity encoding and polarization encoding at the input end, and outputs the logic result at the output end based on the comparison between the same polarization transmittance and a fixed threshold.

[0009] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the arrangement period of adjacent L-shaped silicon nanopillars in the x and y directions is 400~600 nm. The thickness of the air layer is 350~450 nm.

[0010] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the thickness of the L-shaped silicon nanopillar in the z-direction is 150~250 nm, the length of the horizontal arm and the vertical arm is 150~200 nm, and the width of the arm is 50~70 nm.

[0011] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the operating wavelengths of the all-optical logic gate device are 550 nm and 1050 nm.

[0012] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the intensity encoding is defined by the presence or absence logic "1" and "0" of right-hand circularly polarized light. The polarization encoding defines right-hand circularly polarized light and left-hand circularly polarized light as logic "0" and "1" respectively.

[0013] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the fixed threshold is 0.7. When the same polarization transmittance is ≥0.7, it is judged as logic "1" and when the same polarization transmittance is <0.7, it is judged as logic "0".

[0014] Furthermore, in the switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface provided by the present invention, the all-optical logic gate device implements at least one of the five logic gates, namely AND gate, OR gate, NOT gate, NAND gate, and NOR gate, when the operating wavelength is 550 nm and 1050 nm and the input encoding combination is different.

[0015] Secondly, the present invention provides a method for fabricating a switchable all-optical logic gate device based on an L-type silicon chiral metasurface, comprising: using an SOI wafer as a substrate, forming a patterned resist mask layer on the top silicon layer of the SOI wafer; using the patterned resist mask layer as a mask, performing anisotropic etching on the top silicon layer until the buried oxide layer of the SOI wafer is etched to expose the silicon dioxide substrate; and removing the patterned resist mask layer to obtain the all-optical logic gate device.

[0016] Furthermore, in the preparation method provided by the present invention, the formation process of the patterned resist mask layer includes: forming a resist layer on the top silicon layer, exposing a selected area of ​​the resist layer with an electron beam, and developing the exposed resist layer to obtain the patterned resist mask layer.

[0017] Furthermore, in the preparation method provided by the present invention, before forming the resist layer on the top silicon layer, the top silicon layer is pretreated with a tackifier; The thickener is hexamethyldisilazane.

[0018] Compared with the prior art, the technical solution provided by the present invention has at least the following beneficial effects or advantages: (1) This invention integrates the circular polarization filtering function with five basic all-optical logic gates (AND gate, OR gate, NOT gate, NAND gate and NOR gate) into the same switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface. Multiple logic functions can be realized without the need for multiple device combinations or cascades, which greatly simplifies the structural complexity of the all-optical logic operation unit and is conducive to the miniaturization and integration of on-chip optical interconnects and all-optical computing systems.

[0019] (2) The present invention uses L-shaped silicon nanopillars as the core functional unit. Its preparation process is highly compatible with standard CMOS process, which facilitates large-area, high-consistency mass production using mature semiconductor manufacturing technology, significantly reducing manufacturing costs and technical barriers, and has good engineering feasibility and industrialization prospects.

[0020] (3) In this invention, the five logic gates share the same physical structure and the same output detection quantity (T). RR With a fixed logic threshold, switching between different logic functions can be achieved simply by changing the operating wavelength (e.g., 550 nm and 1050 nm), without the need for active modulation methods such as external electric, optical, or thermal fields, nor any changes to structural parameters. This reconfigurable characteristic significantly reduces system control complexity, providing a simple and efficient implementation scheme for dynamically programmable all-optical logic operations.

[0021] (4) The L-shaped silicon chiral metasurface (L-shaped silicon nanopillars) described in this invention exhibits excellent selective transmittance of right-handed circularly polarized light in the near-infrared band (800~1200 nm). Specifically, its circular dichroism (CD) peak value can reach 0.8, and its extinction ratio exceeds 100, indicating that the transmittance of all-optical logic gate devices for left-handed and right-handed circularly polarized light differs significantly, with the transmission of left-handed circularly polarized light being highly suppressed. This performance ensures that the logic output signal has sufficient contrast and signal-to-noise ratio, laying a physical foundation for stable and reliable all-optical logic operations. Attached Figure Description

[0022] Figure 1 The diagram shows the structure of a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface. (a) is a schematic diagram of the L-shaped silicon nanopillars; (b) is a schematic diagram of the all-optical logic gate device.

[0023] Figure 2 The circularly polarized refractive index and circular dichroism spectrum of a switchable all-optical logic gate device based on an L-type silicon chiral metasurface are shown. Among them, (a) is the circularly polarized transmission spectrum under right-handed circularly polarized light incident light, including the co-polarized component TRR and the cross-polarized component TLR; (b) is the circularly polarized transmission spectrum under left-handed circularly polarized light incident light, including the co-polarized component TLL and the cross-polarized component TRL; (c) is the comparison curve of TRR and TRL of the two main transmission channels; and (d) is the circular dichroism spectrum.

[0024] Figure 3 The electric field distributions of switchable all-optical logic gate devices based on L-shaped silicon chiral metasurfaces are shown at different operating wavelengths. (a) is 550 nm; (b) is 1050 nm. Detailed Implementation

[0025] The technical solution of the present invention will be described below with reference to embodiments. However, the present invention is not limited to the following embodiments. Unless otherwise specified, the experimental methods and detection methods described in each embodiment are conventional methods; unless otherwise specified, the reagents and materials can be purchased commercially.

[0026] Example 1 This embodiment provides a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface.

[0027] like Figure 1 As shown, the all-optical logic gate device in this embodiment includes: a silicon dioxide substrate, an air layer, and an L-shaped silicon nanopillar array. The air layer, with a thickness of 400 nm, is located above the silicon dioxide substrate. L-shaped silicon nanopillars are periodically arranged on the silicon dioxide substrate to form the L-shaped silicon nanopillar array, and the L-shaped silicon nanopillars are embedded within the air layer. Each L-shaped silicon nanopillar is formed by the perpendicular intersection of horizontal and vertical arms, exhibiting an overall L-shaped geometric profile. The period of adjacent L-shaped silicon nanopillar units is 500 nm in both the x and y directions. The height of each L-shaped silicon nanopillar in the vertical direction (z direction) is 200 nm, the arm length is 180 nm, and the arm width is 60 nm.

[0028] Example 2 This embodiment provides a method for fabricating a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface.

[0029] S1. Substrate Selection and Preparation: SOI wafers were used as the starting substrate, with a top silicon layer thickness of 200 nm, for etching to form an L-shaped silicon nanopillar array. Before use, the SOI wafers were ultrasonically cleaned sequentially in acetone, isopropanol, and deionized water to remove surface organic contaminants, and then dried with nitrogen before use.

[0030] S2. Electron Beam Lithography and Mask Fabrication: Hexamethyldisilazane (HMDS) was used as a adhesion promoter. After pretreatment of the cleaned SOI wafer surface, NEB-31A negative electron beam resist was spin-coated. Following pre-baking, an L-shaped pattern was defined on the resist using electron beam lithography (EBL). The electron beam scanned and exposed the area point-by-point according to the pre-defined L-shaped pattern. After post-baking and development, the unexposed resist was dissolved and removed, leaving the exposed areas, forming an L-shaped etch mask.

[0031] S3. Reactive Ion Etching and Pattern Transfer: Using the retained resist as a mask, reactive ion etching is employed to anisotropically etch the top silicon layer. The etching rate of the buried oxide layer on the SOI wafer in the etching gas is much lower than that of the top silicon layer, approaching zero when the etching reaches the surface of the buried oxide layer, thus precisely controlling the silicon pillar height to 200 nm. After etching, an L-shaped silicon nanopillar array is formed in the top silicon layer.

[0032] S4. Resist Removal: After etching, the residual resist mask is removed using oxygen plasma to obtain the all-optical logic gate device.

[0033] In this invention, the structural chirality refers to the optical chirality introduced by the asymmetric arrangement of L-shaped silicon nanopillars (i.e., L-shaped silicon chiral metasurfaces), used to distinguish between left-handed and right-handed circularly polarized light. Based on this, when circularly polarized light is incident orthogonally onto the L-shaped silicon chiral metasurface, due to the mirror asymmetry of the L-shaped structure, it exhibits different optical field coupling capabilities for left-handed and right-handed circularly polarized light.

[0034] Specifically, circularly polarized light that matches the chirality of the structure can efficiently excite the local resonance mode of the nanopillar, effectively confining the light energy within the pillar and allowing it to be smoothly transmitted to the silica substrate, thereby achieving high transmittance. Conversely, circularly polarized light that does not match the chirality of the structure is in a state of resonant detuning, resulting in low excitation efficiency and a significant reduction in transmittance.

[0035] The difference in transmittance between left-handed and right-handed circularly polarized light is the circular dichroism of the L-type silicon chiral metasurface. CD=T RCP -T LCP Among them, T RCP and T LCP These represent the total transmittance when right-handed and left-handed circularly polarized light are incident, respectively. When CD is positive, the all-optical logic gate device preferentially transmits right-handed circularly polarized light (RCP); when CD is negative, the all-optical logic gate device preferentially transmits left-handed circularly polarized light (LCP).

[0036] This invention uses right-hand circularly polarized light (RCP) as an example to illustrate the all-optical logic AND gate. To verify its performance, the all-optical logic gate device was simulated, and the results are as follows: Figure 2 As shown, within the broadband range of 800–1500 nm, the L-type silicon chiral metasurface exhibits a stable and high-transmission response (transmittance of approximately 0.6–0.8) to right-hand circularly polarized light with matching chirality, while its transmittance to left-hand circularly polarized light is almost zero. Simultaneously, the absolute values ​​of circular dichroism within this band are all greater than 0.6, indicating that this all-optical logic gate device possesses excellent chiral-selective transmission performance. Figure 3 The electric field distributions of the all-optical logic gate device at two operating wavelengths, 550 nm and 1050 nm, are presented. At 550 nm, the electric field is localized within the L-shaped silicon nanopillars when RCP is incident, forming a strong resonance, while the resonance is significantly suppressed when LCP is incident; a similar trend is observed at 1050 nm.

[0037] Based on the aforementioned chiral selective transmission properties, the L-shaped silicon chiral metasurface is further used to realize various all-optical logic functions. The input terminals of these all-optical logic functions employ both intensity encoding and polarization encoding. Intensity encoding defines the presence or absence of RCP as logic "1" and "0", while polarization encoding defines RCP and LCP as logic "0" and "1", respectively. The output signal uniformly uses the same polarization transmittance T. RR (The same polarization component TRR at RCP incidence) is used as the detection quantity, and a fixed threshold of 0.7 is set. When T RR ≥0.7 is judged as logical "1", T RR A value less than 0.7 is considered a logic "0". This threshold (0.7) is determined based on simulation results of all-optical logic gate devices under different operating wavelengths and input conditions. At a working wavelength of 550 nm, the T value for single-channel RCP incident light is... RR Approximately 0.43, when two RCP inputs are superimposed in an incoherent manner, T RR Approximately 0.86; at a working wavelength of 1050 nm, T is the value of single-path RCP incident. RR Approximately 0.81. At operating wavelengths of 550nm or 1050nm, the To during LCP incident radiation... RR All values ​​are below 0.01. Therefore, the threshold of 0.70 is located in the blank range between high and low transmittance, with sufficient margin for judgment of each state value, which can stably distinguish logic "0" and "1", and the five logic gates share the same threshold, so there is no need to set them separately.

[0038] AND and OR gates employ strength encoding. As shown in Table 1, the operating wavelength of the AND gate is 550 nm. When there is only a single RCP input, T... RR The value is approximately 0.43, lower than the preset threshold of 0.70. When both inputs have RCP simultaneously, the transmitted light intensity received at the output is the sum of the contributions from both inputs (incoherent summation), corresponding to T. RR The value is increased to approximately 0.86, exceeding the 0.70 threshold, thus outputting a logic "1"; for the other three input combinations, T... RR All values ​​are below the threshold, and all output logic "0", implementing a logical AND. As shown in Table 2, the OR gate operates at a wavelength of 1050 nm, and the T value of a single-channel RCP incident signal is... RR The value is approximately 0.81, which exceeds the threshold. Therefore, when any input is an RCP, the output is a logic "1"; when neither input is an RCP, the output is a logic "0", implementing a logical OR.

[0039] The NOT, NAND, and NOR gates all employ polarization encoding, where RCP is defined as logic "0" and left-handed LCP as logic "1". For these logic gates, when the input is LCP, the output T... RRAll values ​​are far below the threshold of 0.7, corresponding to a logic output of "0". As shown in Table 3, the operating wavelength of the NOT gate is 1050 nm, and the T value at RCP input is... RR If the input is 0.81, which is greater than the threshold of 0.1, the output is logic "1", achieving logic NOT. As shown in Table 4, the NAND gate operates at a wavelength of 1050 nm. It outputs logic "0" only when both inputs are simultaneously LCP; for the other three input combinations, T... RR If all values ​​exceed the threshold of 0.7, the output logic "1" is executed, implementing a NAND gate. As shown in Table 5, the operating wavelength of the NOR gate is 550 nm. With a single RCP input, T... RR Approximately 0.43, below the threshold of 0.7; T is only achieved when both inputs are RCP. RR If the threshold of 0.7 is exceeded, output logic "1"; for other input combinations, at least one input is LCP, T RR If all values ​​are below the threshold of 0.7, output logic "0" to achieve logical OR.

[0040] Table 1 Truth Table of AND Gates

[0041] Table 2 OR gate truth table

[0042] Table 3 Truth Table for NOT Gates

[0043] Table 4 Truth Table of NAND Gates

[0044] Table 5 Truth Table of NOR Gates

[0045] The embodiments described above are some, but not all, of the embodiments of the present invention. The detailed description of the embodiments of the present invention is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art through related deductions and substitutions based on the inventive concept, without inventive effort, are within the scope of protection of the present invention.

Claims

1. A switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface, characterized in that, include: Silica substrate; An air layer is disposed above the silicon dioxide substrate; And an L-shaped silicon nanopillar array, formed by a plurality of L-shaped silicon nanopillars periodically arranged on the silicon dioxide substrate; the L-shaped silicon nanopillars are embedded inside the air layer; The L-shaped silicon nanopillar is formed by the perpendicular intersection of a horizontal arm extending along the x-direction and a vertical arm extending along the y-direction. The all-optical logic gate device employs intensity encoding and polarization encoding at the input end, and outputs the logic result at the output end based on the comparison between the same polarization transmittance and a fixed threshold.

2. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The arrangement period of adjacent L-shaped silicon nanopillars in the x and y directions is 400~600 nm; The thickness of the air layer is 350~450 nm.

3. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The L-shaped silicon nanopillar has a height of 150~250 nm in the z-direction, and the horizontal arm and the vertical arm have an arm length of 150~200 nm and an arm width of 50~70 nm.

4. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The operating wavelengths of the all-optical logic gate devices are 550 nm and 1050 nm.

5. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The intensity encoding is defined by the presence or absence of right-hand circularly polarized light using logic "1" and "0". The polarization encoding defines right-hand circularly polarized light and left-hand circularly polarized light as logic "0" and "1" respectively.

6. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The fixed threshold is 0.

7. When the same polarization transmittance is ≥0.7, it is judged as logic "1" and when the same polarization transmittance is <0.7, it is judged as logic "0".

7. The switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface according to claim 1, characterized in that, The all-optical logic gate device implements at least one of the five logic gates—AND, OR, NOT, NAND, and NOR—when the operating wavelengths are 550 nm and 1050 nm and the input encoding combinations are different.

8. A method for fabricating a switchable all-optical logic gate device based on an L-shaped silicon chiral metasurface as described in any one of claims 1 to 7, characterized in that, include: Using SOI wafers as substrates, a patterned resist mask layer is formed on the top silicon layer of the SOI wafers; Using a patterned resist mask layer as a mask, anisotropic etching is performed on the top silicon layer until the buried oxide layer of the SOI wafer is stopped, exposing the silicon dioxide substrate. Remove the patterned resist mask layer to obtain an all-optical logic gate device.

9. The preparation method according to claim 8, characterized in that, The process of forming the patterned resist mask layer includes: forming a resist layer on the top silicon layer, exposing a selected area of ​​the resist layer with an electron beam, and developing the exposed resist layer to obtain the patterned resist mask layer.

10. The preparation method according to claim 9, characterized in that, Before forming the resist layer on the top silicon layer, the top silicon layer is pretreated with a tackifier; The thickener is hexamethyldisilazane.