Low-cost high-reliability server storage ssd and implementation method
Patent Information
- Application Number
- CN202611089237.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-22
- Publication Date
- 2026-10-13
AI Technical Summary
现有技术缺乏一种能够依据存储块实时磨损状态差异化提供纠错保护,同时根据数据访问热度将其导向相应保护等级存储区域的机制,从而无法在维持高可靠性的前提下有效压缩校验冗余开销
[0010]采集每个存储块的累计擦除次数与原始误码率并归一化处理得到磨损因子,依据磨损因子相对于全盘平均磨损因子的偏离量,将存储块动态划分为冗余增强区、标准区和冗余缩减区。对冗余增强区配置长度最大的第一校验码,对标准区配置中等长度的第二校验码,对冗余缩减区配置长度最小的第三校验码。经过这般差异化配置,磨损严重、误码率高的存储块得到与其退化状态相适应的强纠错能力,单页数据可被纠正的错误比特数显著增多,有效抑制因存储介质老化产生的数据不可纠正错误,使得原本易失效的高磨损区域仍能维持长时间的可靠数据保存;磨损轻微、误码率极低的存储块仅需极短的校验码即可达到目标误码要求,校验码所占用的存储空间大幅缩减,由此释放出更多容量用于存储用户数据。在整体存储空间中,冗长的校验信息仅集中在少数高磨损块上,而非分布于全盘,从而将校验存储开销控制在较低水平,避免了传统固定校验方案中全局强码长带来的空间浪费以及全局弱码长引起的高磨损块数据丢失现象。提取写入数据的逻辑地址对应的访问频率索引,依据该索引将高频访问数据优先写入冗余增强区,将低频访问数据写入冗余缩减区,中等频率数据写入标准区。高频数据被放置于采用最长校验码的存储区域后,即使在所驻留的存储块擦除次数升高、误码背景恶化的情况下,依然拥有足够充裕的纠错余量,频繁读取过程中的数据完整性获得保持,大幅降低因介质退化导致热数据错误的风险。低频数据落位于校验码长度最短的冗余缩减区,这类数据访问稀疏、对实时纠错能力的要求有限,较短校验码即可满足其持久存储需求,由此进一步压缩了冷数据对冗余资源的消耗。基于访问频率的定向放置使校验资源的分配与数据的可靠性需求精准对齐,在全盘层面达成数据可靠性与存储空间利用率的最优配合,既没有为冷数据预留过度保护而浪费容量,也不会因热数据所处区域保护不足而留下隐患。
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Figure CN122902938A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of solid-state drive (SSD) storage technology, specifically to a low-cost, high-reliability server storage SSD and its implementation method. Background Technology
[0002] In server solid-state drives (SSDs), the inherent erasure and wear characteristics of NAND flash memory cause storage cells to gradually degrade with each erase cycle, leading to a continuous increase in the original bit error rate (BER). To ensure data integrity, error correction coding is essential, and the parity code length directly determines the error correction capability and the required storage resource overhead. Existing solutions generally adopt a globally uniform parity code length, either configuring strong error correction codes based on the worst-case end-of-life conditions or adjusting the code length according to the average wear state of the entire drive to meet reliability requirements. In actual operation, due to the influence of workload access patterns and garbage collection strategies, the cumulative number of erase cycles varies significantly among different physical blocks, with the BER in severely worn areas being much higher than that in lightly worn areas. The fixed parity code length strategy cannot adapt to this non-uniformity: if a long parity code is designed according to the requirements of high-error-rate blocks, a large number of low-error-rate blocks will carry redundant information that is extremely incompatible with their current reliability, resulting in a significant waste of storage space, reduced effective capacity, and increased unit storage cost; if a shorter code length is designed according to the average wear state, high-error-rate blocks will frequently experience uncorrectable errors due to insufficient error correction capability, leading to data loss. This one-size-fits-all configuration approach struggles to balance reliability and cost. In server storage systems, data access frequency exhibits a clear stratification between hot and cold data. Frequently accessed, hot data is more sensitive to reliability, and its failure has a wide-ranging impact. Traditional storage layouts do not correlate the reliability level of storage blocks with the hot / cold nature of the data. Hot data may end up in severely worn and weakly protected areas, increasing the risk of critical data corruption. Current technology lacks a mechanism that can provide error correction protection based on the real-time wear status of storage blocks and guide data to storage areas with appropriate protection levels based on access frequency. Consequently, it cannot effectively reduce verification redundancy overhead while maintaining high reliability. Summary of the Invention
[0003] This invention aims to provide a low-cost, high-reliability server storage SSD and its implementation method. By adaptive partitioning based on storage block wear status and differentiated verification strength configuration, as well as a targeted placement strategy based on data access frequency, it achieves high data reliability that meets the needs of server applications with limited storage verification overhead, thus changing the dilemma that traditional unified verification schemes cannot balance high reliability and low redundancy cost.
[0004] To achieve the above objectives, this invention provides the following technical solution: This application provides a low-cost, high-reliability server storage SSD implementation method and SSD. By forming differentiated parity partitions and a hot / cold data hierarchical storage mechanism within the disk based on the real-time wear status and data access frequency of the storage blocks, it reduces redundancy overhead and increases effective storage capacity while ensuring data reliability. The method collects the cumulative number of erases and the raw bit error rate within the most recent time window for each storage block, and normalizes them to obtain the wear factor of each storage block. Based on the deviation of the wear factor from the average wear factor of the entire disk, the storage blocks are divided into a redundancy enhancement zone, a standard zone, and a redundancy reduction zone. A first parity code length is configured for the redundancy enhancement zone, a second parity code length for the standard zone, and a third parity code length for the redundancy reduction zone, with the first parity code length being greater than the second parity code length and the third parity code length being the smallest. Thus, blocks with higher wear levels receive stronger error correction protection, while blocks with lower wear levels have a reduced parity code ratio, achieving high reliability overall at a lower cost.
[0005] During data writing, the access frequency index corresponding to the logical address of the data to be written is extracted, and the target storage area for writing is selected based on this index. High-frequency access data is written to the redundancy enhancement area, low-frequency access data is written to the redundancy reduction area, and the remaining data is written to the standard area. The physical address of the write operation and its corresponding storage area type are recorded in the address mapping table. This strategy, which combines the hot / cold attributes of data with the reliability level of storage blocks, ensures that frequently read / written hot data is always in a high-reliability area, while cold data frees up more available space for users.
[0006] As a preferred implementation, the normalization of the wear factor specifically involves: obtaining the maximum and minimum cumulative erase counts for all memory blocks; subtracting the minimum value from the cumulative erase counts for each memory block and dividing by the difference between the maximum and minimum values to obtain a first normalized value; similarly, normalizing the original bit error rate to its maximum and minimum values to obtain a second normalized value; and adding the product of the first normalized value and the first coefficient to the product of the second normalized value and the second coefficient to obtain the wear factor for that memory block. This method can comprehensively reflect the degree of wear and data error tendency. Furthermore, the second coefficient is dynamically adjusted based on the reciprocal of the overall average original bit error rate. At the end of each fixed period, the overall average original bit error rate is recalculated, and the ratio of the reciprocal of the overall average original bit error rate to the reciprocal of the preset baseline bit error rate is used as the updated value of the second coefficient, so that the calculation of the wear factor can adapt to the evolution of flash memory error characteristics during use. When partitioning storage areas, the arithmetic mean of the wear factors of all storage blocks is calculated as the overall average wear factor. For each storage block, the absolute value of the difference between its wear factor and the overall average wear factor is calculated. Storage blocks with an absolute difference greater than a first deviation threshold are marked as redundancy enhancement areas, and storage blocks with an absolute difference less than a second deviation threshold are marked as redundancy reduction areas. If the second deviation threshold is less than the first deviation threshold, the remaining storage blocks are marked as standard areas. This dynamically distinguishes blocks at different wear stages, laying the foundation for differentiated configuration.
[0007] The preferred method for obtaining the access frequency index is as follows: Maintain an access counter for each logical address. Each time a read or write operation is performed on that logical address, the counter increases by a preset increment. After a fixed period, multiply all access counters by a decay factor to reduce the impact of historical accesses over time. Compare the current access counter value with the average access counter value within the partition to which the logical address belongs. If it is higher than a set multiple of the average, it is determined to be high-frequency data; if it is lower than another set multiple of the average, it is determined to be low-frequency data; the rest are medium-frequency data. This accurately captures the access frequency of data. When configuring the first checksum length for the redundancy enhancement area, it can be further adaptively adjusted based on the wear level: Determine the current average wear factor of all storage blocks in the redundancy enhancement area. Use the ratio of this average wear factor to the overall disk average wear factor as an amplification factor. Using the second checksum length of the standard area as a benchmark, multiply the second checksum length by the amplification factor and round up to the nearest checksum length level to obtain the final first checksum length. This directly correlates the checksum strength with the severity of wear.
[0008] During write operations, when the access frequency index indicates high-frequency data, the storage block with the largest remaining capacity percentage is preferentially selected from the redundancy enhancement zone for writing; when the index indicates low-frequency data, the storage block with the fewest erase cycles is selected from the redundancy reduction zone for writing; when the index indicates medium-frequency data, the storage block with the smallest weighted sum of remaining capacity and erase cycles is selected from the standard zone for writing. This achieves balanced utilization and extended lifespan within each partition. A one-byte zone type field is added to each logical address entry in the address mapping table to store the identifier of the redundancy enhancement zone, standard zone, or redundancy reduction zone; this field is updated synchronously when data undergoes physical address migration due to wear leveling or garbage collection; during data reading, the corresponding checksum length is selected based on the zone type field for data verification to ensure consistency between partition information and data. To improve the long-term reliability of the redundancy enhancement zone, all storage blocks in the zone are traversed during system idle time, and the number of error bits recorded in each storage block is counted. Data in storage blocks with error bits exceeding a first error threshold is migrated to the storage block with the largest remaining capacity in the standard zone, and the address mapping table is updated. After migration, the original storage block is marked as a block to be reclaimed and an erasure operation is performed. After erasure, it is re-added to the redundancy enhancement zone. This process actively removes data from high-risk blocks, further reducing the probability of data loss. This application also provides a low-cost, high-reliability server storage SSD, including a processor and a memory. The processor is used to execute programs, instructions, or code in the memory to implement the above-described low-cost, high-reliability server storage SSD implementation method. This SSD can achieve reliability comparable to full-disk high-specification verification with lower additional verification overhead, reducing the cost per unit capacity.
[0009] The technical effects and advantages provided by the present invention in the above technical solution are as follows:
[0010] The wear factor is obtained by collecting the cumulative number of erases and the original bit error rate for each storage block and normalizing them. Based on the deviation of the wear factor from the average wear factor of the entire disk, the storage blocks are dynamically divided into redundancy enhancement areas, standard areas, and redundancy reduction areas. The redundancy enhancement area is configured with the longest first checksum, the standard area with the medium-length second checksum, and the redundancy reduction area with the shortest third checksum. Through this differentiated configuration, storage blocks with severe wear and high bit error rates acquire strong error correction capabilities adapted to their degradation state. The number of erroneous bits that can be corrected per page increases significantly, effectively suppressing uncorrectable data errors caused by storage media aging. This allows high-wear areas that are prone to failure to maintain reliable data retention for extended periods. Storage blocks with slight wear and extremely low bit error rates require only very short checksums to meet the target error rate requirements, significantly reducing the storage space occupied by checksums and freeing up more capacity for storing user data. In the overall storage space, lengthy checksum information is concentrated on only a few high-wear blocks, rather than distributed across the entire disk. This keeps checksum storage overhead at a low level, avoiding the space waste caused by globally strong checksum lengths and the data loss of high-wear blocks caused by globally weak checksum lengths in traditional fixed checksum schemes. The access frequency index corresponding to the logical address of the written data is extracted. Based on this index, high-frequency access data is preferentially written to the redundancy enhancement area, low-frequency access data to the redundancy reduction area, and medium-frequency data to the standard area. With high-frequency data placed in the storage area using the longest checksum, even with increased erase cycles and worsening error backgrounds, there is still sufficient error correction margin. Data integrity is maintained during frequent reads, significantly reducing the risk of hot data errors due to media degradation. Low-frequency data is located in the redundancy reduction area with the shortest checksum length. This type of data has sparse access and limited requirements for real-time error correction capabilities; shorter checksums can meet its persistent storage needs, further reducing the consumption of redundant resources by cold data. Targeted placement based on access frequency ensures that the allocation of verification resources is precisely aligned with the reliability requirements of the data, achieving the optimal balance between data reliability and storage space utilization at the overall level. This avoids wasting capacity by reserving excessive protection for cold data, while also preventing potential risks due to insufficient protection in areas where hot data resides. Attached Figure Description
[0011] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.
[0012] Figure 1 This is a flowchart illustrating a low-cost, high-reliability server storage SSD implementation method;
[0013] Figure 2 This is a flowchart illustrating a low-cost, high-reliability server storage SSD implementation method;
[0014] Figure 3 This is a graph showing the wear factor of the storage block and the normalized number of erases versus the original bit error rate.
[0015] Figure 4 This is a schematic diagram of the logical address access frequency index partitioning;
[0016] Figure 5 This is a graph showing the statistics of error bits in the redundant enhancement area storage block and the threshold determination. Detailed Implementation
[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] See Figure 1This invention provides a low-cost, high-reliability server storage SSD implementation method, comprising: collecting the cumulative number of erases and the original bit error rate within the most recent time window for each storage block; normalizing the cumulative number of erases and the original bit error rate to obtain the wear factor of each storage block; dividing the storage block into a redundancy enhancement area, a standard area, and a redundancy reduction area based on the deviation of the wear factor from the average wear factor of the entire disk; configuring a first checksum length for the redundancy enhancement area, a second checksum length for the standard area, and a third checksum length for the redundancy reduction area, wherein the first checksum length is greater than the second checksum length and the third checksum length is the smallest; extracting the access frequency index corresponding to the logical address of the data being written during data writing; selecting the storage area based on the access frequency index: writing high-frequency data to the redundancy enhancement area, low-frequency data to the redundancy reduction area, and the remaining data to the standard area; and recording the physical address of the write operation and its corresponding storage area type in an address mapping table. Storage blocks are physical flash memory blocks in a solid-state drive (SSD). The cumulative number of erases is recorded by a counter incremented by the controller each time an erase command is executed. Within a time window, the original bit error rate (BER) is calculated by reading storage blocks and comparing the original data with the read data, and the ratio of the number of erroneous bits to the total number of bits read. Normalization maps the cumulative number of erases and the BER to a common value range. The overall disk average wear factor is the arithmetic mean of the wear factors of all storage blocks, and the deviation is the absolute difference between the wear factor of a single block and this average. The first checksum length, second checksum length, and third checksum length correspond to the length of the error correction code check bits for different error correction capabilities. The access frequency index is derived from historical access statistics of logical addresses. The address mapping table records the correspondence between logical addresses and physical addresses, as well as the storage area category where the physical address is located.
[0019] Example 1:
[0020] This invention provides a low-cost, high-reliability server storage SSD implementation method, including: (See reference) Figure 2 The system collects the cumulative erase count and the raw bit error rate within the most recent time window for each storage block. It then normalizes the cumulative erase count and raw bit error rate to obtain the wear factor for each storage block. Based on the deviation of the wear factor from the overall average wear factor, the storage blocks are divided into a redundancy enhancement zone, a standard zone, and a redundancy reduction zone. A first checksum length is configured for the redundancy enhancement zone, a second checksum length for the standard zone, and a third checksum length for the redundancy reduction zone, with the first checksum length being greater than the second checksum length and the third checksum length being the smallest. During data writing, the system extracts the access frequency index corresponding to the logical address of the data being written. Based on the access frequency index, the storage area is selected: high-frequency data is written to the redundancy enhancement zone, low-frequency data is written to the redundancy reduction zone, and the remaining data is written to the standard zone. The physical address of the write operation and its corresponding storage area type are recorded in an address mapping table.
[0021] In practice, the process of normalizing the cumulative erase counts and the original bit error rate to obtain the wear factor for each storage block includes: reading the cumulative erase counts for each storage block from the erase count table maintained by the SSD controller, determining the maximum and minimum cumulative erase counts for all storage blocks; for each storage block, subtracting the minimum cumulative erase count from the cumulative erase count of the storage block to obtain a first difference, subtracting the minimum cumulative erase count from the maximum cumulative erase count of all storage blocks to obtain a second difference, and dividing the first difference by the second difference to obtain the first normalized value for the storage block. The SSD controller performs data readback on each storage block within a time window and compares it with the written original data, counts the number of error bits, calculates the ratio of the number of error bits to the total number of read bits, and obtains the original bit error rate for the storage block. Determine the maximum and minimum original bit error rates (BER) of all memory blocks. For each memory block, subtract the minimum BER of all memory blocks from its original BER to obtain a third difference. Subtract the minimum BER of all memory blocks from its maximum original BER to obtain a fourth difference. Divide the third difference by the fourth difference to obtain the second normalized value of the memory block. Calculate the wear factor using the first normalized value, the second normalized value, the first coefficient, and the second coefficient. The formula for calculating the wear factor is:
[0022]
[0023] in, This represents the wear factor of the i-th memory block. Indicates the first coefficient. This represents the cumulative number of erases for the i-th memory block. This represents the minimum number of erases accumulated across all memory blocks. This represents the maximum cumulative number of erases for all storage blocks. Indicates the second coefficient. Let represent the original bit error rate of the i-th storage block. This represents the minimum original bit error rate of all memory blocks. This represents the maximum original bit error rate (BER) of all storage blocks. The first coefficient is preset to a fixed value of 0.5. This setting is based on ensuring that the initial weights of the cumulative erase count and the original BER on the wear factor are equal. Furthermore, since both the first and second normalized values are within the [0,1] interval, the superimposed wear factor is also within the [0,1] interval, facilitating subsequent threshold division. The second coefficient is initially set to 0.5 and dynamically adjusted during system operation. The dynamic adjustment method for the second coefficient is as follows: at the end of each fixed period, the overall average original BER is recalculated. The overall average original BER is the arithmetic mean of the original BERs of all storage blocks. The ratio of the reciprocal of the overall average original BER to the reciprocal of the preset baseline BER is used as the updated value of the second coefficient. The updated second coefficient is then used in the recalculation of the wear factor of all storage blocks in the next period. The fixed period is set to 24 hours, chosen to adapt to the daily variation of server storage load and balance the timeliness of the second coefficient update with computational overhead. The preset baseline bit error rate is set to the upper limit of the original bit error rate specified in the memory block's manufacturer's specifications. This value represents the typical bit error rate that a storage block should have when no significant wear has occurred. As the storage block usage time increases, the average original bit error rate of the entire disk gradually increases, while its reciprocal decreases, leading to a decrease in the updated value of the second coefficient. This reduces the contribution of the original bit error rate to the wear factor calculation, making the wear factor more reflective of the difference in the cumulative number of erases, in order to adapt to the dominant role of the number of erases in the later stages of wear.
[0024] See Figure 3 The horizontal axis in the graph represents the storage block number, according to the wear factor. Sorted from smallest to largest, there are a total of 512 storage blocks; the vertical axis represents the normalized value, ranging from [0,1]. The three curves in the figure represent the wear factor. (Red solid line) First normalized value Normalized cumulative erase count (green dashed line) and second normalized value Normalized raw bit error rate (blue dotted line).
[0025] As shown in the figure, the normalized cumulative erase count and the normalized original bit error rate have similar overall trends, both gradually increasing with the increase of the memory block number, indicating that both reflect changes in the wear and tear of the memory blocks. However, the normalized cumulative erase count is generally slightly higher than the normalized original bit error rate, and the curve is smoother, showing a continuous upward trend; the normalized original bit error rate fluctuates more, with the bit error rate of some memory blocks slightly higher or slightly lower than the normalized trend of the cumulative erase count.
[0026] Wear factor The result is a weighted sum of the two curves. The red solid line curve is generally higher than the green and blue curves, especially after the block number exceeds approximately 400, where the wear factor increases rapidly, approaching its maximum value of 1, indicating that some blocks have undergone significant wear. The steep rise in the wear factor curve suggests that, in the wear factor calculation, although the first coefficient... Second coefficient The initial value is set to 0.5, but as the second coefficient is dynamically adjusted, the contribution of the cumulative number of erasures may increase in areas with higher wear.
[0027] Example 2:
[0028] In specific implementation, the method of dividing storage areas based on the deviation of the wear factor from the overall disk average wear factor includes: the solid-state drive controller obtains the wear factors of all storage blocks, and the wear factors of all storage blocks are calculated according to the method described in Example 1. The arithmetic mean of the wear factors of all storage blocks is calculated, and the arithmetic mean is used as the overall disk average wear factor. Specifically, the overall disk average wear factor is obtained by summing the wear factors of all storage blocks and dividing by the total number of storage blocks. For each storage block, the absolute value of the difference between the wear factor of the storage block and the overall disk average wear factor is calculated by subtracting the absolute value of the difference between the wear factor of the storage block and the overall disk average wear factor. The absolute value of the difference for each storage block is compared with a first deviation threshold and a second deviation threshold, where the first deviation threshold is greater than the second deviation threshold. The first deviation threshold is set to 0.3, and the second deviation threshold is set to 0.1. The first deviation threshold of 0.3 is set based on the following: the wear factor ranges from [0,1]. When the absolute value of the difference between the wear factor of a storage block and the average wear factor of the entire disk exceeds 0.3, it indicates that the wear level of the storage block significantly deviates from the average level of the entire disk, and the expected remaining reliable write cycles are less than 70% of the average remaining cycles of the entire disk, requiring stronger error correction protection. The second deviation threshold of 0.1 is set based on the following: when the absolute value of the difference is less than 0.1, it indicates that the wear level of the storage block is close to or better than the average wear level of the entire disk, the inherent reliability of the storage block is high, and it can adapt to lower intensity error correction verification to save storage space. If the absolute value of the difference between storage blocks is greater than the first deviation threshold, the storage block is marked as a redundancy enhancement area. If the absolute value of the difference between storage blocks is less than the second deviation threshold, the storage block is marked as a redundancy reduction area. If the absolute value of the difference between storage blocks is greater than or equal to the second deviation threshold and less than or equal to the first deviation threshold, the storage block is marked as a standard area. The solid-state drive controller maintains a region type table in memory, which stores the region identifier code corresponding to each storage block. For example, 0x00 represents the redundancy enhancement region, 0x01 represents the standard region, and 0x02 represents the redundancy reduction region. After the region division is completed, the region type table is referenced by the subsequent data writing process and the check code length configuration process.
[0029] Example 3:
[0030] In practical implementation, the method for extracting the access frequency index corresponding to the logical address of the written data includes: the solid-state drive (SSD) controller maintains an access counter for each logical address, which is stored in an access frequency table in memory. Each entry in the access frequency table contains the logical address and the corresponding access counter value. Each time a read or write operation is performed on a logical address, the access counter corresponding to that logical address in the SSD controller's access frequency table increases by a preset increment. The preset increment is set to 1, based on the premise that each access event contributes the same basic amount to the logical address's activity level, simplifying the counting logic. After a fixed period, the SSD controller multiplies the access counters of all logical addresses by a decay factor, causing the impact of historical accesses to decrease over time. The fixed period is set to 60 seconds, chosen to cover the burst cycles of typical server storage loads while avoiding excessive multiplication and update overhead from excessively short periods. The decay factor is set to 0.95, based on the premise that after every 60-second cycle, 95% of the contribution of historical access counts is retained, and after approximately 14 cycles, the contribution of a single historical access decays to approximately 50%, effectively filtering out instantaneous fluctuations while preserving recent access characteristics.
[0031] After the access counters are updated, the SSD controller groups all logical addresses by their respective partitions and calculates the arithmetic mean of the access counters for all logical addresses within each partition, using this as the partition's average access counter value. The current access counter value for each logical address is compared to the partition's average access counter value. If the current access counter value for a logical address is more than three times the partition's average access counter value, the data corresponding to that logical address is considered high-frequency data. The three-times rule is that access counts more than three times the average indicate that the logical address's access activity significantly exceeds the average level of data within that partition, conforming to high-frequency access characteristics. If the current access counter value for a logical address is less than 0.5 times the partition's average access counter value, the data corresponding to that logical address is considered low-frequency data. The 0.5-times rule is that access counts less than half the average indicate that the logical address's access activity is significantly lower than the general level of data within that partition, conforming to cold data characteristics. If the current access counter value for a logical address is greater than or equal to 0.5 times the partition's average access counter value and less than or equal to three times the partition's average access counter value, the data corresponding to that logical address is considered medium-frequency data. The solid-state drive (SSD) controller selects storage areas based on access frequency indices as follows: When the access frequency index corresponding to the logical address of the data to be written indicates high-frequency data, the storage block with the largest remaining capacity percentage is selected from the redundancy enhancement zone for writing. The remaining capacity percentage is calculated by dividing the current number of free pages in the storage block by the total number of physical pages in the storage block. Selecting the storage block with the largest remaining capacity percentage avoids concentrating high-frequency data writes on a few storage blocks, delaying the wear concentration on individual storage blocks in the redundancy enhancement zone. When the access frequency index corresponding to the logical address of the data to be written indicates low-frequency data, the storage block with the lowest cumulative erase count is selected from the redundancy reduction zone for writing. The cumulative erase count is obtained from the erase count table maintained by the SSD controller. Selecting the storage block with the lowest cumulative erase count balances the write / erase load in the redundancy reduction zone, preventing premature failure due to some storage blocks having too many erase counts. When the access frequency index corresponding to the logical address of the data to be written indicates medium-frequency data, the storage block with the smallest weighted sum of remaining capacity and cumulative erase count is selected from the standard zone for writing. The weighted sum is calculated using the following formula:
[0032]
[0033] in, This represents the weighted sum of the m-th storage block. The weighting coefficient represents the cumulative number of erases. This represents the cumulative number of erases for the m-th storage block. The weighting coefficients representing the remaining capacity. This represents the percentage of remaining capacity in the m-th storage block. Set to 0.7, The value is set to 0.3. The basis for this setting is that the demand for storage block lifespan and write balance for medium-frequency data is between that of high-frequency and low-frequency data. The weight coefficient of the cumulative erase count is set to the larger value of 0.7 to prioritize the balance of storage block lifespan, and the weight coefficient of the remaining capacity ratio is set to 0.3 to take into account the write distribution. Read from the erase count table maintained by the solid-state drive controller. It is calculated by dividing the current number of free pages in the m-th storage block by the total number of physical pages in the m-th storage block.
[0034] See Figure 4 This figure illustrates the statistical results of extracting the access frequency index corresponding to the logical address of the written data in Example 3. The horizontal axis represents the logical address (sorted by access counter value from smallest to largest), and the vertical axis represents the access counter value. The figure uses three colored dots to mark high-frequency data (red), medium-frequency data (blue), and low-frequency data (green), and two dashed lines mark the threshold for high-frequency data (red dashed line, 3 times the average access counter value within the partition) and the threshold for low-frequency data (green dashed line, 0.5 times the average access counter value within the partition).
[0035] As can be observed in the figure, the access counter values for low-frequency data are generally low and densely distributed, with values roughly below the threshold of 0.5 times the average access counter value within the partition, as indicated by the green dashed line. As the logical address number increases, the access counter value gradually rises, entering the medium-frequency data range, where the access counter value lies between the green and red dashed lines, showing a gentle upward trend. When the access counter value exceeds the threshold of the red dashed line, i.e., more than 3 times the average access counter value within the partition, the logical address is determined to be high-frequency data. The access counter value for high-frequency data shows a significant jump in growth and is concentrated in the end region of the logical address sorting, with the access counter value reaching as high as 3000 or more.
[0036] Example 4:
[0037] In specific implementation, the method for configuring the first checksum length for the redundancy enhancement zone includes: the solid-state drive controller obtaining the current wear factor of all storage blocks in the redundancy enhancement zone, which is calculated according to the method described in Example 1. The arithmetic mean of the current wear factors of all storage blocks in the redundancy enhancement zone is calculated, and this arithmetic mean is used as the current average wear factor of the redundancy enhancement zone. The overall disk average wear factor is obtained, which is the arithmetic mean of the wear factors of all storage blocks, and the method of obtaining it is consistent with the method of obtaining the overall disk average wear factor described in Example 2.
[0038] The ratio of the current average wear factor of the redundancy enhancement zone to the average wear factor of the entire disk is used as the amplification factor. Theoretically, the amplification factor should be greater than 1. However, since the redundancy enhancement zone is defined as a wear factor deviating from the average wear factor of the entire disk by more than a first deviation threshold (set to 0.3), and the wear factors of all storage blocks in the redundancy enhancement zone are at least 0.3 higher than the average wear factor of the entire disk, the amplification factor is usually between 1.3 and 2.0. The second checksum length configured in the standard zone is obtained. The second checksum length is a pre-set fixed value, selected as 32 bytes. This is chosen based on the length of the checksum required to provide reliable error correction capability under typical bit error rates of storage blocks using mainstream BCH or LDPC error correction codes. The second checksum length is multiplied by the amplification factor to obtain the initial value of the first checksum length. The initial value is rounded up using the checksum length level, which is preset to 8 bytes, 16 bytes, 32 bytes, 48 bytes, 64 bytes, 80 bytes, 96 bytes, 112 bytes, and 128 bytes. The rounding rule is as follows: if the initial value is less than or equal to 8 bytes, the first checksum length is 8 bytes; if the initial value is greater than 8 bytes but less than or equal to 16 bytes, the first checksum length is 16 bytes, and so on, up to the maximum level of 128 bytes. If the initial value exceeds 128 bytes, the first checksum length is limited to 128 bytes, because a checksum length exceeding 128 bytes incurs excessive storage overhead and is no longer applicable. In a supplementary implementation, the configuration of the first checksum length is triggered after each region re-division, ensuring that the first checksum length matches the wear state of the storage blocks in the current redundancy enhancement zone. In specific implementations, the method of recording the physical address of the write operation and its corresponding storage zone type in the address mapping table includes: adding a one-byte zone type field to each logical address entry in the address mapping table. The zone type field stores the identifier code of the redundancy enhancement zone, standard zone, or redundancy reduction zone. The identifier code is defined in hexadecimal: 0xA1 represents the redundancy enhancement zone, 0xA2 represents the standard zone, and 0xA3 represents the redundancy reduction zone. When writing data, the storage block to which the data is assigned is determined in the region type table based on the physical address. The solid-state drive controller looks up the entry corresponding to the logical address in the address mapping table, writes the physical address into the physical address field of the address mapping table, and updates the region type field to the corresponding identifier.
[0039] When data undergoes physical address migration due to wear leveling or garbage collection, the SSD controller copies the data from the source physical address to the target physical address, which corresponds to a new storage block. It queries the region type table based on the target physical address to obtain the storage region type corresponding to the new storage block, updates the physical address field of the corresponding logical address entry in the address mapping table to the target physical address, and simultaneously updates the region type field to the identifier code corresponding to the new storage region type. When reading data, the SSD controller queries the address mapping table based on the logical address sent by the host to obtain the physical address and region type fields. It determines the storage region type based on the identifier code in the region type field: if the identifier code is 0xA1, the first checksum length is used for verification and error correction of the read data; if the identifier code is 0xA2, the second checksum length is used; and if the identifier code is 0xA3, the third checksum length is used. The first, second, and third checksum lengths are all stored in the checksum configuration register, which is written with corresponding values by the SSD controller after region partitioning and checksum length configuration. The third checksum length is set to 16 bytes because the wear and tear on the storage blocks in the redundancy reduction area is relatively light, and the original error rate is low. A checksum length of 16 bytes can save storage space to the maximum extent while ensuring reliability.
[0040] Example 5:
[0041] In practice, the SSD controller monitors the system operation queue. When both read and write commands in the queue are empty and exceed a preset time length, the system enters an idle period. The preset time length is set to 5 milliseconds, based on the fact that the typical interval for host command arrival is in the microsecond range. Five milliseconds of no commands indicate that the host is in a silent period, suitable for starting background operations. After the system enters the idle period, the SSD controller initiates the error bit count statistics process for the redundant enhancement zone storage blocks. The SSD controller traverses all storage blocks in the redundant enhancement zone, performing a data readback operation on each traversed block. The data readback operation sends read commands to the flash memory chip, reads data from all programmed pages in the storage block, and sends the read data to the error correction code decoder. The error correction code decoder uses a decoding algorithm corresponding to the length of the first checksum. While performing error correction, the decoder outputs the number of error bits recorded in the storage block, defined as the total number of bits corrected by the error correction code in all programmed pages of the storage block. The SSD controller compares the count of error bits recorded in each storage block with a first error threshold. The first error threshold is determined based on the length of the first checksum currently used in the redundancy enhancement area. The formula for calculating the first error threshold is as follows:
[0042]
[0043] in, Indicates the first error threshold. Indicates the safety factor. This represents the maximum number of correctable error bits corresponding to the length of the first checksum. The value is obtained by querying the checksum parameter table, which is pre-stored in the read-only memory of the solid-state drive controller. The checksum parameter table establishes a mapping relationship between the checksum length and the maximum number of correctable error bits. The value is set to 0.8, based on the fact that when the number of error bits reaches 80% of the maximum correctable number, the original bit error rate of the storage block is close to the saturation zone of its error correction capability, requiring early data migration to avoid uncorrectable errors. The safety factor of 0.8 strikes a balance between retaining a 20% error correction margin and avoiding excessively frequent migrations. When the number of error bits recorded in a storage block exceeds the first error threshold, the solid-state drive controller marks the storage block as a high-error storage block and initiates the data migration process.
[0044] The data migration process includes: traversing all valid pages in the high-error storage block, reading the data from each valid page, correcting it with an error-correcting code decoder to obtain clean data; selecting the storage block with the largest remaining capacity from the standard area as the target storage block, where the remaining capacity is defined as the number of free pages in the storage block; writing the clean data page by page into the free pages of the target storage block; after writing, updating the physical address field of the corresponding logical address in the address mapping table, pointing the physical address field to the new physical address in the target storage block, and simultaneously updating the area type field in the address mapping table to the standard area identifier code 0xA2. When multiple storage blocks with the largest remaining capacity exist in the standard area, the storage block with the smallest cumulative erase count is further selected as the target storage block, where the cumulative erase count is obtained from the erase count table. After the data migration is complete, the solid-state drive controller marks the original high-error storage block as a block to be reclaimed. The block to be reclaimed block marking is stored in the block status table, which records the status of each storage block, with status values including free, allocated, and pending reclamation. The solid-state drive (SSD) controller triggers an erase operation on the block to be reclaimed. This erase operation is completed by sending a block erase command to the flash memory chip. After erasure, all pages in the storage block are restored to an idle state. After erasure, the SSD controller changes the block's status in the block status table from pending reclamation to idle, and sets the block's region identifier code to the redundancy enhancement zone identifier code 0xA1 in the region type table, re-adding it to the redundancy enhancement zone for subsequent high-frequency data writing. If the system idle time does not last for a preset duration, and the host sends a new read / write command, the SSD controller pauses the error bit count statistics process, saves the current traversal position, prioritizes responding to the host command, and resumes the statistics process from the saved traversal position after the system re-enters idle time. In some embodiments, the low-cost, high-reliability server storage SSD includes a processor and a memory, connected to the processor. The memory stores programs, instructions, or code, and the processor executes the programs, instructions, or code in the memory to implement the aforementioned low-cost, high-reliability server storage SSD method. The processor connects to the flash memory chip array through the flash memory controller interface. The memory includes dynamic random access memory and non-volatile memory. When the processor executes the program, it performs tasks such as calculating the wear factor of the memory block, partitioning the memory area, configuring the check code length, extracting the access frequency index, selecting the memory area, maintaining the address mapping table, counting the number of error bits, and data migration operations.
[0045] See Figure 5 In the graph, the horizontal axis represents the block number in the solid-state drive, and the blocks are sorted in ascending order of their error bit count; the vertical axis represents the error bit count of the corresponding block. Blue dots represent the error bit distribution of normal blocks, and red triangles represent the error bit count of high-error blocks. The dashed line represents the first error threshold. The threshold is determined according to the calculation formula described in Example 5, and is used to determine whether the storage block has reached a high error state that requires migration.
[0046] As shown in the graph, the number of error bits initially flattens out and then increases sharply as the memory block number increases. The curve formed by the blue dots initially shows a low number of error bits, none of which exceed the first error threshold. When the storage block number approaches approximately 400, the number of error bits gradually approaches the threshold; after exceeding the 400th storage block, the number of error bits significantly exceeds the threshold and is marked with a red triangle, indicating that the number of error bits in this part of the storage block has exceeded 80% of the maximum correctable error bits set by the safety factor, and is in a high error state, which meets the conditions for initiating data migration in Example 5.
[0047] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.
Claims
1. A low-cost, high-reliability server storage SSD implementation method, characterized in that, include: Collect the cumulative number of erases and the raw bit error rate within the most recent time window for each storage block; The cumulative number of erases and the original bit error rate are normalized to obtain the wear factor for each storage block; Based on the deviation of the wear factor from the average wear factor of the entire disk, the storage block is divided into a redundancy enhancement area, a standard area, and a redundancy reduction area. Configure a first check code length for the redundancy enhancement area, a second check code length for the standard area, and a third check code length for the redundancy reduction area, with the first check code length being greater than the second check code length and the third check code length being the smallest. When writing data, extract the access frequency index corresponding to the logical address where the data is being written. Storage areas are selected based on the access frequency index: high-frequency data is written to the redundancy enhancement area, low-frequency data is written to the redundancy reduction area, and the remaining data is written to the standard area. The physical address of the write operation and its corresponding storage area type are recorded in the address mapping table.
2. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The step of normalizing the cumulative number of erases with the original bit error rate to obtain the wear factor for each memory block includes: Get the maximum and minimum cumulative erase counts for all storage blocks. Subtract the minimum cumulative erase count from the cumulative erase counts for each storage block and divide by the difference to obtain the first normalized value. Obtain the maximum and minimum original bit error rates of all storage blocks. Subtract the minimum original bit error rate from the original bit error rate of each storage block and divide by the difference to obtain the second normalized value. The wear factor of the memory block is obtained by adding the product of the first normalized value and the first coefficient to the product of the second normalized value and the second coefficient.
3. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The method of dividing the storage block into a redundancy enhancement area, a standard area, and a redundancy reduction area based on the deviation of the wear factor from the average wear factor of the entire disk includes: Calculate the arithmetic mean of the wear factors of all storage blocks as the average wear factor of the entire disk; For each storage block, calculate the absolute value of the difference between its wear factor and the average wear factor of the entire disk; Storage blocks with an absolute difference greater than the first deviation threshold are marked as redundancy enhancement areas; Storage blocks whose absolute value of the difference is less than the second deviation threshold are marked as redundancy reduction areas, where the second deviation threshold is less than the first deviation threshold. Mark the remaining storage blocks as standard areas.
4. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The access frequency index corresponding to the logical address where the written data is extracted includes: Maintain an access counter for each logical address, and increment the access counter by a preset increment each time a read or write operation is performed on that logical address. After each fixed period, all access counters are multiplied by a decay factor so that the impact of historical accesses decreases over time. The current access counter value is compared with the average access counter value in the partition to which the logical address belongs. If it is higher than a set multiple of the average value, it is determined to be high-frequency data. If it is lower than another set multiple of the average value, it is determined to be low-frequency data. The rest are medium-frequency data.
5. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The step of recording the physical address of the write operation and its corresponding storage area type in the address mapping table includes: Add a one-byte zone type field to each logical address entry in the address mapping table. This field stores the identifier code of the redundancy enhancement zone, standard zone, or redundancy reduction zone. When data undergoes physical address migration due to wear leveling or garbage collection, the storage type field is updated to the storage type of the new physical address. When reading data, the corresponding checksum length is selected based on the zone type field in the address mapping table for data verification.
6. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The method further includes: During system idle time, traverse all storage blocks in the redundancy enhancement area and count the number of error bits recorded in each storage block; Data in storage blocks with more than the first error threshold are migrated to the storage block with the largest remaining capacity in the standard area, and the address mapping table is updated. After the migration is complete, the original storage block is marked as a block to be reclaimed, and an erase operation is triggered. After erasure, it is re-added to the redundancy enhancement area.
7. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The length of the first checksum configured for the redundancy enhancement area includes: Determine the current average wear factor of all storage blocks in the redundancy enhancement area, and use the ratio of this average wear factor to the average wear factor of the entire disk as the amplification factor; Using the length of the second check code in the standard area as a reference, multiply the length of the second check code by the amplification factor to obtain the initial value of the length of the first check code; The initial value is rounded up to the nearest checksum length level to obtain the final first checksum length.
8. The method for implementing a low-cost, high-reliability server storage SSD according to claim 1, characterized in that, The step of selecting a storage area based on the access frequency index includes: When the access frequency index indicates high-frequency data, the storage block with the largest remaining capacity in the redundancy enhancement area is selected first for writing; When the access frequency index indicates low-frequency data, the storage block with the fewest current erase counts is selected from the redundancy reduction area for writing. When the access frequency index indicates medium-frequency data, the storage block with the smallest weighted sum of current remaining capacity and erase count is selected from the standard area for writing.
9. A method for implementing a low-cost, high-reliability server storage SSD according to claim 2, characterized in that, The second coefficient is dynamically adjusted based on the reciprocal of the overall average original bit error rate, including: At the end of each fixed period, the overall average raw bit error rate is recalculated; The ratio of the reciprocal of the overall average original bit error rate to the reciprocal of the preset baseline bit error rate is used as the update value of the second coefficient. The updated second coefficient will be used in the recalculation of wear factors for all storage blocks in the next cycle.
10. A low-cost, high-reliability server storage SSD, characterized in that, The device includes a processor and a memory, the memory and the processor being connected. The memory is used to store programs, instructions or code, and the processor is used to execute the programs, instructions or code in the memory to implement a low-cost, high-reliability server storage SSD implementation method as described in any one of claims 1-9.