Method of designing a multilayer pcb winding and device therefor

Abstract

The application provides a design method and device of a multilayer PCB winding, the design method comprising: generating a parameter vector X corresponding to the PCB winding; obtaining a natural language description about the PCB winding input by a user, inputting the natural language description into a pre-trained language conversion model to obtain an initial Gerber sketch output by the language conversion model; obtaining boundary conditions of the initial Gerber sketch, inputting the parameter vector X and the boundary conditions into a pre-trained PINN model to obtain a performance index output by the PINN model; optimizing the Gerber sketch to obtain a plurality of optimization schemes; performing DRC checking on each optimization scheme and discarding an optimization scheme that fails to pass the DRC checking. The design scheme can generate a design scheme of a multilayer PCB winding.

Description

Technical Field

[0001] This invention relates to the field of PCB winding technology, and more particularly to a design method and apparatus for multilayer PCB windings. Background Technology

[0002] Printed circuit board (PCB) windings possess significant advantages such as high integration, excellent consistency in mass production, and controllable production costs, and are now widely used in power electronic devices such as axial flux motors, planar transformers, wireless charging modules, and high-frequency inductors. Among them, axial flux motors, with their unique advantages of high power density and thin design, are a core R&D direction in fields such as new energy vehicles, aerospace equipment, and industrial servo drives, and market and engineering application demand continues to rise.

[0003] To meet the ever-increasing power density requirements of equipment, the stacked structure of PCB stator windings has been continuously upgraded, expanding from the early 2-4 layer basic structure to 8 layers, 16 layers, and currently high-end products have adopted 32-36 layer multi-layer stacking schemes. This significant increase in the number of winding layers has led to an exponential increase in the overall design difficulty of PCB windings, mainly due to four key technical bottlenecks: First, the complexity of via structure design has significantly increased. In addition to conventional through-vias, multi-layer PCB windings require a large number of blind vias and buried vias to improve wiring density and ensure electromagnetic transmission integrity. The placement, diameter, and type of vias all need to comprehensively balance electromagnetic performance and process feasibility, resulting in complex design constraints and a significant increase in the difficulty of selection and layout; Second, the efficiency of multi-physics coupling simulation analysis is low. Multilayered structures exacerbate the coupling and interaction of electromagnetic, thermal, and mechanical multi-physics fields. When using traditional finite element simulation methods for performance verification, a single simulation calculation can take several hours or even days, making it difficult to adapt to the needs of rapid product iteration and development. Third, the design variable combination space is too large, making manual optimization extremely difficult. Each conductor in a multilayer PCB winding has a massive number of design variables, such as line width, line spacing, number of winding turns, conductor arrangement angle, and via coordinates. These variables cross-couple to form a huge parameter combination space, making it difficult to find a globally optimal design solution that meets multiple performance indicators through manual trial and error. Fourth, manufacturability control is difficult. Multilayer PCBs have stringent Design Rule Check (DRC) constraints, including multiple process thresholds such as minimum line width, minimum conductor spacing, via thickness-to-diameter ratio, and specific process restrictions for blind and buried vias. During manual design, structural violations of manufacturing specifications are very likely to occur, resulting in a low tolerance for errors in the transition from design to production.

[0004] Currently, parametric PCB winding design tools such as KiMotor have emerged in the industry. These tools can automatically generate PCB winding geometry based on basic parameters input by engineers. However, these tools only implement a fixed mapping logic of "parameter input - geometric output," which has inherent underlying defects and cannot solve the pain points of multi-layer PCB winding design mentioned above: First, the design is highly dependent on the engineer's personal experience. All core design parameters need to be manually entered and repeatedly iterated and debugged. The entire winding design cycle can take several weeks. The final comprehensive performance of the winding, such as electromagnetic properties, temperature rise, and cost, depends entirely on the engineer's technical accumulation, resulting in poor design stability. Second, there is no autonomous multi-objective optimization capability. The tools only have geometric modeling functions and cannot automatically balance and optimize multiple mutually restrictive design objectives such as motor efficiency, temperature rise performance, manufacturing cost, and harmonic suppression. They can only output the winding structure corresponding to a single parameter, making it difficult to achieve synergistic optimization of multiple performance indicators. Third, design experience cannot be digitally accumulated and reused. Engineers' long-term accumulated winding adjustment ideas, parameter matching skills, and process adaptation experience remain only in their personal lives and cannot be transformed into a standardized and reusable system design knowledge base. Design tools lack the ability to learn and iterate, making it difficult to continuously optimize design output based on past design cases.

[0005] In summary, existing multilayer PCB winding design schemes suffer from technical defects such as long design cycles, insufficient optimization capabilities, difficulty in reusing experience, and difficulty in coordinating and balancing the constraints of multilayer structure design. There is an urgent need to propose a new automated optimization design scheme for PCB windings. Summary of the Invention

[0006] The purpose of this invention is to provide a design method and apparatus for multilayer PCB windings.

[0007] To achieve one of the aforementioned objectives, an embodiment of the present invention provides a design method for multi-layer PCB windings, comprising the following steps: generating a parameter vector X corresponding to the PCB winding; obtaining a natural language description of the PCB winding input by a user, and inputting the natural language description into a pre-trained language conversion model to obtain an initial Gerber sketch output by the language conversion model; the language conversion model is based on a large language model, and during training, it is trained using a combination of supervised fine-tuning and retrieval-enhanced generation based on PCB winding design cases, electromagnetic design theory, and PCB process specifications; obtaining the boundary conditions of the initial Gerber sketch, and inputting the parameter vector X and the boundary conditions into a pre-trained PINN model to obtain the performance indicators output by the PINN model; the hidden layers of the PINN model include multi-layer fully connected networks, and the activation function is selected as the Tanh function or the ReLU function; the performance indicators include: the efficiency of the PCB winding. The highest temperature rose The total harmonic distortion (THD) is calculated. Based on the parameter vector X and performance indicators, a multi-objective deep reinforcement learning algorithm is used to optimize the Gerber sketch, thereby obtaining several optimization schemes. Each optimization scheme is subjected to a DRC check, and optimization schemes that fail the DRC check are discarded.

[0008] As a further improvement of one embodiment of the present invention, the generation of the parameter vector X corresponding to the PCB winding specifically includes: obtaining parameter information of the PCB winding; processing the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encoding each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

[0009] As a further improvement to one embodiment of the present invention, the step of optimizing the Gerber sketch using a multi-objective deep reinforcement learning algorithm based on the parameter vector X and performance indicators to obtain several optimization schemes; performing DRC checks on each optimization scheme and discarding optimization schemes that fail the DRC check specifically includes: creating a Markov decision process model corresponding to the Gerber sketch, wherein the state space of the Markov decision process model includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and the production cost of the PCB winding is denoted as 'cost'. Based on the parameter vector X and the performance index, the Markov decision process model is iteratively optimized using the PPO near-end strategy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

[0010] As a further improvement of one embodiment of the present invention, the DRC check for each optimization scheme specifically includes: performing DRC checks for hard constraints and DRC checks for soft constraints on each optimization scheme.

[0011] As a further improvement of one embodiment of the present invention, the following steps are also included: for each optimization scheme that passes the DRC check, the following processing is performed: receiving modification suggestions, modifying the optimization scheme based on the modification suggestions, and completing this processing; optimizing the PINN model and the multi-objective deep reinforcement learning algorithm based on all optimization schemes.

[0012] This invention also provides a multi-layer PCB winding design device, comprising the following modules: an information acquisition module for generating a parameter vector X corresponding to the PCB winding; a natural language processing module for acquiring a user-input natural language description of the PCB winding, inputting the natural language description into a pre-trained language conversion model to obtain an initial Gerber sketch output by the language conversion model; the language conversion model is based on a large language model, and during training, it is trained using a combination of supervised fine-tuning and retrieval-enhanced generation based on motor stator parameters, PCB winding design cases, electromagnetic design theory, and PCB process specifications; and a generation module for acquiring the boundary conditions of the initial Gerber sketch, inputting the parameter vector X and the boundary conditions into a pre-trained PINN model to obtain the performance indicators output by the PINN model, wherein the hidden layers of the PINN model include multi-layer fully connected networks, and the activation function is selected as the Tanh function or the ReLU function, and the performance indicators include: the efficiency of the PCB winding. The highest temperature rose The total harmonic distortion (THD) is calculated; an optimization module is used to optimize the Gerber sketch based on the parameter vector X and performance indicators using a multi-objective deep reinforcement learning algorithm, thereby obtaining several optimization schemes; a DRC check is performed on each optimization scheme, and optimization schemes that fail the DRC check are discarded.

[0013] As a further improvement of one embodiment of the present invention, the information acquisition module is further configured to: acquire parameter information of the PCB winding; process the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encode each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

[0014] As a further improvement of one embodiment of the present invention, the optimization module is further configured to: create a Markov decision process model corresponding to the Gerber sketch, wherein the state space of the Markov decision process model includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and the production cost of the PCB winding is denoted as 'cost'. Based on the parameter vector X and the performance index, the Markov decision process model is iteratively optimized using the PPO near-end strategy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

[0015] As a further improvement of one embodiment of the present invention, the optimization module is also used to: perform DRC checks on hard constraints and DRC checks on soft constraints for each optimization scheme.

[0016] As a further improvement of one embodiment of the present invention, the following module is also included: a model optimization module, used to: perform the following processing on each optimization scheme that passes the DRC check: receive modification suggestions, modify the optimization scheme based on the modification suggestions, and complete this processing; optimize the PINN model and the multi-objective deep reinforcement learning algorithm based on all optimization schemes.

[0017] Compared to existing technologies, the technical advantages of this invention are as follows: This invention provides a design method and apparatus for multi-layer PCB windings. The design method includes: generating a parameter vector X corresponding to the PCB winding; obtaining a natural language description of the PCB winding input by a user, inputting the natural language description into a pre-trained language conversion model to obtain an initial Gerber sketch output by the language conversion model; obtaining the boundary conditions of the initial Gerber sketch, inputting the parameter vector X and the boundary conditions into a pre-trained PINN model to obtain the performance indicators output by the PINN model; optimizing the Gerber sketch to obtain several optimized schemes; performing a DRC check on each optimized scheme and discarding optimized schemes that fail the DRC check. This design scheme can generate multi-layer PCB winding design schemes. Attached Figure Description

[0018] Figure 1 This is a flowchart illustrating the design method of multilayer PCB windings in an embodiment of the present invention. Figure 2 This is a schematic diagram of the parameters corresponding to the PCB winding in an embodiment of the present invention; Figure 3 This is a schematic diagram of the design method for multilayer PCB windings in an embodiment of the present invention; Figure 4 This is a schematic diagram illustrating the interaction between the multi-objective deep reinforcement learning algorithm and the environment in an embodiment of the present invention; Figure 5 This is a schematic diagram of the multi-objective deep reinforcement learning winding optimization interaction and self-learning closed loop in an embodiment of the present invention; Figure 6 This is a flowchart of real-time checking of DRC constraints of PCB windings in an embodiment of the present invention; Figure 7 This is a schematic diagram illustrating the optimization of the PINN model and the multi-objective deep reinforcement learning algorithm in an embodiment of the present invention. Detailed Implementation

[0019] The following description and accompanying drawings fully illustrate specific embodiments described herein to enable those skilled in the art to practice them. Some embodiments may include or substitute parts and features of other embodiments. The scope of the embodiments herein encompasses the entire scope of the claims and all available equivalents thereof. Throughout this document, the terms “first,” “second,” etc., are used only to distinguish one element from another without requiring or implying any actual relationship or order between the elements. Indeed, a first element can also be referred to as a second element, and vice versa. Furthermore, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a structure, apparatus, or device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a structure, apparatus, or device. Without further limitation, an element defined by the phrase “comprising one…” does not exclude the presence of other identical elements in the structure, apparatus, or device that includes said element. The various embodiments described herein are presented in a progressive manner, with each embodiment focusing on its differences from other embodiments; similar or identical parts between embodiments can be referred to interchangeably.

[0020] The terms "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" used in this document to indicate orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings and are used only for the convenience of describing this document and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention. In the description herein, unless otherwise specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to mechanical or electrical connections, or internal connections between two elements, or direct connections or indirect connections through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms according to the specific circumstances.

[0021] Embodiment 1 of the present invention provides a design method for multilayer PCB windings, such as... Figure 1 and Figure 3 As shown, it includes the following steps: Step 101: Generate the parameter vector X corresponding to the PCB winding; Step 102: Obtain the natural language description of the PCB winding input by the user, and input the natural language description into the pre-trained language conversion model to obtain the initial Gerber sketch output by the language conversion model; the language conversion model is based on a large language model, and during training, it is trained by combining supervised fine-tuning and retrieval-enhanced generation based on PCB winding design cases, electromagnetic design theory and PCB process specifications. Here, Gerber files are the standard graphic file format in the PCB (Printed Circuit Board) manufacturing industry.

[0022] Based on the domain-enhanced Large Language Model (LLM, i.e., Language Transformation Model), the user's natural language design requirements are automatically transformed into multiple sets of compliant PCB winding initial layouts with complete geometric topology via parameters, compressing the original days of manual trial and error to minutes, and providing diverse initial samples for subsequent PINN simulation and DRL optimization.

[0023] During training, domain knowledge was injected into the language translation model through RAG retrieval enhancement and SFT supervised fine-tuning to create a professional electromagnetic winding model. During experimentation, the inventors discovered three major flaws in a purely general-purpose model: engineering illusion, lack of understanding of PCB multi-layer winding processes, and missing electromagnetic theory. Therefore, they implemented a two-pronged approach to inject industry expertise: building a dedicated professional knowledge base that includes three types of core data: historical successful PCB winding design cases (axial flux motors, planar transformers, wireless charging coils, etc.).

[0024] Electromagnetic fundamentals: Maxwell's equations, winding losses, temperature rise, and harmonic harmonics (THD) related design principles; PCB multilayer process specifications: blind / buried / through-hole limitations, minimum trace width and spacing, DRC rules for stack-up layers, and manufacturing constraints for different layer counts. Among these, RAG retrieval-enhanced generation: during inference, similar cases and process standards are first retrieved from the knowledge base as context input to the large model, ensuring that the output constraints do not violate engineering processes; SFT supervised fine-tuning: the LLM is fine-tuned using numerous pairwise samples of "natural language requirements → standard design parameters," allowing the model to learn professional parameter output logic and eliminating layman errors in general large models. Result: the large model possesses professional electromagnetic winding inference capabilities and will not output erroneous parameters that violate PCB processes or the electromagnetic principles of motors.

[0025] Natural Language Requirements Understanding and Structured Parsing The input format is free input from the user in pure natural language, requiring no expertise in parametric syntax. Example: Design a stator winding for a 12-slot, 10-pole axial flux motor with a power of 1kW and a speed of 10000rpm, using a 16-layer PCB. Prioritize efficiency. The LLM (Limited Linear Modulation) automatically extracts three types of key information: 1. Performance indicators: power, speed, slot-pole configuration, target efficiency, temperature rise limit; 2. Hard constraints: total number of PCB layers, copper thickness, manufacturing process grade; 3. Optimization preference priority: efficiency priority / low cost priority / high power density priority. The output structured requirement vector quantifies and encodes scattered textual information into a standardized vector, which can be directly connected to subsequent parametric encoding and PINN simulation modules, achieving seamless transition from textual requirements to a digital model.

[0026] Fully automated generation of single initial winding scheme The model output includes: a complete set of initial design parameters, covering all four major variables in step S1: geometric parameters, number of layers, blind / buried / through-hole schemes, winding series and parallel topology, and tap positions; the linked geometry engine calls the KiMotor class parameterized geometry kernel to directly generate two-dimensional geometry of the windings based on the output parameter vector Xinit; the output carrier is: an initial Gerber sketch (PCB industry standard graphic file), visualizing coil routing, layer structure, and via distribution; traditionally, manual disassembly and initial layout drawing takes several days, but this step is shortened to minutes, saving engineers repetitive basic drawing work.

[0027] Here, the technical feature "RAG search enhancement" can match similar historical designs, corresponding PCB process constraints, and electromagnetic design principles from the professional knowledge base based on the required keywords, and send them as context into the LLM; the technical feature "SFT fine-tuning LLM inference" can analyze the required indicators, constraints, and optimization weights through the large model with industry fine-tuning, and output the standardized initial parameter vector Xinit; the automatic geometry generation specifically involves inputting Xinit into the parametric geometry engine, automatically drawing the winding diagram, and outputting the initial Gerber sketch.

[0028] Step 103: Obtain the boundary conditions of the initial Gerber sketch, input the parameter vector X and the boundary conditions into the pre-trained PINN model, thereby obtaining the performance metrics output by the PINN model. The hidden layers of the PINN model include multiple fully connected networks, and the activation function is selected as the Tanh function or the ReLU function. The performance metrics include: the efficiency of the PCB winding. The highest temperature rose Total Harmonic Distortion (THD); The entire PINN system consists of an electromagnetic field subnet, a thermal field subnet, a multi-physics coupling layer, and an optional structural field subnet, enabling electromagnetic-thermal bidirectional coupling solutions. For high-speed scenarios, additional structural stress analysis is added.

[0029] Electromagnetic field sub-network (core basic module) The input consists of: 1) Parameter vector X (geometry, stack-up, vias, topology parameters); 2) External electrical excitation conditions: operating current I, operating frequency f. The output consists of: global spatial physical field quantities: magnetic field distribution B(r), electric field distribution E(r), current density J(r), which fully describe the electromagnetic state inside the winding.

[0030] The dedicated loss function consists of three components (constraining the model to fit the real electromagnetic laws). Data fitting term: Mean square error between neural network predictions and high-precision ANSYS Maxwell FEA simulation baseline values, ensuring alignment between the model and the actual simulation results; Maxwell's equation residuals: By automatically differentiating and calculating the residuals of Ampere's circuital law, Faraday's law of electromagnetic induction, and Gauss's law of electromagnetism, the network output is forced to satisfy the fundamental laws of electromagnetic physics, thus solving the illusion problem of pure data-driven neural networks "violating common sense of physics". Boundary condition items: constrain the field values ​​of the winding symmetry boundary, insulation boundary, and magnetic flux opening and closing boundary to match the actual PCB motor winding boundary conditions.

[0031] Thermal field subnetwork (temperature rise assessment module) The inputs are: 1) the winding geometric parameter vector; 2) the Joule loss distribution of the electromagnetic field subnet output (electromagnetic loss is the only heat source Q(J)).

[0032] The output is the global temperature field distribution T(r), from which the maximum temperature rise of the winding can be directly extracted. This is used for subsequent DRL optimization reward calculation.

[0033] The specific loss function is composed of: : Fitting error with FEA thermal simulation (Icepak) temperature data; Residual terms of the heat conduction equation: Force the network to satisfy the partial differential equation of heat conduction in solids, with electromagnetic Joule loss Q(J) as the heat source term; Heat transfer boundary terms: matching air convection heat dissipation, PCB substrate thermal insulation, ambient temperature constraint.

[0034] Optimized specifically for multi-layer PCBs, the model incorporates calculations of interlayer dielectric thermal conductivity, copper foil thermal conductivity, and heat conduction paths for blind / buried / through vias, accurately reproducing the heat transfer patterns of multi-layer stacked structures, unlike the simplified thermal models of single-layer coils.

[0035] Multiphysics coupling layer (electromagnetic-thermal bidirectional linkage core) Traditional step-by-step simulations calculate the electromagnetic field first, then the thermal field, neglecting the bidirectional coupling of losses as a function of temperature. This scheme achieves bidirectional coupling through the Joule loss formula: Joule loss integral formula: Forward coupling: The electromagnetic field subnet calculates the current density J and electric field E, and integrates to obtain the global Joule loss distribution, which serves as the heat source input for the thermal field subnet; Implicit reverse coupling: The training data includes samples of copper resistivity changes at different temperatures, and the model automatically learns the coupling relationship of high-temperature loss increase; Multilayer board adaptation: The interlayer substrate thermal resistance and via vertical heat conduction channels are modeled separately to accurately calculate the interlayer temperature difference of 32 / 36-layer ultra-multilayer windings.

[0036] PINN General Network Infrastructure 1. Three-layer structure division, with two types of input splicing in the input layer: ① Winding standardized design vector X; ② External operating condition boundary conditions (current I, frequency f, ambient temperature) The hidden layers consist of a multi-layer fully connected MLP network with Tanh or ReLU activation functions; the multi-layer network fits a high-dimensional nonlinear multiphysics field distribution. The output layer outputs spatial field quantities in parallel: magnetic field B(r), current density J(r), and global temperature T(r).

[0037] 2. Adaptive weight balancing loss term (key training technique), total loss ,in, To account for the mean square error of a small amount of high-precision FEA reference data, For example, the residuals of Maxwell's equations. and , For the residuals of the heat conduction equation, Where Q(J) is the Joule heat source, This represents the degree to which boundary conditions (symmetry plane, insulating surface, convective heat transfer surface) are satisfied. The numerical magnitudes of different loss terms vary significantly, and direct summation would cause one of the constraints to fail. The proposed solution employs an adaptive weighting strategy (such as GradNorm) to dynamically adjust the pre-evaluation coefficients of each loss term. , , Synchronous balancing includes: data fitting accuracy; residual constraint strength of physical equations; and boundary condition satisfaction. This avoids models that only fit simulation data and ignore physical laws, or models that over-fit equations and whose predictive performance deviates from the actual simulation.

[0038] Complete training strategy (data generation → pre-training → online incremental update) Training datasets are generated in batches using the Latin hypercube sampling method, which uniformly covers the full parameter range of 8-36 layers of windings (line width, number of turns, number of layers, frequency, current, via type, etc.). Simulation tools include ANSYS Maxwell and Icepak combined with FEA simulation, generating 1000-5000 sets of high-precision labeled samples. Sample content includes winding parameters, electromagnetic field distribution, loss distribution, and global temperature distribution for each set of samples.

[0039] 2. The two-stage training process involves offline pre-training, which uses a batch of FEA datasets to complete basic training and obtain an initial PINN model with basic prediction capabilities. Online incremental updates involve continuously supplementing FEA simulation samples of new design schemes during the S4 DRL optimization iteration and S7 expert scheme feedback process, incrementally training PINN, and continuously reducing prediction errors. For parameter ranges with large prediction deviations, FEA sampling is actively added to repair weak areas of the model.

[0040] Physical residual calculation implementation: # Example: Logic for calculating residuals of Maxwell's equations def calculate_maxwell_residual(x,y,z, ): #x,y,z are spatial coordinates For network parameters with torch.enable_grad(): x.requires_grad_(True) B = net(x, y, z, theta) # Output magnetic field curl_B = torch.autograd.grad(B.sum(), x, create_graph=True)[0] # Calculate divergence or curl residuals... residual = ... return residual Specific encoding of DRL states and action space Please provide the specific data structure definition: State vector S dimension: Lists all elements and their physical meanings.

[0041] Example: State=[w,s,N,layer_count,via_type_vector(32),eta_pred,T_max_pred,drc_violation_count] Definition of action space A: Continuous actions: action_continuous=np.random.normal(mean=0,std=0.01) (corresponding parameter fine-tuning).

[0042] Discrete action: action_discrete=argmax(policy_network(x)) (corresponding to via type selection).

[0043] Reward function code implementation: def calculate_reward(state, action, next_state): eta = next_state['efficiency'] temp = next_state['temp'] violations = next_state['drc_violations'] # Hard constraint penalties if violations>0: penalty = 1e6 violations else: penalty = 0 reward = 0.4 eta + 0.25 / (temp + 1) - 0.2 cost - penalty return reward Step 104: Based on the parameter vector X and performance metrics, use a multi-objective deep reinforcement learning algorithm to optimize the Gerber sketch, thereby obtaining several optimization schemes; perform DRC checks on each optimization scheme and discard optimization schemes that fail the DRC check.

[0044] Figure 4 A schematic diagram illustrating the interaction between a multi-objective deep reinforcement learning algorithm and its environment is presented (showing the computational logic of state, action, and reward). Figure 5 Demonstrates multi-objective deep reinforcement learning winding optimization interaction and self-learning closed loop.

[0045] After each parameter adjustment (each optimization step), a manufacturability DRC check is performed immediately to filter out winding design schemes that cannot be processed by the factory from the source of optimization, avoiding the optimization algorithm from wasting computing power on infeasible schemes. The check is performed in milliseconds, so as not to slow down the overall optimization iteration speed.

[0046] The system is divided into three core parts: hard constraint rules, soft constraint rules, and the underlying implementation logic of the DRC engine.

[0047] I. Hard Constraints – Mandatory compliance; violation results in immediate disqualification of the plan. Hard constraints are the bottom line for PCB manufacturing processes. Any solution that fails to meet any one of these constraints is physically impossible to manufacture. Therefore, the algorithm's execution logic is extremely strict: once a violation is triggered, the current optimization branch is either truncated or a negative infinite reward is imposed on the solution. This allows reinforcement learning algorithms to completely abandon this parameter-based approach and stop iterating. Rule explanation: a) Minimum linewidth PCB copper foil traces have a minimum processing width limit, with an example threshold of 0.1mm; if the trace width is less than this value, the etching process will result in broken traces, incomplete circuitry, and failure to form a complete circuit. b) Minimum trace spacing The spacing between two adjacent copper lines must not be less than the factory's minimum processing clearance; too small a spacing may lead to etching short circuits and creepage breakdown under high voltage. c) Through-holes: Board thickness / hole diameter ≤ 8:1. For ordinary through-holes that drill through the entire board, the ratio of the total board thickness to the through-hole diameter should not exceed 8 times; if the ratio is too large, drilling may result in broken drills, incomplete copper foil plating on the hole walls, and poor hole conductivity. d) Blind vias: Blind via depth / hole diameter ≤ 1:1. Blind vias only connect two adjacent layers of the PCB and do not penetrate the entire board; the ratio of the recess depth to the hole diameter of a blind via should not exceed 1. Excessive depth may result in incomplete plating coverage at the bottom of the blind via, posing a risk of open circuits. e) Stack-up symmetry requirements: The stack-up structure of copper foil and dielectric substrates in multi-layer PCBs must be symmetrical; asymmetrical stack-ups may cause board warping and deformation during high-temperature lamination and reflow soldering, resulting in scrapped finished products. f) Hard constraint execution logic: If any hard constraint is not satisfied, there are two ways to handle it: ① Directly truncate the current DRL optimization branch and stop tuning the parameters based on that parameter; ② Assign a negative infinity value to the reinforcement learning reward function, and the algorithm will automatically avoid this type of parameter combination.

[0048] II. Soft Constraints – These are process optimization items, not mandatory, and only considered as bonus points for optimization. Soft constraints do not involve "whether it can be done," but only affect production costs, production yield, and long-term product reliability. A solution that violates soft constraints will not be directly eliminated, but the reinforcement learning reward will be reduced, and the algorithm will prioritize convergence towards solutions that satisfy the soft constraints. Rule explanations: a) Prioritize 45° / 90° copper foil traces. Use only right angles or 45° bevels for copper foil trace corners; etching at sharp, irregular angles easily results in copper foil residue / gaps, reducing production yield. b) Avoid sharp angles (<90°) and isolated copper. Etching copper foil with sharp angles less than 90° easily results in residual short circuits; isolated copper foil without electrical connections (isolated copper) causes uneven board stress, electrostatic interference, and wastes copper. c) Minimize the number of vias. Each additional via increases drilling and electroplating costs; more vias also increase the reliability risk of interlayer failure and water / air leakage within the PCB. d) Via cost priority: Through-hole > Buried via > Blind via. Cost ranking from low to high: Through-hole (cheapest, one-time drilling) → Buried via → Blind via (most expensive, requires step-by-step laser drilling and multiple laminations); Low-cost via types should be prioritized during algorithm optimization. e) Vias should be evenly distributed, avoiding dense local vias. A large number of vias concentrated in a small area can lead to a decrease in local board strength, deformation due to heat during lamination, and an imbalance in local copper density, resulting in increased electromagnetic losses.

[0049] Next, the optimized solution, verified by DRC, consists of Gerber / ODB++ standard manufacturing documents and performance reports, including: complete PCB design files (KiCad format or other EDA tool formats), containing traces, vias, pads, silkscreens, etc. for all layers; manufacturing output files (GERBER, ODB++, drill files, netlists, etc.), which can be directly delivered to the PCB manufacturer; performance analysis reports (efficiency, loss distribution, temperature distribution, inductance, resistance, THD, etc.); multi-objective Pareto front plots and solution comparison descriptions; and a Design Rule Check (DRC) report confirming that all hard constraints have been met.

[0050] In this embodiment, generating the parameter vector X corresponding to the PCB winding specifically includes: obtaining parameter information of the PCB winding; processing the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encoding each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

[0051] like Figure 2 As shown, the parameter information can be divided into four main categories, which together constitute the complete set of original design information: 1) Geometric variables (winding dimensions, continuously adjustable parameters) correspond to the physical shape of a single-layer copper foil trace, all of which are continuous values. Among them, w is the copper wire width; s is the insulation distance between wires; and N is the number of turns in the winding. The angle of the coil's sector / ring-shaped unfolding; The inner radius of the winding. The outer radius of the winding together defines the coil's toroidal profile.

[0052] 2) Stack-up variables (global parameters of PCB board stacking) control the basic electromagnetic, thermal conductivity and withstand voltage characteristics of the whole board: L is the total number of PCB layers, ranging from 8 to 36 layers; t is the thickness of each conductive copper foil layer; dielectric thickness is the thickness of the insulating substrate between two adjacent copper foil layers, which directly affects parasitic capacitance and leakage inductance.

[0053] c) Via variables (interlayer conduction structure, hybrid discrete + continuous variables): Vias enable electrical connection between windings of different copper layers. Parameters include discrete selection and continuous coordinates: For via type, select one of three discrete options. ; The diameter of the through hole (continuous dimension); The planar coordinates of each via on the board surface; This represents the total number of vias within a single segment / single layer structure.

[0054] d) Topology variables (electrical connection logic, purely discrete options) determine the current flow path in multilayer coils. Typical discrete structures include: winding series-parallel connection methods are all series, multiple branches in parallel, and series-parallel hybrid; tap positions are the lead-out points for multi-level voltage / power regulation, changing the equivalent number of turns and impedance.

[0055] III. Core Coding Technology Scheme (Two Major Coding Strategies) The original parameters consist of three types of data: continuous numerical values, discrete selections, and graphical topologies. Since they cannot be directly fed into the neural network, two sets of matching encoding methods are designed and finally concatenated into a unified vector X.

[0056] Strategy 1 uses a Graph Neural Network (GNN) to continuously vectorize discrete topologies. The modeling logic involves abstracting the entire winding topology into a graph structure. Each node (coil segment, copper foil layer, and via) is treated as an independent node; edges represent the electrical connections between nodes (series / parallel connections, cross-layer via conduction). The transformation process involves extracting topological features through the GNN's graph convolutional layers, mapping non-differentiable discrete choices such as "series / parallel connection method, winding type, and tap position" to a continuous latent space vector. This allows LLM (Large Language Model) and DRL (Depth Reinforcement Learning) algorithms to perform inference and gradient descent optimization within the same continuous vector space, addressing the issue of discrete topologies not being able to participate in AI iteration.

[0057] Strategy 2 uses independent via layer coding and vector concatenation to address the complex via issues in 8-36 layer multilayer boards. The design involves layering the PCB into L copper layers, resulting in L-1 pairs of adjacent layers. Vias between each pair of adjacent layers are coded separately, with each group's code containing the via type for that layer. Aperture Coordinates (x, y), quantity All vias are converted into sub-vectors; global concatenation involves concatenating the first and last sub-vectors of all adjacent layers to obtain a complete global via feature vector. The advantage is that it avoids confusion between via information from different layers and accurately distinguishes the structural differences between blind vias (connecting only two adjacent layers), buried vias (spanning multiple layers), and through-vias (penetrating the entire board).

[0058] In this embodiment, the step of optimizing the Gerber sketch using a multi-objective deep reinforcement learning algorithm based on the parameter vector X and performance metrics to obtain several optimized schemes; performing DRC checks on each optimized scheme and discarding optimized schemes that fail the DRC check specifically includes: Create a Markov decision process model corresponding to the Gerber sketch. In the Markov decision process model, the state space includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and 'cost' is the production cost of the PCB winding. Based on the parameter vector X and performance indicators, the Markov decision process model is iteratively optimized using the PPO proximal policy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

[0059] here, Figure 6 A flowchart showing the real-time check of DRC constraints for PCB windings.

[0060] The core idea here is to abstract the multi-layer PCB winding design optimization problem into a Markov decision process (MDP), use deep reinforcement learning to continuously iterate and adjust the winding parameters, and automatically search for the optimal winding scheme that takes into account electromagnetic performance, temperature rise, cost, and manufacturability.

[0061] Constructing a Markov Decision Process (MDP) The standard reinforcement learning MDP consists of four parts: state space. Action space Reward function The environment will be broken down one by one below.

[0062] 1. State Space =Current winding parameters +PINN prediction performance metrics +DRC violation count, complete vector example: ,in, The basic winding parameters (line width, line spacing, number of turns, radius, stack-up, vias, and topology parameters) are obtained by S1 encoding. For the efficiency of PCB windings; Predict the maximum temperature rise of the PINN winding; The total harmonic distortion (THD) of current / voltage represents the harmonic level. This represents the number of violations detected by the DRC process rules. Its purpose is to provide the reinforcement learning agent with complete "observation information," allowing the agent to simultaneously see: the current appearance of the winding, its performance quality, and whether it violates PCB process rules, thus making further adjustment decisions based on all the information.

[0063] 2. Motion space Actions represent adjustments made by the agent to the winding parameters, categorized into continuous actions and discrete actions, forming a mixed action space. Continuous actions are output by a Gaussian policy. , , This represents making minute incremental adjustments to dimensions such as line width, line spacing, and inner / outer radii, with values ​​that can change continuously. Discrete actions are output by a classification strategy, specifically including: ① Switching via types: Through / Blind / Buried; ② Modifying the number of parallel winding branches, representing discontinuous topology / process selection with only a limited number of options. Challenges: Most reinforcement learning algorithms can only handle continuous or discrete actions individually. This solution uses PPO / SAC specifically adapted to the mixed action space, allowing for simultaneous fine-tuning of dimensions and switching of topology and via schemes.

[0064] 3. Reward Function (The entire optimized command core), formula: ,in, The higher the winding efficiency, the higher the reward; The smaller the maximum temperature rise, the larger this value will be, thus encouraging low-temperature rise schemes; The higher the value of this item, the lower the manufacturing cost, thus controlling production costs; The smaller the harmonics, the larger this value is, thus suppressing harmonic losses; As a penalty, the more DRC violations there are, the greater the decrease in reward. Additional hard constraint rules: Once a hard process red line is touched (such as line width < 3mil, aspect ratio exceeding the standard, etc., parameters that cannot be manufactured), a very large negative reward is directly applied, and the AI ​​will actively avoid such unmanufacturable solutions. , , , By manually assigning weights, preferences can be switched according to design needs: when efficiency is prioritized, the weights can be increased. When low cost is a priority, then scale up. When a scenario requiring severe temperature rise is needed, the scale should be increased. .

[0065] 4. Algorithm selection: PPO / SAC. Selection criteria: adaptability to the continuous + discrete mixed action space mentioned above. Among them, the advantages of PPO proximal policy optimization are: stable training, simple parameter tuning, mature engineering implementation, suitable for rapid iteration in the early stage, and mostly used in scenarios with a high proportion of discrete parameters. The advantages of SAC soft actor commentator are: stronger exploration ability, good at fine optimization of continuous parameters, and easier to find the Pareto optimal solution set with multi-objective balance.

[0066] The project can choose one of the two methods, or it can first use PPO for fast convergence and then use SAC for fine local optimization.

[0067] The complete iteration includes the following process: the initial process involves receiving the parameter vector X; the agent observes the current state. Output action (Fine-tuning dimensions / switching vias, parallel branches); Update winding parameters based on the action to obtain new parameters. ; Call the DRC detection module to count the number of process violations; Feeding into the S3PINN proxy model for rapid prediction , THD; Assembling a new state The reward will be calculated based on the reward formula. Strengthen learning network utilization Sample update strategy; iterates tens of thousands of times, and the agent continuously learns: how to adjust parameters to obtain higher rewards; after the iteration, outputs a batch of winding candidate schemes (Pareto solution set) that simultaneously meet process constraints and performance balance, and sends them to the downstream manual review stage.

[0068] In this embodiment, the DRC check for each optimization scheme specifically includes: performing DRC checks on both hard constraints and soft constraints on each optimization scheme.

[0069] In this embodiment, the following steps are also included: For each optimization scheme that passes the DRC check, the following processing is performed: receive modification suggestions, modify the optimization scheme based on the modification suggestions, and the processing is completed; optimize the PINN model and the multi-objective deep reinforcement learning algorithm based on all optimization schemes.

[0070] Figure 7 The execution flow for each suggestion is shown.

[0071] After the AI-generated optimization solution is verified by DRC, it enters the stage of manual adjustment and expert verification to ensure the engineering practicality and reliability of the design results. This stage is not a simple "pass / fail" judgment, but a deep interactive process of human-machine collaboration.

[0072] The specific revisions include: (1) Interactive fine-tuning: Engineers can directly adjust various parameters (line width, line spacing, number of turns, via position, tap position, etc.) in the visual interface. The system updates the winding diagram and recalculates the performance indicators in real time. It supports local modification of a single coil (such as adjusting the routing shape of a certain layer or moving the position of a certain via). The system automatically checks the DRC compliance of the modification. It supports switching and comparing multiple schemes on the Pareto frontier to help engineers choose the most suitable scheme.

[0073] (2) Expert review and verification: Senior engineers conduct electromagnetic design principle review of the AI-generated scheme to check for any problems that do not conform to common sense design; high-precision FEA simulation verification is performed on key schemes to confirm the prediction accuracy of the PINN proxy model (the relative error should be within an acceptable range, such as <5%); manufacturability review is conducted to confirm the feasibility of the stack-up scheme, via process, copper thickness, etc. with the PCB manufacturer; and a complete design review report is output, including modification opinions and optimization suggestions.

[0074] Interactive Interface: Visualizes the Pareto frontier solution set, allowing engineers to manually fine-tune parameters. Data Feedback: Records every modification made by engineers (before parameters, after parameters, and reasons for modification). Finally validated solutions are added to the "High-Quality Case Library." The reward function is reconstructed using Human Feedback Reinforcement Learning (RLHF), making the model more closely resemble expert preferences.

[0075] Model self-learning and knowledge feedback This is one of the key innovations of this invention: the design experience and modification data generated during the manual verification process are fed back into the AI ​​system to enable the model to continuously learn and evolve its capabilities, forming a positive closed loop of "AI generation → manual verification → experience feedback → model evolution".

[0076] Specifically, it includes: (1) Design experience coding: Automatically record every parameter adjustment and modification operation of the engineer, including the parameters before modification, the parameters after modification, and the corresponding performance changes; extract key information from expert review opinions (such as "this via position is unreasonable" and "the number of turns should be increased"), and transform them into structured design rules through natural language processing (NLP); store the verified final design scheme and its performance data in the design case library as high-quality training samples.

[0077] Continuous fine-tuning of the large model: Regularly (e.g., weekly / monthly) fine-tuning the large model using newly accumulated design cases and expert feedback data (SFT+DPO) to continuously improve the accuracy and professionalism of its design reasoning; Employing human feedback reinforcement learning (RLHF) to use expert preferences and choices as reward signals to optimize the quality of the large model's solution generation; Updating the knowledge base of retrieval-enhanced generation (RAG) to include new design specifications, process standards, and case experience in the retrieval scope.

[0078] PINN model data augmentation: New design schemes are added to the PINN training dataset, and the PINN model is incrementally trained regularly to continuously expand its applicability and prediction accuracy; for areas with large PINN prediction errors, targeted FEA simulations are performed to fill in the gaps and proactively improve the model's weak points.

[0079] DRL Policy Evolution: Based on the updated large model and PINN model, the DRL agent is retrained, allowing it to continue evolving with a more accurate environment model and a better initial policy. Expert-selected solutions serve as demonstration trajectories, accelerating the convergence process of DRL through imitation learning. Through this self-learning loop, the system's design capabilities continuously improve with increased usage, exhibiting a positive feedback effect of "getting smarter with use." This is a core advantage that traditional parametric design tools and one-off AI solutions lack.

[0080] The model self-learning and knowledge feedback module is the key closed-loop component of this invention. Its core purpose is to systematically transform every parameter modification, design decision, and performance feedback generated during the manual verification process into computable training signals, which drive the continuous evolution of the three sub-models: Large Language Model (LLM), Physical Information Neural Network (PINN), and Deep Reinforcement Learning (DRL) agent, so that the system's design capability spirals up with the number of uses.

[0081] This module contains three parallel and collaborative fine-tuning / update sub-processes: Sub-process A: Supervised Fine-tuning of Large Model (SFT) + Direct Preference Optimization (DPO), which improves the initial scheme generation quality of LLM; Sub-process B: Incremental Training of PINN, which expands the applicability and prediction accuracy of the surrogate model; Sub-process C: DRL Policy Evolution, which accelerates optimization convergence based on imitation learning of expert demonstration trajectories.

[0082] Modifications are automatically recorded. In the manual verification interface, the system automatically captures every parameter modification operation by the engineer and generates structured modification record entries. Each record contains the following fields (in JSON format): { "record_id":"REC_20260715_001", "timestamp":"2026-07-15T14:32:18Z", "project_id":"PRJ_AFPM_12S10P_16L", "engineer_id":"ENG_ZhangSan", "params_before":{"w":0.35,"s":0.15,"N":14,"via_type":"mixed", "via_pos":[[3.2,1.1],[3.2,2.8],...]}, "params_after":{"w":0.38,"s":0.15,"N":13,"via_type":"mixed", "via_pos":[[3.5,1.1],[3.5,2.8],...]}, "perf_before":{"eta":0.948,"T_max":118.5,"THD":0.045,"cost":1.0}, "perf_after":{"eta":0.952,"T_max":115.2,"THD":0.038,"cost":1.05}, "review_text":"Increased the line width from 0.35 to 0.38 to reduce copper loss, and reduced one turn to control temperature rise", "final_verdict":"approved", } NLP Structured Extraction of Expert Review Comments The natural language feedback provided by engineers in their review comments (such as 'This via placement is unreasonable', 'The number of turns should be increased', etc.) needs to be converted into structured labels using an NLP module before it can be used as training signals for the model. The specific extraction process is as follows: Keyword Matching (Rule Layer): Construct a keyword-tag mapping dictionary for the electromagnetic design field, covering the following categories: Via: ["Via Location", "via_pos"]->tag (Category="Via", Problem="Improper Location", Suggestion="Redistribution"); Turns: ["Increase Turns", "Decrease Turns"]->tag (Category="Turns", Direction="Increase / Decrease", Amplitude=1); Linewidth: ["Linewidth Too Thin", "Increase Linewidth"]->tag (Category="Linewidth", Direction="Increase", Priority="High"); Temperature: ["Temperature Too High", "Temperature Rise Exceeds Standard"]->tag (Category="Thermal Performance", Constraint Type="Hard Constraint", Threshold=120°C).

[0083] BERT Semantic Matching (Model Layer): For free text feedback not covered by the rule layer, a pre-trained Chinese BERT model (such as bert-base-chinese) is used for intent classification. The BERT model is fine-tuned based on 5000 historically annotated review comments, and the output is a multi-label classification result, including: modified parameter category, modification direction, urgency, and design rule reference. The BERT output is mapped to a structured label vector through a classification head (fully connected layer + sigmoid).

[0084] Confidence filtering: Only structured labels with a BERT output confidence score > 0.7 are retained; those below this threshold are marked as "awaiting manual re-annotation" and do not enter the automatic training process. Data cleaning and sample storage.

[0085] Duplicate filtering: Calculate the L2 distance between the parameter vectors before and after modification. Records with a distance < 0.001 are considered invalid operations and are discarded. Outlier detection: Detecting performance changes (Δη, ...) before and after modification. Calculate the Z-score using ΔTHD. Records with |Z|>3 are considered potential errors and require manual review. Completeness check: Ensure that the params_before and params_after dimensions are consistent for each record, that the perf field has no missing values, and that review_text is not empty. Storage and Indexing: Cleaned samples are stored in a PostgreSQL design case database, and a composite index is created based on (timestamp, project_id). Data statistics are triggered at the end of each month, and the fine-tuning process is only initiated when the number of valid samples in the case database is greater than 5000.

[0086] Sub-process A: Fine-tuning of large model using SFT + DPO SFT Supervised Fine-Tuning (Construction Instruction - Response to Training Data) Goal: To enable LLMs to learn the ability to 'output reasonable winding parameters according to design requirements', especially to learn the parameter tuning experience and decision-making logic demonstrated by engineers in manual verification.

[0087] Training Data Construction Method: Each valid record in the design case library is converted into an SFT training sample in instruction-response format: Instruction: Composed of a design requirement description, parameters before modification, performance before modification, and expert review comments. For example: "Design a 12-slot, 10-pole, 16-layer PCB stator winding with a power of 5kW and efficiency as the priority. Current solution: line width 0.35mm, number of turns 14, efficiency 94.8%, maximum temperature 118.5°C. Expert opinion: The line width is too thin, resulting in high copper loss. It is recommended to increase the line width. Please output the optimized parameter solution." Response: The engineer's modified parameters + a structured description of the reasons for the modification. For example: "Optimized solution: Adjust the line width to 0.38mm (reduce copper loss by 2.1%), reduce the number of turns to 13 (free up wiring space and reduce temperature rise by 3.3°C), and keep other parameters unchanged. Expected efficiency increase to 95.2%, maximum temperature decrease to 115.2°C." SFT fine-tuning of hyperparameters:

[0088] The specific implementation of LoRA fine-tuning is as follows: Instead of directly modifying the original weight matrix of the large model, two low-rank matrices A and B (rank r=16) are inserted as a bypass in each attention layer. During forward propagation, the original weights W remain unchanged, and ΔW=B·A is calculated as an increment. During training, only the parameters of A and B are updated (the number of parameters is only 0.2% of the original model), resulting in extremely low memory usage. After training, ΔW is merged back into the original weights. There is no additional overhead during inference.

[0089] DPO direct preference optimization (alignment expert selection preference) Problem Background: SFT only allows the model to learn to 'imitate' the operations of an expert, but it cannot distinguish between what the expert considers 'good' and 'bad'. Solution. When multiple candidate solutions exist (such as 5 solutions on the Pareto front), the model needs to learn expert methods. Selection preferences. DPO training data construction: For each engineer's selection operation on the Pareto front in each manual verification, construct preference pairs (preferred, rejected): Preferred: The parameters and performance indicators of the scheme finally selected by the engineer; Rejected: The parameters and performance indicators of the schemes that were not selected on the same Pareto front.

[0090] DPO training method: The core idea of ​​DPO is to bypass explicit reward model training and directly optimize the preference probability in the output space of LLM. Specific steps: Freeze the SFT-tuned LLM policy model π_ref as the reference policy and do not update its parameters; initialize a new policy model π_θ (copied from π_ref) so that it can be updated during training; for each preference pair (x_preferred, x_rejected), generate log probabilities logπ_θ(y_preferred|x) and logπ_θ(y_rejected|x) respectively through the two policy models; the DPO loss function is: L_DPO=-E[logσ(β·(logπ_θ(y_w|x_w)-logπ_ref(y_w|x_w)-(logπ_θ(y_l|x_l)-logπ_ref(y_l|x_l))))] where y_w and y_l are the parameter descriptions of the preferred and rejected schemes, respectively, and β is the KL divergence control coefficient (taken from 0.1 to 0.5, the larger the value, the more strictly the reference policy is followed). The essence of this loss function is to maximize the log probability of the optimal solution while ensuring that the new strategy does not deviate too far from the reference strategy.

[0091] DPO hyperparameters: learning rate 5e-6, epoch=1, β=0.3, the rest are the same as SFT. DPO converges in just 1 epoch, and the training time is about 30 minutes.

[0092] In the fine-tuning training of time decay weight allocation, samples at different time points are assigned time decay weights, making the model more reliant on recent design experience: w(t) = exp(-λ·Δt), where Δt is the number of days since the sample was last displayed, and λ is the decay coefficient (λ = 0.01 / day). For example, the weight of a sample from one month ago is exp(-0.01×30) = 0.74, the weight of a sample from three months ago is exp(-0.01×90) = 0.41, and the weight of a sample from six months ago is only 0.16. This weight is implemented in the training DataLoader through a custom Sampler without modifying the samples themselves.

[0093] Subprocess B: PINN Incremental Training The accuracy of the incremental data-constructed PINN surrogate model depends on the coverage of the training data. Each new design scheme that passes manual validation (after FEA verification) is added to the PINN dataset as a new high-precision training sample.

[0094] Electromagnetic field data: ANSYS Maxwell is used to perform high-precision electromagnetic simulation (mesh refinement to 0.1mm) on the winding parameters of the new scheme, outputting discretized data of magnetic field distribution B(r) and current density J(r); Thermal field data: The loss distribution of the electromagnetic simulation is used as a heat source, and ANSYS Icepak is used to perform thermal simulation, outputting discretized data of temperature field T(r); Active point supplementation: The spatial distribution of the current prediction error of PINN is analyzed, and additional FEA simulation data points are actively generated for targeted reinforcement in areas with errors greater than 5% (such as new layer combinations and new via density ranges).

[0095] Incremental training method Incremental training strategy: Instead of training PINN from scratch, continue training based on existing model weights. The specific steps are as follows: Load the already trained PINN model weights θ_PINN (e.g., the model obtained after training with 5000 sets of data for 36 hours); merge the new data (e.g., 200-500 sets accumulated this month) with the original training data to form a new training set. To prevent catastrophic forgetting, retain 80% of the original data and mix it with 20% of the new data (instead of using only the new data); use a low learning rate (1e-4, 1 / 10 of the initial training rate) for incremental training for 10 epochs, approximately 6-8 hours (A100 GPU); 16. Evaluate the accuracy comparison between the new and old models on the validation set: if the mean relative error of the new model (compared to the FEA benchmark) decreases and there is no accuracy regression, then accept the new model; otherwise, revert to the old model.

[0096] Incremental training is not executed after each design, but is triggered when one of the following conditions is met: the cumulative number of new samples is ≥500 (to ensure sufficient incremental information); more than 30 days have passed since the last incremental training (regular updates); the average prediction error of PINN in the most recent 50 DRL optimization calls is >5% (accuracy degradation warning).

[0097] Sub-process C: DRL Policy Evolution 5.1 Imitation Learning Objective of Expert Demonstration Trajectory: Utilize the parameter modification sequence of the engineer in manual verification as the 'expert demonstration trajectory', and accelerate the convergence of the DRL agent's policy network to a better initial policy by pre-training the policy network through Behavioral Cloning (BC).

[0098] Example trajectory construction: Arrange all modification operations performed by the engineer during a complete verification process in chronological order to form a state-action trajectory: ,in The winding parameter state at step t. Parameter adjustments performed by engineers The adjusted PINN rewards, This is the new state after the adjustment. A complete verification trajectory typically contains 10 to 50 steps.

[0099] Behavior cloning training: Before the formal PPO training in DRL, the policy network π(a|s) is pre-trained using the BC loss function: That is, to maximize the policy network in the expert demonstration state. Output expert actions The logarithmic probability. BC pre-training hyperparameters: learning rate 1e-4, epoch=5, training only the policy network (not the value network). After training, the DRL agent has a basic ability to 'tune parameters like an engineer', and PPO training on this basis can significantly accelerate convergence (usually reducing from 8000 steps to 2000~3000 steps).

[0100] DRL retraining based on the updated environment After the PINN model completes its incremental update, the simulation environment on which DRL relies changes (PINN's prediction distribution may have shifted). Therefore, the DRL agent needs to be retrained to adapt to the new environment: load the updated PINN model as the new simulation environment; use the policy network pre-trained by BC as the initial policy (instead of random initialization); use the same hyperparameters as the original PPO training (learning rate 3e-4, maximum steps 10000), but set a lower exploration noise (initial standard deviation reduced from 0.1 to 0.05), because BC pre-training has already provided a better exploration direction; During retraining, a 'new and old environment alternation' strategy is used: every 100 steps, 80 steps use the new PINN environment and 20 steps use the old PINN environment to prevent the policy network from overfitting to a single environment.

[0101] Coordinated execution of the three sub-processes

[0102] The three sub-processes do not run independently, but are executed collaboratively according to the following priority and dependencies: Complete Execution Cycle: A complete self-learning cycle is executed once a month (approximately 2 working days): PINN incremental training is executed on the morning of Day 1 (~8 hours); DRL policy evolution is executed on the afternoon of Day 1 (~4 hours, including BC pre-training + PPO retraining); and LLMSFT + DPO fine-tuning is executed on the morning of Day 2 (~2.5 hours). After the three sub-processes are completed, a model weight file with an updated version number (e.g., v2.3.1) is output, and an update log is recorded.

[0103] Version management and rollback: Save a snapshot of the model before each fine-tuning. If the updated model performs worse on the validation set than the previous version (e.g., the PINN mean error increases by more than 1 percentage point, or the DRL optimal reward decreases by more than 5%), it will automatically roll back to the previous version and record the reason for the rollback.

[0104] The beneficial effects of the self-learning module LLM generation quality continuously improves: With the accumulation of SFT+DPO fine-tuning, the parameter overlap between the initial LLM-generated scheme and the expert scheme gradually increases from about 60% in the early stage to over 85%, reducing the number of iteration steps for subsequent DRL optimization. PINN prediction accuracy continuously improves: Incremental training enables PINN's coverage and accuracy to continuously expand with project accumulation, especially significantly enhancing its adaptability to new layer combinations (such as expanding from 16 layers to 24 layers, 32 layers) and new process parameters. DRL convergence speed accelerates: BC pre-training + environment adaptation reduces the number of DRL convergence steps from 8000 steps to 2000-3000 steps, and the time for a single optimization is shortened from 4 hours to 1.5 hours. Knowledge asset accumulation: All fine-tuned data and model weights constitute the company's core technical assets. Even if engineers leave, their design experience is already encoded in the model. Newly hired engineers can quickly reach a proficient level with AI assistance.

[0105] Embodiment 2 of the present invention provides a design device for multi-layer PCB windings, comprising the following modules: an information acquisition module for generating a parameter vector X corresponding to the PCB winding; a natural language processing module for acquiring a natural language description of the PCB winding input by a user, and inputting the natural language description into a pre-trained language conversion model to obtain an initial Gerber sketch output by the language conversion model; the language conversion model is based on a large language model, and during training, it is trained using a combination of supervised fine-tuning and retrieval-enhanced generation based on PCB winding design cases, electromagnetic design theory, and PCB process specifications; and a generation module for acquiring the boundary conditions of the initial Gerber sketch, inputting the parameter vector X and the boundary conditions into a pre-trained PINN model to obtain the performance indicators output by the PINN model, wherein the hidden layers of the PINN model include multi-layer fully connected networks, and the activation function is selected as the Tanh function or the ReLU function, and the performance indicators include: the efficiency of the PCB winding. The highest temperature rose The total harmonic distortion (THD) is calculated; an optimization module is used to optimize the Gerber sketch based on the parameter vector X and performance indicators using a multi-objective deep reinforcement learning algorithm, thereby obtaining several optimization schemes; a DRC check is performed on each optimization scheme, and optimization schemes that fail the DRC check are discarded.

[0106] In this embodiment, the information acquisition module is further configured to: acquire parameter information of the PCB winding; process the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encode each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

[0107] In this embodiment, the optimization module is further configured to: create a Markov decision process model corresponding to the Gerber sketch, wherein the state space of the Markov decision process model includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and the production cost of the PCB winding is denoted as 'cost'. Based on the parameter vector X and the performance index, the Markov decision process model is iteratively optimized using the PPO near-end strategy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

[0108] In this embodiment, the optimization module is further configured to perform DRC checks on both hard constraints and soft constraints for each optimization scheme.

[0109] In this embodiment, the following module is also included: a model optimization module, used to: perform the following processing on each optimization scheme that passes the DRC check: receive modification suggestions, modify the optimization scheme based on the modification suggestions, and complete this processing; optimize the PINN model and the multi-objective deep reinforcement learning algorithm based on all optimization schemes.

[0110] It should be noted that although the steps are described in a specific order above, it does not mean that the steps must be executed in the above specific order. In fact, some of these steps can be executed concurrently, or even in a different order, as long as the required function can be achieved.

[0111] This invention can be a system, method, and / or computer program product. A computer program product may include a readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of the invention.

[0112] A readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. Readable storage media can include, for example, but not limited to, electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination thereof.

[0113] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A design method for multi-layer PCB windings, characterized in that, Includes the following steps: Generate the parameter vector X corresponding to the PCB winding; Obtain the natural language description of the PCB winding input by the user, input the natural language description into the pre-trained language conversion model, and thus obtain the initial Gerber sketch output by the language conversion model; The language conversion model is based on a large language model. During training, it is trained using a combination of supervised fine-tuning and retrieval-enhanced generation, based on PCB winding design cases, electromagnetic design theory, and PCB process specifications. Obtain the boundary conditions of the initial Gerber sketch, input the parameter vector X and the boundary conditions into the pre-trained PINN model, and thus obtain the performance metrics output by the PINN model. The hidden layers of the PINN model include multiple fully connected networks, and the activation function is selected as the Tanh function or the ReLU function. The performance metrics include: the efficiency of the PCB winding. The highest temperature rose Total Harmonic Distortion (THD); Based on the parameter vector X and performance metrics, a multi-objective deep reinforcement learning algorithm is used to optimize the Gerber sketch, thereby obtaining several optimized schemes; DRC checks are performed on each optimized scheme, and optimized schemes that fail the DRC check are discarded.

2. The design method according to claim 1, characterized in that, The generation of the parameter vector X corresponding to the PCB winding specifically includes: Obtain the parameter information of the PCB winding; process the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encode each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

3. The design method according to claim 2, characterized in that, Based on the parameter vector X and performance metrics, a multi-objective deep reinforcement learning algorithm is used to optimize the Gerber sketch, thereby obtaining several optimization schemes. Perform DRC checks on each optimization scheme and discard those that fail the DRC check. Specifically, this includes: Create a Markov decision process model corresponding to the Gerber sketch. In the Markov decision process model, the state space includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and 'cost' is the production cost of the PCB winding. Based on the parameter vector X and performance indicators, the Markov decision process model is iteratively optimized using the PPO proximal policy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

4. The design method according to claim 3, characterized in that, The DRC check for each optimization scheme specifically includes: For each optimization scheme, DRC checks are performed for both hard constraints and soft constraints.

5. The design method according to claim 1, characterized in that, It also includes the following steps: For each optimization scheme that passes the DRC check, the following process is performed: receive modification suggestions, modify the optimization scheme based on the modification suggestions, and the process is complete; The PINN model and the multi-objective deep reinforcement learning algorithm are optimized based on all optimization schemes.

6. A design device for multi-layer PCB windings, characterized in that, Includes the following modules: The information acquisition module is used to generate the parameter vector X corresponding to the PCB winding; The natural language processing module is used to obtain a natural language description of the PCB winding input by the user, input the natural language description into a pre-trained language conversion model, and thus obtain the initial Gerber sketch output by the language conversion model. The language conversion model is based on a large language model. During training, it is trained using a combination of supervised fine-tuning and retrieval-enhanced generation, based on PCB winding design cases, electromagnetic design theory, and PCB process specifications. The generation module is used to obtain the boundary conditions of the initial Gerber sketch, input the parameter vector X and the boundary conditions into the pre-trained PINN model, thereby obtaining the performance metrics output by the PINN model. The hidden layers of the PINN model include multi-layer fully connected networks, and the activation function is selected as the Tanh function or the ReLU function. The performance metrics include: the efficiency of the PCB winding. The highest temperature rose Total Harmonic Distortion (THD); The optimization module is used to optimize the Gerber sketch based on the parameter vector X and performance indicators using a multi-objective deep reinforcement learning algorithm, thereby obtaining several optimization schemes; DRC checks are performed on each optimization scheme, and optimization schemes that fail the DRC check are discarded.

7. The design apparatus according to claim 6, characterized in that, The information acquisition module is also used for: Obtain the parameter information of the PCB winding; process the parameter information using a pre-trained graph neural network (GNN) to obtain a first vector corresponding to the parameter information; encode each adjacent layer in the PCB winding to obtain a second vector corresponding to each adjacent layer, wherein the second vectors corresponding to different adjacent layers are different; the parameter vector X corresponding to the PCB winding is formed by concatenating the first and second vectors.

8. The design apparatus according to claim 7, characterized in that, The optimization module is also used for: Create a Markov decision process model corresponding to the Gerber sketch. In the Markov decision process model, the state space includes: the current parameter vector of the PCB winding. The performance metrics and DRC violation counts; the performance metrics include: the efficiency of the PCB windings. The highest temperature rose Total Harmonic Distortion (THD); the hybrid action space includes continuous actions and discrete actions; the continuous actions are parameter fine-tuning of the PCB windings, output by a Gaussian strategy; the discrete actions include switching via types and adjusting the number of parallel branches of the windings, the via types include blind vias, buried vias, and through vias, and the discrete actions are output by a classification strategy; reward function. ,in, , , and The target weight coefficient, The penalty coefficient is denoted as 'cost', and 'cost' is the production cost of the PCB winding. Based on the parameter vector X and performance indicators, the Markov decision process model is iteratively optimized using the PPO proximal policy optimization algorithm or the SAC soft actor-commentator algorithm to obtain several optimization schemes.

9. The design apparatus according to claim 8, characterized in that, The optimization module is also used for: For each optimization scheme, DRC checks are performed for both hard constraints and soft constraints.

10. The design apparatus according to claim 6, characterized in that, It also includes the following modules: The model optimization module is used for: For each optimization scheme that passes the DRC check, the following process is performed: receive modification suggestions, modify the optimization scheme based on the modification suggestions, and the process is complete; The PINN model and the multi-objective deep reinforcement learning algorithm are optimized based on all optimization schemes.

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