A silicon-based OLED micro-display common cathode negative voltage PWM brightness regulation circuit

Abstract

The present application relates to the technical field of silicon-based OLED micro display driving circuit, especially to a common cathode negative voltage PWM brightness regulation circuit of silicon-based OLED micro display, comprising P-type MOS tube P1, N-type MOS tubes N1 and N2, resistors R1, R2 and R3, which are arranged in a common cathode negative voltage loop, the circuit adopts a three-stage MOS tube cascade structure, and through the biasing cooperation of resistors R1, R2 and R3, different voltage domains are isolated step by step, the problems of level mismatch, device breakdown and switching control failure caused by the direct action of positive voltage control signals on negative voltage switch tubes are avoided, and the PWM dimming is stable and reliable under negative voltage environment.

Description

Technical Field

[0001] This invention relates to the field of silicon-based OLED microdisplay driving circuit technology, and in particular to a common cathode negative voltage PWM brightness adjustment circuit for silicon-based OLED microdisplays. Background Technology

[0002] Silicon-based OLED microdisplays are limited by IC semiconductor processing technology nodes, and their forward voltage is generally 5V, which cannot meet the light-emitting voltage range of the OLED structure. Therefore, a common cathode negative voltage driving method is often used to increase the voltage across the OLED. The brightness is adjusted by changing the magnitude of the common cathode negative voltage to change the global brightness.

[0003] However, the red, green, and blue emission characteristics of OLED luminescent materials change with the common cathode voltage. Adjusting the common cathode voltage to adjust brightness can result in significant differences in color coordinates at different brightness levels. To ensure color coordinate consistency across different brightness levels and improve luminous efficiency, PWM pulse dimming is a common choice in the industry.

[0004] Existing technologies directly set switches in the negative pressure circuit, but due to the level mismatch between the positive pressure control domain and the negative pressure working domain, phenomena such as device breakdown and switch control failure are prone to occur. This makes it impossible to stably achieve high-frequency PWM brightness adjustment, resulting in technical defects such as poor display brightness uniformity and insufficient drive stability. Summary of the Invention

[0005] The purpose of this invention is to propose a common cathode negative voltage PWM brightness adjustment circuit for silicon-based OLED microdisplays, which overcomes the problems of unstable dimming control and poor level adaptability in existing negative voltage circuits.

[0006] This invention is a common cathode negative voltage PWM brightness adjustment circuit for a silicon-based OLED microdisplay, comprising a P-type MOSFET P1, N-type MOSFETs N1 and N2, and resistors R1, R2 and R3, which are arranged in the common cathode negative voltage circuit;

[0007] The gate of N1 is connected to an external positive PWM pulse signal CTRL. The source of N1 is grounded. The drain of N1 is connected to the positive power supply V+ through resistor R1. The drain of N1 is also connected to the gate of P1. The source of P1 is connected to the positive power supply V+. The source of P1 is also connected to the gate of N2 through resistor R3. The drain of P1 is connected to the gate of N2. The drain of P1 is also connected to the source of N2 through resistor R2. The source of N2 is connected to the negative power supply V-IN. The drain of N2 is connected to the common cathode V-OUT.

[0008] N1 is the signal input stage switch, operating in the positive voltage control domain. Its function is to introduce the external positive PWM control signal CTRL into the circuit. P1 is the cross-domain isolation control transistor, operating in the cross-domain region where positive and negative voltages coexist. It converts the positive voltage domain signal output by N1 into a drive level adapted to the negative voltage domain, realizing level isolation and cross-domain transmission between the positive voltage control domain and the negative voltage operating domain. N2 is the negative voltage loop main control switch, operating in the negative voltage operating domain. It directly controls the on / off state of the common cathode negative voltage loop, realizing precise adjustment of the display brightness.

[0009] Specifically, the control method of the control circuit is as follows:

[0010] When the signal CTRL is high, N1 is turned on, the drain of N1 is pulled to low, the gate of P1 is driven by low level and turns on, the drain of P1 outputs high level to drive the gate of N2, N2 turns on, V-IN and V-OUT are connected, that is, the common cathode circuit is turned on, and the display lights up.

[0011] When the signal CTRL is low, N1 is cut off, the drain of N1 is pulled up to high level by R1, the gate of P1 gets high level and is cut off, the drain of P1 is pulled down to negative voltage level by R2, the gate of N2 loses drive and is cut off, V-IN and V-OUT are disconnected, that is, the common cathode circuit is open, and the display is off.

[0012] The brightness of the display can be adjusted by changing the duty cycle of the CTRL signal and thus the conduction time of the common cathode circuit.

[0013] The circuit adopts a three-stage cascaded MOSFET structure. Through the biasing of resistors R1, R2, and R3, different voltage domains are isolated step by step to avoid level mismatch, device breakdown, and switching control failure caused by the positive voltage control signal directly acting on the negative voltage switching transistor. The PWM dimming is stable and reliable under negative voltage conditions.

[0014] By controlling the on / off duration of the common cathode circuit and utilizing the persistence of vision in the human eye, the actual light-emitting time ratio of the OLED microdisplay per unit time is adjusted by changing the duty cycle of the CTRL signal, thus achieving stepless brightness adjustment. Compared with existing schemes that adjust the common cathode voltage to change the brightness, the red, green and blue light-emitting characteristics of the OLED light-emitting material do not change with voltage changes, the color coordinates are consistent under different brightness levels, the light-adjusting properties are good, the brightness adjustment range is wide, and the uniformity of the displayed image is improved.

[0015] The circuit structure is simple, using only three MOSFETs and three resistors to form the core control architecture. It has a small number of components and a small layout area, making it suitable for the small-size integrated packaging requirements of silicon-based OLED microdisplays. It also features low power consumption and fast response speed. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the logic circuit of the present invention. Detailed Implementation

[0017] Example 1: This example provides a specific implementation scheme for a common cathode negative voltage PWM brightness adjustment circuit for a silicon-based OLED microdisplay. The circuit is based on... Figure 1 As shown, the display driver chip is integrated using standard silicon-based CMOS technology, or it is built on the display module driver board using discrete components.

[0018] The positive voltage power supply V+ uses a 1.8V DC regulated power supply, and the negative voltage power supply V-IN uses a -3.3V DC regulated power supply. Resistors R1, R2, and R3 are all 0402 packaged thin-film resistors with an accuracy of ±1% and a rated power of 1 / 16W, and each has a resistance of 2kΩ.

[0019] N1 is an N-type MOSFET with a typical gate-source threshold voltage VGS(th) of 1.0V, a drain-source withstand voltage ≥50V, and an on-resistance RDS(on) ≤1Ω@VGS=2.5V. It operates in the positive voltage control domain as the signal input stage switch. Its gate is connected to an external positive PWM pulse signal CTRL, its source is grounded, and its drain is connected to a 1.8V positive voltage supply via R1 and simultaneously connected to the gate of P1. P1 is a P-type MOSFET with a typical gate-source threshold voltage VGS(th) of -1.0V, a drain-source withstand voltage ≥-50V, and an on-resistance RDS(on) ≤5Ω@VGS. =-4.5V, as a cross-domain isolation control transistor, it operates in the cross-domain region where positive and negative voltages coexist. Its source is connected to a 1.8V positive voltage power supply, and its drain is connected to the gate of N2. At the same time, it is connected to the source of N2 through R2, and its source is connected to the gate of N2 through R3. N2 is an N-type MOSFET with a typical gate-source threshold voltage VGS(th) of 1.5V, a drain-source withstand voltage ≥60V, and an on-resistance RDS(on) ≤2Ω@VGS=4.5V. As the main control switch transistor for the negative voltage circuit, it operates in the negative voltage operating region. Its source is connected to a -3.3V negative voltage power supply V-IN, and its drain is connected to the common cathode output V-OUT.

[0020] The external PWM control signal CTRL is generated by the on-chip digital logic circuit or the off-chip microcontroller. The high level of the signal is 1.8V, the low level is 0V, and the duty cycle is adjustable in the range of 0% to 100%.

[0021] When the circuit is working:

[0022] When CTRL is high at 1.8V, the gate-source voltage VGS_N1 of N1 is 1.8V, which is greater than its threshold voltage of 1.0V. N1 is saturated and conducting, and the drain of N1 is pulled low to near 0V. The gate voltage of P1 is approximately 0V, and the gate-source voltage VGS_P1 ≈ -1.8V. Its absolute value is greater than the absolute value of the threshold voltage of P1, 1.0V, so P1 is conducting, and the drain of P1 outputs a high level close to 1.8V. The gate of N2 is directly coupled to the drain of P1 and pulled up by R3 to obtain a high-level drive. The gate-source voltage VGS_N2 ≈ 5.1V, which is greater than the threshold voltage of N2, 1.5V. N2 is saturated and conducting, V-IN and V-OUT are connected, the common cathode negative voltage circuit is conducting, a forward bias is established across the OLED, and the display lights up.

[0023] When CTRL is low (0V), the gate-source voltage of N1 is 0V, which is less than its threshold voltage, so N1 is off. The drain of N1 is pulled up to 1.8V through R1 (2kΩ), the gate voltage of P1 is 1.8V, and the gate-source voltage VGS_P1 = 0V. Since its absolute value is less than the absolute value of the threshold voltage, P1 is off. The drain of P1 is pulled down to V-IN through R2, the gate of N2 loses its positive voltage drive and is off, V-IN and V-OUT are disconnected, the common cathode circuit is open, and the display is off.

[0024] By adjusting the duty cycle of the CTRL signal to 25%, 50%, and 75%, the conduction time of the common cathode circuit per unit time is adjusted, utilizing the persistence of vision in the human eye to achieve stepless brightness adjustment of the display. Actual measurements show a good linear relationship between brightness and duty cycle within a duty cycle range of 10% to 90%, with color coordinate drift Δx < 0.005 and Δy < 0.005 at different brightness levels, indicating good uniformity of the displayed image.

Claims

1. A common cathode negative voltage PWM brightness adjustment circuit for a silicon-based OLED microdisplay, comprising a P-type MOSFET P1, N-type MOSFETs N1 and N2, and resistors R1, R2 and R3, disposed in a common cathode negative voltage circuit; The gate of N1 is connected to an external positive PWM pulse signal CTRL. The source of N1 is grounded. The drain of N1 is connected to the positive power supply V+ through resistor R1. The drain of N1 is also connected to the gate of P1. The source of P1 is connected to the positive power supply V+. The source of P1 is also connected to the gate of N2 through resistor R3. The drain of P1 is connected to the gate of N2. The drain of P1 is also connected to the source of N2 through resistor R2. The source of N2 is connected to the negative power supply V-IN. The drain of N2 is connected to the common cathode V-OUT.

2. The adjustment method of the common cathode negative voltage PWM brightness adjustment circuit for silicon-based OLED microdisplay as described in claim 1, characterized in that: When the signal CTRL is high, N1 is turned on, the drain of N1 is pulled to low, the gate of P1 is driven by low level and turns on, the drain of P1 outputs high level to drive the gate of N2, N2 turns on, V-IN and V-OUT are connected, that is, the common cathode circuit is turned on, and the display lights up. When the signal CTRL is low, N1 is cut off, the drain of N1 is pulled up to high level by R1, the gate of P1 gets high level and is cut off, the drain of P1 is pulled down to negative voltage level by R2, the gate of N2 loses drive and is cut off, V-IN and V-OUT are disconnected, that is, the common cathode circuit is open, and the display is off. The brightness of the display can be adjusted by changing the duty cycle of the CTRL signal and thus the conduction time of the common cathode circuit.

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