A backlight control circuit and method with adaptive switching control mode

Abstract

The application discloses a backlight control circuit and method capable of adaptively switching control modes, and belongs to the technical field of backlight control, which comprises a control unit, an internal memory, an external communication interface, an external storage device and a system bus; the system bus is connected with the control unit, the internal memory, the external communication interface and the external storage device; the internal memory is used for temporarily storing backlight data; the external communication interface is used for connecting the external driving assembly with the external storage device; the external storage device is used for storing configuration parameters; the control unit is used for acquiring the configuration parameters and selecting a control mode according to the configuration parameters; and the control unit is used for outputting the backlight data through the external communication interface according to the control mode. In the prior art, the functions and parameters are determined at the design stage, so that dynamic adjustment and switching cannot be performed. Compared with the prior art, the application can be selected in different control modes, so that various application scenarios can be effectively adapted.

Description

Technical Field

[0001] This invention relates to the field of backlight control technology, and in particular to a backlight control circuit and method with adaptive switching control mode. Background Technology

[0002] Backlight control is an intelligent management technology for the backlight of devices such as LCD screens and keyboards. In LCD displays, based on the principle of local dimming, it independently adjusts the brightness of hundreds or even thousands of backlight zones according to the image content, turning off the backlight in dark areas and fully illuminating bright areas, thereby greatly improving contrast and black level clarity, and effectively reducing overall power consumption. In keyboard applications, it automatically matches the key brightness to the user's environment through PWM dimming or ambient light sensing. Essentially, backlight control transforms traditional constant backlighting into dynamic and precise light output, and is a core element in enhancing the visual experience of modern display and input devices.

[0003] There are two common types of backlight control technologies. The first type is the I2C interface backlight driver chip. Its hardware architecture includes an external MCU, an I2C interface, an LED driver circuit, and an LED backlight board. The control method involves the CPU configuring registers through the I2C interface to control the LED current and brightness. The second type is the SPI interface backlight control scheme. Its hardware architecture includes an external MCU, an SPI interface, an LED driver circuit, and an LED backlight board. The control method involves the CPU directly controlling the SPI interface to transmit backlight data. Currently, the functions and parameters of both types are determined during the design phase. Therefore, their flexibility is relatively poor. This results in the inability to dynamically adjust and switch according to the application scenario.

[0004] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] This invention provides a backlight control circuit with adaptive switching control modes, comprising: a control unit, an internal memory, an external communication interface, an external storage device, and a system bus; the system bus connects the control unit, the internal memory, the external communication interface, and the external storage device; the internal memory is used to temporarily store backlight data; the external communication interface is used to connect an external driving component and the external storage device; the external storage device is used to store configuration parameters; the control unit is used to acquire the configuration parameters and select a control mode based on the configuration parameters; the control unit is used to output backlight data through the external communication interface according to the control mode.

[0006] Furthermore, the external communication interface includes any one or both of the IIC controller and SPI controller; the IIC controller is connected to the system bus and external drive components; the SPI controller is connected to the system bus and external drive components; and any one of the IIC controller and SPI controller is connected to an external storage device.

[0007] Furthermore, the control unit includes a CPU, a DMA controller, and a Dimming module; the CPU is used to select any one of the control modes, namely Mode 1, Mode 2, Mode 3, and Mode 4, according to the configuration parameters; the Dimming module is used to generate backlight data and output the backlight data to the internal memory; the DMA controller is used to read the backlight data stored in the internal memory and output it through the external communication interface.

[0008] Furthermore, in Mode 1: the CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; the CPU enters a waiting or user-defined processing task, waiting for the Dimming module to trigger an interrupt; when the interrupt is triggered, the CPU outputs backlight data and waits for the interrupt to trigger again.

[0009] Furthermore, mode two is as follows: the CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; the CPU enters low power mode and waits for the Dimming module to trigger an interrupt; when the interrupt is triggered, the CPU and DMA controller output backlight data and wait for the interrupt to trigger again.

[0010] Furthermore, mode three is as follows: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; the CPU determines whether the data rearrangement table needs to be loaded according to the configuration parameters, and enters a waiting or user-defined processing task to wait for the Dimming module interrupt to be triggered; when the interrupt is triggered and the data rearrangement table is loaded, the CPU rearranges the backlight data according to the data rearrangement table, the DMA controller outputs the rearranged backlight data and waits for the interrupt to be triggered again; when the interrupt is triggered and the data rearrangement table is not loaded, the DMA controller outputs the backlight data and waits for the interrupt to be triggered again.

[0011] Furthermore, mode four is as follows: the CPU reads the configuration parameters and configures the output mode of the external communication interface for the CPU and DMA controller according to the configuration parameters; the CPU enters a waiting or user-defined processing task to wait for the Dimming module interrupt to be triggered; when the interrupt is triggered, the CPU and DMA controller output backlight data and wait for the interrupt to be triggered again.

[0012] The present invention also provides a backlight control method with adaptive switching control mode, which is applied to the aforementioned circuit.

[0013] Compared with the prior art, the present invention has the following advantages: This invention constructs an integrated backlight control ASIC architecture, integrating CPU, DMA, SPI controller, IIC controller, and backlight driver functions into a single ASIC chip. This effectively reduces the number of chips, PCB area, and peripheral circuitry, thereby lowering material costs and system complexity.

[0014] This invention stores configuration parameters in an external storage device, which are then read and parsed by the CPU to select one of four control modes. Different modes are adapted to scenarios requiring precise control with small data volumes, low-power battery-powered scenarios, complex scenarios requiring data preprocessing, and high-performance scenarios requiring multi-channel parallel transmission. Thus, a single chip can adapt to various application requirements by modifying the configuration parameters of the external memory, without the need for redesign or chip replacement, achieving the goal of platform-based design.

[0015] In Mode 2, the CPU can enter deep sleep mode, the DMA controller independently completes backlight data transfer, and can wake up the CPU via an interrupt mechanism. Therefore, Mode 2 significantly reduces CPU activity time and substantially lowers system dynamic power consumption.

[0016] In Mode 3, the CPU handles data preprocessing, such as address mapping and format conversion. DMA handles data transfer, and the two form a parallel pipeline.

[0017] Mode 4 is a parallel control of the CPU and DMA controller. The CPU and DMA controller can drive independent external communication interfaces to achieve multi-channel parallel control.

[0018] This invention employs a 3-byte configuration mechanism. The first byte selects either SPI or IIC as the external communication interface, while the second and third bytes specify the pin numbers controlled by the CPU and DMA, respectively. The same set of physical pins can be flexibly switched between SPI and IIC by modifying configuration parameters and can be assigned to either the CPU or DMA for control. This allows for adaptation to different backlight module interface requirements without modifying hardware design or firmware, significantly improving system configuration flexibility. Attached Figure Description

[0019] Figure 1 Overall circuit diagram.

[0020] Figure 2 Flowchart for control mode selection.

[0021] Figure 3 Flowchart for Mode 1.

[0022] Figure 4 Flowchart for Mode 2.

[0023] Figure 5 Flowchart for Mode 3.

[0024] Figure 6 Flowchart for Mode 4. Detailed Implementation

[0025] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.

[0026] Example 1: This invention provides a backlight control circuit with an adaptive switching control mode, referring to... Figure 1 , Figure 1 This is the overall circuit diagram of the present invention. It includes: a control unit, an internal memory, an external communication interface, an external storage device, and a system bus.

[0027] The system bus connects the control unit, internal memory, external communication interface, and external storage device.

[0028] The internal memory can be RAM, which is used to temporarily store backlight data.

[0029] External storage devices can be Flash memory, used to store configuration parameters.

[0030] The external communication interface includes any one or both of the IIC controller and SPI controller; the IIC controller is connected to the system bus and external drive components; the SPI controller is connected to the system bus and external drive components; either the IIC controller or the SPI controller is connected to an external storage device.

[0031] The control unit is used to acquire configuration parameters and select the control mode according to the configuration parameters, and to output backlight data through an external communication interface according to the control mode.

[0032] Specifically, the control unit includes a CPU, a DMA controller (Direct Memory Access Controller), and a Dimming module (dimming circuit module). See details. Figure 2 , Figure 2 The flowchart for selecting the control mode is as follows. After the system powers on, the CPU initializes the system bus, clock, etc. The CPU reads configuration parameters from the external storage device. The specific configuration of the storage area parameter fields is as follows:

[0033] The CPU parses the configuration parameters. Specifically, it first determines the validity of the data in the special identifier area. If valid, the CPU selects any one of the following control modes: Mode 1, Mode 2, Mode 3, or Mode 4, based on the configuration parameters.

[0034] On the other hand, for details regarding the selection of data output paths, please refer to the following: Byte 1: 0 indicates SPI input / output, 1 indicates IIC output; The second byte: '10101010' indicates that the CPU enables input / output on pins 1, 3, 5, and 7, supporting up to 8 pins (the choice between IIC and SPI controllers depends on the first byte). Byte 3: '10101010' indicates that pins 1, 3, 5, and 7 can be used for input / output via DMA, supporting up to 8 pins (the choice between IIC and SPI controllers depends on byte 1).

[0035] Therefore, this invention establishes a 3-byte configuration mechanism. The first byte is used to select the external communication interface as SPI or IIC, and the second and third bytes are used to specify the specific pin numbers controlled by the CPU and DMA, respectively. The same set of physical pins can be flexibly switched between SPI and IIC by modifying the configuration parameters, and can be assigned to the CPU or DMA for control respectively. This allows for adaptation to different backlight module interface requirements without modifying the hardware design or firmware, greatly improving the system's configuration flexibility.

[0036] Mode 1 is the CPU direct control mode. See details. Figure 3 The details are as follows: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU enters a waiting or user-defined processing task, waiting for the Dimming module interrupt to be triggered. When an interrupt is triggered, the CPU outputs backlight data and waits for another interrupt to be triggered.

[0037] The applicable scenarios for this mode are as follows: First: Small data transmission and simple backlight control scenarios. Second: Control scenarios requiring precise control of transmission timing. Third: Control scenarios with single input / output.

[0038] Mode 2 is DMA independent transfer mode. See details. Figure 4 The details are as follows: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU enters low-power mode and waits for the Dimming module interrupt to trigger. When an interrupt is triggered, the CPU and DMA controller simultaneously output multiple backlight data channels and wait for another interrupt to be triggered.

[0039] In Mode 2, the CPU can enter deep sleep mode, the DMA controller independently completes backlight data transfer, and can wake up the CPU via an interrupt mechanism. Therefore, Mode 2 significantly reduces CPU activity time and substantially lowers system dynamic power consumption.

[0040] The applicable scenarios for this mode are as follows: First, scenarios requiring low power consumption for battery-powered devices. Second, single-channel input / output scenarios. Third, scenarios with moderate data volume and no need for data rearrangement.

[0041] Mode 3 is a hybrid mode, specifically a mode of CPU preprocessing + DMA transfer.

[0042] The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU determines whether a data rearrangement table needs to be loaded based on configuration parameters. If it does, the data rearrangement table is loaded. The CPU then enters a waiting or user-defined processing task, awaiting an interrupt from the Dimming module.

[0043] When it is determined that it is not needed, it will directly enter the waiting or user-defined processing task to wait for the Dimming module to be interrupted.

[0044] When an interrupt is triggered and the data rearrangement table is loaded, the CPU rearranges the backlight data according to the data rearrangement table, and the DMA controller outputs the rearranged backlight data and waits for an interrupt to be triggered again. When an interrupt is triggered and the data rearrangement table is not loaded, the DMA controller outputs backlight data and waits for another interrupt to be triggered.

[0045] In Mode 3, the CPU handles data preprocessing, such as address mapping and format conversion. DMA handles data transfer, and the two form a parallel pipeline.

[0046] The applicable scenarios for this mode are as follows: First, scenarios requiring large-scale backlight data transmission and preprocessing. Second, complex backlight control scenarios.

[0047] Mode 4 is a multi-channel high-performance output mode, which means that the CPU and DMA perform multiple outputs simultaneously.

[0048] The CPU reads the configuration parameters and configures the output mode of the external communication interface for the CPU and DMA controller according to the configuration parameters; The CPU enters a waiting or user-defined processing task to wait for the Dimming module interrupt to be triggered; When an interrupt is triggered, the CPU and DMA controller output backlight data and wait for another interrupt to be triggered.

[0049] Therefore, mode four is a parallel control of the CPU and DMA controller. The CPU and DMA controller can drive independent external communication interfaces to achieve multi-channel parallel control.

[0050] This mode is suitable for the following scenarios: First, scenarios requiring large amounts of multi-channel backlight data transmission. Second, complex backlight control scenarios.

[0051] In summary, this invention constructs an integrated backlight control ASIC architecture, integrating the CPU, DMA, SPI controller, IIC controller, and backlight driver functions into a single ASIC chip. This effectively reduces the number of chips, PCB area, and peripheral circuitry, thereby lowering material costs and system complexity.

[0052] Meanwhile, this invention stores configuration parameters in an external storage device, which are then read and parsed by the CPU to select one of four control modes. Different modes are adapted to scenarios requiring precise control with small data volumes, low-power battery-powered scenarios, complex scenarios requiring data preprocessing, and high-performance scenarios requiring multi-channel parallel transmission. Thus, a single chip can adapt to various application requirements by modifying the configuration parameters of the external memory, without the need for redesign or chip replacement, achieving the goal of platform-based design.

[0053] Example 2: This invention also provides a backlight control method with adaptive switching control mode, applied to the circuit described in Embodiment 1.

[0054] Furthermore, it should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0055] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0056] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as read-only memory (ROM) / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0057] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

[0058] It is understood that the system provided in the embodiments of the present invention corresponds to the method provided in the embodiments of the present invention, and the explanation, examples and beneficial effects of the relevant content can be referred to the corresponding parts of the above methods.

Claims

1. A backlight control circuit with an adaptive switching control mode, characterized in that, include: Control unit, internal memory, external communication interface, external storage device, system bus; The system bus connects the control unit, the internal memory, the external communication interface, and the external storage device; The internal memory is used to temporarily store backlight data; The external communication interface is used to connect the external driver component and the external storage device; The external storage device is used to store configuration parameters; The control unit is used to acquire the configuration parameters to select a control mode based on the configuration parameters, and to output the backlight data through the external communication interface based on the control mode.

2. The backlight control circuit with adaptive switching control mode as described in claim 1, characterized in that, The external communication interface includes any one or both of an IIC controller or an SPI controller. The IIC controller is connected to the system bus and the external drive components; The SPI controller is connected to the system bus and the external drive components; Either the IIC controller or the SPI controller is connected to the external storage device.

3. The backlight control circuit with adaptive switching control mode as described in claim 1, characterized in that, The control unit includes a CPU, a DMA controller, and a Dimming module; The CPU is used to select any one of the following control modes: mode one, mode two, mode three, and mode four, based on the configuration parameters. The Dimming module is used to generate the backlight data and output the backlight data to the internal memory; The DMA controller is used to read the backlight data stored in the internal memory and output it through the external communication interface.

4. The backlight control circuit with adaptive switching control mode as described in claim 3, characterized in that, The first mode is: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU enters a waiting or user-defined processing task, waiting for the Dimming module to trigger an interrupt. When the interrupt is triggered, the CPU outputs the backlight data and waits for the interrupt to be triggered again.

5. The backlight control circuit with adaptive switching control mode as described in claim 3, characterized in that, The second mode is as follows: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU enters a low-power mode and waits for the Dimming module to trigger an interrupt. When the interrupt is triggered, the CPU and the DMA controller output the backlight data and wait for the interrupt to be triggered again.

6. The backlight control circuit with adaptive switching control mode as described in claim 3, characterized in that, The third mode is: The CPU reads the configuration parameters and configures the output mode of the external communication interface according to the configuration parameters; The CPU determines whether the data rearrangement table needs to be loaded based on the configuration parameters, and enters a waiting or user-defined processing task to wait for the Dimming module to trigger an interrupt. When the interrupt is triggered and the data rearrangement table is loaded, the CPU rearranges the backlight data according to the data rearrangement table, and the DMA controller outputs the rearranged backlight data and waits for the interrupt to be triggered again. When the interrupt is triggered and the data rearrangement table is not loaded, the DMA controller outputs the backlight data and waits for the interrupt to be triggered again.

7. The backlight control circuit with adaptive switching control mode as described in claim 3, characterized in that, The fourth mode is: The CPU reads the configuration parameters and configures the output mode of the external communication interface for the CPU and the DMA controller according to the configuration parameters; The CPU enters a waiting or user-defined processing task to wait for the Dimming module interrupt to be triggered; When the interrupt is triggered, the CPU and the DMA controller output the backlight data and wait for the interrupt to be triggered again.

8. A backlight control method with adaptive switching control mode, applied to the circuit as described in any one of claims 1 to 7.

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