A multiple programming system for one-time programmable memory

Abstract

The application relates to a multiple programming system for one-time programming memory, comprising: a one-time programming memory interface for reading and writing data with the one-time programming memory; a coding and decoding module for obtaining multiple code words to be sequentially written in the same physical address, wherein each of the multiple code words is a legal code word conforming to error correction check rules of the one-time programming memory, and the multiple code words satisfy that, according to the writing sequence, a bit position set with a programming state bit in a later code word contains a bit position set with a programming state bit in a previous code word; and a control module for sequentially writing the multiple code words into the same physical address of the one-time programming memory through the one-time programming memory interface; the application can realize limited multiple programming of the one-time programming memory without modifying an OTP controller and increasing storage space.

Description

Technical Field

[0001] This invention relates to programming methods, and more specifically to a multiple programming system for a one-time programmable memory. Background Technology

[0002] A typical architecture diagram of a general-purpose SoC includes a central processing unit (CPU), on-chip memory, general-purpose input / output modules, and other peripheral modules. On-chip memory may be ROM, RAM, or NVM. ROM stores program code, RAM stores intermediate program values, and NVM can store program code and user data. However, on-chip NVM is relatively rare in applications, primarily used in chips with high security requirements. For general-purpose chips, due to the complexity and high cost of on-chip NVM manufacturing processes, off-chip NVM structures are generally used. Furthermore, advanced process nodes do not support on-chip NVM; for example, a common type of NVM flash memory, at 28... Below the nanometer level, there is no flash technology. Therefore, this invention mainly targets scenarios without on-chip NVM. For chip architectures without on-chip NVM, since the chip itself needs to store each chip's independent configuration data and personalized data, such as ID and simulated trim values, there is a one-time programmable memory (OTP). This type of memory is programmed once before being delivered to the customer and will not be modified again throughout its entire lifecycle. The one-time programmable memory is mainly used to store data and programs that need to be stored on the chip, with data being the main part and a small part used for patching mechanisms. The program is generally stored in ROM or external flash. Assuming an OTP one-time programmer... The initial state is 0, and the programming state is 1. Programming can only change from 0 to 1, not from 1 to 0. For example, an OTP based on efuse cannot be reconnected once it is burned out, and an OTP based on tube breakdown cannot be recovered once a high voltage is applied and the device is damaged. This achieves the principle of one-time programming. An OTP is generally a memory array that only needs to be programmed once but needs to be read multiple times. From the perspective of manufacturing process and reliability, OTPs generally use ECC to ensure that the data remains reliable after long-term reading. Generally, the error correction code is marked as (n, k, d), where n represents the number of bits of the original data, k represents the number of parity bits, and d represents the number of error correction bits. Multiple programming of the OTP... The existing technology mainly adopts two methods. One is to modify the OTP controller, using multiple addresses to map to one address, and using a polling method to find the last programmed data as the valid data. The other is to modify the OTP controller, using multiple addresses to map to one address, and using a polling method to perform a basic logical XOR operation on all valid data. The technical solution of using OTP to implement a one-way counter mainly adopts the method of modifying another set of encoding and decoding logic on the basis of the original OTP controller, generally using a repetitive redundant encoding method. In essence, this implements two sets of OTP control logic, and once implemented, the cells of the two sets of OTP cannot be shared. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention provides a reprogrammable system for one-time programmable memory, comprising: One-time programmable memory interface, used for reading and writing data to one-time programmable memory; The encoding / decoding module is used to obtain multiple codewords to be written sequentially to the same physical address. Each codeword is a valid codeword that conforms to the error correction and verification rules of the one-time programmable memory. The multiple codewords satisfy the following: according to the writing order, the set of bit positions in the later codeword that have the value of the programming status bit contains the set of bit positions in the previous codeword that have the value of the programming status bit. The control module is used to write multiple codewords sequentially to the same physical address of the one-time programmable memory in the order they are written, via the one-time programmable memory interface.

[0004] Furthermore, multiple codewords satisfy the following condition: for any two codewords c1 and c2, if the writing order of c1 is before that of c2, then... , where idx(c) represents the set of bit positions in codeword c that are programming state bits; and each codeword is a valid codeword under the error correction and verification rules.

[0005] Furthermore, the encoding / decoding module further includes: The search submodule is used to select candidate codewords with a Hamming weight of 2d+1 from the set of legal codewords that meet the error correction and verification rules, where d is the number of error correction bits in the one-time programmable memory. The candidate codewords are compared pairwise to select a sequence of codewords that satisfy the condition that the programming state bit set of the next codeword contains the programming state bit set of the previous codeword, and these sequences are used as multiple codewords.

[0006] Furthermore, the initial state of the storage cell in the one-time programmable memory is 0 and the programming state is 1; or, the initial state of the storage cell in the one-time programmable memory is 1 and the programming state is 0; the encoding and decoding module determines the value of the programming state bit according to the initial state and the programming state.

[0007] Furthermore, the system also includes: The address mapping module is used to map logical addresses to physical addresses of one-time programmable memory; In response to a write operation to a logical address, the control module obtains the codeword corresponding to the current value to be written from the encoding / decoding module and writes the codeword to the physical address.

[0008] Furthermore, the system also includes: The data selection module is used to read the currently valid codeword from the physical address, and output the corresponding value after decoding by the encoding and decoding module, which serves as the counter's count value. The control module responds to the count update instruction, encodes the next count value into the corresponding codeword by the encoding and decoding module, and writes it to the same physical address to realize multiple programming of the unidirectional counter.

[0009] Furthermore, the physical address stores an index codeword, which, after decoding, is used to specify the currently valid key from multiple candidate keys; the system also includes: The key selection module is used to select the corresponding key from multiple candidate keys and output it based on the index value obtained by decoding the index codeword currently stored in the physical address; In response to the key update command, the control module encodes the new index value into the corresponding codeword by the encoding and decoding module and writes it to the physical address to update the currently valid key.

[0010] Furthermore, the encoding / decoding module and the control module are integrated inside the one-time programmable controller, or the function of the encoding / decoding module is implemented by software and runs in an external processor, and the control module communicates with the one-time programmable memory interface via a bus.

[0011] The present invention has the following advantages over the prior art: It is fully compatible with the ECC data storage structure of general-purpose one-time programmable memory, enabling a small number of multiple programming functions.

[0012] This invention does not affect the lifespan of one-time programmable memory; it allows for limited, multiple programming sessions, similar to general data storage, and is compatible with existing data bit + ECC check bit structures. This structure has corresponding solutions for different ECC verification algorithms.

[0013] This invention enables a small number of programming operations without requiring multiple redundant OTP spaces.

[0014] This invention is applicable to all cells with an initial state of 0 and a programmed state of 1, or to memories with an initial state of 1 and a programmed state of 0. Attached Figure Description

[0015] Figure 1 This is a block diagram of the main internal components of a common chip; Figure 2 This is a schematic diagram of the basic structure of OTP; Figure 3 Example diagram of Hamming error correction code; Figure 4 Example images for selecting code words; Figure 5 For data flow diagrams; Figure 6is a schematic diagram of counter reading and writing example; Figure 7 is a schematic diagram of a discardable key scheme example. DETAILED DESCRIPTION OF EMBODIMENTS

[0016] To further elaborate on the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, the specific embodiments, structures, features and effects according to the present invention are described in detail below with reference to the accompanying drawings and preferred embodiments.

[0017] As shown in Figures 1-7 , a multi-time programming system for one-time programmable memory aims to propose a method and apparatus capable of performing multi-time programming on a one-time programmable memory under a system architecture without on-chip flash. Since the data written into the OTP are not all 1s, a data coding with progressively increasing 1s can be constructed, and each codeword is ensured to be an ECC valid codeword. Specifically, it is assumed that the OTP data at one address is composed of data positions plus check bits. For convenience of description, the data bit width n is taken as 16 bits, the check bit k as 5 bits, and the error correction capability d is 1 bit. The error correction code uses Hamming code as an example, and it is assumed that the data is , the codeword after error correction code encoding is , that is Then the specific error correction code codeword is Figure 3 as shown in Its binary representation is , and it is assumed that among these binary bits, the set of data that is 1 is defined as follows ; Then the goal is to find multiple codewords, specifically , satisfying ;; In this way, for the one-time programmable memory, for the same address, program first, then program , only requiring i<j. Specifically, as shown in Figure 4 , these 6 data can be 0x2, 0x22, 0xea, 0x3eb, 0x7ff, 0x3fff, Under this selection, multi-time programming is performed on the fixed address 0x1006 inside an OTP. As shown in Figure 5 Example of multi-time programming for a fixed OTP address: Therefore, by adopting this codeword selection method, the effect of multi-time programming on a specific OTP address can be achieved, and the next chapter will present two practical application cases.

[0018] It should also be noted that for any linear error-correcting code, multiple sets of codewords that meet the above conditions can be found. Taking an error-correcting code with an error-correcting capability of d=1 bit as an example, if the error-correcting algorithm is f, f(C)=0 means that the codeword is correct. The specific search algorithm is as follows: 1. Let A be the set of all data with a Hamming weight of 2d+1. A has a total of C(n+k, 2d+1). For 16-bit data, there are 1330 sets that meet the condition. For 32-bit data with 6 parity bits, there are 8436 sets of data. 2. Validate these data to identify those that meet the criteria, thus obtaining the filtered set B.

[0019] 3. Select a subset C that satisfies the condition that for any two elements c1 and c2 in C, there exists... That is, neither of these two numbers has a single bit that is 1. The C obtained through the above steps is the candidate encoding value for multiple programming iterations.

[0020] Use Case - The first example of the counter module is within the OTP space. Besides the data that only needs to be programmed once (OTP area 1 in the diagram), there's another area to store a reprogrammable counter, stored in OTP area n. A specific application scenario is preventing rollback attacks on external flash memory. If the external flash data version is 0, the OTP counter is also 0. When running data from the external flash, the counter can be checked for a match before running the program. When the data stored in the external flash is upgraded to v1, the final step of the upgrade process modifies the counter to 1. This means that if an attacker then puts code with a counter of 0 in the flash, version information verification will fail. Therefore, a counter storage mechanism needs to be implemented within the OTP. The diagram below is a simplified structure. When the address read is 0x7000, the OTP control module will get the data 0x2. The address space encoding and decoding module will map 0x2 to 0. When it is necessary to write 1 to 0x7000, the address space encoding and decoding module will encode it as 0x22. Then the OTP control module will write 110110010100000000000 into the OTP area of ​​0x7000.

[0021] This achieves the storage of the counter.

[0022] like Figure 7However, the functionality of this address space encoding / decoding module can be entirely implemented in software, making the OTP control module identical to a general-purpose OTP control module. For preventing rollback attacks, a software solution is recommended; for counters with performance requirements, the hardware implementation described above is recommended. Example - Discardable Keys: Below is a solution for configurable discardable keys. The specific problem it solves is if a key needs to be discarded, for example, if the system can update a key every year. Using the structure of this invention, an offset address of a key can be specified every year, thereby modifying the key in use. As shown in the diagram below, a total of six keys are stored in 0x8012, 0x8014, 0x8016, 0x8018, 0x801a, and 0x801c. This data represents the keys initialized by the system before delivery to the user. Which key is currently valid is determined by the data stored in 0x8010. Therefore, 0x8010-0x801c constitute the physical storage of this key, and the logical address of this key is 0x7000.

[0023] Therefore, when the bus initiates a read of address 0x7000, the specific process is as follows: 1. The data selection module first reads the address data in 0x7000, which is 0x8010. 2. Then it reads the data in 0x8012-0x801c and stores it in data 1-data 6. 3. Then it reads the idx data of 0x8010, which is 0xea. After decoding, it becomes 24. Based on this data, data3 is selected as the output.

[0024] When the system time expires or it is discovered that keys 1, 2, and 3 have been leaked, and a fourth key is to be used, the specific process is as follows: 1. Initiate a write to address 0x7000, writing data as 4; 2. The specific address write control module in the data selection module will initiate a read of data from 0x7000, obtaining the actual physical storage address of idx as 0x8010; 3. The specific address write control module in the data selection module will initiate a real write to 0x8010, writing data as the encoded data of 4, 0x7ff. After this process, the idx of 0x8010 is modified to 0x7ff. The next time the address 0x7000 is read, the effective password will be the key of 0x8010.

[0025] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A reprogrammable system for a one-time programmable memory, characterized in that, include: One-time programmable memory interface, used for reading and writing data to one-time programmable memory; The encoding / decoding module is used to obtain multiple codewords to be written sequentially to the same physical address. Each codeword is a valid codeword that conforms to the error correction and verification rules of the one-time programmable memory. The multiple codewords satisfy the following: according to the writing order, the set of bit positions in the later codeword that have the value of the programming status bit contains the set of bit positions in the previous codeword that have the value of the programming status bit. The control module is used to write multiple codewords sequentially to the same physical address of the one-time programmable memory in the order they are written, via the one-time programmable memory interface.

2. The reprogramming system for a one-time programmable memory according to claim 1, characterized in that: Multiple codewords satisfy the following condition: For any two codewords c1 and c2, if the writing order of c1 is before that of c2, then , where idx(c) represents the set of bit positions in codeword c that are programming state bits; and each codeword is a valid codeword under the error correction and verification rules.

3. A reprogramming system for a one-time programmable memory according to claim 2, characterized in that: The encoding / decoding module further includes: The search submodule is used to select candidate codewords with a Hamming weight of 2d+1 from the set of legal codewords that meet the error correction and verification rules, where d is the number of error correction bits in the one-time programmable memory. The candidate codewords are compared pairwise to select a sequence of codewords that satisfy the condition that the programming state bit set of the next codeword contains the programming state bit set of the previous codeword, and these sequences are used as multiple codewords.

4. A reprogramming system for a one-time programmable memory according to claim 1, characterized in that: The initial state of the storage cell in the one-time programmable memory is 0 and the programming state is 1; or, the initial state of the storage cell in the one-time programmable memory is 1 and the programming state is 0; the encoding and decoding module determines the value of the programming state bit according to the initial state and the programming state.

5. A reprogramming system for a one-time programmable memory according to claim 4, characterized in that: The system also includes: The address mapping module is used to map logical addresses to physical addresses of one-time programmable memory; In response to a write operation to a logical address, the control module obtains the codeword corresponding to the current value to be written from the encoding / decoding module and writes the codeword to the physical address.

6. A reprogramming system for a one-time programmable memory according to claim 5, characterized in that: The system also includes: The data selection module is used to read the currently valid codeword from the physical address, and output the corresponding value after decoding by the encoding and decoding module, which serves as the counter's count value. The control module responds to the count update instruction, encodes the next count value into the corresponding codeword by the encoding and decoding module, and writes it to the same physical address to realize multiple programming of the unidirectional counter.

7. A reprogramming system for a one-time programmable memory according to claim 6, characterized in that: The physical address stores an index codeword, which, after decoding, is used to specify the currently valid key from multiple candidate keys; the system also includes: The key selection module is used to select the corresponding key from multiple candidate keys and output it based on the index value obtained by decoding the index codeword currently stored in the physical address; In response to the key update command, the control module encodes the new index value into the corresponding codeword by the encoding and decoding module and writes it to the physical address to update the currently valid key.

8. A reprogramming system for a one-time programmable memory according to claim 7, characterized in that: The encoding / decoding module and the control module are integrated inside the one-time programmable controller, or the function of the encoding / decoding module is implemented by software and runs in an external processor, and the control module communicates with the one-time programmable memory interface via a bus.

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