Nand flash die lifetime prediction and quality grading method and device
Patent Information
- Application Number
- CN202611038693.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-13
- Publication Date
- 2026-10-13
AI Technical Summary
这导致当成品出现批量可靠性问题时,难以追溯到具体哪些裸晶参数特征是预警信号,也无法从裸晶测试数据反向优化来料接收标准
[0016]本发明与现有技术相比的有益效果是:本发明通过在NAND闪存裸晶的早期编程/擦除循环阶段多次采集原始比特错误率形成退化曲线,并从中提取包括初始错误率、退化速率、加速度和局部波动性的多维特征向量,利用幂律模型等进行非线性拟合以预测寿命和置信区间。基于这些预测结果和特征向量构建分级模型对裸晶品质进行评估,并通过与成品现场可靠性数据关联分析实现闭环优化,动态调整模型参数及分级阈值,确保了对裸晶寿命的快速准确评估以及裸晶品质与成品可靠性的可追溯关联,从而显著提升了产品整体的可靠性和生产效率。
Smart Images

Figure CN122907110A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to semiconductor non-volatile memory, and more specifically to a method and apparatus for predicting and grading the lifetime of NAND flash memory die. Background Technology
[0002] In the manufacturing process of eMMC products using bare NAND flash memory dies, the variation in incoming material quality is the primary factor determining the yield and reliability of the finished product. Because bare dies may originate from different wafer batches, different wafer regions (center / edge), and different quality grades (original manufacturer Grade A / B / C), their actual lifespan can vary by 5-10 times. Traditional full-lifespan aging tests require encapsulating the sample bare die and performing a complete program-erase cycle under accelerated conditions until failure. This is too time-consuming for mass production; the testing time for a single die can exceed 60 seconds, completely unsuitable for production line cycles. Therefore, current practices typically only perform basic "go / no-go" testing, resulting in a large number of early-working but extremely short-lived bare dies flowing into subsequent processes, ultimately affecting product quality.
[0003] Some manufacturers use a fixed number of P / E cycle compliance tests as a grading criterion, for example, requiring the raw bit error rate of the die to be below a certain threshold after 3000 P / E cycles. However, this method has significant lag and ignores important information about the final lifetime contained in the early raw bit error rate variation curve. Although this test is shorter than the full lifetime test, it still takes 3-6 seconds per die and can only assess short-term reliability rather than predict long-term lifetime. In addition, the raw bit error rate variation curve in the early P / E cycles contains information about key physical characteristics such as the initial defect density of the oxide layer and the charge trap fill rate, which is ignored by existing methods.
[0004] In current industry practice, there is no systematic correlation model between test data of incoming bare dies, such as initial bad block count and initial RBER, and the final reliability performance of the finished eMMC. This makes it difficult to trace which specific bare die parameters are warning signals when batch reliability issues occur in the finished product, and it is also impossible to optimize the incoming material receiving standards from the bare die test data.
[0005] Therefore, it is necessary to design a new method to quickly and accurately assess die lifetime and establish a traceable link between die quality and finished product reliability, so as to improve the overall product reliability and production efficiency. Summary of the Invention
[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method and apparatus for predicting the lifetime and quality grading of NAND flash memory bare dies.
[0007] To achieve the above objectives, the present invention adopts the following technical solution: a method for predicting the lifetime and quality grading of NAND flash memory bare die, comprising: In the early programming / erasing cycle of the bare die, the original bit error rate is collected multiple times at preset intervals to form the original bit error rate degradation curve, and the initial number of bad blocks is recorded. A multidimensional degradation feature vector is extracted from the original bit error rate degradation curve. The multidimensional degradation feature vector includes the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations. The original bit error rate degradation curve is nonlinearly fitted using a power-law degradation model to obtain degradation parameters. The predicted lifetime and prediction confidence interval are extrapolated and calculated. The predicted lifetime is the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold. When the goodness of fit of the power-law degradation model is lower than the preset fitting threshold, other degradation models are switched to fit and extrapolate. A grading model is constructed based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. The bare crystal is graded according to the grading model, and the grading results are corrected by combining the joint rejection rule for multidimensional degradation features. The classification results are correlated with the field reliability data of the bare die products, and the classification model is optimized in a closed loop. The closed loop optimization includes correcting the classification model based on the field reliability data and updating the model parameters and classification thresholds online based on a multi-model parallel verification mechanism.
[0008] The further technical solution is as follows: the early programming / erasing cycle stage is the first to the Nth programming / erasing cycle, where N is the preset number of early cycles; the preset interval is to collect the original bit error rate once every preset interval; during each collection, multiple pages of the next word line are randomly selected from the storage block that has completed the programming / erasing operation, and data is written using a checkerboard test pattern to maximize the interference effect between word lines.
[0009] The further technical solution is as follows: the initial raw bit error rate is the raw bit error rate value after the first programming / erasing cycle; the degradation rate is the slope obtained by linear regression of the degradation curve of the raw bit error rate; the degradation acceleration is the coefficient of the quadratic term obtained by quadratic polynomial fitting of the degradation curve of the raw bit error rate; and the local volatility is the standard deviation of the residual obtained after smoothing the degradation curve of the raw bit error rate with a sliding window.
[0010] The further technical solution is as follows: the power-law degeneracy model is: RBER(P) = RBER0 + α × P βWhere RBER(P) is the raw bit error rate at the Pth programming / erasing cycle, RBER0 is the initial raw bit error rate, P is an integer, α is the degradation magnitude coefficient, β is the degradation exponent, and α is greater than zero and β is greater than zero; The predicted lifetime is obtained by substituting the preset failure threshold into the fitted power-law degradation model and solving it inversely. The predicted confidence interval is constructed by sampling each sampling point of the original bit error rate degradation curve multiple times with replacement using the Bootstrap resampling method. After each sampling, the power-law degradation model is refitted and the predicted lifetime is calculated, using preset low quantiles and preset high quantiles. The relative width of the confidence interval is defined as the ratio of the difference between the upper and lower limits of the confidence interval to the predicted lifetime. When the relative width of the confidence interval is greater than or equal to a preset width threshold, the upper limit of the number of samplings in the early programming / erasing cycle is increased, and the process of repeatedly sampling the original bit error rate at preset intervals is returned to form the original bit error rate degradation curve and the initial bad block count is recorded.
[0011] The further technical solution is as follows: the quality grades include high-quality products, standard products, downgraded products and scrapped products, and each grade is defined according to a preset lifespan threshold; The multidimensional degradation feature joint veto rule includes: The degradation acceleration rejection rule is used to downgrade the current level by one level when the degradation acceleration exceeds a preset multiple of the average degradation acceleration of the current batch. The local volatility rejection rule is used to downgrade the current level by one level when the local volatility exceeds a preset multiple of the standard deviation of the local volatility mean of the current batch. An initial raw bit error rate rejection rule is used to directly determine a product as scrap when the initial raw bit error rate is greater than a preset proportion of the preset failure threshold. The initial bad block count rejection rule is used to downgrade the current level by one level when the initial bad block count exceeds a preset multiple of the number of bad blocks allowed by the specification.
[0012] The further technical solution is as follows: the closed-loop optimization includes: When the actual failure rate of products made from multiple consecutive batches of bare crystals of the same quality grade is significantly higher than the expected performance of that grade in the grading model, the predicted lifetime threshold of that grade is tightened. When a certain bare die feature pattern is detected and predicted to be of a high level by the model, but the corresponding finished product shows early failure, the feature pattern is promoted to a new rejection rule.
[0013] The further technical solution is as follows: the online update of model parameters includes: Extended Kalman filtering is used to recursively update the parameters of the power-law degradation model. The parameter vector is regarded as a hidden state. When each batch of new bare die data arrives, the parameter estimation is adjusted through prediction step and update step, and the parameter covariance matrix is maintained. The standardized parameters of the multidimensional degenerate feature vector are updated online using an exponentially weighted moving average. The standardized parameters include the mean and standard deviation of each feature dimension. The update formula is an exponentially weighted fusion of the current batch sample statistics and historical statistics. The smoothing factor is set to the first preset value by default. When the mean of the new batch features is detected to deviate from the current mean by more than a preset multiple of the standard deviation, the smoothing factor is temporarily increased to the second preset value. In addition, the main model and the shadow model are maintained. The shadow model adopts an update strategy with a smaller update magnitude than the main model. After a preset number of batches, the prediction errors of the two models are compared using samples with known lifetime data. If the prediction error of the shadow model is significantly lower than that of the main model, the model is switched back to the previous verified version of the main model and the main model is reinitialized from the shadow model.
[0014] Its further technical solutions include: When a new model of NAND bare die is introduced into the mass production line, the model parameters that have been calibrated for the old model of bare die are used as the Bayesian prior for the new model of bare die. The migration uncertainty is expressed by the reduced prior accuracy, or the similarity of the feature distribution of the new and old models is measured by the maximum mean difference. The model parameters of the old model are then used to determine whether to reuse them directly. Its further technical solutions include: The temperature acceleration factor is calculated based on the Arrhenius model. The degradation amplitude coefficient is then scaled according to the temperature acceleration factor for lifetime prediction. The activation energy is obtained by back-calculating the original bit error rate degradation data of the same batch of bare crystals at at least two different temperature points and fitting the model. When the goodness of fit of the power-law degenerate model is lower than a preset fitting threshold, the power-law degenerate model is switched to an exponential degenerate model for fitting and extrapolation.
[0015] This invention also provides a device for predicting and grading the lifetime of NAND flash memory bare dies, comprising: The data acquisition unit is used to acquire the original bit error rate multiple times at preset intervals during the early programming / erasing cycle of the bare die, form the original bit error rate degradation curve, and record the initial number of bad blocks; The feature extraction unit is used to extract a multidimensional degradation feature vector from the original bit error rate degradation curve. The multidimensional degradation feature vector includes the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations. The lifetime prediction unit is used to perform nonlinear fitting on the original bit error rate degradation curve using a power-law degradation model to obtain degradation parameters, calculate the predicted lifetime and the prediction confidence interval. The predicted lifetime is the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold. When the goodness of fit of the power-law degradation model is lower than the preset fitting threshold, it switches to other degradation models for fitting and extrapolation. A quality grading unit is used to construct a grading model based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. The bare die is graded according to the grading model, and the grading results are corrected by combining the joint rejection rule for multidimensional degradation features. The closed-loop optimization unit is used to perform correlation analysis between the grading results and the field reliability data of the bare die manufactured products, and to optimize the grading model in a closed loop. The closed-loop optimization includes correcting the grading model based on the field reliability data and updating the model parameters and grading thresholds online based on a multi-model parallel verification mechanism.
[0016] The advantages of this invention compared to existing technologies are as follows: This invention generates a degradation curve by repeatedly collecting the original bit error rate during the early programming / erasing cycle of NAND flash memory dies. A multi-dimensional feature vector, including initial error rate, degradation rate, acceleration, and local fluctuations, is extracted from this curve. A power-law model is then used for nonlinear fitting to predict lifetime and confidence intervals. Based on these predictions and feature vectors, a tiered model is constructed to evaluate die quality. Closed-loop optimization is achieved through correlation analysis with finished product field reliability data. The model parameters and tiering thresholds are dynamically adjusted, ensuring rapid and accurate evaluation of die lifetime and traceable correlation between die quality and finished product reliability. This significantly improves overall product reliability and production efficiency.
[0017] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Attached Figure Description
[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 A flowchart illustrating the method for predicting the lifetime and grading the quality of NAND flash memory bare die provided in an embodiment of the present invention; Figure 2 A schematic block diagram of a NAND flash memory bare die lifetime prediction and quality grading device provided in an embodiment of the present invention; Figure 3 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation
[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0021] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0022] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0023] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0024] Please see Figure 1 , Figure 1This is a flowchart illustrating the NAND flash memory die lifetime prediction and quality grading method provided in this embodiment of the invention. This method is applied in servers. It generates a degradation curve by collecting the original bit error rate during the early programming / erasing cycle and extracting multi-dimensional degradation feature vectors for analysis. The degradation curve is fitted using power-law or other models to predict lifetime and confidence intervals, constructing a grading model based on the predicted lifetime and feature vectors to achieve accurate classification of die quality levels. The method also incorporates closed-loop optimization using field reliability data, dynamically adjusting the grading model parameters to ensure model accuracy and adaptability. Simultaneously, extended Kalman filtering and exponentially weighted moving average techniques are used to update model parameters online, improving prediction accuracy and efficiency. Furthermore, when introducing new die models, Bayesian prior or maximum mean difference measures the similarity of feature distributions between new and old models, promoting model migration and reuse. The entire process achieves rapid and accurate die lifetime assessment and establishes a traceable correlation between die quality and finished product reliability, thereby improving overall product reliability and production efficiency.
[0025] Figure 1 This is a flowchart illustrating the method for predicting the lifetime and grading the quality of NAND flash memory bare die provided in an embodiment of the present invention. Figure 1 As shown, the method includes the following steps S110 to S150.
[0026] S110. In the early programming / erasing cycle of the bare die, the original bit error rate is collected multiple times at preset intervals to form the original bit error rate degradation curve, and the initial number of bad blocks is recorded.
[0027] In this embodiment, the early programming / erasing cycle stage is the first to the Nth programming / erasing cycle, where N is the preset number of early cycles; the preset interval is to collect the raw bit error rate once every preset interval; during each collection, multiple pages of the next word line are randomly selected from the storage block that has completed the programming / erasing operation, and data is written using a checkerboard test pattern to maximize the interference effect between word lines.
[0028] After the basic functional tests of the bare die are completed, the early degradation data acquisition phase begins. The basic functional tests include initial bad block scanning and full address read / write verification. The initial bad blocks refer to memory blocks that have physical defects at the time the bare die leaves the factory and cannot be read or written normally; the number of initial bad blocks is the quantity of such memory blocks, which directly reflects the process defect density of the wafer area.
[0029] The early programming / erasing cycle stage refers to the initial use stage of the bare die's lifetime, specifically the 1st to the Nth programming / erasing cycle, where N is the preset number of early cycles. For 3D TLC pSLC mode, a preset number of early cycles of 100 is recommended; for QLC pSLC mode, 150 is recommended; and for native MLC pSLC mode, 80 is recommended. During the early programming / erasing cycle stage, the raw bit error rate is collected every 5 cycles at a preset interval, resulting in 20 discrete sampling points, which are then connected sequentially to form the raw bit error rate degradation curve. The preset interval refers to the number of programming / erasing cycles between two adjacent acquisitions; in this embodiment, it is set to 5 by default.
[0030] During each data acquisition, four word lines are randomly selected from the memory blocks that have completed programming / erasing operations, representing the next page of each word line. A word line refers to a control line in NAND flash memory that connects memory cells in the same row; the next page refers to a physical page carrying valid data in pSLC mode. A checkerboard test pattern is used to write data during acquisition, meaning that physically adjacent memory cells are written with opposite data to maximize the inter-word line interference effect. The inter-word line interference effect refers to the interference generated by the programming / erasing operations of adjacent word lines on the target word line threshold voltage through capacitive coupling. This effect is most sensitive to oxide layer degradation and can expose degradation trends at an early stage.
[0031] During each acquisition, a readback comparison is performed on the four sampled pages to calculate the instantaneous raw bit error rate. The recorded data structure includes the bare die identifier, the programming / erase cycle number of each sample point, the raw bit error rate value of each sample point, the initial raw bit error rate, the initial number of bad blocks, the wafer region identifier, and the test temperature.
[0032] Taking pSLC mode TLC NAND as an example, a single programming / erase plus readback verification takes about 1.5 milliseconds, 100 programming / erase cycles take about 150 milliseconds, and 20 sample point readback comparisons take about 5 milliseconds. The total test time is about 150 to 200 milliseconds, which is far below the mass production test cycle requirements. If the preset early cycle count is increased to 200, the total time is about 300 to 400 milliseconds, which is still within an acceptable range.
[0033] S120. Extract a multidimensional degradation feature vector from the original bit error rate degradation curve. The multidimensional degradation feature vector includes the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuation.
[0034] In this embodiment, the initial raw bit error rate is the raw bit error rate value after the first programming / erasing cycle; the degradation rate is the slope obtained by linear regression of the raw bit error rate degradation curve; the degradation acceleration is the coefficient of the quadratic term obtained by quadratic polynomial fitting of the raw bit error rate degradation curve; and the local volatility is the standard deviation of the residual obtained after smoothing the raw bit error rate degradation curve with a sliding window.
[0035] A multidimensional degradation feature vector is extracted from the original bit error rate degradation curve formed in step S110. The multidimensional degradation feature vector refers to a vector composed of multiple numerical features extracted from the original bit error rate degradation curve to quantitatively characterize the degradation properties of the bare die, including the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations.
[0036] The initial raw bit error rate, i.e. the raw bit error rate value after the first programming / erasing cycle, reflects the inherent quality of the bare die and is the strongest single-variable predictor of lifetime.
[0037] The degradation rate refers to the slope obtained by linear regression of the original bit error rate degradation curve, reflecting the rate of increase of the original bit error rate of the bare die in the early stage. The faster the oxide trap filling rate and the more active the interface state generation, the higher the degradation rate.
[0038] The degradation acceleration refers to the coefficient of the quadratic term obtained by fitting a quadratic polynomial to the original bit error rate degradation curve, reflecting the degree of upward tilt of the degradation curve. When the degradation acceleration is greater than zero and the value is large, it indicates that degradation is accelerating, which is a typical defect accumulation effect; when the degradation acceleration is approximately zero, it indicates approximately linear degradation; when the degradation acceleration is less than zero, it indicates deceleration. Degradation acceleration is a key feature for distinguishing between bare crystals with mild early-stage degradation and those with sudden late-stage degradation and those with continuously stable degradation. The former performs well in the early stages, but the sudden acceleration of degradation in the middle stage leads to early failure, which is the high-risk type that is most easily missed by the traditional fixed threshold method.
[0039] The local volatility refers to the standard deviation of the residual obtained after smoothing the original bit error rate degradation curve using a sliding window, reflecting the non-uniformity of the die's internal quality. The sliding window smoothing method involves calculating the local mean using several adjacent sampling points as a window and replacing the original value; in this embodiment, the window width is three adjacent sampling points. High local volatility indicates inconsistent degradation rates between different memory blocks or word lines. Dies with high local volatility may randomly exhibit sporadic errors during mass production testing, representing one of the most difficult types of product reliability problems to reproduce and root cause localization.
[0040] Because the dimensions and value ranges of the aforementioned four-dimensional features differ significantly, Z-score standardization is performed before inputting them into the grading model. The standardization parameters refer to the mean and standard deviation of each feature used in the Z-score standardization calculation, obtained statistically from the corresponding features of all bare crystals in the current batch. The standardization formula is: subtract the mean of each feature value from the mean value of that dimension, and then divide by the standard deviation of that dimension.
[0041] S130. The original bit error rate degradation curve is nonlinearly fitted using a power-law degradation model to obtain degradation parameters. The predicted lifetime and prediction confidence interval are extrapolated and calculated. The predicted lifetime is the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold. When the goodness of fit of the power-law degradation model is lower than the preset fitting threshold, other degradation models are switched to fit and extrapolate.
[0042] In this embodiment, the power-law degeneracy model is: RBER(P) = RBER0 + α × P β Where RBER(P) is the raw bit error rate at the Pth programming / erasing cycle, where P is an integer; RBER0 is the initial raw bit error rate; α is the degradation amplitude coefficient, i.e., the proportional constant representing the degradation amplitude in the power law model; β is the degradation exponent, i.e., the exponential parameter representing the shape of the degradation curve in the power law model, and both α and β are greater than zero. The degradation exponent is used to distinguish the degradation mode: when the degradation exponent is less than 1, it is sublinear degradation, reflecting wear saturation; when the degradation exponent is equal to 1, it is linear degradation, reflecting uniform wear; when the degradation exponent is greater than 1, it is superlinear degradation, reflecting accelerated wear.
[0043] The predicted lifetime is obtained by substituting the preset failure threshold into the fitted power-law degradation model and solving it inversely. The predicted confidence interval is obtained by sampling each sampling point of the original bit error rate degradation curve multiple times with replacement using the Bootstrap resampling method. After each sampling, the power-law degradation model is refitted and the predicted lifetime is calculated, which is formed by taking a preset low quantile and a preset high quantile. The relative width of the confidence interval is defined as the ratio of the difference between the upper and lower limits of the confidence interval to the predicted lifetime. When the relative width of the confidence interval is greater than or equal to a preset width threshold, the upper limit of the number of samplings in the early programming / erasing cycle is increased and the process returns to step S110.
[0044] Using the data from each sampling point collected in step S110, degradation parameters are obtained through fitting using the nonlinear least squares method. After fitting, the predicted lifetime is extrapolated and calculated. The predicted lifetime refers to the number of programming / erasing cycles required when the original bit error rate reaches a preset failure threshold. The preset failure threshold is the upper limit of the original bit error rate set according to product reliability requirements; for consumer-grade products, it is 1 × 10⁻⁶. -4 Industrial-grade products take 3×10 -5Automotive-grade products take 1×10 -5 .
[0045] Due to limited early data and uncertainties in extrapolation, this step also includes calculating the prediction confidence interval. The prediction confidence interval refers to a numerical range that contains the true lifetime value at a certain confidence level. Multiple samplings with replacement are performed on each sampling point using the Bootstrap resampling method. After each sampling, a power-law degradation model is refitted and the predicted lifetime is calculated. The confidence interval is constructed using preset low and high quantiles. Furthermore, based on the Fisher information matrix and the Delta method, the parameter covariance is propagated to the predicted lifetime to construct a Wald-type confidence interval. Alternatively, a Bayesian method can be used to calculate the complete posterior prediction distribution of the predicted lifetime, and the interval with the highest posterior density can be used as the confidence interval. Specifically, where σ... 2 =RSS / (K-2) represents the residual variance. RSS stands for Residual Sum of Squares, which is the sum of squares of the differences between observed values and model predictions, used to estimate the residual variance of the model fit. The Delta method is used to propagate the parameter covariance to the predicted lifetime, thus constructing a Wald-type confidence interval: N_pred±z_0.95×√Var(N_pred). z_0.95 refers to the 95th percentile of the standard normal distribution, i.e., the critical value for a two-tailed test at a 95% confidence level, approximately 1.96.
[0046] The relative width of the confidence interval is defined as the ratio of the difference between the upper and lower limits of the confidence interval to the predicted lifetime. When the relative width of the confidence interval is less than 0.3, the prediction is stable, and the predicted lifetime is used directly for classification. When the relative width of the confidence interval is greater than or equal to 0.3 and less than 0.6, the prediction has moderate uncertainty, and the lower limit of the confidence interval is used for classification. When the relative width of the confidence interval is greater than or equal to 0.6, the prediction is highly uncertain, the preset early loop count is increased, and the process returns to step S110 to re-collect data, or it is marked as requiring manual judgment.
[0047] When the goodness of fit of the power-law degradation model is lower than a preset goodness of fit threshold, the power-law degradation model is switched to an exponential degradation model for fitting and extrapolation. The goodness of fit refers to a statistic that evaluates the degree to which the model fits the observed data; the exponential degradation model refers to a mathematical model in which the original bit error rate and the number of programming / erasing loops satisfy an exponential function relationship, and its expression is: RBER(P)=RBER0+α×(exp(β×P)-1).
[0048] S140. Construct a grading model based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. Grade the bare crystal according to the grading model and correct the grading results by combining the joint rejection rule for multidimensional degradation features.
[0049] In this embodiment, the quality grades include premium products, standard products, downgraded products, and scrapped products, and each grade is defined based on a preset lifespan threshold. The multidimensional degradation feature joint veto rule includes: The degradation acceleration rejection rule is used to downgrade the current level by one level when the degradation acceleration exceeds a preset multiple of the average degradation acceleration of the current batch. The local volatility rejection rule is used to downgrade the current level by one level when the local volatility exceeds a preset multiple of the standard deviation of the local volatility mean of the current batch. An initial raw bit error rate rejection rule is used to directly determine a product as scrap when the initial raw bit error rate is greater than a preset proportion of the preset failure threshold. The initial bad block count rejection rule is used to downgrade the current level by one level when the initial bad block count exceeds a preset multiple of the number of bad blocks allowed by the specification.
[0050] In this embodiment, a grading model is constructed based on the predicted lifetime obtained in step S130 and the multidimensional degradation feature vector obtained in step S120. The grading model refers to a mathematical decision-making framework for determining the quality grade of the bare die based on a joint rejection rule of predicted lifetime and multidimensional degradation features. The grading model includes at least three quality grades and a joint rejection rule of multidimensional degradation features. The quality grade refers to the quality level divided according to the predicted lifetime of the bare die. In this embodiment, it includes Grade A (high-quality), Grade B (standard), Grade C (degraded), and Grade D (scrap). Each grade is defined based on a preset lifetime threshold: taking a nominal programming / erasing cycle lifetime of 30,000 as an example, Grade A is a predicted lifetime greater than or equal to 45,000; Grade B is a predicted lifetime greater than or equal to 30,000 and less than 45,000; Grade C is a predicted lifetime greater than or equal to 15,000 and less than 30,000; and Grade D is a predicted lifetime less than 15,000.
[0051] The bare die is graded according to the grading model, and the grading results are corrected by combining the multi-dimensional degradation feature joint rejection rules. The multi-dimensional degradation feature joint rejection rules refer to a set of rules that downgrade or scrap the initial grading results based on specific feature outliers in the multi-dimensional degradation feature vector, including four rules: Degradation Acceleration Rejection Rule: When the degradation acceleration exceeds three times the standard deviation of the average degradation acceleration of the current batch, the current grade is downgraded by one level. Local Volatility Rejection Rule: When the local volatility exceeds three times the standard deviation of the average local volatility of the current batch, the current grade is downgraded by one level. Initial Raw Bit Error Rate Rejection Rule: When the initial raw bit error rate is greater than 0.5 times the preset failure threshold, it is directly determined to be Grade D. Initial Bad Block Count Rejection Rule: When the initial bad block count exceeds 1.5 times the number of bad blocks allowed by the specification, the current grade is downgraded by one level.
[0052] The grading results for each bare die are written into a bare die-level quality profile, including the die identifier, grade, predicted lifetime, lower confidence interval, upper confidence interval, 4-dimensional feature vector, fitted degradation parameters, degradation reason, and test timestamp. The degradation reason refers to the specific rule number that the bare die is downgraded or scrapped by a multi-dimensional degradation feature joint rejection rule: 0 indicates no degradation, 1 indicates degradation acceleration rejection rule triggered, 2 indicates local volatility rejection rule triggered, 3 indicates initial raw bit error rate rejection rule triggered, and 4 indicates initial bad block count rejection rule triggered. CRC32 refers to Cyclic Redundancy Check, used for data integrity verification in the bare die-level quality profile.
[0053] S150. The classification results are correlated with the field reliability data of the bare die products, and the classification model is optimized in a closed loop. The closed loop optimization includes correcting the classification model based on the field reliability data and updating the model parameters and classification thresholds online based on a multi-model parallel verification mechanism.
[0054] The closed-loop optimization includes: When the actual failure rate of products made from multiple consecutive batches of bare crystals of the same quality grade is significantly higher than the expected performance of that grade in the grading model, the predicted lifetime threshold of that grade is tightened. When a certain bare die feature pattern is detected and predicted to be of a high level by the model, but the corresponding finished product shows early failure, the feature pattern is promoted to a new rejection rule.
[0055] The online update of model parameters includes: Extended Kalman filtering is used to recursively update the parameters of the power-law degradation model. The parameter vector is regarded as a hidden state. When each batch of new bare die data arrives, the parameter estimation is adjusted through prediction step and update step, and the parameter covariance matrix is maintained. The standardized parameters of the multidimensional degenerate feature vector are updated online using an exponentially weighted moving average. The standardized parameters include the mean and standard deviation of each feature dimension. The update formula is an exponentially weighted fusion of the current batch sample statistics and historical statistics. The smoothing factor is set to the first preset value by default. When the mean of the new batch features is detected to deviate from the current mean by more than a preset multiple of the standard deviation, the smoothing factor is temporarily increased to the second preset value. In addition, the main model and the shadow model are maintained. The shadow model adopts an update strategy with a smaller update magnitude than the main model. After a preset number of batches, the prediction errors of the two models are compared using samples with known lifetime data. If the prediction error of the shadow model is significantly lower than that of the main model, the model is switched back to the previous verified version of the main model and the main model is reinitialized from the shadow model.
[0056] In this embodiment, the grading results obtained in step S140 are correlated with the field reliability data of the finished product made from bare dies, and the grading model is optimized in a closed loop. The closed-loop optimization refers to the iterative optimization process of feeding back the actual reliability performance of the finished product to the grading model and continuously correcting the model parameters and grading thresholds accordingly. The field reliability data refers to the reliability performance data collected in actual use or testing environments after the bare die is packaged into a finished product, including three types of data. The first type is mass production aging test data, which is the raw bit error rate change data recorded when each eMMC undergoes aging testing during the mass production testing phase. The second type is customer return analysis data, which is the failure mode of returned defective products after failure analysis, including wear failure, sudden failure, data retention failure, and the programming / erase cycle count and TTF at the time of failure. TTF refers to Time To Failure, which is the time period from when the device is put into use to when it fails. The third type is SMART field monitoring data. SMART stands for Self-Monitoring, Analysis, and Reporting Technology, an industry-standard protocol for monitoring the health status of storage devices. If a product supports online SMART monitoring, it can transmit data on accumulated programming / erase cycles and changes in the raw bit error rate during actual use.
[0057] After associating and matching the above three types of field reliability data with bare die identification and grading results, and aggregating and statistically analyzing them by batch, the following quality indicators were calculated: For each batch of bare dies, after collecting the grading results of all bare dies within the batch, batch quality statistics are calculated, including yield distribution (the proportion of Grades A, B, C, and D) to assess the overall quality level of the batch, feature distribution (the mean and standard deviation of the four-dimensional features) to update standardized parameters, and model fit (the average goodness of fit of the power-law model for all bare dies within the batch) to assess the applicability of the model to the batch of NAND. When the model fit is below 0.7, it indicates that the power-law degradation model does not fit the degradation pattern of the bare dies in this batch well, triggering model adjustment: if there is a significant systematic bias in the degradation index, for example, the degradation index of the bare dies in this batch is generally greater than 1 while the model assumes a degradation index less than 1, then switch to an exponential degradation model; if the poor fit is due to excessive data noise, then increase the preset early loop count from 100 to 200 to obtain more data.
[0058] When the actual failure rate of multiple consecutive batches of bare dies of the same quality grade is significantly higher than the expected performance of that grade in the grading model, the predicted lifetime threshold for that grade is automatically tightened. When a certain bare die characteristic pattern is detected that is predicted to be of a high grade by the model but the corresponding finished product shows early failure, that characteristic pattern is promoted to a new rejection rule.
[0059] The closed-loop optimization also includes online updating of model parameters and grading thresholds based on a multi-model parallel verification mechanism. This mechanism refers to a technical approach that simultaneously maintains two or more model versions and ensures update safety through comparative verification, including maintaining a master model and a shadow model. The master model is the grading model currently used in mass production, whose parameters are continuously adjusted through online updates. The shadow model is a safety baseline model that receives new batch data synchronously with the master model but adopts a more conservative update strategy; its smoothing factor is half that of the master model, or its process noise is one-tenth that of the master model. After every 10 batches, a full-lifetime aging test is performed on samples with known lifetime data from the most recent batch, such as a sampled portion of bare die, and the prediction accuracy of the two models is compared. If the mean absolute error of the shadow model is significantly lower than that of the master model, it indicates that the master model may have been contaminated by abnormal data. The system automatically switches back to the previously verified master model version and reinitializes the master model from the shadow model.
[0060] The online model parameter update also includes recursively updating the parameters of the power-law degenerate model using an extended Kalman filter. The extended Kalman filter is a recursive filtering algorithm for state estimation of nonlinear systems. In this invention, the parameter vector is considered as the hidden state of the dynamic system. When each batch of new bare die data arrives, the parameter estimates are adjusted through prediction and update steps, and the parameter covariance matrix is maintained to quantify the estimation uncertainty. In the prediction step, the posterior estimate of the previous batch is used as the current prior estimate, and the posterior covariance of the previous batch is added to the process noise to obtain the prior covariance. The linearization step calculates the Jacobian matrix of the observation function with respect to the parameters. The update step calculates the Kalman gain, uses the deviation between the measured data and the predicted data to correct the prior estimate to obtain the posterior estimate, and updates the posterior covariance. Finally, the predicted lifetime and confidence interval are recalculated using the updated parameters. The process noise is adjustable; when the process noise is high, it can quickly adapt to the differences between different batches of bare dies; when the process noise is low, the noise can be smoothed.
[0061] An exponentially weighted moving average is used to update the standardized parameters of the multidimensional degenerate feature vector online. The exponentially weighted moving average refers to a statistical method that assigns exponentially decaying weights to historical data and calculates a weighted average. The smoothing factor is a weighting parameter that controls the sensitivity of the exponentially weighted moving average to both old and new data; the default value is 0.2, approximately equivalent to an exponentially weighted window of the past five batches. When a sudden change in incoming material quality is detected, such as the mean of a new batch deviating from the current mean by more than three standard deviations, the smoothing factor is automatically and temporarily increased to 0.5 to 0.7 to accelerate the model's adaptation to the new incoming material characteristics.
[0062] The hierarchical model is version-managed, with a new model version number generated after each update, and older versions archived for future reference. The mass production system automatically selects the appropriate model version based on the die type and batch.
[0063] The triggering conditions and update content of the above-mentioned extended Kalman filter recursive update, exponentially weighted moving average online update, and multi-model parallel verification mechanism are summarized as follows: The online update triggering strategy includes the following scenarios: Upon completion of each batch of bare die testing, a recursive update of the power-law parameters using an extended Kalman filter and an exponentially weighted moving average update of the standardized parameters are routinely triggered online. When the model goodness of fit is below 0.7, a degenerate model form is switched. When the failure rate of three consecutive batches of Grade A bare die products exceeds the threshold, the grade boundary is tightened. When a new failure mode is detected from finished product feedback, a new rule is added and the experimental status is marked. When the supplier or wafer batch changes, the Bayesian prior is reset to a wide distribution.
[0064] Compared with existing technologies, the method of this embodiment has the following beneficial effects: Significantly reduced testing time: The testing time for screening incoming bare die materials is reduced from 30 to 60 seconds per bare die in the full-life aging test to 2 to 5 seconds per bare die, a reduction of 10 to 30 times, allowing it to be fully integrated into the mass production testing process. A qualitative leap in screening capabilities: Traditional continuity tests can only exclude bare dies that are directly inoperable. The method of this embodiment can screen out early-failure products that are currently operational but have short lifespans. Actual testing suggests that the detection rate of Grade D scrap products in incoming materials can be increased from nearly 0% to over 95%, significantly reducing the rework rate of finished products. Refined grading: The four-grade grading (A, B, C, D) ensures that bare dies are used to their fullest potential. High-quality dies are used for high-value automotive-grade industrial products, medium-quality dies for consumer-grade products, and low-quality dies are promptly rejected. Compared to a one-size-fits-all binary approach of accepting and rejecting, the utilization rate of bare dies can be increased by 10% to 20%. Traceable Closed-Loop: A link is established between bare die grading data and finished product reliability data, forming a full-chain quality traceability capability from raw materials to finished products. When batch reliability issues occur in finished products, abnormal characteristic patterns of incoming bare dies can be quickly identified, and incoming material receiving standards can be adjusted accordingly. Continuous Model Evolution: With the continuous accumulation of mass production data and the feedback of finished product data, the grading model is continuously optimized, and the prediction accuracy continues to improve. Initially, a basic model can be established based on preliminary data from 1,000 bare dies. As the data volume increases to over 10,000 dies, the model prediction accuracy can increase from approximately 80% to over 95%. Zero Hardware Dependency: The entire implementation of the method in this embodiment resides at the test software and firmware layer, without relying on any special test hardware. Existing mass production test fixtures fully meet the data acquisition requirements. Online self-evolution capability: Through an online parameter update mechanism driven by a dual algorithm of extended Kalman filtering and exponential weighted moving average, the hierarchical model can adapt to the quality drift and new failure modes of different batches of NAND without manual intervention. Compared with the fixed parameter model, the online evolution model can reduce the mean absolute error of prediction by 40% to 60% after 50 consecutive production batches.
[0065] In one embodiment, the method further includes: When a new model of NAND bare die is introduced into the mass production line, the model parameters that have been calibrated for the old model of bare die are used as the Bayesian prior for the new model of bare die. The migration uncertainty is expressed by the reduced prior accuracy, or the similarity of the feature distribution of the new and old models is measured by the maximum mean difference. The model parameters of the old model are then used to determine whether to reuse them directly. The temperature acceleration factor is calculated based on the Arrhenius model. The degradation amplitude coefficient is then scaled according to the temperature acceleration factor for lifetime prediction. The activation energy is obtained by back-calculating the original bit error rate degradation data of the same batch of bare crystals at at least two different temperature points and fitting the model. When the goodness of fit of the power-law degenerate model is lower than a preset fitting threshold, the power-law degenerate model is switched to an exponential degenerate model for fitting and extrapolation.
[0066] In this embodiment, to verify the effectiveness of the method, a complete comparative experiment was conducted on 1500 Kioxia BiCS53D TLC NAND bare dies in three batches. Each batch contained 500 bare dies, of which 400 were used for training and calibration models, and 100 were used for blind testing and verification.
[0067] The specific statistical results for verifying the fitting accuracy of the power-law model are as follows: the minimum goodness of fit is 0.71, the 25th percentile is 0.88, the median is 0.94, the 75th percentile is 0.97, and the maximum value is 0.99; the minimum degradation index is 0.42, the 25th percentile is 0.58, the median is 0.67, the 75th percentile is 0.81, and the maximum value is 1.12; the minimum degradation magnitude coefficient is 0.8 × 10⁻⁶. -5 The 25th percentile is 3.2 × 10⁻⁶. -5 The median is 6.5 × 10 -5 The 75th percentile is 12.1 × 10⁻⁶. -5 The maximum value is 45.3 × 10 -5 The goodness of fit for 94% of the bare crystals is greater than or equal to 0.85, verifying the applicability of the power-law degradation model to pSLC NAND. The median degradation exponent is 0.67, corresponding to sublinear degradation, which is consistent with the physical expectation that oxide trap filling gradually becomes saturated.
[0068] The power-law model fitting accuracy verification shows that 94% of the bare crystals have a goodness of fit greater than or equal to 0.85, and the median degradation index is 0.67, which verifies the applicability of the power-law degradation model to pSLC NAND. This median corresponds to sublinear degradation, which is consistent with the physical expectation that the oxide layer trap filling will gradually become saturated.
[0069] Lifetime prediction accuracy validation showed a mean absolute percentage error of 14.3%, a root mean square error of 3820 programming / erasing cycles, a relative error of less than 20% for 82% of cases, a relative error of less than 30% for 94% of cases, and a Pearson correlation coefficient of 0.91. Relative error is defined as the ratio of the absolute value of the difference between predicted and actual lifetimes to the actual lifetime.
[0070] The confusion matrix for the four-level classification accuracy verification is as follows: In true Grade A, there were 31 predicted Grade A results, 4 predicted Grade B results, 0 predicted Grade C results, and 0 predicted Grade D results, with a recall rate of 88.6%; in true Grade B, there were 3 predicted Grade A results, 27 predicted Grade B results, 3 predicted Grade C results, and 0 predicted Grade D results, with a recall rate of 81.8%; in true Grade C, there were 0 predicted Grade A results, 2 predicted Grade B results, 18 predicted Grade C results, and 2 predicted Grade D results, with a recall rate of 81.8%; in true Grade D, there were 0 predicted Grade A results, 0 predicted Grade B results, 1 predicted Grade C result, and 9 predicted Grade D results, with a recall rate of 90.0%. The overall classification accuracy is 85.0%, or 85 / 100. The detection rate of Grade D was 90%, or 9 / 10. One of the samples was misclassified as Grade C, which was a boundary misjudgment. After introducing a rejection rule, this boundary misjudgment can be corrected by detecting degradation acceleration anomalies. After optimization, the detection rate of Grade D was increased to over 95%.
[0071] The accuracy verification of the four-level classification showed that the overall classification accuracy was 85%. The detection rate of Grade D was 90%, with one item being misclassified as Grade C, which was a boundary misclassification. After introducing a rejection rule, this boundary misclassification could be corrected by detecting degradation acceleration anomalies. After optimization, the detection rate of Grade D was improved to over 95%.
[0072] The EKF online update performance verification simulated a continuous production scenario with 10 batches, each batch consisting of 200 Kioxia BiCS5 chips and 200 YMTC Xtacking chips. The initial model was calibrated based on the first batch of Kioxia data. The first batch of Kioxia chips had an average absolute percentage error of 15.2% for both models, serving as a baseline. In the third batch, the Kioxia fixed model had an error of 14.8%, while the EKF model had an error of 11.3%, a reduction of 23.6%. In the fifth batch, during the YMTC switch, the fixed model increased to 28.4%, while the EKF model only reached 16.7%, a reduction of 41.2%. In the seventh batch, the YMTC fixed model had an error of 26.1%, while the EKF model reached 13.5%, a reduction of 48.3%. In the tenth batch, the mixed fixed model had an error of 22.3%, while the EKF model reached 11.8%, a reduction of 47.1%. The EKF online update demonstrated a significant adaptability advantage during NAND model switching, proving the online update mechanism's ability to migrate models across different NAND models.
[0073] Example: Implementation of eMMC product integration: This embodiment uses a pSLC eMMC product from a certain storage product company as the implementation platform. This product employs a certain type of eMMC controller, carries four 3D TLC NAND flash memory dies, operates in pSLC mode, and has a nominal capacity of 5 to 32GB. The target application scenarios are industrial automation and automotive smart cockpits. In this embodiment, the die model and controller model are referred to as "a certain model." In actual implementation, the corresponding parameters should be filled in according to the specific NAND die model and eMMC controller model selected. This vague description aims to cover all NAND flash memory die and controller combinations that conform to the technical solution of this invention.
[0074] During the mass production testing phase, the technical solution of this embodiment is integrated into the eMMC controller firmware. The firmware is burned via FFU (Field Firmware Update) or directly compiled into the factory firmware image. FFU stands for Field Firmware Update, a technique that allows new firmware to be burned through a standard interface without disassembling the device. Upon power-on initialization, the firmware first identifies the model and version information of each die using the ONFI READ ID and READ PARAMETER PAGE commands. ONFI stands for Open NAND Flash Interface, a standardized NAND flash memory interface protocol; READ ID is the command in this protocol used to read the die manufacturer and model identification information; READ PARAMETER PAGE is the command in the ONFI protocol used to read the detailed parameter page information of the die, including page size, block size, total capacity, and electrical characteristics. Then, the corresponding optimal parameters are loaded from the parameter database or automatically calibrated. Revision information refers to the hardware version or revision identifier of the die, used to distinguish dies of the same model from different manufacturing batches or process iterations. During normal operation, the firmware continuously collects operating data and makes real-time adjustments according to the algorithm described in this embodiment.
[0075] The final results were verified through mass production aging tests and customer field reliability data. Actual test data shows that after applying this embodiment, the difference in total write bytes lifetime within a batch was reduced from ±40% to ±15%, and the utilization rate of incoming bare die improved by more than 10 percentage points.
[0076] Example 2: Multi-bare-chip joint lifetime prediction and whole-cell eMMC reliability assessment: This embodiment describes how to extend the lifetime prediction of a single bare die to a joint prediction of multiple bare dies to evaluate the system-level reliability of the entire eMMC product. The scenario involves an eMMC product containing four NAND flash memory dies, operating in pSLC mode, with the firmware accessing the four dies in parallel via interleaving. The lifetime of the entire eMMC is determined by the weakest bare die; if any one of these dies reaches its end-of-life first, the entire product is considered to have failed.
[0077] The implementation steps are as follows: Individual die-by-die prediction: During the mass production testing phase, steps S1 to S4 are performed on each of the four dies to obtain their respective predicted lifetimes and corresponding confidence intervals. System-level lifetime calculation: The minimum predicted lifetime of the four dies is taken as the predicted lifetime of the entire eMMC. Die-to-die difference assessment: The coefficient of variation (COP) of the predicted lifetimes between dies is calculated. The COP is the ratio of the standard deviation to the mean of the predicted lifetimes of each die, used to quantify the degree of difference in lifetimes between dies. If the COP is greater than 0.3, meaning the difference in lifetimes between dies exceeds 30%, the product is marked as having uneven lifetimes between dies. Even if the system-level predicted lifetime meets the Grade A standard, it is downgraded to Grade B. This is because in practice, products with severely uneven lifetimes between dies will experience excessive writing to strong dies to compensate for weak dies under the wear leveling algorithm, which actually accelerates the degradation of weak dies.
[0078] Added joint veto rules for multi-die systems. Rule R5: When the system-level predicted lifetime is less than 0.8 times the nominal lifetime, downgrade by one level, indicating insufficient system-level lifetime margin. Rule R6: When the coefficient of variation is greater than 0.5, directly classify as Grade D, indicating excessive differences between dies and severe quality inhomogeneity. Rule R7: When the degradation acceleration of any die exceeds 5 times the standard deviation of the batch degradation acceleration mean, downgrade by one level, indicating abnormal degradation acceleration of a die.
[0079] Performance Verification: A full-lifecycle aging test was performed on 200 finished eMMC products equipped with 4 bare dies, with the actual lifespan of the weakest die as the benchmark. The mean absolute percentage error of the system-level predicted lifetime using multi-die joint prediction was 16.8%, slightly higher than the 14.3% of a single die, due to the additional uncertainty introduced by the correlation between dies. However, compared to the scheme using only a single die for representative sampling, which typically has a mean absolute percentage error greater than 30%, the prediction accuracy has been significantly improved.
[0080] Example 3: Model migration between different NAND models: This embodiment describes how to quickly migrate existing old model models when a new model of NAND is introduced into a mass production line, thereby shortening the cold start time of the new model model. The background is that in the early stages of introducing a new model of NAND into the production line, there is not enough full-lifetime aging data to calibrate the power-law model parameters. Traditional methods require full-lifetime data of at least 200 to 500 new model dies, which takes several weeks.
[0081] The migration method comprises three steps. Feature domain alignment: 50 bare dies from both the old and new models are selected, and 4D features from the first 100 programming / erasing operations are collected. The maximum mean difference is used to measure the distribution difference between the two models in the feature space. This maximum mean difference refers to the measure of the difference between the means of the two distributions after kernel function mapping, used to quantify the distribution distance between the old and new models in the feature space. Kernel function mapping is a method of mapping data in the original feature space to a higher-dimensional feature space through a nonlinear function, making the mean difference between the two distributions easier to measure in the new space. If the maximum mean difference is small, such as less than 0.5, it indicates that the degradation feature distributions of the two models are similar, and the hierarchical model parameters of the old model can be directly reused.
[0082] If the maximum mean difference is less than 0.5, it means that the degradation feature distributions of the two models are similar, and the grading model parameters of the old model can be directly reused; if the maximum mean difference is greater than or equal to 0.5, it means that the feature distributions are significantly different, and Bayesian prior transfer needs to be used.
[0083] Bayesian prior transfer: If the difference in maximum means is large, indicating a significant difference in feature distributions, it suggests that the two models have different degradation patterns. In this case, a Bayesian method is used, taking the posterior distribution of the old model as the prior distribution of the new model, and expressing the uncertainty that the old model may not be fully applicable with a large prior variance. The prior accuracy is multiplied by a decay factor of 0.2 to 0.5. As bare-chip data of the new model accumulates, the posterior gradually becomes data-driven.
[0084] Rapid calibration with small samples: Initially, only 20 to 30 bare dies with complete lifetime data are needed for rapid calibration of the new model. The prediction bias of the old model on the new data is calculated and superimposed on the predicted lifetime as a global correction term, or the degradation magnitude coefficient is adjusted by a linear scaling factor, where the scaling factor is determined by minimizing the prediction error of the first 20 bare dies of the new model.
[0085] Experimental verification: Taking the migration from Kioxia BiCS5 to YMTC Xtacking 128L as an example. Using only the full lifetime data of 25 bare YMTC dies, the mean absolute percentage error (MASE) of the predictions after migration was 21.5%. In contrast, directly reusing the Kioxia model without migration resulted in an MASE of 32.8%, requiring more than 250 dies for training from scratch to reduce the MASE to below 20%. Model migration reduced the calibration data requirement for the new model by approximately 90%, and compressed the calibration time from 3-4 weeks to 2-3 days.
[0086] Specifically, when a new model of NAND flash memory is introduced into the mass production line, the model parameters already calibrated for the old model are used as the Bayesian prior for the new model. The transfer uncertainty is expressed using attenuated prior accuracy. Specifically, the posterior distribution of the old model is used as the prior distribution of the new model, and a large prior variance is used to express the uncertainty that the old model may not be fully applicable. The prior accuracy is multiplied by an attenuation factor of 0.2 to 0.5, and the transfer uncertainty is quantified by this attenuated prior accuracy. As new model flash memory data accumulates, the posterior gradually becomes data-driven and adaptively adjusted. Alternatively, the similarity of the feature distributions of the old and new models can be measured by the maximum mean difference. The maximum mean difference refers to the measure of the difference between the means of the two distributions after mapping using a kernel function, used to quantify the distribution distance between the old and new models in the feature space. When the similarity is high, the old model parameters are directly reused; when the similarity is low, Bayesian prior transfer is used.
[0087] Example 4: Lifetime prediction with temperature compensation: This embodiment describes how to incorporate ambient temperature into the lifetime prediction model to adapt to prediction requirements at different test operating temperatures. The physical background is that the degradation rate of NAND Flash follows an Arrhenius relationship with temperature; the higher the temperature, the faster the oxide layer trap formation and charge detrapping rates. When a power-law model calibrated at 25 degrees Celsius is used for high-temperature testing at 85 degrees Celsius, without temperature compensation, the predicted lifetime will be significantly overestimated.
[0088] The temperature compensation method comprises three steps. First, the temperature acceleration factor: defined based on the Arrhenius model, where the reference temperature is 25 degrees Celsius (298 Kelvin), the actual test operating temperature is the Kelvin temperature, the activation energy is the typical value of 0.15 to 0.25 eV for pSLC NAND, and the Boltzmann constant is a known physical constant. Second, temperature scaling of the degradation parameters: the degradation amplitude coefficient is scaled according to the temperature acceleration factor and used to calculate the predicted lifetime. The degradation index is usually insensitive to temperature, meaning the shape function of the degradation curve remains unchanged, and therefore no temperature scaling is applied.
[0089] The Boltzmann constant is a known fundamental physical constant, with a value of approximately 1.38 × 10⁻⁶. -23 J / K.
[0090] Online calibration of activation energy: When mass production testing has temperature control capabilities, temperatures from 0 to 85 degrees Celsius can be configured. Degradation data of the same batch of bare dies can be collected at two temperature points, such as 25 degrees Celsius and 70 degrees Celsius. Using an Arrhenius plot (the natural logarithm of the degradation amplitude coefficient versus the reciprocal of temperature), with ln(α̂) as the vertical axis and 1 / T as the horizontal axis, a straight line is fitted, and its slope is taken to inversely deduce the activation energy of that batch. Activation energies of different NAND models and batches may vary by 0.05 to 0.10 electron volts; online calibration can capture this batch-specificity.
[0091] Application Example: A batch of bare dies has a predicted lifetime of 38,000 program / erase cycles at 25 degrees Celsius. If the target operating temperature of this product is 70 degrees Celsius, i.e., an automotive-grade cabin environment, with a temperature acceleration factor of approximately 2.8 and an activation energy of 0.2 electron volts, then the equivalent lifetime after temperature compensation is approximately 15,200 program / erase cycles. This bare die is rated as Grade B (≥30,000 cycles) at 25 degrees Celsius, but its equivalent lifetime drops to Grade C at 70 degrees Celsius, highlighting the necessity of temperature compensation for grading automotive-grade industrial products.
[0092] Specifically, a temperature acceleration factor is calculated based on the Arrhenius model, and the degradation amplitude coefficient is scaled according to the temperature acceleration factor for lifetime prediction. The activation energy is obtained through online calibration: raw bit error rate degradation data of bare dies from the same batch are collected at at least two different temperature points, and a power-law model is fitted to obtain the degradation amplitude coefficient at each temperature point. The slope is calculated using an Arrhenius plot, which is a graph showing the relationship between the natural logarithm of the degradation amplitude coefficient and the reciprocal of the temperature, to inversely estimate the activation energy of the batch. The activation energy of different NAND models and batches may vary by 0.05 to 0.10 electron volts; online calibration can capture this batch-specificity.
[0093] When the goodness of fit of the power-law degradation model is lower than a preset fitting threshold, the power-law degradation model is switched to an exponential degradation model for fitting and extrapolation. The exponential degradation model is RBER(P) = RBER0 + α × (exp(β × P) - 1), where RBER(P) is the original bit error rate at the Pth programming / erasing cycle, RBER0 is the initial original bit error rate, α is the degradation magnitude coefficient, and β is the degradation exponent.
[0094] By intensively collecting raw bit error rate data 100 to 200 times in the early programming / erasing cycle of the bare die, extracting multidimensional degradation features, constructing a lifetime extrapolation prediction framework based on a power-law model, and classifying the bare die into four quality levels (A, B, C, and D) according to the predicted lifetime, the time required for traditional full-lifetime aging tests is compressed from 30 to 60 seconds to 2 to 5 seconds. At the same time, a closed-loop correlation between the classification results and the reliability data of the finished product is achieved, and the model is continuously optimized, solving the problems of long testing cycles, low information utilization, and lack of traceability in existing incoming material screening methods.
[0095] Predict the final lifetime of 30,000 programming / erasing cycles using the raw bit error rate data from the first 100 to 200 programming / erasing cycles, instead of running the entire cycle; extract four-dimensional features, namely mean, slope, acceleration, and volatility, for multi-dimensional joint discrimination, instead of a single threshold; update the grading model online, and continuous feedback from mass production data improves the grading accuracy as data accumulates; and establish a closed-loop link with finished product reliability data to form a traceable quality management system.
[0096] The aforementioned method for predicting and grading the lifetime of NAND flash memory dies involves repeatedly collecting raw bit error rates during the early programming / erasing cycles of the NAND flash memory die to form a degradation curve. Multidimensional feature vectors, including initial error rate, degradation rate, acceleration, and local fluctuations, are extracted from this curve. Power-law models and other nonlinear fitting techniques are then used to predict lifetime and confidence intervals. A grading model is constructed based on these prediction results and feature vectors to evaluate die quality. Closed-loop optimization is achieved through correlation analysis with finished product field reliability data, dynamically adjusting model parameters and grading thresholds. This ensures rapid and accurate assessment of die lifetime and a traceable correlation between die quality and finished product reliability, thereby significantly improving overall product reliability and production efficiency.
[0097] Figure 2 This is a schematic block diagram of a NAND flash memory bare die lifetime prediction and quality grading device 300 provided in an embodiment of the present invention. Figure 2 As shown, corresponding to the above-described NAND flash memory die lifetime prediction and quality grading method, the present invention also provides a NAND flash memory die lifetime prediction and quality grading apparatus 300. This NAND flash memory die lifetime prediction and quality grading apparatus 300 includes a unit for performing the above-described NAND flash memory die lifetime prediction and quality grading method, and the apparatus can be configured in a server. Specifically, please refer to... Figure 2 The NAND flash memory die lifetime prediction and quality grading device 300 includes a data acquisition unit 301, a feature extraction unit 302, a lifetime prediction unit 303, a quality grading unit 304, and a closed-loop optimization unit 305.
[0098] Data acquisition unit 301 is used to acquire the original bit error rate multiple times at preset intervals during the early programming / erasing cycle stage of the bare die, forming an original bit error rate degradation curve and recording the initial number of bad blocks; feature extraction unit 302 is used to extract a multi-dimensional degradation feature vector from the original bit error rate degradation curve, the multi-dimensional degradation feature vector including the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations; lifetime prediction unit 303 is used to perform nonlinear fitting on the original bit error rate degradation curve using a power-law degradation model to obtain degradation parameters, calculate the predicted lifetime and prediction confidence interval, the predicted lifetime being the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold, and the power-law degradation model... When the goodness of fit is lower than a preset fitting threshold, other degradation models are switched for fitting and extrapolation; the quality grading unit 304 is used to construct a grading model based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. The bare die is graded according to the grading model, and the grading results are corrected in combination with the joint rejection rule for multidimensional degradation features; the closed-loop optimization unit 305 is used to perform correlation analysis between the grading results and the field reliability data of the finished product made from the bare die, and to optimize the grading model in a closed loop. The closed-loop optimization includes correcting the grading model based on the field reliability data and updating the model parameters and grading threshold online based on a multi-model parallel verification mechanism.
[0099] In one embodiment, an update unit is also included, used to use the model parameters already calibrated for the old model NAND die as the Bayesian prior for the new model when a new model NAND die is introduced into the mass production line. The migration uncertainty is expressed by the attenuated prior accuracy, or the similarity of the feature distributions of the old and new models is measured by the maximum mean difference. The model parameters of the old model are then used to determine whether to directly reuse them based on the similarity. A temperature acceleration factor is calculated based on the Arrhenius model, and the degradation amplitude coefficient is scaled according to the temperature acceleration factor for lifetime prediction. The activation energy is obtained by back-calculating the original bit error rate degradation data of the same batch of dies collected at at least two different temperature points and fitting the model. When the goodness of fit of the power-law degradation model is lower than a preset fitting threshold, the power-law degradation model is switched to an exponential degradation model for fitting and extrapolation.
[0100] In one embodiment, the closed-loop optimization unit 305 is used to tighten the predicted lifetime threshold of a grade when the actual failure rate of products made from the same quality grade of bare dies in multiple consecutive batches is significantly higher than the expected performance of that grade in the grading model; and to promote a certain bare die feature pattern to a new rejection rule when a certain bare die feature pattern is detected as a high grade in the model prediction but the corresponding finished product has early failure.
[0101] In one embodiment, the closed-loop optimization unit 305 is used to recursively update the parameters of the power-law degradation model using extended Kalman filtering, treating the parameter vector as a hidden state. Each time a new batch of bare die data arrives, the parameter estimates are adjusted through prediction and update steps, and the parameter covariance matrix is maintained. An exponentially weighted moving average is used to update the standardized parameters of the multidimensional degradation feature vector online. The standardized parameters include the mean and standard deviation of each feature dimension. The update formula is an exponentially weighted fusion of the current batch sample statistics and historical statistics. The smoothing factor defaults to a first preset value. When the mean of a new batch feature is detected to deviate from the current mean by more than a preset multiple of the standard deviation, the smoothing factor is temporarily increased to a second preset value. The unit also maintains a main model and a shadow model. The shadow model uses an update strategy with a smaller update magnitude than the main model. After a preset number of batches, the prediction errors of the two models are compared using samples of known lifetime data. If the prediction error of the shadow model is significantly lower than that of the main model, the system switches back to the previously validated main model version and reinitializes the main model from the shadow model.
[0102] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned NAND flash memory bare die lifetime prediction and quality grading device 300 and each unit can be referred to the corresponding description in the foregoing method embodiments. For the sake of convenience and brevity, it will not be repeated here.
[0103] The aforementioned NAND flash memory die lifetime prediction and quality grading device 300 can be implemented as a computer program, which can, for example, Figure 3 It runs on the computer device shown.
[0104] Please see Figure 3 , Figure 3 This is a schematic block diagram of a computer device provided in an embodiment of this application. The computer device 500 can be a server, wherein the server can be a standalone server or a server cluster composed of multiple servers.
[0105] See Figure 3 The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a system bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.
[0106] The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a method for predicting and grading the lifetime of NAND flash memory die.
[0107] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.
[0108] The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a method for predicting the lifetime and quality grading of NAND flash memory die.
[0109] This network interface 505 is used for network communication with other devices. Those skilled in the art will understand that... Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0110] The processor 502 is used to run a computer program 5032 stored in the memory to implement all the steps of the NAND flash memory bare die lifetime prediction and quality grading method.
[0111] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.
[0112] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.
[0113] Therefore, the present invention also provides a storage medium. This storage medium can be a computer-readable storage medium. The storage medium stores a computer program, wherein when executed by a processor, the computer program causes the processor to perform all steps of the NAND flash memory bare die lifetime prediction and quality grading method.
[0114] The storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.
[0115] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.
[0116] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.
[0117] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the device of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0118] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.
[0119] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for predicting the lifetime and grading the quality of NAND flash memory bare die, characterized in that, include: In the early programming / erasing cycle of the bare die, the original bit error rate is collected multiple times at preset intervals to form the original bit error rate degradation curve, and the initial number of bad blocks is recorded. A multidimensional degradation feature vector is extracted from the original bit error rate degradation curve. The multidimensional degradation feature vector includes the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations. The original bit error rate degradation curve is nonlinearly fitted using a power-law degradation model to obtain degradation parameters. The predicted lifetime and prediction confidence interval are extrapolated and calculated. The predicted lifetime is the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold. When the goodness of fit of the power-law degradation model is lower than the preset fitting threshold, other degradation models are switched to fit and extrapolate. A grading model is constructed based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. The bare crystal is graded according to the grading model, and the grading results are corrected by combining the joint rejection rule for multidimensional degradation features. The classification results are correlated with the field reliability data of the bare die products, and the classification model is optimized in a closed loop. The closed loop optimization includes correcting the classification model based on the field reliability data and updating the model parameters and classification thresholds online based on a multi-model parallel verification mechanism.
2. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 1, characterized in that, The early programming / erasing cycle phase consists of the first to the Nth programming / erasing cycle, where N is the preset number of early cycles; the preset interval is the time to collect the raw bit error rate once every preset number of cycles; during each collection, multiple pages of the next word line are randomly selected from the storage block that has completed the programming / erasing operation, and data is written using a checkerboard test pattern to maximize the interference effect between word lines.
3. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 2, characterized in that, The initial raw bit error rate is the raw bit error rate value after the first programming / erasing cycle; the degradation rate is the slope obtained by linear regression of the degradation curve of the raw bit error rate; the degradation acceleration is the coefficient of the quadratic term obtained by fitting the degradation curve of the raw bit error rate with a quadratic polynomial; the local volatility is the standard deviation of the residual obtained after smoothing the degradation curve of the raw bit error rate with a sliding window.
4. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 1, characterized in that, The power-law degenerate model is: RBER(P) = RBER0 + α × P β Where RBER(P) is the raw bit error rate at the Pth programming / erasing cycle, RBER0 is the initial raw bit error rate, P is an integer, α is the degradation magnitude coefficient, β is the degradation exponent, and α is greater than zero and β is greater than zero; The predicted lifetime is obtained by substituting the preset failure threshold into the fitted power-law degradation model and solving it inversely. The predicted confidence interval is constructed by sampling each sampling point of the original bit error rate degradation curve multiple times with replacement using the Bootstrap resampling method. After each sampling, the power-law degradation model is refitted and the predicted lifetime is calculated, using preset low quantiles and preset high quantiles. The relative width of the confidence interval is defined as the ratio of the difference between the upper and lower limits of the confidence interval to the predicted lifetime. When the relative width of the confidence interval is greater than or equal to a preset width threshold, the upper limit of the number of samplings in the early programming / erasing cycle is increased, and the process of repeatedly sampling the original bit error rate at preset intervals is returned to form the original bit error rate degradation curve and the initial bad block count is recorded.
5. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 1, characterized in that, The quality grades include premium products, standard products, downgraded products, and scrap products, and each grade is defined based on a preset lifespan threshold. The multidimensional degradation feature joint veto rule includes: The degradation acceleration rejection rule is used to downgrade the current level by one level when the degradation acceleration exceeds a preset multiple of the average degradation acceleration of the current batch. The local volatility rejection rule is used to downgrade the current level by one level when the local volatility exceeds a preset multiple of the standard deviation of the local volatility mean of the current batch. An initial raw bit error rate rejection rule is used to directly determine a product as scrap when the initial raw bit error rate is greater than a preset proportion of the preset failure threshold. The initial bad block count rejection rule is used to downgrade the current level by one level when the initial bad block count exceeds a preset multiple of the number of bad blocks allowed by the specification.
6. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 1, characterized in that, The closed-loop optimization includes: When the actual failure rate of products made from multiple consecutive batches of bare crystals of the same quality grade is significantly higher than the expected performance of that grade in the grading model, the predicted lifetime threshold of that grade is tightened. When a certain bare die feature pattern is detected and predicted to be of a high level by the model, but the corresponding finished product shows early failure, the feature pattern is promoted to a new rejection rule.
7. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 1, characterized in that, The online update of model parameters includes: Extended Kalman filtering is used to recursively update the parameters of the power-law degradation model. The parameter vector is regarded as a hidden state. When each batch of new bare die data arrives, the parameter estimation is adjusted through prediction step and update step, and the parameter covariance matrix is maintained. The standardized parameters of the multidimensional degenerate feature vector are updated online using an exponentially weighted moving average. The standardized parameters include the mean and standard deviation of each feature dimension. The update formula is an exponentially weighted fusion of the current batch sample statistics and historical statistics. The smoothing factor is set to the first preset value by default. When the mean of the new batch features is detected to deviate from the current mean by more than a preset multiple of the standard deviation, the smoothing factor is temporarily increased to the second preset value. In addition, the main model and the shadow model are maintained. The shadow model adopts an update strategy with a smaller update magnitude than the main model. After a preset number of batches, the prediction errors of the two models are compared using samples with known lifetime data. If the prediction error of the shadow model is significantly lower than that of the main model, the model is switched back to the previous verified version of the main model and the main model is reinitialized from the shadow model.
8. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 4, characterized in that, Also includes: When a new model of NAND die is introduced into the mass production line, the model parameters that have been calibrated for the old model die are used as the Bayesian prior for the new model die. The migration uncertainty is expressed by the reduced prior accuracy, or the similarity of the feature distributions of the new and old models is measured by the maximum mean difference. The model parameters of the old model are then used to determine whether to reuse them directly.
9. The method for predicting the lifetime and grading the quality of NAND flash memory bare die according to claim 4, characterized in that, Also includes: The temperature acceleration factor is calculated based on the Arrhenius model. The degradation amplitude coefficient is then scaled according to the temperature acceleration factor for lifetime prediction. The activation energy is obtained by back-calculating the original bit error rate degradation data of the same batch of bare crystals at at least two different temperature points and fitting the model. When the goodness of fit of the power-law degenerate model is lower than a preset fitting threshold, the power-law degenerate model is switched to an exponential degenerate model for fitting and extrapolation.
10. A device for predicting and grading the lifetime of NAND flash memory bare die, characterized in that, include: The data acquisition unit is used to acquire the original bit error rate multiple times at preset intervals during the early programming / erasing cycle of the bare die, form the original bit error rate degradation curve, and record the initial number of bad blocks; The feature extraction unit is used to extract a multidimensional degradation feature vector from the original bit error rate degradation curve. The multidimensional degradation feature vector includes the initial original bit error rate, degradation rate, degradation acceleration, and local fluctuations. The lifetime prediction unit is used to perform nonlinear fitting on the original bit error rate degradation curve using a power-law degradation model to obtain degradation parameters, calculate the predicted lifetime and the prediction confidence interval. The predicted lifetime is the number of programming / erasing cycles when the original bit error rate reaches a preset failure threshold. When the goodness of fit of the power-law degradation model is lower than the preset fitting threshold, it switches to other degradation models for fitting and extrapolation. A quality grading unit is used to construct a grading model based on the predicted lifetime and the multidimensional degradation feature vector. The grading model includes at least three quality levels and a joint rejection rule for multidimensional degradation features. The bare die is graded according to the grading model, and the grading results are corrected by combining the joint rejection rule for multidimensional degradation features. The closed-loop optimization unit is used to perform correlation analysis between the grading results and the field reliability data of the bare die manufactured products, and to optimize the grading model in a closed loop. The closed-loop optimization includes correcting the grading model based on the field reliability data and updating the model parameters and grading thresholds online based on a multi-model parallel verification mechanism.