A film resistor production process for a light strip

Abstract

The present application relates to the technical field of chip film resistor manufacturing, and discloses a production process of a film resistor for a lamp strip, which sequentially performs the steps of raw material IQC grading and screening, double-layer specification mask printing, specification isolation vacuum sputtering, two-stage step pure water spraying and washing, nitrogen atmosphere gradient aging, substrate partition resistance value pre-screening, partition self-adaptive laser resistance correction, double-layer protective layer and non-noble metal character printing, pulse water cooling film separation, double-layer gradient nickel-chromium side guide sputtering and post-forming whole-process steps. The present application omits the silver conductor printing and high-temperature sintering process, and does not introduce noble metals throughout the process; the specification mask and independent sputtering pipe control are adopted to improve the film thickness uniformity, and the film thickness extreme difference is less than or equal to 0.002 microns; the partition resistance value pre-screening is linked with the grading transfer reflow to improve the raw material utilization rate; in combination with the double-layer gradient nickel-chromium side guide film and the composite protective layer structure, the low contact impedance and the sulfur and moisture resistance performance are considered, and the production process is suitable for the low-cost batch production requirement of the lamp strip.

Description

Technical Field

[0001] This invention relates to the field of chip thin-film resistor manufacturing technology, specifically a production process for thin-film resistors used in LED strips. Background Technology

[0002] The current mature manufacturing process for mass-produced thin-film resistors on the market is fixed as follows: raw material IQC, SC1 / C1 silver conductor printing, high-temperature sintering, BA mask printing, BC2 mask printing, nickel-chromium vacuum sputtering, water washing, high-temperature aging, resistance pre-screening, laser resistance repair, protective layer printing, wafer splitting, side-guided sputtering, electroplating, testing and packaging to finished product shipment. This process relies on silver paste printing and high-temperature sintering to form the conductive internal electrode on the front of the substrate, and relies on silver material to build the conductive path at both ends of the resistor to ensure the basic electrical performance of the product.

[0003] As the prices of precious metal raw materials continue to fluctuate and rise, silver and palladium consumables are driving up the overall manufacturing cost of sheet resistors. LED strips and low-voltage linear lighting are highly price-sensitive consumer electronics products, and the premium for component procurement cannot be passed on to end products in a synchronized manner, further exacerbating cost pressures on the industry. Furthermore, this traditional process has inherent manufacturing shortcomings: firstly, the entire process requires two precious metal-related steps—silver paste printing and high-temperature sintering—resulting in a large consumption of precious metal materials during production; secondly, the unified, universal mask pattern cannot match the coating and molding requirements of different packaging substrates, leading to multiple... After mixed-cavity sputtering of substrates of various specifications, the uniformity of film thickness fluctuates greatly, resulting in a high workload for subsequent laser repair. Furthermore, electrochemical migration easily occurs at the interface between the silver conductor and the nickel-chromium resistive film, leading to a shortcoming in device reliability under long-term humid and hot conditions. Existing few improvement solutions only replace the outer base metal electrode on the side, while the silver printing and sintering process is still retained on the front of the substrate. This cannot fundamentally reduce the investment in precious metal consumables, nor can it form a complete set of control measures for the uniformity of film coating on substrates of various specifications and the recycling and reuse of defective products in the production process. It is difficult to meet the market demand for large-scale, low-cost, and stable mass production of LED strips. Summary of the Invention

[0004] The purpose of this invention is to provide a manufacturing process for thin-film resistors for LED strips, so as to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a manufacturing process for thin-film resistors for LED strips, comprising the following sequential process steps: S1. Raw material IQC grading and screening steps: Take 96% alumina ceramic substrates, use optical equipment to detect the flatness and surface cleanliness of the substrates, and sort out and remove substrates with excessive warpage; pass argon plasma through qualified substrates for surface activation cleaning, and seal and store them in the warehouse for later use. S2. Double-layer mask printing steps: According to the substrate packaging specifications, retrieve the corresponding BA mask layout and BC2 mask layout. First, print the BA mask layer on the front side of the ceramic substrate, and then print the BC2 mask layer after curing. During the printing process, use a CCD vision device to collect the alignment coordinates of the double-layer mask in real time. Use the BA mask area to limit the forming range of the inner electrode on the front side, and use the BC2 mask area to limit the forming range of the nickel-chromium resistor layer. S3. Separate Vacuum Sputtering Steps for Each Package Size: A single-package-size substrate is fed into the magnetron sputtering chamber. The specific sputtering power, deposition time, and chamber vacuum parameters for that package size are selected. Before sputtering, the substrate's revolution and rotation speeds are adjusted, and the target flatness is calibrated. Magnetron sputtering is then initiated to deposit a nickel-chromium thin film on the substrate surface. After the first piece of each batch is sputtered, the film thickness is scanned across the entire area, and the unit resistance is detected. Batch sputtering can only proceed after the first piece passes inspection. During batch sputtering, film thickness data is collected in real time, and the nickel-chromium thin film deposition time is dynamically adjusted to control the film thickness difference in the substrate resistance pattern area to ≤0.002μm. S4. Two-stage stepped pure water spray washing process: The substrate is continuously sprayed with a two-stage room temperature pure water gradient to remove the nickel-chromium film debris attached to the surface of the BA mask and BC2 mask, leaving only the continuous and complete nickel-chromium resistor pattern and the front inner electrode substrate within the area defined by the two mask layers; after the water washing is completed, the substrate surface is left to drain the free water. S5. Nitrogen atmosphere gradient aging step: Place the drained substrate into a sealed nitrogen aging furnace and heat it to 130-150°C at a heating rate of 2°C / min. Hold it at this temperature for 2-4 hours. After the holding period, cool it down to room temperature at a cooling rate of 1°C / min. Low-humidity nitrogen is continuously introduced into the aging furnace. S6. Substrate partition resistance pre-screening step: Divide the substrate into several independent detection blocks according to the substrate mask layout, collect the substrate unit resistance value of each block and calculate the block resistance value dispersion; send the block resistance value dispersion data to the back-end laser resistance repair equipment in real time through wired transmission line. S7, Partition Adaptive Laser Resistance Repair Steps: Read the block resistance dispersion data transmitted in S6, and switch the laser cutting mode according to the dispersion value; perform shallow linear cutting on blocks with resistance dispersion ≤ 0.4%, and perform multi-segment stepped cutting on blocks with resistance dispersion ≤ 0.8% < 0.4%. S8, Double protective layer + precious metal-free character code printing steps: First, print a 2-4μm inorganic silicon bottom insulating layer on the surface of the substrate after resistance repair, and then print a 6-8μm epoxy outer protective layer after curing; after the double protective layer is cured, use silver-free and halogen-free carbon black ink with added sulfurization inhibitor to print the product specification characters. S9. Pulse water-cooled slab separation step: Pulse intermittent abrasive wheel is used to cut along the pre-made slab groove of the substrate. The cutting parameters are set to 0.5s cutting and 0.3s intermittent cutting. 0.2-0.3MPa room temperature pure water is sprayed synchronously in the cutting gap. After the slab separation is completed, the two end faces of the strip unit are scanned one by one by CCD. S10, Double-layer gradient nickel-chromium side-guided sputtering steps: The strip-shaped resistor unit after being divided is sent into the sputtering cavity, and two layers of nickel-chromium conductive film are sputtered sequentially on both sides of the unit; the bottom nickel-chromium film has a chromium content of 8wt%, and the top nickel-chromium film has a chromium content of 14wt%. S11, Post-forming process steps: sequentially perform pelletizing, pulse electroplating, magnetic separation, fully automatic packaging, and FQC grading and full inspection; the pulse electroplating process sequentially deposits a 1.2-1.5μm nickel barrier layer and a 3-5μm pure tin solderable layer. After electroplating, it is sent to a 110℃ oven for baking for 30 minutes, and then transferred to the magnetic separation process.

[0006] As a preferred embodiment of the present invention, in the S2 double-layer specification mask printing step, a layout preprocessing operation is performed: 0.03-0.08mm edge compensation lines are drawn for the BA mask layout and BC2 mask layout for each package specification. The unit of measurement for the mask layout size of each package specification is mm, and the specific layout size for each specification is as follows: 2010 Specifications: BA mask length L=65.155, width W=55.246, width margin W'=1.7; BC2 mask length L=63.655, width W=58.5, length margin L'=1.5; 1210 Specifications: BA mask length L=66.953, width W=54.954, width margin W'=1.8; BC2 mask length L=65.953, width W=57.7, length margin L'=1.0; 1206 Specifications: BA mask length L=64.492, width W=55.084, width margin W'=1.1; BC2 mask length L=63.374, width W=57.667, length margin L'=1.4; 0805 Specifications: BA mask length L=65.713, width W=55.614, width margin W'=0.8; BC2 mask length L=65.913, width W=57.417, length margin L'=1.0; 0603 Specifications: BA mask length L=66.776, width W=55.177, width margin W'=0.55; BC2 mask length L=65.976, width W=57.077, length margin L'=0.6; When calling the process parameters of S3 vacuum sputtering, the sputtering power, deposition time, cavity vacuum parameters and the current specification mask compensation line size are linked and matched.

[0007] As a preferred embodiment of the present invention, the S2 double-layer specification-separated mask printing step includes a layer alignment and locking sorting operation, specifically comprising the following steps: Step 1: After the first layer of BA mask printing and curing is completed, the CCD acquires all the graphic coordinates of the entire substrate and stores them as a reference coordinate file; Step 2: When printing the second BC2 mask, compare the coordinates of the BC2 mask graphic with the reference coordinate file line by line in real time and calculate the coordinate offset. Step 3: If the coordinate offset of any area of ​​the entire substrate is greater than 0.02mm, the equipment locks the printing platform and stops the current printing process. The sorting mechanism automatically pushes the entire substrate to the scrap box. At the same time, the system locks the printing fixture and stops its reuse until the fixture calibration is completed before production can resume.

[0008] As a preferred embodiment of the present invention, the S3 specification-separated isolation vacuum sputtering step includes a staged film thickness-resistance linkage closed-loop control operation, specifically comprising the following steps: Step 1: After the first substrate is sputtered, scan the film thickness and collect the resistance value of the corresponding block cell according to the detection zone divided by the mask, and establish an independent film thickness-resistance mapping data table for each zone. Step 2: In the batch sputtering production stage, after sputtering 5 substrates consecutively, 1 substrate is randomly selected for zoned resistance data collection. The film thickness-resistance mapping data table of the corresponding zone is retrieved, and the nickel-chromium thin film deposition time of each region is corrected in segments. Step 3: Only a single package specification substrate is loaded into the same sputtering cavity. The cavity control system binds the current specification mask compensation line size and automatically shields the sputtering parameter formulas corresponding to other package specifications, prohibiting the misuse of cross-specification parameters.

[0009] As a preferred embodiment of the present invention, a block-level transfer and reflow operation is performed between the S6 substrate partition resistance pre-screening step and the S7 partition adaptive laser resistance repair step, specifically including the following steps: Step 1: After S6 calculates the resistance dispersion of each detection block, it divides the data into three levels according to the resistance dispersion value and transmits them synchronously to the laser resistance correction equipment and the sorting conveyor control system; the corresponding ranges of the three levels of data tags are: first level resistance dispersion ≤ 0.4%, second level 0.4% < resistance dispersion ≤ 0.8%, and third level resistance dispersion > 0.8%; Step 2: The conveyor belt sorts the substrates according to the data tags: the substrates carrying the first and second level tags are directly transported to the laser repair station, and the substrates carrying the third level tags are switched to the sorting track and returned to the S3 vacuum sputtering cavity for re-coating. Step 3: The laser trimming station reads the data tags corresponding to each block of the substrate and automatically switches the matching laser cutting program for the detection blocks with different tags on the same substrate, without using a single fixed cutting parameter to process the entire substrate.

[0010] As a preferred embodiment of the present invention, after the S9 pulse water-cooling slicing step is completed, an end-face defect partitioning reflow reprocessing operation is performed, which specifically includes the following steps: Step 1: The grinding wheel cutting speed is fixed at 1200~1500r / min. The CCD scans the two end faces of the strip resistor unit one by one, marks the units with defects such as nickel-chromium film chipping and film peeling, and assigns them a unique reflow code. Step 2: The robotic arm sorts the resistor units with end face defects according to the return code and collects them into a special transfer box. After the transfer box is full, the whole box is transferred to the S10 double-layer gradient nickel-chromium side-guided sputtering station. Step 3: The side-guided sputtering station identifies the return code carried in the transfer box, and extends the nickel-chromium thin film sputtering deposition time for the end-face defect unit corresponding to the code to completely cover the conductive film layer on both sides of the unit again.

[0011] As a preferred embodiment of the present invention, the S11 post-formation process includes a layered pulse electroplating + segmented low-temperature dehydrogenation standardization operation, specifically comprising the following steps: Step 1: The electroplating process is divided into two pulse currents. The first stage uses low current to deposit a nickel barrier layer, and the second stage uses high current to deposit a pure tin solderable layer. The output waveforms of the two currents are independent of each other and can be adjusted separately. Step 2: After electroplating, the resistor units are sent into the oven in batches and baked in two stages: first, pre-baking at 80℃ for 15 minutes, and then baking at 110℃ for 30 minutes. Step 3: After baking, allow the product to cool naturally to below 40°C before transferring it to the magnetic separation process.

[0012] As a preferred embodiment of the present invention, the S1 raw material IQC grading and screening step includes plasma partitioning activation and isolated storage operations, specifically comprising the following steps: Step 1: After the substrate is sent into the plasma chamber, the upper and lower plasma emission areas of the chamber simultaneously bombard the front and back of the substrate, and the argon plasma treatment continues for 90 seconds. Step 2: After activation and cleaning, immediately place the substrate into a sealed container with built-in desiccant. After covering the container, purge the air inside with dry nitrogen. Step 3: The substrate should be stored in the sealed container for no more than 12 hours. Substrates that exceed the storage time limit should be sent back into the plasma chamber for a second activation treatment.

[0013] As a preferred embodiment of the present invention, the S8 double-layer protective layer + precious metal-free character printing step includes a layered thickness control and segmented curing operation, specifically comprising the following steps: Step 1: When printing the inorganic silicon underlayer insulating layer, adjust the squeegee stroke to control the single-layer film thickness to 2-4 μm. After printing, pre-cur at 80℃ for 10 min. Step 2: After pre-curing, print the epoxy outer protective layer. Adjust the doctor blade stroke to control the outer film thickness to 6-8 μm. The total thickness of the inorganic silicon underlayer and epoxy outer layer is controlled to 8-12 μm. Step 3: After the epoxy outer layer is printed, it is placed in a 150℃ oven for constant temperature curing for 40 minutes, with clean and dry air continuously circulated throughout the curing process.

[0014] Compared with the prior art, the beneficial effects of the present invention are: 1. The overall process of this invention eliminates the two precious metal processing steps of silver conductor printing and matching high-temperature sintering. Throughout the entire process, no silver or palladium precious metal raw materials are introduced into the inner electrode on the front side of the substrate, the conductive layer on the end side, and the printing marking ink. This reduces the consumption of precious metal materials from the source and can meet the production and pricing requirements of low-cost lighting components.

[0015] 2. This invention designs a matching double-layer mask forming pattern for each type of packaging substrate, and combines it with a 0.03-0.08mm pattern edge compensation structure and a layer alignment and locking control process to offset the difference in the lateral and longitudinal deposition rates of the sputtered film, improve the uniformity of sputtered film forming, reduce the overall resistance dispersion of the substrate, and simultaneously reduce the workload of the back-end laser resistance repair process.

[0016] 3. This invention features a separate vacuum sputtering control process for different specifications, with different packaging substrates coated separately in separate cavities. The cavity system automatically shields cross-specification process parameters and is equipped with a zoned film thickness and resistance linkage closed-loop control method. One of every five substrates is sampled for verification and the film deposition time is dynamically corrected. The film deposition state can be corrected in real time during the coating process, and the film thickness difference in the resistance pattern area is controlled to be ≤0.002μm, which greatly improves the consistency of electrical parameters of substrates in the same batch.

[0017] 4. This invention sets up a partitioned resistance detection and process linkage diversion structure, and manages the substrate flow path according to three levels of resistance dispersion: substrates with resistance dispersion ≤0.4% and 0.4% < resistance dispersion ≤0.8% enter the differentiated laser resistance repair process, and substrates with resistance dispersion >0.8% can be returned to the vacuum sputtering cavity for re-coating, without the need to scrap the entire substrate directly, thereby improving the comprehensive utilization rate of ceramic substrate raw materials and reducing production material loss.

[0018] 5. This invention employs a gradient temperature change aging process combined with a low-humidity protective gas treatment, along with a double-layer composite insulation protection structure and non-migration character ink with added sulfurization inhibitors. This can alleviate the stress problem of silver-free nickel-chromium thin films and slow down the erosion of the conductive film layer by moisture and sulfurization media. The end face adopts a double-layer gradient nickel-chromium side conductive film with an 8wt% chromium bottom layer and a 14wt% chromium top layer, which takes into account both low contact resistance and sulfur and moisture resistance. The electrical performance of the device remains stable under long-term continuous power-on conditions of the light strip.

[0019] 6. This invention incorporates pulsed water-cooled stress-relieving cutting and CCD end-face conductive film defect identification, reflow coding and sorting processes in the slab-slab process. End-face defect units resulting from nickel-chromium film chipping and film detachment during slab-slab processing are collected into a dedicated transfer box and directionally reflowed to the side-guided sputtering station, with extended end-face sputtering deposition time to repair the conductive film, significantly reducing finished product losses caused by the slab-slab process. The entire process can be implemented using existing thin-film resistor production equipment without large-scale modifications to the production line hardware, and is compatible with existing factory mass production switching.

[0020] 7. The present invention features a standardized process of layered pulse electroplating and segmented low-temperature dehydrogenation in the electroplating and baking processes. The segmented pulse current is used to prepare a nickel barrier layer and a pure tin solderable layer, and the waveforms of the two current segments are independently adjustable. After electroplating, hydrogen is removed by two-stage low-temperature baking, which improves the interface bonding between the base metal conductive film and the solderable plating layer, avoids plating delamination and hydrogen embrittlement, and the finished product can meet the working conditions of LED light strips for long-term continuous power supply. Attached Figure Description

[0021] Figure 1 This is an overall flow chart of the manufacturing process of a thin-film resistor for LED strips according to the present invention; Figure 2 This is a schematic diagram illustrating the relationship between double-layer mask printing and resistor pattern forming in the production process of a thin-film resistor for LED strips according to the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Example

[0023] like Figure 1 and Figure 2As shown, this invention provides a manufacturing process for thin-film resistors for LED strips, which sequentially executes the following process steps: S1, Raw material IQC grading and screening step: Take 96% alumina ceramic substrates, use optical equipment to detect the flatness and surface cleanliness of the substrates, and sort and remove substrates with excessive warpage; Qualified substrates are surface activated and cleaned by passing argon plasma, and then sealed and stored for later use; This step differs from the traditional process by omitting the pre-printing rough cleaning process of silver conductors, and using double-sided bombardment of the upper and lower plasma emission areas of the cavity to remove organic residues on the substrate surface, with argon plasma treatment for 90 seconds; The substrate has no precious metal paste adhering to the substrate, and the interface bonding ability between the nickel-chromium film and the ceramic substrate is improved only by plasma; After all substrates are activated, they are placed in a nitrogen-sealed material box with built-in desiccant, and the air in the box is replaced by dry nitrogen. The storage time at one time does not exceed 12 hours. Substrates that exceed the 12-hour storage time limit are re-activated by plasma.

[0024] S2. Double-layer mask printing steps: Retrieve the corresponding BA and BC2 mask layouts according to the substrate package specifications. First, print the BA mask layer on the front side of the ceramic substrate, and then print the BC2 mask layer after curing. During the printing process, a CCD vision device is used to collect the alignment coordinates of the double-layer mask in real time. The BA mask area limits the forming range of the inner electrode on the front side, and the BC2 mask area limits the forming range of the nickel-chromium resistor layer. This step independently iterates and calculates the mask pattern size for five types of packages: 0603, 0805, 1206, 1210, and 2010. A compensation line of 0.03mm to 0.08mm is added to the edge of each type of layout to offset the difference in the horizontal and vertical deposition rates of the sputtered film. The printing process implements layer-by-layer reference alignment control: After the first BA mask is cured, the CCD collects the coordinates of the entire substrate and stores the reference file. When printing the BC2 layer, the reference coordinates are compared line by line. If the offset of any area exceeds 0.02mm, the equipment locks the printing platform and the entire substrate is scrapped. The printing fixture is locked simultaneously until the calibration is completed.

[0025] S3. Separate Vacuum Sputtering Procedure by Package Size: A single-package-size substrate is placed into the magnetron sputtering chamber. The specific sputtering power, deposition time, and chamber vacuum parameters for that package size are selected. Before sputtering, the substrate's revolution and rotation speeds are adjusted, and the target flatness is calibrated. Magnetron sputtering is then initiated to deposit a nickel-chromium thin film on the substrate surface. After the first piece of each batch is sputtered, the film thickness is scanned across the entire mask area, and the unit resistance is collected. Batch sputtering can only proceed after the first piece passes inspection. During batch sputtering, film thickness data is collected in real-time, and the nickel-chromium thin film deposition time is dynamically adjusted. The thickness difference of the substrate resistive pattern area is controlled to be ≤0.002μm. This step eliminates the traditional process of SC1 conductor silver paste printing and matching high-temperature sintering. It relies on sputtering nickel-chromium thin film to simultaneously form the front inner electrode and the resistor body. The cavity can only hold a single-size substrate at a time. The system binds the mask compensation size and shields sputtering parameters of other sizes. In batch production, one of the five substrates is sampled for resistance value collection in each zone after continuous processing. The film deposition time is corrected in segments according to the pre-generated zone film thickness-resistance value mapping data table to prevent cross-size mixed cavity coating.

[0026] S4. Two-stage stepped pure water spray washing process: The substrate is continuously sprayed with a two-stage ambient temperature pure water gradient to remove nickel-chromium film debris adhering to the surfaces of the BA and BC2 masks, leaving only the continuous and complete nickel-chromium resistor pattern and the front inner electrode substrate within the area defined by the two mask layers; after washing, the substrate is left to drain and allow free water on the surface to dry. This step reuses the industry-standard spray washing production line without equipment modification. The two-stage spraying uses gradient water pressure: the low-pressure stage removes surface floating film debris, and the high-pressure stage cleans residual metal particles in the mask gaps; the entire process is naturally allowed to drain without the introduction of hot air drying to avoid sudden changes in film stress.

[0027] S5. Nitrogen Atmosphere Gradient Aging Step: Place the drained substrate into a sealed nitrogen aging furnace and heat it to 130-150°C at a heating rate of 2°C / min. Maintain the temperature for 2-4 hours. After the maintenance period, cool it down to room temperature at a cooling rate of 1°C / min. Low-humidity nitrogen is continuously introduced into the aging furnace. This step completely isolates the silver-free nickel-chromium film from air and oxygen. The gradient heating and cooling avoids sudden cooling and heating that can cause internal stress in the film. The continuous flow of nitrogen removes moisture from the furnace and eliminates the composite residual stress caused by the superposition of sputtering and printing processes.

[0028] S6. Substrate Partition Resistance Pre-screening Step: Divide the substrate into several independent detection blocks according to the substrate mask layout, collect the resistance value of each unit in the substrate block and calculate the resistance value dispersion of the block; transmit the resistance value dispersion data of each block to the back-end laser resistance correction equipment and sorting conveyor control system in real time through wired transmission lines; This step does not adopt the whole board uniform resistance value judgment mode. The substrate is divided into independent detection units according to the mask array. The resistance value dispersion of each block is marked separately and transmitted synchronously to the sorting system, and divided into three levels of data labels: Level 1 ≤ 0.4%, Level 2 0.4% < resistance value dispersion ≤ 0.8%, Level 3 > 0.8%.

[0029] S7, Partition Adaptive Laser Resistance Correction Step: Read the block resistance dispersion data transmitted in S6, and switch the laser cutting mode according to the dispersion value; perform shallow linear cutting on blocks with resistance dispersion ≤ 0.4%, and perform multi-segment stepped cutting on blocks with resistance dispersion ≤ 0.8% and 0.4% < resistance dispersion; this step does not use uniform fixed cutting parameters to process the whole substrate, but automatically switches the laser output power and cutting path according to the block data tags transmitted by the pre-screening, to avoid high-power cutting from penetrating the silver-free nickel-chromium thin film substrate; the third-level substrate with dispersion > 0.8% does not enter the laser process and is directly returned to S3 for re-coating.

[0030] S8, Double-layer protective layer + precious metal-free character printing steps: First, a 2-4 μm inorganic silicon bottom insulating layer is printed on the surface of the substrate after resistance repair. After curing, a 6-8 μm epoxy outer protective layer is printed. After the double protective layer is cured, the product specification characters are printed using silver-free and halogen-free carbon black ink with added sulfurization inhibitors. This step performs layered thickness control and segmented curing operation: When printing the inorganic silicon bottom layer, the squeegee stroke is adjusted to control the film thickness to 2-4 μm, and pre-curing is performed at 80℃ for 10 min. After pre-curing, a 6-8 μm epoxy outer layer is printed, and the total thickness of the double layer is 8-12 μm. After epoxy printing is completed, the substrate is placed in a 150℃ oven for constant temperature curing for 40 min, and clean and dry air is introduced throughout the curing process. The single-layer epoxy protection and silver-containing conductive character scheme are abandoned. The ink contains sulfurization inhibitors to block the electrochemical migration of nickel-chromium electrodes.

[0031] S9, Pulse Water-Cooled Slicing Step: Pulse intermittent abrasive wheel cutting is used along the pre-made dividing groove of the substrate. The abrasive wheel cutting speed is fixed at 1200~1500 r / min. The cutting parameters are set to 0.5s cutting and 0.3s intermittent cutting. 0.2~0.3MPa room temperature pure water is sprayed synchronously in the cutting gap. After slicing, the end face of the strip resistor unit is scanned one by one by CCD. The nickel-chromium film chipping and film peeling defect units are marked and assigned reflow codes. This step uses intermittent pulse cutting to reduce mechanical impact. Simultaneous water cooling continuously removes the frictional heat of cutting. The CCD completely identifies the end face defects. The robot collects the defective units into a special transfer box. After the box is full, it is transferred to the S10 station for extended sputtering reprocessing.

[0032] S10, Double-layer gradient nickel-chromium side-guided sputtering step: The strip-shaped resistor unit after slicing is sent into the sputtering chamber, and two layers of nickel-chromium conductive film are sputtered sequentially on both sides of the unit. The bottom nickel-chromium film has a chromium content of 8wt%, and the top nickel-chromium film has a chromium content of 14wt%. In this step, the two layers of nickel-chromium film work together to achieve low contact resistance and high corrosion resistance: the low chromium ratio of the bottom layer reduces the conductive contact resistance of the end face, and the high chromium ratio of the top layer improves the unit's sulfur and moisture resistance. The entire front and end face electrode system does not use any silver or palladium precious metal components.

[0033] S11. Post-forming process steps: sequentially perform pelletizing, pulse electroplating, magnetic separation, fully automated packaging testing, and FQC grading and full inspection. The pulse electroplating process is divided into two pulse current stages: the first stage deposits a 1.2-1.5μm nickel barrier layer with low current, and the second stage deposits a 3-5μm pure tin solderable layer with high current. The current waveforms of the two stages are independently adjustable. After electroplating, the process involves segmented low-temperature hydrogen removal: first, pre-baking at 80℃ for 15 minutes, and then constant-temperature baking at 110℃ for 30 minutes. After baking, the process is allowed to cool naturally to below 40℃ before proceeding to the magnetic separation process. The full inspection process is classified according to resistance range to adapt to the different voltage divider and current limiting circuit requirements of the LED strip. Example

[0034] This embodiment is based on the basic process framework of Embodiment 1, focusing on the detailed implementation of the two core processes of mask printing and vacuum sputtering. The remaining steps S1, S4 to S11 follow the operation described in Embodiment 1 and will not be repeated. The process logic of this embodiment is to solve the two core technical problems of uneven thickness of silver-free nickel-chromium film deposition and short circuit due to misalignment of double-layer masks by using a customized compensation mask in combination with layered alignment and locking printing control, and simultaneously supporting zoned film thickness and resistance closed-loop sputtering control. The entire set of detailed methods works together to stably reduce the resistance dispersion range of the entire substrate. The detailed implementation method is divided into two parts: The first part is the detailed operation of double-layer mask printing of different specifications in S2: After completing the drawing of 0.03mm to 0.08mm edge compensation lines for the corresponding specification pattern, the layered alignment and locking sorting operation is performed. After the first step of printing and curing the BA mask, the CCD acquires the coordinates of the entire substrate and stores the reference file. The second step is to print the BC2 mask and compare the reference coordinates line by line in real time to calculate the offset value. The third step is to... If the offset of the target area is greater than 0.02mm, the printing platform is locked, the entire board is scrapped, and the fixture is locked. The layout compensation line size is pre-bound to the sputtering process parameters. When the sputtering power, deposition time, and vacuum degree are retrieved, the mask size is matched synchronously. The second part is the S3 specification-separated isolation vacuum sputtering refinement operation: the cavity is only placed with a single specification substrate for coating at a time. The first step is to scan the film thickness and collect the resistance value of the first substrate in the partition and establish a partition-independent film thickness-resistance mapping data table. The second step is to sample 1 piece out of every 5 pieces in the batch for partition resistance measurement and correct the film deposition time. The third step is to shield the cavity system for cross-specification sputtering parameters to prevent mis-calling. All raw material components in this embodiment are completely consistent with those in embodiment 1: 96% alumina ceramic substrate, argon, BA mask ink, BC2 mask ink, nickel-chromium alloy target, pure water, nitrogen, inorganic silicon coating, epoxy coating, silver-free and halogen-free carbon black ink, nickel electroplating solution, and pure tin electroplating solution. There are no new materials. It can be implemented based on the existing automated production line without the need for equipment modification. Example

[0035] This embodiment is based on the basic process framework of Embodiment 1, focusing on the detailed implementation of the three linked processes: substrate transfer, reflow of defects after wafer splitting, and post-electroplating treatment. The remaining steps S1 to S5 and S10 follow the operations described in Embodiment 1 and will not be repeated. The process logic of this embodiment involves building a data exchange and distribution system for the pre-screening and laser processes, coupled with reflow and re-sputtering of defects on the wafer end face, and simultaneously performing substrate plasma pretreatment, protective layer layer curing, and segmented hydrogen removal operations during electroplating. This addresses issues such as wafer end face damage, laser cutting damage, and substrate film adhesion. The four major technical problems of insufficient force and weak protective layer barrier performance are addressed through detailed implementation methods divided into five modules: The first module is the detailed operation of the S6 and S7 processes: After calculating the block resistance dispersion in S6, the substrates are divided into three grades and simultaneously transported, sorted, and connected to the laser equipment; substrates with a dispersion ≤0.8% enter the laser station, and the cutting program is switched according to the label; substrates with a dispersion >0.8% are returned to S3 for re-coating and are not directly scrapped. The second module is the detailed operation of the S9 end-face defect reflow: the grinding wheel speed is 1200-1500 r / min, and the CCD label... The process involves recording end-face chipping and demolding units and assigning reflow codes; the robotic arm collects the materials into a transfer box, and a full box is transferred to the S10 station to extend the end-face sputtering time and completely repair the conductive film. The third module is a detailed operation for the S1 raw material pretreatment: the substrate is bombarded on both sides of the upper and lower double plasma emission areas for 90 seconds, activated, and then stored in a nitrogen-sealed box with a storage limit of 12 hours. If the storage period exceeds this limit, a second activation is required. The fourth module is a detailed operation for the S8 double-layer protective layer printing and curing: the inorganic silicon bottom layer is 2–4 μm thick and pre-cured at 80℃ for 10 minutes; the epoxy outer layer is 6–8 μm thick, with a total film thickness of 8–12 μm. μm; constant temperature curing at 150℃ for 40 min, with clean and dry air introduced throughout the process; the fifth module is the S11 electroplating dehydrogenation and refinement operation: segmented pulse electroplating of nickel barrier layer and pure tin solderable layer, with independent adjustable current waveform; after electroplating, pre-baking at 80℃ for 15 min + constant temperature at 110℃ for 30 min, cooling to below 40℃ before entering the magnetic separation process; no new raw material components were added in this embodiment, and continuous mass production was achieved entirely by relying on existing automated conveying, sputtering, and baking equipment; multi-module collaboration can simultaneously improve the substrate yield and the long-term weather resistance stability of the finished product.

[0036] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention.

Claims

1. A manufacturing process for thin-film resistors for LED strips, characterized in that, Perform the following process steps in sequence: S1. Raw material IQC grading and screening steps: Take 96% alumina ceramic substrates, use optical equipment to detect the flatness and surface cleanliness of the substrates, and sort out and remove substrates with excessive warpage; pass argon plasma through qualified substrates for surface activation cleaning, and seal and store them in the warehouse for later use. S2, Double-layer mask printing steps: According to the substrate packaging specifications, retrieve the corresponding BA mask pattern and BC2 mask pattern, print the BA mask layer on the front side of the ceramic substrate first, and then print the BC2 mask layer after curing. During the printing process, a CCD vision device is used to collect the alignment coordinates of the double-layer mask in real time. The BA mask area defines the forming range of the inner electrode on the front side, and the BC2 mask area defines the forming range of the nickel-chromium resistive layer. S3. Separate Vacuum Sputtering Steps for Each Package Size: A single-package-size substrate is fed into the magnetron sputtering chamber. The specific sputtering power, deposition time, and chamber vacuum parameters for that package size are selected. Before sputtering, the substrate's revolution and rotation speeds are adjusted, and the target flatness is calibrated. Magnetron sputtering is then initiated to deposit a nickel-chromium thin film on the substrate surface. After the first piece of each batch is sputtered, the film thickness is scanned across the entire area, and the unit resistance is detected. Batch sputtering can only proceed after the first piece passes inspection. During batch sputtering, film thickness data is collected in real time, and the nickel-chromium thin film deposition time is dynamically adjusted to control the film thickness difference in the substrate resistance pattern area to ≤0.002μm. S4. Two-stage stepped pure water spray washing process: The substrate is continuously sprayed with room temperature pure water in two stages to remove the nickel-chromium film debris attached to the surface of the BA mask and BC2 mask, leaving only the continuous and complete nickel-chromium resistor pattern and the front inner electrode substrate within the area defined by the two mask layers. After washing, allow the substrate to stand and drain to remove free moisture from the surface. S5. Nitrogen atmosphere gradient aging step: Place the drained substrate into a sealed nitrogen aging furnace and heat it to 130-150°C at a heating rate of 2°C / min. Hold it at this temperature for 2-4 hours. After the holding period, cool it down to room temperature at a cooling rate of 1°C / min. Low-humidity nitrogen is continuously introduced into the aging furnace. S6. Substrate partition resistance pre-screening step: Divide the substrate into several independent detection blocks according to the substrate mask layout, collect the substrate unit resistance value of each block and calculate the block resistance value dispersion; send the block resistance value dispersion data to the back-end laser resistance repair equipment in real time through wired transmission line. S7, Partition Adaptive Laser Resistance Repair Steps: Read the block resistance dispersion data transmitted in S6, and switch the laser cutting mode according to the dispersion value; perform shallow linear cutting on blocks with resistance dispersion ≤ 0.4%, and perform multi-segment stepped cutting on blocks with resistance dispersion ≤ 0.8% < 0.4%. S8, Double protective layer + precious metal-free character code printing steps: First, print a 2-4μm inorganic silicon bottom insulating layer on the surface of the substrate after resistance repair, and then print a 6-8μm epoxy outer protective layer after curing; after the double protective layer is cured, use silver-free and halogen-free carbon black ink with added sulfurization inhibitor to print the product specification characters. S9. Pulse water-cooled slab separation step: Pulse intermittent abrasive wheel is used to cut along the pre-made slab groove of the substrate. The cutting parameters are set to 0.5s cutting and 0.3s intermittent cutting. 0.2-0.3MPa room temperature pure water is sprayed synchronously in the cutting gap. After the slab separation is completed, the two end faces of the strip unit are scanned one by one by CCD. S10, Double-layer gradient nickel-chromium side-guided sputtering steps: The strip-shaped resistor unit after being divided is sent into the sputtering cavity, and two layers of nickel-chromium conductive film are sputtered sequentially on both sides of the unit; the bottom nickel-chromium film has a chromium content of 8wt%, and the top nickel-chromium film has a chromium content of 14wt%. S11, Post-forming process steps: sequentially perform pelletizing, pulse electroplating, magnetic separation, fully automatic packaging, and FQC grading and full inspection; the pulse electroplating process sequentially deposits a 1.2-1.5μm nickel barrier layer and a 3-5μm pure tin solderable layer. After electroplating, it is sent to a 110℃ oven for baking for 30 minutes, and then transferred to the magnetic separation process.

2. The production process according to claim 1, characterized in that, In the S2 dual-layer multi-specification mask printing step, a layout preprocessing operation is performed: edge compensation lines of 0.03~0.08mm are drawn for the BA mask layout and BC2 mask layout for each package specification. The unit of measurement for the mask layout of each package specification is mm, and the specific layout dimensions for each specification are as follows: 2010 Specifications: BA mask length L=65.155, width W=55.246, width margin W'=1.7; BC2 mask length L=63.655, width W=58.5, length margin L'=1.5; 1210 Specifications: BA mask length L=66.953, width W=54.954, width margin W'=1.8; BC2 mask length L=65.953, width W=57.7, length margin L'=1.0; 1206 Specifications: BA mask length L=64.492, width W=55.084, width margin W'=1.1; BC2 mask length L=63.374, width W=57.667, length margin L'=1.4; 0805 Specifications: BA mask length L=65.713, width W=55.614, width margin W'=0.8; BC2 mask length L=65.913, width W=57.417, length margin L'=1.0; 0603 Specifications: BA mask length L=66.776, width W=55.177, width margin W'=0.55; BC2 mask length L=65.976, width W=57.077, length margin L'=0.6; When calling the process parameters of S3 vacuum sputtering, the sputtering power, deposition time, cavity vacuum parameters and the current specification mask compensation line size are linked and matched.

3. The production process according to claim 2, characterized in that, In the S2 double-layer specification-separated mask printing step, a layer alignment and locking sorting operation is performed, which specifically includes the following steps: Step 1: After the first layer of BA mask printing and curing is completed, the CCD acquires all the graphic coordinates of the entire substrate and stores them as a reference coordinate file; Step 2: When printing the second BC2 mask, compare the coordinates of the BC2 mask graphic with the reference coordinate file line by line in real time and calculate the coordinate offset. Step 3: If the coordinate offset of any area of ​​the entire substrate is greater than 0.02mm, the equipment locks the printing platform and stops the current printing process. The sorting mechanism automatically pushes the entire substrate to the scrap box. At the same time, the system locks the printing fixture and stops its reuse until the fixture calibration is completed before production can resume.

4. The production process according to claim 1, characterized in that, In the S3 specification-specification isolation vacuum sputtering step, a staged film thickness-resistance linkage closed-loop control operation is performed, specifically including the following steps: Step 1: After the first substrate is sputtered, scan the film thickness and collect the corresponding block cell resistance according to the detection zones divided by the mask, and establish an independent film thickness-resistance mapping data table for each zone. Step 2: In the batch sputtering production stage, after sputtering 5 substrates consecutively, 1 substrate is randomly selected for zoned resistance data collection. The film thickness-resistance mapping data table of the corresponding zone is retrieved, and the nickel-chromium thin film deposition time of each region is corrected in segments. Step 3: Only a single package specification substrate is loaded into the same sputtering cavity. The cavity control system binds the current specification mask compensation line size and automatically shields the sputtering parameter formulas corresponding to other package specifications, prohibiting the misuse of cross-specification parameters.

5. The production process according to claim 1, characterized in that, Between the S6 substrate partition resistance pre-screening step and the S7 partition adaptive laser resistance repair step, a block-level transfer and reflow operation is performed, which specifically includes the following steps: Step 1: After S6 calculates the resistance dispersion of each detection block, it divides the data into three levels according to the resistance dispersion value and transmits them synchronously to the laser resistance correction equipment and the sorting conveyor control system; the corresponding ranges of the three levels of data tags are: first level resistance dispersion ≤ 0.4%, second level 0.4% < resistance dispersion ≤ 0.8%, and third level resistance dispersion > 0.8%; Step 2: The conveyor belt sorts the substrates according to the data tags: the substrates carrying the first and second level tags are directly transported to the laser repair station, and the substrates carrying the third level tags are switched to the sorting track and returned to the S3 vacuum sputtering cavity for re-coating. Step 3: The laser trimming station reads the data tags corresponding to each block of the substrate and automatically switches the matching laser cutting program for the detection blocks with different tags on the same substrate, without using a single fixed cutting parameter to process the entire substrate.

6. The production process according to claim 1, characterized in that, After the S9 pulse water-cooled slab separation step is completed, the end-face defect partitioning reflow reprocessing operation is performed, which specifically includes the following steps: Step 1: The grinding wheel cutting speed is fixed at 1200~1500r / min. The CCD scans the two end faces of the strip resistor unit one by one, marks the units with defects such as nickel-chromium film chipping and film peeling, and assigns them a unique reflow code. Step 2: The robotic arm sorts the resistor units with end face defects according to the return code and collects them into a special transfer box. After the transfer box is full, the whole box is transferred to the S10 double-layer gradient nickel-chromium side-guided sputtering station. Step 3: The side-guided sputtering station identifies the return code carried in the transfer box, and extends the nickel-chromium thin film sputtering deposition time for the end-face defect unit corresponding to the code to completely cover the conductive film layer on both sides of the unit again.

7. The production process according to claim 1, characterized in that, In the entire process of S11 post-formation, a standardized operation of layered pulse electroplating and segmented low-temperature dehydrogenation is performed, specifically including the following steps: Step 1: The electroplating process is divided into two pulse currents. The first stage uses low current to deposit a nickel barrier layer, and the second stage uses high current to deposit a pure tin solderable layer. The output waveforms of the two currents are independent of each other and can be adjusted separately. Step 2: After electroplating, the resistor units are sent into the oven in batches and baked in two stages: first, pre-baking at 80℃ for 15 minutes, and then baking at 110℃ for 30 minutes. Step 3: After baking, allow the product to cool naturally to below 40°C before transferring it to the magnetic separation process.

8. The production process according to claim 1, characterized in that, In the S1 raw material IQC grading and screening step, the plasma partitioning activation and isolated storage operation is performed, specifically including the following steps: Step 1: After the substrate is sent into the plasma chamber, the upper and lower plasma emission areas of the chamber simultaneously bombard the front and back of the substrate, and the argon plasma treatment continues for 90 seconds. Step 2: After activation and cleaning, immediately place the substrate into a sealed container with built-in desiccant. After covering the container, purge the air inside with dry nitrogen. Step 3: The substrate should be stored in the sealed container for no more than 12 hours. Substrates that exceed the storage time limit should be sent back into the plasma chamber for a second activation treatment.

9. The production process according to claim 1, characterized in that, In the S8 double-layer protective layer + precious metal-free character printing step, a layered thickness control and segmented curing operation is performed, which specifically includes the following steps: Step 1: When printing the inorganic silicon underlayer insulating layer, adjust the squeegee stroke to control the single-layer film thickness to 2-4 μm. After printing, pre-cur at 80℃ for 10 min. Step 2: After pre-curing, print the epoxy outer protective layer. Adjust the doctor blade stroke to control the outer film thickness to 6-8 μm. The total thickness of the inorganic silicon underlayer and epoxy outer layer is controlled to 8-12 μm. Step 3: After the epoxy outer layer is printed, it is placed in a 150℃ oven for constant temperature curing for 40 minutes, with clean and dry air continuously circulated throughout the curing process.

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