An edge emitting chip and a processing method thereof

Abstract

The application provides an edge-emitting chip and a processing method thereof, and relates to the technical field of semiconductor manufacturing. The processing method of the edge-emitting chip comprises the following steps: obtaining an epitaxial structure through epitaxial growth; manufacturing a P-face electrode, thinning a substrate, and manufacturing an N-face electrode; performing cavity surface passivation and cavity surface film plating after one-time cleavage; performing secondary cleavage to expose two side surfaces parallel to the same cavity length direction; performing wet oxidation on the two side surfaces, and forming a ridge waveguide in the unoxidized area; forming an insulator in the oxidized area to block and limit the transverse light field and play a groove function; and the insulator forms a P-face electrode window function for the ridge waveguide area. The method omits the steps of three processes of the ridge waveguide, the groove and the P-face electrode window, greatly reduces the process production time, improves the chip production efficiency, reduces and decreases the use amount and frequency of chemicals and hazardous chemicals in the chip production process, directly reduces the economic cost of chip production, and achieves the harmless semiconductor chip production purpose.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a side-emitting chip and its processing method. Background Technology

[0002] In the field of semiconductor laser chip manufacturing, the known gallium arsenide (GaAs)-based chip fabrication process includes epitaxial growth, wafer fabrication, and device fabrication. Particularly after the epitaxial material layer is grown, the wafer fabrication stage requires forming the chip's surface (P-side / N-side) micro / nano pattern structure. This involves multiple steps such as photolithography, etching, thinning, and de-thinning, resulting in a complex and iterative process. Device fabrication involves processes such as scribing, passivation, and coating to complete the chip's end face (light-emitting / reflective surface).

[0003] Common chip manufacturing processes such as Figure 1 As shown, the chip wafer fabrication process requires multiple steps to form the chip's surface (P-side) pattern structure. The "ridge waveguide" structure and "trench" structure are fabricated on the epitaxial surface layer. Figure 2 As shown. The ridge waveguide corresponds to the capping layer of the epitaxial material, which is an ohmic contact layer to form a good electrical contact for current injection. The trench structure is used to confine the transverse optical field.

[0004] The currently mature production process involves using wet etching solutions and tank etching operations (with high efficiency) to batch-produce ridge waveguide and trench structures. Etching solution 1 is used for ridge waveguide fabrication (its etching depth is approximately 0.1~0.5µm, which is relatively shallow), while etching solution 2 is used for trench structure fabrication (its etching depth is approximately 3.0~5.0µm, which is relatively deep). This process requires a streamlined workflow including: coating, hardening, exposure, development, post-baking, wet etching, and desizing and cleaning to complete the structure formation. This process not only consumes a considerable amount of time, but also requires chemical reagents that contain easily manufactured poisons (such as sulfuric acid) and easily manufactured explosives (such as hydrogen peroxide), which require strict control. The arsenic-containing wastewater and waste liquid generated during the etching process also need to be pumped out and stored through dedicated pipelines for centralized harmless treatment. Summary of the Invention

[0005] In view of this, the present invention proposes a side-emitting chip and its processing method to solve the technical problems mentioned in the background art, namely that the chip products involve many steps and processes involving hazardous chemicals, the dangers and hazards caused by personnel operation or equipment production are obvious, and the processing steps are numerous and the efficiency is low.

[0006] The technical solution of this invention is implemented as follows: In a first aspect, the present invention provides a method for fabricating a side-emitting chip, comprising: An epitaxial structure is obtained by epitaxial growth, wherein the upper part of the epitaxial structure is a material layer containing aluminum components; Fabricate P-side electrodes, thin the substrate, and fabricate N-side electrodes; After a single scratch, the cavity surface is passivated and coated. The secondary cut exposed two sides parallel to the length of the cavity. The two sides are wet-oxidized, and the unoxidized area forms a ridge waveguide; the oxidized area forms an insulator to block and limit the transverse light field, which functions as a trench; the insulator forms a P-side electrode window in the ridge waveguide area.

[0007] In some optional embodiments, preferably, the process parameters for wet oxidation of the aluminum-containing epitaxial material layer on the two sides are: a temperature of 360~450°C, and the introduction of a mixture of water vapor and nitrogen gas.

[0008] In some optional embodiments, preferably, the epitaxial structure includes a substrate layer, a lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a capping layer arranged sequentially from bottom to top, wherein the unoxidized region of the capping layer after wet oxidation forms the ridge waveguide.

[0009] In some alternative embodiments, preferably, the aluminum content of the capping layer is higher than that of the active layer, the upper waveguide layer, and the upper cladding layer, in order to achieve a stepped oxidation morphology.

[0010] In some optional embodiments, preferably, the aluminum content of the capping layer is ≥96%, and the aluminum content of the active layer, the upper waveguide layer and the upper cladding layer is ≤90%.

[0011] In some optional embodiments, preferably, the cavity surface coating includes: The light-emitting end face process is completed without changing the parameters of the light-emitting film system. The reflective end face process is completed without changing the parameters of the light-transmitting film system on the reflective end face.

[0012] In some optional embodiments, preferably, the wet oxidation of the aluminum-containing epitaxial material layer on the two sides further includes: The oxide film formed by oxidation restricts the electric field, creating a high-density current, thereby reducing the output threshold current and increasing the output optical power.

[0013] In some alternative embodiments, preferably, the aluminum-containing material layer is AlGaAs, which is oxidized to obtain Al2O3.

[0014] In a second aspect, the present invention provides a side-emitting chip manufactured using the side-emitting chip fabrication method described in the first aspect.

[0015] The edge-emitting chip fabrication method of the present invention has the following advantages over the prior art: (1) After obtaining the epitaxial structure through epitaxial growth, the P-side electrode is directly fabricated, the substrate is thinned, and the N-side electrode is fabricated. The wafer processing stage skips the processing of ridge waveguide and trench. After the wafer is fabricated, it is cleaved twice and then wet oxidation is performed. The unoxidized area forms the ridge waveguide, and the oxidized area forms the insulator to block and limit the lateral light field, which plays the role of trench. The insulator forms the P-side electrode window function for the ridge waveguide area. The three process steps of ridge waveguide, trench and P-side electrode window are eliminated, which greatly reduces the process production time and improves the chip production efficiency. At the same time, the optimization of the product processing process will also avoid the generation of defects in the product manufacturing process. As a result, the product appearance yield and performance yield will be significantly improved. Compared with the existing technology of using chemical reagents to etch to realize the processing of ridge waveguide and trench, the amount and frequency of use of chemicals and hazardous chemicals in the chip production process are reduced, the amount of hazardous waste generated after the use of chemicals and hazardous chemicals is reduced, the economic cost of chip production is directly reduced, and the purpose of harmless semiconductor chip production is achieved. (2) The process parameters for wet oxidation of the aluminum-containing epitaxial material layer on the two sides are: temperature of 360~450℃, and water vapor and nitrogen mixed gas are introduced. By setting the above process parameters, the high aluminum component is oxidized from the side, which can make all aluminum-containing components oxidized while ensuring a fast oxidation efficiency. (3) The aluminum content of the capping layer is higher than that of the active layer, the upper waveguide layer and the upper cladding layer to achieve a stepped oxidation morphology, so that the unoxidized area of ​​the capping layer after wet oxidation forms the ridge waveguide, and the oxidation area formed after oxidation of all aluminum-containing layers forms an insulator to block and limit the transverse light field and play the role of trench. The insulator forms the P-side electrode window function for the ridge waveguide area. (4) The aluminum content of the capping layer is ≥96%, the oxidation rate is fast, and the unoxidized area reaches the aperture of the ridge waveguide area by controlling the oxidation conditions. The aluminum content of the active layer, the upper waveguide layer and the upper cladding layer are all ≤90%. Under the same oxidation conditions, the chip side is oxidized, and the oxidation forms an electrical insulator with excellent performance, achieving a stepped oxidation morphology. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic flowchart of the edge-emitting chip fabrication method in the background art of this invention; Figure 2 This is a schematic diagram of the structure of the side-emitting chip in the background art of this invention; Figure 3 This is a flowchart illustrating the edge-emitting chip fabrication method in an embodiment of the present invention; Figure 4 This is a schematic diagram of the edge-emitting chip before oxidation in an embodiment of the present invention; Figure 5 This is a schematic diagram of the oxidized structure of the edge-emitting chip in an embodiment of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0019] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention based on the specific circumstances.

[0020] In the description of the embodiments of the present invention, it should be noted that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of the present invention.

[0021] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0022] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0023] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. Additionally, examples of various specific processes and materials are provided in this invention; however, those skilled in the art will recognize the applicability of other processes and / or the use of other materials.

[0024] It should be noted in advance that the common chip manufacturing processes in the existing technology are as follows, see below. Figure 1 and Figure 2 As shown: Step S11: Obtain the epitaxial structure through epitaxial growth; Step S12: Apply etching solution one to fabricate the ridge waveguide; the etching depth of etching solution one is about 0.1~0.5um, which is relatively shallow; Step S13: Apply etching solution II to fabricate the trench structure; the etching depth is approximately 3.0~5.0 μm, which is relatively deep; Steps S12 and S13 require a series of processes such as coating, hardening, exposure, development, post-baking, wet etching, and desizing and cleaning to complete the formation of the structure. This not only consumes a long production time, but also requires chemical reagents that are easily used to produce poisons (such as sulfuric acid) and explosives (such as hydrogen peroxide), which need to be strictly controlled. The arsenic-containing wastewater and waste liquid generated during the etching process also need to be pumped out and stored through special pipelines and centrally treated in a harmless manner. Step S14: Fabrication of the P-side electrode window; Step S15: Fabricate the P-side electrode, thin the substrate, and fabricate the N-side electrode; Step S16: After the first scratch, perform cavity surface passivation and cavity surface coating; the first scratch is for the bar strip; Step S17: Secondary scratching; the secondary scratching is applied to the die.

[0025] In the common chip manufacturing processes in the above-mentioned existing technologies, "P-side electrode window fabrication" involves covering the entire P-side of the chip with an insulating film layer after the ridge waveguide and trench structure fabrication is completed, in order to provide surface insulation protection; then the insulating layer on the surface of the ridge waveguide area is removed to facilitate subsequent electrode fabrication, enabling ohmic contact and current injection.

[0026] Therefore, the fabrication of micro- and nanostructures in wafer processing is not only a theoretical process but also a comprehensive practical process that integrates economic operations and safe production. This process involves numerous steps and procedures involving hazardous chemicals in chip production, and the dangers and hazards posed by personnel operations or equipment production are readily apparent. Areas involving hazardous chemicals are generally key areas for enterprise safety management. In today's society, where safety production and energy conservation and emission reduction have reached an unprecedented level of social consensus, green and harmless industrial production is a crucial issue that semiconductor industry personnel must consider in the future. Based on practical production experience, this patent designs a chip processing method, attempting to provide a solution for the rapid and harmless processing of semiconductor chips (reducing or eliminating the use of chemical materials and reducing or eliminating the generation of hazardous waste).

[0027] The technical solution will now be explained in detail: Reference Figures 3-5 As shown, a first aspect of the present invention provides a method for fabricating a side-emitting chip, comprising: Step S21: Obtain an epitaxial structure through epitaxial growth, wherein the upper part of the epitaxial structure is a material layer containing aluminum components; Step S22: Fabricate the P-side electrode, thin the substrate, and fabricate the N-side electrode; Step S23: After the first scratch, perform cavity surface passivation and cavity surface coating; Step S24: Secondary scratching, exposing two side surfaces parallel to the length of the cavity; Step S25: Perform wet oxidation on the two sides, forming a ridge waveguide in the unoxidized area; forming an insulator in the oxidized area to block and limit the lateral light field, thus functioning as a trench; the insulator forms a P-side electrode window in the ridge waveguide area.

[0028] In this embodiment, after epitaxial growth, the original "P-side electrode fabrication" and all subsequent processing steps are performed directly, and the corresponding pattern (the photolithographic mask used) remains unchanged. After the chip completes the new wafer fabrication process (completing the P-side electrode and N-side electrode) and device fabrication process (without changing the parameters of the light-emitting end face's transparent film system, completing the light-emitting end face process; without changing the parameters of the light-emitting end face's transparent film system, completing the reflective end face process), it is finally split into single chips through a second dicing process. After dicing, the chip will expose two sides along the same cavity length direction. Through wet oxidation, the sides of the chip are oxidized to achieve the product effect of having structures such as "ridge waveguide", "trench", and "P-side electrode window" processed on the same wafer.

[0029] The wet oxidation process has oxidized most of the chip surface into an insulator (except for the ridge waveguide region, which is used for ohmic contacts and current injection), effectively realizing the structural function of the P-side electrode window. Figure 3 The process eliminates the step of "creating the P-side electrode window".

[0030] The edge-emitting chip fabrication method proposed in this embodiment directly fabricates P-side electrodes after obtaining the epitaxial structure through epitaxial growth, thins the substrate, and fabricates N-side electrodes. The wafer fabrication stage skips the ridge waveguide and trench processing. After wafer fabrication, it undergoes two dicing processes followed by wet oxidation. The unoxidized area forms a ridge waveguide, and the oxidized area forms an insulator to block and limit the lateral light field, functioning as a trench. The insulator forms a P-side electrode window in the ridge waveguide region. This eliminates the need for three process steps: ridge waveguide, trench, and P-side electrode window, significantly reducing production time and improving chip manufacturing efficiency. Simultaneously, the optimized product processing steps will avoid defects during manufacturing, resulting in a significant improvement in product appearance and performance yield. Compared to existing technologies that use chemical reagents for etching to achieve ridge waveguide and trench processing, this method reduces the amount and frequency of chemicals and hazardous materials used in chip manufacturing, and reduces the amount of hazardous waste generated after their use, directly reducing the economic cost of chip production and achieving the goal of harmless semiconductor chip production.

[0031] In some embodiments, the process parameters for wet oxidation of the aluminum-containing epitaxial material layer on both sides are: a temperature of 360~450°C, and the introduction of a mixture of water vapor and nitrogen gas. By setting these parameters, the high-aluminum component is oxidized from the side, ensuring that all aluminum-containing components can be oxidized while maintaining a relatively fast oxidation efficiency.

[0032] In some embodiments, the epitaxial structure includes a substrate layer, a lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a capping layer arranged sequentially from bottom to top, wherein the unoxidized region of the capping layer after wet oxidation forms the ridge waveguide.

[0033] In some embodiments, the aluminum content of the capping layer is higher than that of the active layer, the upper waveguide layer, and the upper cladding layer, to achieve a stepped oxidation morphology. Through this configuration, the unoxidized area of ​​the capping layer after wet oxidation forms the ridge waveguide, and the oxidized areas formed after oxidation of all aluminum-containing layers form an insulator to block and limit the lateral optical field, thus functioning as a trench. The insulator also functions as a P-plane electrode window in the ridge waveguide region.

[0034] In some embodiments, the aluminum content of the capping layer is ≥96%, and the oxidation rate is fast. By controlling the oxidation conditions, the unoxidized area can reach the aperture of the ridge waveguide region. The aluminum content of the active layer, the upper waveguide layer and the upper cladding layer are all ≤90%. Under the same oxidation conditions, the chip side is oxidized, and the oxidation forms an electrical insulator with excellent performance, achieving a stepped oxidation morphology.

[0035] The oxidation rate is affected by temperature, gas flow rate, and aluminum content. After debugging the oxidation furnace equipment and confirming the process, the oxidation rates under the same epitaxial structure (850nm) product are shown in Table 1 below: Table 1

[0036] As shown in Table 1, at the same temperature, the higher the aluminum content, the faster the oxidation rate, with the fastest oxidation rate at an aluminum content of 99%. At the same aluminum content, the higher the temperature, the faster the oxidation rate, with the fastest oxidation rate at 425℃. Therefore, the aluminum content of the capping layer is set to ≥96%, and the aluminum content of the active layer, the upper waveguide layer, and the upper cladding layer are all ≤90%, thereby achieving step-by-step oxidation.

[0037] In some embodiments, the cavity surface coating includes: The light-emitting end face process is completed without changing the parameters of the light-emitting film system. The reflective end face process is completed without changing the parameters of the light-transmitting film system on the reflective end face.

[0038] In this embodiment, the processing of the light-emitting end face and the reflective end face is the same as the conventional process, without the need to add process steps, thereby improving processing efficiency and reducing processing costs.

[0039] In some embodiments, the wet oxidation of the aluminum-containing epitaxial material layer on the two sides further includes: the oxide film formed by oxidation restricts the electric field, forming a high-density current, thereby reducing the output threshold current and increasing the output optical power.

[0040] In some embodiments, the aluminum-containing material layer is AlGaAs, which is oxidized to obtain Al2O3. AlGaAs has the following advantages: AlGaAs has high electron mobility, which is beneficial for improving the operating speed of devices; compared with traditional GaAs processes, AlGaAs devices can significantly reduce losses; it has ultra-high bandwidth capacity, and can operate at frequencies exceeding 100GHz; it has high power handling capability, excellent diode characteristics, and high isolation; it is resistant to high and low temperatures; it is corrosion-resistant and interference-resistant; and it has a robust structure. Based on the above advantages of AlGaAs, the aluminum-containing material layer is preferably AlGaAs.

[0041] Based on the same concept, a second aspect of the present invention provides a side-emitting chip manufactured using the side-emitting chip fabrication method described in the first aspect embodiment.

[0042] The edge-emitting chip proposed in this embodiment eliminates three process steps during manufacturing: ridge waveguide, trench, and P-side electrode window. This greatly reduces the manufacturing time and improves chip production efficiency. At the same time, the optimization of the product processing steps will also avoid the generation of defects during product manufacturing. As a result, the product appearance yield and performance yield will be significantly improved.

[0043] The edge-emitting chip and its fabrication method proposed in this embodiment have the following advantages: (1) By designing a new chip processing and production logic, a wet oxidation process is introduced after wafer processing and device manufacturing are completed, forming a closed loop of a new chip manufacturing process framework without changing the chip size or product performance. (2) Reducing the production process (ridge waveguide / trench / P-side window) steps and production flow processes greatly reduces the production time and improves chip production efficiency. At the same time, the optimization of product processing process will also avoid the generation of defects in the product manufacturing process, thereby significantly improving the product appearance yield and performance yield. (3) To achieve the goal of harmless semiconductor chip production, reduce the amount and frequency of use of chemicals and hazardous chemicals in the chip production process, reduce the amount of hazardous waste generated after the use of chemicals / hazardous chemicals, and directly reduce the economic cost of chip production. (4) Wet oxidation can be carried out in batches to produce chip form without generating hazardous waste, and has good economic and production benefits.

[0044] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating a side-emitting chip, characterized in that, include: An epitaxial structure is obtained by epitaxial growth, wherein the upper part of the epitaxial structure is a material layer containing aluminum components; Fabricate P-side electrodes, thin the substrate, and fabricate N-side electrodes; After a single scratch, the cavity surface is passivated and coated. The secondary cut exposed two sides parallel to the length of the cavity. The two sides are wet-oxidized, and the unoxidized area forms a ridge waveguide; the oxidized area forms an insulator to block and limit the transverse light field, which functions as a trench; the insulator forms a P-side electrode window in the ridge waveguide area.

2. The edge-emitting chip fabrication method as described in claim 1, characterized in that, The process parameters for wet oxidation of the aluminum-containing epitaxial material layer on the two sides are: temperature 360~450℃, and introduction of a mixture of water vapor and nitrogen gas.

3. The edge-emitting chip fabrication method as described in claim 1, characterized in that, The epitaxial structure includes, from bottom to top, a substrate layer, a lower cladding layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper cladding layer, and a capping layer. The unoxidized region of the capping layer after wet oxidation forms the ridge waveguide.

4. The edge-emitting chip fabrication method as described in claim 3, characterized in that, The aluminum content of the capping layer is higher than that of the active layer, the upper waveguide layer, and the upper cladding layer, so as to achieve a stepped oxidation morphology.

5. The edge-emitting chip fabrication method as described in claim 3, characterized in that, The aluminum content of the capping layer is ≥96%, and the aluminum content of the active layer, the upper waveguide layer and the upper cladding layer is ≤90%.

6. The edge-emitting chip fabrication method as described in claim 1, characterized in that, The cavity surface coating includes: The light-emitting end face process is completed without changing the parameters of the light-emitting film system. The reflective end face process is completed without changing the parameters of the light-transmitting film system on the reflective end face.

7. The edge-emitting chip fabrication method as described in claim 1, characterized in that, The wet oxidation of the aluminum-containing epitaxial material layer on the two sides further includes: The oxide film formed by oxidation restricts the electric field, creating a high-density current, thereby reducing the output threshold current and increasing the output optical power.

8. The edge-emitting chip fabrication method as described in claim 1, characterized in that, The aluminum-containing material layer is AlGaAs, which is oxidized to obtain Al2O3.

9. A side-emitting chip, characterized in that, Manufactured using the edge-emitting chip fabrication method as described in any one of claims 1-8.

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