MOA and ultra-low ESL ceramic capacitor coordinated fast switching overvoltage protection system and protection method

Abstract

The application discloses a kind of fast switch overvoltage protection system based on MOA and ultra-low ESL ceramic capacitor coordination.The system is connected in parallel with the ceramic capacitor group of ultra-low equivalent series inductance (ESL<1nH) on the load side of circuit breaker, and zinc oxide arrester (MOA) is connected in parallel outside the capacitor group, to establish energy timing distribution model: at the moment of current interruption, ultra-low ESL ceramic capacitor responds first in nanosecond level, provides low impedance bypass, absorbs high-frequency oscillation energy and flattens dv / dt peak;Then MOA acts in microsecond level, absorbs large-scale surge energy, limits overall overvoltage peak value.The application reduces the overvoltage peak value from 5p.u.to 2.2p.u.or less, dv / dt is reduced by 86.7%, and the full voltage safety recovery time is compressed to 10μs or less.

Description

Technical Field

[0001] This invention relates to the field of power system overvoltage protection technology, specifically to a fast-switching overvoltage protection system based on the synergy of MOA and ultra-low ESL ceramic capacitors, applicable to current-cutting overvoltage protection of 12KV distribution network fast circuit breakers. Background Technology

[0002] Existing technologies typically employ a single RC absorber or a single MOA for overvoltage protection. A single MOA has a response time in the microsecond range, which cannot suppress the nanosecond-level high-frequency oscillations (high dv / dt) during current throttling. Traditional RC absorbers, due to the large parasitic inductance (typically in the hundreds of nH range) of the film capacitor and winding resistance, exhibit high impedance at high frequencies and are also unable to effectively absorb high-frequency energy. Taking a 12kV fast circuit breaker as an example, severe current-throttling overvoltages are easily generated during ultra-fast tripping (<5ms) of a fault. These overvoltages not only have high peak values ​​(up to 5p.u.), but are also accompanied by extremely high voltage change rates (dv / dt) and high-frequency oscillations. Traditional single zinc oxide surge arresters (MOAs), limited by their response time (microsecond range) and lead inductance, cannot effectively suppress these high-frequency transient spikes, seriously threatening the insulation safety of transformers and other equipment.

[0003] How to break through the frequency response bottleneck of a single device and achieve full-band overvoltage protection is a problem that urgently needs to be solved in this field. Summary of the Invention

[0004] This invention establishes a collaborative protection system of ultra-low ESL ceramic capacitors and MOA and an energy timing distribution model to achieve comprehensive protection against fast switching current-cutting overvoltage across the entire frequency band and energy level.

[0005] This invention is achieved using the following technology: a fast switching overvoltage protection system based on MOA and ultra-low ESL ceramic capacitor synergy, comprising: an ultra-low ESL ceramic capacitor bank, wherein the ultra-low ESL ceramic capacitor bank is composed of several individual capacitors connected in parallel, and each individual capacitor adopts surface mount packaging and has symmetrically arranged leads.

[0006] The ultra-low ESL ceramic capacitor bank is connected in parallel to the load-side busbar of the circuit breaker via a dedicated low-inductance busbar. The lead length of the low-inductance busbar does not exceed 50mm, and the equivalent series inductance (ESL) is not greater than 1nH. The capacitance C is determined based on the overvoltage energy E during current throttling according to the formula C=2E / (Vpeak^2-Vrated^2), where C is the capacitance of the ultra-low ESL ceramic capacitor bank; E is the maximum magnetic field energy stored in the stray inductance of the line when the circuit breaker throttles current; Vpeak is the highest permissible overvoltage peak value of the system; and Vrated is the rated operating voltage of the system.

[0007] The zinc oxide surge arrester MOA is connected in parallel to the outside of the ultra-low ESL ceramic capacitor bank by sharing a low-inductance busbar with the ultra-low ESL ceramic capacitor bank. The continuous operating voltage Uc of the MOA is not less than 1.05 times the highest operating voltage of the system, and the nominal discharge current is not less than 5kA.

[0008] The parameter matching controller is used to calculate and output the optimal parameter matching value between the ultra-low ESL ceramic capacitor bank and the MOA according to the rated voltage, peak current of the circuit breaker and the stray inductance of the line, based on the energy timing distribution model. The energy timing distribution model divides the overvoltage energy on the time axis into a high-frequency oscillation energy segment of 0-100ns and a low-frequency surge energy segment of 100ns-10us, which are respectively undertaken by the ultra-low ESL ceramic capacitor bank and the zinc oxide surge arrester MOA.

[0009] The ultra-low ESL ceramic capacitor bank uses X7R or C0G dielectric material for each individual capacitor, with a rated voltage not less than twice the highest operating voltage of the system, and a capacitance change rate not exceeding 15% within a temperature range of -40℃ to +85℃. The individual capacitors are connected in a star topology via copper busbars with a cross-sectional area of ​​not less than 25mm² to ensure that the high-frequency current is evenly distributed to each individual capacitor.

[0010] The ultra-low ESL ceramic capacitor bank uses multiple capacitors connected in parallel, and the equivalent series inductance (ESL) is no greater than 1nH.

[0011] The continuous operating voltage Uc of the MOA is not less than 1.05 times the maximum operating voltage of the system to avoid malfunction during normal operation.

[0012] The nominal discharge current of the MOA is not less than 5kA to ensure that it can absorb the large-scale surge energy generated by the fast circuit breaker.

[0013] The parameter matching controller includes a high-speed A / D sampling module, an FPGA control chip, and a high-speed solid-state relay matrix. The high-speed A / D sampling module acquires the circuit breaker's opening speed signal and line current signal in real time at a sampling rate of not less than 10 MS / s and sends them to the FPGA control chip. Within 500 µs after the opening command is issued, the FPGA control chip calculates the predicted value of the current-cutting overvoltage energy based on the peak value of the line current signal and obtains the corresponding optimal capacitance by looking up a table. Subsequently, the switching state of each individual capacitor in the ultra-low ESL ceramic capacitor bank is controlled by the high-speed solid-state relay matrix to ensure that the matching error between the actual applied capacitance and the predicted current-cutting energy does not exceed 10%.

[0014] An insulating isolation plate is provided between the MOA and the ultra-low ESL ceramic capacitor bank. The creepage distance of the insulating isolation plate is not less than 125 mm / kV, and the material is polytetrafluoroethylene or epoxy resin.

[0015] The low-inductance busbar adopts a laminated structure, which is composed of two layers of copper conductors and one layer of insulating medium alternately laminated. The current in the two layers of copper conductors is in opposite directions. The magnetic field generated by the opposite current cancels each other out, so that the parasitic inductance of the low-inductance busbar does not exceed 5nH and the total thickness of the laminated busbar does not exceed 10mm.

[0016] The system also includes an online monitoring unit, which comprises: a high-frequency current sensor installed on the low-inductance busbar for real-time acquisition of the high-frequency current waveform flowing through the ultra-low ESL ceramic capacitor bank; an MOA leakage current sensor for real-time monitoring of the continuous leakage current of the MOA; and a data processing module for performing a fast Fourier transform on the acquired current waveform, extracting harmonic features, and issuing an early warning signal when the equivalent series inductance (ESL) of the ultra-low ESL ceramic capacitor bank exceeds 2nH or the continuous leakage current of the MOA exceeds 120% of the rated value.

[0017] A fast-switching overvoltage protection method includes the following steps:

[0018] Step S1: Connect an ultra-low ESL ceramic capacitor bank in parallel on the load side of the fast circuit breaker through a low-inductance busbar with a lead length not exceeding 50mm, so that the equivalent series inductance of the bypass circuit is not greater than 1nH.

[0019] Step S2: Connect a continuous operating voltage Uc not lower than 1.05 times the system's highest operating voltage MOA in parallel outside the ultra-low ESL ceramic capacitor bank.

[0020] Step S3: During the 0-100ns time period after the current cut-off occurs, the ultra-low ESL ceramic capacitor bank conducts a high-frequency oscillating current to limit the dv / dt of the current cut-off overvoltage within a preset safety threshold.

[0021] Step S4: When the overvoltage amplitude exceeds the operating voltage of the MOA, the MOA is activated and absorbs low-frequency surge energy within a time period of 100ns-10us, clamping the overall overvoltage peak value to within 2.2pu.

[0022] The parameter matching principle between the ultra-low ESL ceramic capacitor bank and the MOA is as follows: the resonant frequency of the ceramic capacitor bank is matched with the main oscillation frequency of the current-cutting overvoltage, and the operating voltage of the MOA is slightly higher than the voltage limit level of the ceramic capacitor bank.

[0023] Compared with the prior art, the present invention has the following technical advantages:

[0024] (1) Comprehensive suppression of overvoltage: The peak overvoltage value is significantly reduced from 5p.u. to less than 2.2pu (a reduction of 56%), meeting the equipment insulation safety requirements.

[0025] (2) Perfectly solves high-frequency spikes: dv / dt is reduced by 86.7%, high-frequency oscillation energy is reduced by more than 90%, and the inter-turn insulation of the transformer is effectively protected.

[0026] (3) Fast recovery speed: The full voltage safety recovery time is compressed to less than 10μs, ensuring the power supply quality of the distribution network. Attached Figure Description

[0027] Figure 1 This is a circuit topology diagram of the overvoltage protection system of the present invention;

[0028] Figure 2 This is a schematic diagram of the energy timing allocation model of the present invention;

[0029] Figure 3 This is a comparison diagram of overvoltage waveforms with and without protection in the present invention;

[0030] Figure 4 This is a timing diagram showing the coordinated operation of the MOA and ceramic capacitor in this invention. Detailed Implementation

[0031] The invention will now be described in further detail with reference to the accompanying drawings:

[0032] This invention relates to a fast-switching overvoltage protection system based on MOA and ultra-low ESL ceramic capacitor synergy, comprising: an ultra-low ESL ceramic capacitor bank, wherein the ultra-low ESL ceramic capacitor bank is composed of several individual capacitors connected in parallel, and each individual capacitor adopts surface-mount packaging and has symmetrically arranged leads.

[0033] The ultra-low ESL ceramic capacitor bank is connected in parallel to the load-side busbar of the circuit breaker via a dedicated low-inductance busbar. The lead length of the low-inductance busbar does not exceed 50mm, and the equivalent series inductance (ESL) is not greater than 1nH. The capacitance C is determined based on the overvoltage energy E during current throttling according to the formula C=2E / (Vpeak^2-Vrated^2), where C is the capacitance of the ultra-low ESL ceramic capacitor bank; E is the maximum magnetic field energy stored in the stray inductance of the line when the circuit breaker throttles current; Vpeak is the highest permissible overvoltage peak value of the system; and Vrated is the rated operating voltage of the system.

[0034] The zinc oxide surge arrester MOA is connected in parallel to the outside of the ultra-low ESL ceramic capacitor bank by sharing a low-inductance busbar with the ultra-low ESL ceramic capacitor bank. The continuous operating voltage Uc of the MOA is not less than 1.05 times the highest operating voltage of the system, and the nominal discharge current is not less than 5kA.

[0035] The parameter matching controller is used to calculate and output the optimal parameter matching value between the ultra-low ESL ceramic capacitor bank and the MOA according to the rated voltage, peak current of the circuit breaker and the stray inductance of the line, based on the energy timing distribution model. The energy timing distribution model divides the overvoltage energy on the time axis into a high-frequency oscillation energy segment of 0-100ns and a low-frequency surge energy segment of 100ns-10us, which are respectively undertaken by the ultra-low ESL ceramic capacitor bank and the zinc oxide surge arrester MOA.

[0036] The ultra-low ESL ceramic capacitor bank uses X7R or C0G dielectric material for each individual capacitor, with a rated voltage not less than twice the highest operating voltage of the system, and a capacitance change rate not exceeding 15% within a temperature range of -40℃ to +85℃. The individual capacitors are connected in a star topology via copper busbars with a cross-sectional area of ​​not less than 25mm² to ensure that the high-frequency current is evenly distributed to each individual capacitor.

[0037] The ultra-low ESL ceramic capacitor bank uses multiple capacitors connected in parallel, and the equivalent series inductance (ESL) is no greater than 1nH.

[0038] The continuous operating voltage Uc of the MOA is not less than 1.05 times the maximum operating voltage of the system to avoid malfunction during normal operation.

[0039] The nominal discharge current of the MOA is not less than 5kA to ensure that it can absorb the large-scale surge energy generated by the fast circuit breaker.

[0040] The parameter matching controller includes a high-speed A / D sampling module, an FPGA control chip, and a high-speed solid-state relay matrix. The high-speed A / D sampling module acquires the circuit breaker's opening speed signal and line current signal in real time at a sampling rate of not less than 10 MS / s and sends them to the FPGA control chip. Within 500 µs after the opening command is issued, the FPGA control chip calculates the predicted value of the current-cutting overvoltage energy based on the peak value of the line current signal and obtains the corresponding optimal capacitance by looking up a table. Subsequently, the switching state of each individual capacitor in the ultra-low ESL ceramic capacitor bank is controlled by the high-speed solid-state relay matrix to ensure that the matching error between the actual applied capacitance and the predicted current-cutting energy does not exceed 10%.

[0041] An insulating isolation plate is provided between the MOA and the ultra-low ESL ceramic capacitor bank. The creepage distance of the insulating isolation plate is not less than 125 mm / kV, and the material is polytetrafluoroethylene or epoxy resin.

[0042] The low-inductance busbar adopts a laminated structure, which is composed of two layers of copper conductors and one layer of insulating medium alternately laminated. The current in the two layers of copper conductors is in opposite directions. The magnetic field generated by the opposite current cancels each other out, so that the parasitic inductance of the low-inductance busbar does not exceed 5nH and the total thickness of the laminated busbar does not exceed 10mm.

[0043] The system also includes an online monitoring unit, which comprises: a high-frequency current sensor installed on the low-inductance busbar for real-time acquisition of the high-frequency current waveform flowing through the ultra-low ESL ceramic capacitor bank; an MOA leakage current sensor for real-time monitoring of the continuous leakage current of the MOA; and a data processing module for performing a fast Fourier transform on the acquired current waveform, extracting harmonic features, and issuing an early warning signal when the equivalent series inductance (ESL) of the ultra-low ESL ceramic capacitor bank exceeds 2nH or the continuous leakage current of the MOA exceeds 120% of the rated value.

[0044] A fast-switching overvoltage protection method includes the following steps:

[0045] Step S1: Connect an ultra-low ESL ceramic capacitor bank in parallel on the load side of the fast circuit breaker through a low-inductance busbar with a lead length not exceeding 50mm, so that the equivalent series inductance of the bypass circuit is not greater than 1nH.

[0046] Step S2: Connect a continuous operating voltage Uc not lower than 1.05 times the system's highest operating voltage MOA in parallel outside the ultra-low ESL ceramic capacitor bank.

[0047] Step S3: During the 0-100ns time period after the current cut-off occurs, the ultra-low ESL ceramic capacitor bank conducts a high-frequency oscillating current to limit the dv / dt of the current cut-off overvoltage within a preset safety threshold.

[0048] Step S4: When the overvoltage amplitude exceeds the operating voltage of the MOA, the MOA is activated and absorbs low-frequency surge energy within a time period of 100ns-10us, clamping the overall overvoltage peak value to within 2.2pu.

[0049] The parameter matching principle between the ultra-low ESL ceramic capacitor bank and the MOA is as follows: the resonant frequency of the ceramic capacitor bank is matched with the main oscillation frequency of the current-cutting overvoltage, and the operating voltage of the MOA is slightly higher than the voltage limit level of the ceramic capacitor bank.

[0050] The following explanation uses a 12kV distribution network system as an example. The highest operating voltage of the system is 12kV × 1.15 = 13.8kV (peak value approximately 11.27kV). The peak current cutoff of the circuit breaker is 10A, the stray inductance of the line is 10mH, and the overvoltage energy cutoff is E = 0.5 × 10mH × (10A)^2 = 0.5J. The goal is to limit the peak overvoltage Vpeak to within 2.2pu (approximately 21.5kV).

[0051] (1) Parameter matching calculation: According to the formula C=2E / (Vpeak^2-Vrated^2), the required ultra-low ESL ceramic capacitor C = 2×0.5 / ((21.5kV)^2 - (11.27kV)^2) ≈ 2.98nF. In practice, a 3nF X7R ceramic capacitor bank was selected.

[0052] (2) Structural matching: The ceramic capacitor bank adopts surface-mount packaging and is connected through a multilayer low-inductance busbar. The measured ESL is only 0.8nH. The MOA is a zinc oxide surge arrester with a Uc of 15kV and a nominal discharge current of 5kA, which is connected in parallel to the outside of the capacitor bank.

[0053] (3) Verification of synergistic effect: At the moment of current cutoff (0-100ns), due to the extremely low ESL of the capacitor circuit, the high-frequency oscillating current preferentially flows into the ceramic capacitor. The measured dv / dt is significantly reduced from 85kV / us without protection to 11.3kV / us (reduction of 86.7%). When the voltage rises to the MOA operating voltage (about 18kV), the MOA quickly conducts to absorb the remaining 0.3J low-frequency surge energy, and finally clamps the overvoltage peak at 21.2kV (2.17pu). This embodiment fully demonstrates the excellent effect of the time-series synergistic protection of the ceramic capacitor (dominantly nanosecond-level high frequency) and the MOA (dominantly microsecond-level low frequency), which is fundamentally different from the traditional single protection method.

Claims

1. A fast-switching overvoltage protection system based on the synergy of MOA and ultra-low ESL ceramic capacitors, characterized in that, include: An ultra-low ESL ceramic capacitor bank, wherein the ultra-low ESL ceramic capacitor bank is composed of several individual capacitors connected in parallel, and each individual capacitor adopts a surface-mount package and the leads are symmetrically arranged. The ultra-low ESL ceramic capacitor bank is connected in parallel to the load side busbar of the circuit breaker via a dedicated low-inductance busbar. The lead length of the low-inductance busbar does not exceed 50mm, and the equivalent series inductance ESL is not greater than 1nH. The capacitance C is determined according to the overvoltage energy E cut off by the circuit breaker using the formula C=2E / (Vpeak^2-Vrated^2), where C is the capacitance of the ultra-low ESL ceramic capacitor bank; and E is the maximum magnetic field energy stored in the stray inductance of the line when the circuit breaker cuts off the current. Vpeak is the highest permissible overvoltage peak value of the system; Vrated is the rated operating voltage of the system. The zinc oxide surge arrester MOA is connected in parallel to the outside of the ultra-low ESL ceramic capacitor bank by sharing a low-inductance busbar with the ultra-low ESL ceramic capacitor bank. The continuous operating voltage Uc of the MOA is not less than 1.05 times the highest operating voltage of the system, and the nominal discharge current is not less than 5kA. The parameter matching controller is used to calculate and output the optimal parameter matching value between the ultra-low ESL ceramic capacitor bank and the MOA according to the rated voltage, peak current of the circuit breaker and the stray inductance of the line, based on the energy timing distribution model. The energy timing distribution model divides the overvoltage energy on the time axis into a high-frequency oscillation energy segment of 0-100ns and a low-frequency surge energy segment of 100ns-10us, which are respectively undertaken by the ultra-low ESL ceramic capacitor bank and the zinc oxide surge arrester MOA.

2. The system according to claim 1, characterized in that, The ultra-low ESL ceramic capacitor bank uses X7R or C0G dielectric material for each individual capacitor, with a rated voltage not less than twice the highest operating voltage of the system, and a capacitance change rate not exceeding 15% within a temperature range of -40℃ to +85℃. The individual capacitors are connected in a star topology via copper busbars with a cross-sectional area of ​​not less than 25mm² to ensure that the high-frequency current is evenly distributed to each individual capacitor.

3. The system according to claim 1, characterized in that, The ultra-low ESL ceramic capacitor bank uses multiple capacitors connected in parallel, and the equivalent series inductance (ESL) is no greater than 1nH.

4. The system according to claim 1, characterized in that, The continuous operating voltage Uc of the MOA is not less than 1.05 times the maximum operating voltage of the system to avoid malfunction during normal operation.

5. The system according to claim 1, characterized in that, The nominal discharge current of the MOA is not less than 5kA to ensure that it can absorb the large-scale surge energy generated by the fast circuit breaker.

6. The system according to claim 1, characterized in that, The parameter matching controller includes a high-speed A / D sampling module, an FPGA control chip, and a high-speed solid-state relay matrix. The high-speed A / D sampling module acquires the circuit breaker's opening speed signal and line current signal in real time at a sampling rate of not less than 10 MS / s and sends them to the FPGA control chip. Within 500 µs after the opening command is issued, the FPGA control chip calculates the predicted value of the current-cutting overvoltage energy based on the peak value of the line current signal and obtains the corresponding optimal capacitance by looking up a table. Subsequently, the switching state of each individual capacitor in the ultra-low ESL ceramic capacitor bank is controlled by the high-speed solid-state relay matrix to ensure that the matching error between the actual applied capacitance and the predicted current-cutting energy does not exceed 10%.

7. The system according to claim 1, characterized in that, An insulating isolation plate is provided between the MOA and the ultra-low ESL ceramic capacitor bank. The creepage distance of the insulating isolation plate is not less than 125 mm / kV, and the material is polytetrafluoroethylene or epoxy resin.

8. The system according to claim 1, characterized in that, The low-inductance busbar adopts a laminated structure, which is composed of two layers of copper conductors and one layer of insulating medium alternately laminated. The current in the two layers of copper conductors is in opposite directions. The magnetic field generated by the opposite current cancels each other out, so that the parasitic inductance of the low-inductance busbar does not exceed 5nH and the total thickness of the laminated busbar does not exceed 10mm.

9. The system according to claim 1, characterized in that, The system also includes an online monitoring unit, which comprises: a high-frequency current sensor installed on the low-inductance busbar for real-time acquisition of the high-frequency current waveform flowing through the ultra-low ESL ceramic capacitor bank; an MOA leakage current sensor for real-time monitoring of the continuous leakage current of the MOA; and a data processing module for performing a fast Fourier transform on the acquired current waveform, extracting harmonic features, and issuing an early warning signal when the equivalent series inductance (ESL) of the ultra-low ESL ceramic capacitor bank exceeds 2nH or the continuous leakage current of the MOA exceeds 120% of the rated value.

10. A method for fast switching overvoltage protection, characterized in that, Includes the following steps: Step S1: Connect an ultra-low ESL ceramic capacitor bank in parallel on the load side of the fast circuit breaker through a low-inductance busbar with a lead length not exceeding 50mm, so that the equivalent series inductance of the bypass circuit is not greater than 1nH. Step S2: Connect a continuous operating voltage Uc not lower than 1.05 times the system's highest operating voltage MOA in parallel outside the ultra-low ESL ceramic capacitor bank. Step S3: During the 0-100ns time period after the current cut-off occurs, the ultra-low ESL ceramic capacitor bank conducts a high-frequency oscillating current to limit the dv / dt of the current cut-off overvoltage within a preset safety threshold. Step S4: When the overvoltage amplitude exceeds the operating voltage of the MOA, the MOA is activated and absorbs low-frequency surge energy within a time period of 100ns-10us, clamping the overall overvoltage peak value to within 2.2pu.

11. The method according to claim 10, characterized in that, The parameter matching principle between the ultra-low ESL ceramic capacitor bank and the MOA is as follows: the resonant frequency of the ceramic capacitor bank is matched with the main oscillation frequency of the current-cutting overvoltage, and the operating voltage of the MOA is slightly higher than the voltage limit level of the ceramic capacitor bank.

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