Flexible interconnection system q-u node and hybrid energy storage collaborative frequency division support method

Abstract

The application discloses a flexible interconnection system Q-U node and mixed energy storage collaborative frequency division support method, during the common action of multiple frequency bands of AC side disturbance, by designing the parameters of each node controller, changing the admittance amplitude-frequency characteristics of each branch to realize disturbance frequency division and flow division and absorption, while effectively suppressing the DC bus voltage fluctuation, giving full play to the rapid response advantage of the super capacitor; meanwhile, according to the SOC of the storage battery, the low-frequency admittance sharing coefficient of the storage battery and the Q-U node is generated online, the low-frequency support power is adaptively distributed, the over-discharge problem of the storage battery is avoided, and the service life of the whole energy storage system is prolonged.

Description

Technical Field

[0001] This invention relates to the field of flexible interconnection and coordinated control of energy storage in power distribution networks, and in particular to a method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnection system. Background Technology

[0002] With the increasing proportion of distributed energy sources such as photovoltaics and wind power connected to low-voltage distribution substations, the intermittent, random, and fluctuating nature of distributed energy output poses greater challenges to low-voltage distribution networks in terms of voltage stability, power flow regulation, and power supply reliability. Flexible interconnection devices can achieve flexible power allocation and mutual support between substations by relying on a common DC bus, while energy storage systems can further absorb fluctuating power and improve the absorption capacity of distributed power sources. Therefore, flexible interconnection systems have significant research value in low-voltage distribution systems. However, the large-scale connection of photovoltaics, energy storage, charging piles, and various power electronic interfaces will introduce a large amount of disturbance. If the disturbance power is not suppressed, it will cause bus voltage oscillations, which will be further transmitted to other nodes, affecting power quality and the safe and stable operation of the system.

[0003] To address the aforementioned issues, existing research primarily focuses on two aspects: system coordinated control and hybrid energy storage frequency division control. One type of research targets general DC microgrids, hybrid energy storage systems, or specific flexible switching scenarios, emphasizing dynamic power allocation, virtual impedance design, and interface modeling. While providing important references for system control, virtual impedance design, and interface modeling, most studies prioritize system-level stability analysis, transient control, or functional positioning, paying insufficient attention to the impact on battery life. The other type of research employs a hybrid energy storage frequency division control strategy, allowing the supercapacitor to absorb most high-frequency disturbances while the battery provides basic power support. Existing methods have proposed non-communication adaptive coordinated control for the DC side of grid-type hybrid energy storage converters, and frequency division coordination to enable segmented responses to power fluctuations by the bus capacitor, supercapacitor, and battery. Furthermore, methods have proposed inertia adaptive control under SOC constraints. However, existing methods generally employ simplified system-level models, treating batteries as ideal power sources and failing to consider the damage to battery life caused by over-discharge. Furthermore, they lack detailed descriptions of the dynamic coupling between actual bidirectional DC-DC converters and various types of nodes with the DC bus. Simultaneously, they do not employ differentiated low-frequency power allocation strategies for different SOC conditions, and the discussion of base power support redistribution under low SOC conditions is insufficient. In summary, a collaborative frequency division method for flexible interconnected systems is urgently needed. This method should not only rationally allocate disturbance power across different frequency bands to bus capacitors, supercapacitors, batteries, and flexible interconnected QU nodes, but also adaptively adjust the low-frequency power allocation ratio based on the battery SOC state to avoid battery damage caused by over-discharge, ensuring stable DC bus voltage and safe and stable system operation. Summary of the Invention

[0004] The technical problem to be solved by this invention is to provide a method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system, addressing the shortcomings of existing technologies. Based on unified bus port admittance modeling, this method achieves coordinated allocation of disturbance power in different frequency bands by bus capacitors, supercapacitors, batteries, and QU nodes. Furthermore, it adaptively adjusts the low-frequency power allocation ratio between the battery and QU nodes according to the battery's SOC state, thereby avoiding battery over-discharge and extending the service life of the entire energy storage system while ensuring the stability of the DC bus voltage.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by this invention is: a method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system. The flexible interconnected system includes a battery branch, a supercapacitor branch, and at least three three-phase inverters. Each of the battery branch and the supercapacitor branch is connected to a DC bus through a dual active bridge converter. The AC side of all three-phase inverters is connected to the DC bus. One of the three-phase inverters operates in QU mode, i.e., a QU node, and the remaining three-phase inverters operate in PQ mode, i.e., PQ nodes. The method includes the following steps: S1. Acquire the DC bus voltage in the flexible interconnection system for energy storage. u dc Supercapacitor voltage u sc Battery SOC status, supercapacitor branch output current i sc Battery branch output current i bat QU node AC side PCC terminal three-phase output voltage u a , u b , u c and three-phase output current i a , i b , i c The Park transformation is performed on the three-phase output voltage to obtain the d-axis voltage components of the distributed generation system. u d By performing a Park transformation on the three-phase output current, the d-axis current component of the distributed generation system's output current is obtained. i d ; S2. Calculate the sharing coefficient between the battery branch and the QU node based on the battery's SOC state. ρ Bat and ρ QU ; Using the coefficients ρ Bat and ρ QU Construct bus port admittances of bus capacitor branches, supercapacitor branches, and low-frequency branches relative to DC bus voltage disturbances. Y Bus_C ( s ), Y Bus_SC ( s ), Y Bus_LF ( s The low-frequency branch admittance includes the battery branch admittance. Y Bus_Bat ( s ) and QU node branch admittance Y Bus_QU ( s ); S3. Based on the preset high-frequency and mid-frequency domain crossover points. f HF_MF Crossover points in the mid-frequency and low-frequency domains f MF_LF Using the admittance equations for each branch at the specified location, calculate the parameters of the supercapacitor voltage PI controller. K pv_SC and K iv_SC Parameters of a supercapacitor current PI controller K pi_SC and K ii_SC Parameters of the low-frequency branch voltage PI controller K pv_LF and K iv_LF Parameters of the battery current PI controller K pi_Bat and K ii_Bat Parameters of the QU node current PI controller K pi_QU and K ii_QU ; S4. The phase shift angle of the dual active bridge converter is obtained based on the voltage and current double closed-loop calculation of the supercapacitor branch and the battery branch. SC The switching transistor drive signal PWM is modulated according to the phase shift angle; the switching transistor drive signal PWM is modulated according to the modulation wave of the dual closed-loop output of the QU node voltage and current.

[0006] Battery branch and QU node sharing factor ρ Bat and ρ QU The calculation formula is: ; Among them, SOC min With SOC max These represent the maximum and minimum values ​​of the battery's SOC (State of Charge).

[0007] The transfer function expressions for the supercapacitor voltage PI controller, supercapacitor current PI controller, low-frequency branch voltage PI controller, battery current PI controller, and QU node current PI controller are as follows:

[0008] in, R sc It is the equivalent resistance of the supercapacitor. C sc It is the equivalent capacitance of a supercapacitor. s It is a complex variable in the complex frequency domain.

[0009] Bus port admittance of bus capacitor branch, supercapacitor branch, and low-frequency branch relative to DC bus voltage disturbance Y Bus_C ( s ), Y Bus_SC ( s ), Y Bus_LF ( s ), Battery branch admittance Y Bus_Bat ( s ), QU node branch admittance Y Bus_QU ( s The formula for calculating ) is: ; in, C Bus This refers to the capacitance value of the DC bus. G V_SC ( s ) is the transfer function of the voltage PI controller for the supercapacitor; G C_SC ( s ) is the transfer function of the supercapacitor's current PI controller; G C_Bat ( s ) is the transfer function of the PI controller for the battery current; G C_QU ( s ) is the transfer function of the current PI controller for the QU node; G V_LF ( s) is the transfer function of the low-frequency branch voltage PI controller multiplied by the zero-point compensation transfer function of the supercapacitor impedance; N SC The turns ratio of the DAB transformer in the supercapacitor branch; N Bat The turns ratio of the DAB transformer in the battery branch; U d For the three-phase voltage at the PCC terminal of the QU node u abc The d-axis rating, U dc This is the rated value of the DC bus voltage; Z SC ( s () represents the equivalent impedance of the supercapacitor. Z SC ( s )= R sc +1 / s C sc ; R sc It is the equivalent resistance of the supercapacitor. C sc It is the equivalent capacitance of a supercapacitor; G dq ( s ) is the decoupling transfer function for node dq of QU. K i_SC and K i_Bat Phase shift angle disturbance for dual active bridge converter of supercapacitor and battery Output side current disturbance The proportionality coefficient, s For complex variables in the complex frequency domain.

[0010] ;in, N SC It is the transformer turns ratio of the supercapacitor branch. N Bat It refers to the transformer turns ratio of the battery branch; SC0 It is the phase shift angle of the steady-state operating point of the supercapacitor branch. Bat0 It is the phase shift angle of the steady-state operating point of the battery branch; U SC This is the rated operating voltage of the supercapacitor. U Bat This is the rated operating voltage of the battery; L SC It is the leakage inductance of the transformer in the supercapacitor branch.L Bat It is the leakage inductance of the transformer in the battery branch; f s It is the switching frequency of the DAB.

[0011] ;in, L line and R line It refers to the inductance and resistance of the QU node line.

[0012] In step S3, the admittance equations for each branch include: at the frequency division point f HF_MF At the location, the admittance of the high-frequency branch Y Bus_C ( s (equal to the mid-frequency branch admittance) Y Bus_SC ( s ); at the frequency division point f MF_LF At the mid-frequency branch admittance Y Bus_SC ( s (equal to low-frequency branch admittance) Y Bus_LF ( s ).

[0013] In step S3, the calculation formula for the parameters of each PI controller is as follows: ; in, ω ci The set inner current loop bandwidth. ω zi This is the zero point of the PI controller.

[0014] ω zi In the bandwidth of the current inner loop ω ci 1 / α place, α Take 5~10.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention achieves precise separation of high-frequency, mid-frequency, and low-frequency disturbance power, and makes full use of the characteristics of capacitors, batteries, and QU nodes. Compared with the traditional low-pass filter frequency division strategy, this invention can better suppress DC bus voltage fluctuations caused by AC side disturbances.

[0016] 2. This invention introduces an adaptive droop distribution strategy based on battery SOC, which adjusts the low-frequency power distribution ratio between the battery and the QU node in real time according to the SOC, avoiding continuous over-discharge of the battery and extending the service life of the entire energy storage system.

[0017] 3. This invention does not rely on real-time communication between converters. It only requires the battery to transmit the SOC status to the converter between the battery branch and the QU node. The control structure is simple and the operation complexity is low. Attached Figure Description

[0018] Figure 1 This is a control block diagram of the frequency division support method for the flexible interconnection system QU node and hybrid energy storage in an embodiment of the present invention.

[0019] Figure 2 This is a schematic diagram of the flexible interconnection system structure under AC-side load disturbance of the PQ node according to an embodiment of the present invention.

[0020] Figure 3 This is a diagram showing the amplitude-frequency response of the multi-branch admittance in an embodiment of the present invention.

[0021] Figure 4 This diagram illustrates a comparison of the DC bus fluctuation suppression effects of the method described in this invention and a conventional method. Figure 4 (a) shows the effect of traditional methods on DC bus fluctuation suppression. Figure 4 (b) is a diagram showing the DC bus fluctuation suppression effect of the method in the embodiment of the present invention.

[0022] Figure 5 This is a schematic diagram illustrating the frequency division effect of different branches in an embodiment of the present invention.

[0023] Figure 6 This is a schematic diagram illustrating the relationship between the battery's SOC state and the power sharing of the low-frequency branch in an embodiment of the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] Example 1 like Figure 2As shown, an embodiment of the flexible interconnection system of the present invention comprises two parts: an energy storage system and a flexible interconnection system. The energy storage system includes a supercapacitor branch and a battery branch, both connected to the DC bus via dual active bridge converters (DABs). The flexible interconnection system includes three three-phase inverters, two operating in PQ mode (PQ nodes) and the other in QU mode (QU node). The three-phase inverters are connected to three low-voltage distribution substations via transformers. These substations are connected to distributed power sources and residential loads. The disturbance sources mainly exist on the AC side of the two PQ nodes. A bus capacitor is also provided on the DC bus side. C Bus .

[0026] exist Figure 2 middle, Z line This is the line impedance of the QU node, including line resistance. R line and line inductance L line Z g It is the network test impedance of the QU node; u abc The three-phase voltage at the PCC terminal of the QU node; i abc PWM1~8 are the three-phase current output of the QU node; PWM9~16 are the switching transistor drive signals of the supercapacitor branch; PWM17~22 are the switching transistor drive signals of the QU node.

[0027] like Figure 1 As shown, the specific implementation steps of the flexible interconnected system QU node and hybrid energy storage collaborative frequency division support method according to an embodiment of the present invention include: Step 1: Sampling and Coordinate Transformation Data acquisition of DC bus voltage in flexible interconnected energy storage systems u dc Supercapacitor voltage u sc Battery SOC status, supercapacitor branch output current i sc Battery branch output current i bat QU node AC side PCC terminal three-phase output voltage u a , u b , u c and three-phase output current i a , i b , ic The Park transformation is performed on the three-phase output voltage to obtain the d-axis voltage components of the distributed generation system. u d By performing a Park transformation on the three-phase output current, the d-axis current component of the distributed generation system's output current is obtained. i d .

[0028] Step 2: Design of Battery SOC Power Allocation Strategy The SOC droop coefficients for the battery and the QU node are designed as follows: ρ Bat and ρ QU :

[0029] Among them, setting SOC min With SOC max These are the lower and upper thresholds for the battery's State of Charge (SOC). When SOC > SOC... max At that time, the low-frequency power support of the system is entirely provided by the battery. When the SOC <SOC min At that time, the low-frequency power support of the system is entirely provided by the QU node. When the SOC min <SOC<SOC max At this time, the low-frequency power support of the system is jointly provided by the battery and the QU node.

[0030] Step 2: Construct the admittance formula Calculate the DAB phase shift angle disturbance of the supercapacitor and battery based on the DAB circuit parameters. Output side current disturbance proportionality coefficient K i_SC and K i_Bat The specific formula is as follows:

[0031] in, N SC It is the transformer turns ratio of the supercapacitor branch. N Bat It refers to the transformer turns ratio of the battery branch; SC0 It is the phase shift angle of the steady-state operating point of the supercapacitor branch. Bat0 It is the phase shift angle of the steady-state operating point of the battery branch; U SC This is the rated operating voltage of the supercapacitor. UBat This is the rated operating voltage of the battery; L SC It is the leakage inductance of the transformer in the supercapacitor branch. L Bat It is the leakage inductance of the transformer in the battery branch; f s It is the switching frequency of the DAB.

[0032] Calculate the dq decoupling transfer function based on the QU node circuit parameters. G dq ( s The specific formula is:

[0033] in, L line and R line It refers to the inductance and resistance of the QU node line.

[0034] according to Figure 1 The control diagram shown is used to construct a multi-branch admittance formula:

[0035] in, C Bus This refers to the capacitance value of the DC bus. G V_SC ( s ) is the transfer function of the voltage PI controller for the supercapacitor; G C_SC ( s ) is the transfer function of the supercapacitor's current PI controller; G C_Bat ( s ) is the transfer function of the PI controller for the battery current; G C_QU ( s ) is the transfer function of the current PI controller for the QU node; G V_LF ( s The transfer function of the low-frequency branch voltage PI controller multiplied by the supercapacitor impedance compensation zero is denoted as . N SC The turns ratio of the DAB transformer in the supercapacitor branch; N Bat The turns ratio of the DAB transformer in the battery branch; U d For the three-phase voltage at the PCC terminal of the QU node u abc The d-axis rating, U dcThis is the rated value of the DC bus voltage; Z SC ( s () represents the equivalent impedance of the supercapacitor. Z SC ( s )= R sc +1 / s C sc ; R sc It is the equivalent resistance of the supercapacitor. C sc It is the equivalent capacitance of a supercapacitor; G dq ( s ) is the decoupling transfer function for the QU node dq. s For complex variables in the complex frequency domain.

[0036] Step 3: Calculation of system control parameters Based on the set current inner loop bandwidth ω ci The parameters of the inner loop PI controller for each branch current can be solved using the following formula:

[0037] in, K pi_SC and K ii_SC These are the parameters of the inner loop PI controller for the supercapacitor branch current; K pi_Bat and K ii_Bat These are the parameters of the inner loop PI controller for the battery branch current. K pi_QU and K ii_QU The parameters of the inner loop PI controller for the branch current of the QU node; ω zi To find the zero point of the PI controller, according to the PI tuning formula, ω zi The bandwidth of the inner current loop should be within the range of... ω ci 1 / α place, α Generally, a value of 5 to 10 is used.

[0038] According to the principle that at the frequency division point, the admittance magnitudes in adjacent frequency domains should be equal, that is, at the frequency division point... f HF_MF At the location, the admittance of the high-frequency branch Y Bus_C ( s (equal to the mid-frequency branch admittance) YBus_SC ( s ); at the frequency division point f MF_LF At the mid-frequency branch admittance Y Bus_SC ( s (equal to low-frequency branch admittance) Y Bus_LF ( s Based on the equation, the parameters of the voltage PI controller for the supercapacitor, battery, and QU node branch are calculated. The specific formulas are as follows:

[0039] in, K pv_SC and K iv_SC These are the parameters for the PI controller of the supercapacitor branch voltage; K pv_LF and K iv_LF These are the parameters for the low-frequency branch voltage PI controller; ω HF_MF For 2×π× f HF_MF ; ω MF_LF For 2×π× f MF_LF ; ω z_SC The zero point of the PI controller for the supercapacitor branch voltage is... ω HF_MF 1 / α , α Generally, a value of 5 to 10 is used. ω z_LF For the zero point of the low-frequency branch voltage PI controller, ω MF_LF 1 / α , α Generally, a value of 5 to 10 is used.

[0040] Step 4: Generation of drive signals Substitute the parameters of the supercapacitor, battery, and QU node voltage and current PI controller obtained in step 3 into the input... Figure 1 In the control system, the phase shift angle of the supercapacitor branch SC and the phase shift angle of the battery branch Bat The specific calculation formula is as follows: ; in, U dc_ref This is the preset value of the DC bus voltage.U SC_ref This is the preset value for the supercapacitor voltage. z LF It is the voltage deviation of the supercapacitor in the low-frequency branch. U SC_ref - u SC After passing through the zero-point compensation filter 1 / ( sR SC C SC The value of +1); i SC_ref This is the preset current value for the inner current loop of the supercapacitor; i Bat_ref This is the preset current value for the inner loop of the battery current.

[0041] The phase shift angle of the supercapacitor branch DAB is calculated based on the control loop. SC The SPS single-phase-shift modulation strategy is used to generate the switching transistor drive signals PWM1~8 for the supercapacitor branch; the phase shift angle of the battery branch DAB is calculated based on the control loop. Bat The SPS single-phase-shift modulation strategy is used to generate the switching transistor drive signals PWM9~16 for the battery branch.

[0042] The d-axis electromotive force at node QU e d and q-axis electromotive force e q The specific calculation formula is as follows: ; in, ω n This is the rated angular frequency of the inverter, specifically 50Hz. Q ref The preset reactive power of the QU node; Q This represents the actual reactive power of the QU node; i dref The preset current value for the inner loop of the d-axis current of node QU; i qref This is the preset current value for the inner loop of the q-axis current at node QU.

[0043] The d-axis electromotive force at node QU e d and q-axis electromotive force e q The inverse Park transform is performed to obtain the modulation wave, and the modulation wave is modulated by SPWM to obtain the drive signals PWM17~22 of the QU node inverter.

[0044] like Figure 4 as shown, the embodiment of the present invention builds a simulation model on the Simulink platform for verification. In the simulation, the disturbance source is generated by two PQ nodes. PQ node #1 generates a triangular wave high-frequency component with an amplitude of 5kW and a frequency of 100Hz, as well as a DC basic power component of 10kW. PQ node #2 generates a triangular wave intermediate-frequency component with an amplitude of 5kW and a frequency of 3Hz, as well as a DC basic power component of 10kW. When a conventional low-pass filtering method is used to design the active frequency division system, the DC bus voltage fluctuation Δ u dc ≈12V, and when the proposed active frequency division method is adopted, the DC bus voltage fluctuation Δ u dc ≈2V. As shown in Figure 3 and Figure 5 , when the proposed active frequency division method is adopted, the frequency division effect of each branch is clearly observable: in the high-frequency region f > f HF_MF , Y Bus_C is dominant, and at this time the disturbance source is mainly absorbed by the DC bus capacitor. In the intermediate-frequency region f MF_LF < f < f HF_MF , Y Bus_SC is dominant, and at this time the disturbance source is mainly absorbed by the supercapacitor; in the low-frequency region f < f MF_LF , Y Bus_LF is dominant, and the basic power is mainly provided by the low-frequency branch. In phase 1 (SOC>70%), the storage battery undertakes all the basic power of the low-frequency branch; as shown in Figure 6 , the initial SOC of the storage battery is set to 76%, and when the SOC drops to 70%, an additional discharge branch is added to shorten the simulation time; when the SOC drops to 30%, the additional discharge branch is cut off. When the SOC of the storage battery is greater than 70% in phase 1, the storage battery undertakes all the basic power of the low-frequency branch; in phase 2, when 30%<SOC<70%, the power undertaken by the storage battery decreases as the SOC decreases; in phase 3, when SOC<30%, the Q-U node undertakes all the basic power, and at this time the SOC of the storage battery hardly decreases any further. The above results show that the method proposed in the embodiment of the present invention can effectively realize the separation and absorption of disturbance power in different frequency bands, enhance the stability of the system DC bus, and automatically switch the low-frequency support to the Q-U node for undertaking when the SOC of the storage battery crosses the lower threshold, so as to avoid system risks caused by over-discharge of the storage battery and realize reliable and stable operation of the system.

[0045] Embodiment 2 Embodiment 2 of the present invention provides a frequency division control system corresponding to Embodiment 1 above, including a memory, a processor and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method of Embodiment 1 above.

[0046] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0047] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0048] Example 3 Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to Embodiment 1 above, on which a computer program / instructions are stored. When the computer program / instructions are executed by a processor, they implement the steps of the method of Embodiment 1 above.

[0049] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.

[0050] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0051] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0052] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0053] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0054] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system, wherein the flexible interconnected system includes a battery branch, a supercapacitor branch, and at least three three-phase inverters; each of the battery branch and the supercapacitor branch is connected to a DC bus through a dual active bridge converter, and the AC side of all three-phase inverters is connected to the DC bus; one of the three-phase inverters operates in QU mode, i.e., a QU node, and the remaining three-phase inverters operate in PQ mode, i.e., PQ nodes, characterized in that, Includes the following steps: S1. Acquire the DC bus voltage in the flexible interconnection system for energy storage. u dc Supercapacitor voltage u sc Battery SOC status, supercapacitor branch output current i sc Battery branch output current i bat QU node AC side PCC terminal three-phase output voltage u a , u b , u c and three-phase output current i a , i b , i c The Park transformation is performed on the three-phase output voltage to obtain the d-axis voltage components of the distributed generation system. u d By performing a Park transformation on the three-phase output current, the d-axis current component of the distributed generation system's output current is obtained. i d ; S2. Calculate the sharing coefficient between the battery branch and the QU node based on the battery's SOC state. ρ Bat and ρ QU ; Using the coefficients ρ Bat and ρ QU Construct bus port admittances of bus capacitor branches, supercapacitor branches, and low-frequency branches relative to DC bus voltage disturbances. Y Bus_C ( s ), Y Bus_SC ( s ), Y Bus_LF ( s The low-frequency branch admittance includes the battery branch admittance. Y Bus_Bat ( s ) and QU node branch admittance Y Bus_QU ( s ); S3. Based on the preset high-frequency and mid-frequency domain crossover points. f HF_MF Crossover points in the mid-frequency and low-frequency domains f MF_LF Using the admittance equations for each branch at the specified location, calculate the parameters of the supercapacitor voltage PI controller. K pv_SC and K iv_SC Parameters of a supercapacitor current PI controller K pi_SC and K ii_SC Parameters of the low-frequency branch voltage PI controller K pv_LF and K iv_LF Parameters of the battery current PI controller K pi_Bat and K ii_Bat Parameters of the QU node current PI controller K pi_QU and K ii_QU ; S4, Utilizing DC bus voltage u dc Supercapacitor voltage u sc Supercapacitor branch output current i sc Battery branch output current i bat Parameter calculation of the supercapacitor branch, battery branch, and PI controller corresponding to the QU node; phase shift angle of the supercapacitor branch. SC and the phase shift angle of the battery branch Bat According to the phase shift angle of the supercapacitor branch DAB SC The SPS single-phase-shift modulation strategy is used to generate the switching transistor drive signal for the supercapacitor branch; based on the phase shift angle of the DAB in the battery branch... Bat The SPS single-phase-shift modulation strategy is used to generate the switching transistor drive signal for the battery branch; Using d-axis voltage component u d d-axis current component i d Calculate the d-axis electromotive force at node QU. e d and q-axis electromotive force e q d-axis electromotive force at node QU e d and q-axis electromotive force e q The inverse Park transform is performed to obtain the modulation wave, and the modulation wave is modulated by SPWM to obtain the drive signal of the three-phase inverter switching transistor at the QU node.

2. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, Battery branch and QU node sharing factor ρ Bat and ρ QU The calculation formula is: ； Among them, SOC min With SOC max These represent the maximum and minimum SOC values ​​of the battery.

3. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, Bus port admittance of bus capacitor branch, supercapacitor branch, and low-frequency branch relative to DC bus voltage disturbance Y Bus_C ( s ), Y Bus_SC ( s ), Y Bus_LF ( s ), Battery branch admittance Y Bus_Bat ( s ), QU node branch admittance Y Bus_QU ( s The formula for calculating ) is: ； in, C Bus This refers to the capacitance value of the DC bus. G V_SC ( s ) is the transfer function of the voltage PI controller for the supercapacitor; G C_SC ( s ) is the transfer function of the supercapacitor's current PI controller; G C_Bat ( s ) is the transfer function of the PI controller for the battery current; G C_QU ( s ) is the transfer function of the current PI controller for the QU node; G V_LF ( s The transfer function is obtained by multiplying the low-frequency branch voltage PI controller by the supercapacitor impedance zero-point compensation transfer function; N SC The turns ratio of the DAB transformer in the supercapacitor branch; N Bat The turns ratio of the DAB transformer in the battery branch; U d For the three-phase voltage at the PCC terminal of the QU node u abc The d-axis rating, U dc This is the rated value of the DC bus voltage; Z SC ( s () represents the equivalent impedance of the supercapacitor. Z SC ( s )= R sc +1 / s C sc , R sc It is the equivalent resistance of the supercapacitor. C sc It is the equivalent capacitance of a supercapacitor. G dq ( s ) is the decoupling transfer function for node dq of QU. K i_SC and K i_Bat Phase shift angle disturbance for dual active bridge converter of supercapacitor and battery Output side current disturbance The proportionality coefficient, s For complex variables in the complex frequency domain.

4. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 3, characterized in that, ;in, N SC It is the transformer turns ratio of the supercapacitor branch. N Bat It is the transformer turns ratio of the battery branch. SC0 It is the phase shift angle of the steady-state operating point of the supercapacitor branch. Bat0 It is the phase shift angle of the steady-state operating point of the battery branch. U SC This is the rated operating voltage of the supercapacitor. U Bat This is the rated operating voltage of the battery. L SC It is the leakage inductance of the transformer in the supercapacitor branch. L Bat It is the leakage inductance of the transformer in the battery branch. f s It is the switching frequency of the DAB.

5. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 3, characterized in that, ； in, L line and R line It refers to the inductance and resistance of the QU node line.

6. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, In step S3, the admittance equations for each branch include: at the frequency division point f HF_MF At the location, the admittance of the high-frequency branch Y Bus_C ( s (equal to the mid-frequency branch admittance) Y Bus_SC ( s ); at the frequency division point f MF_LF At the mid-frequency branch admittance Y Bus_SC ( s (equal to low-frequency branch admittance) Y Bus_LF ( s ).

7. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, In step S3, the calculation formula for the parameters of each PI controller is as follows: ； in, ω ci This is the set inner current loop bandwidth. ω zi This is the zero point of the PI controller.

8. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 7, characterized in that, ω zi In the bandwidth of the current inner loop ω ci 1 / α Place, α Take 5~10.

9. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, Phase shift angle of supercapacitor branch SC and the phase shift angle of the battery branch Bat The specific calculation formula is as follows: ； in, U dc_ref This is the preset value of the DC bus voltage. U SC_ref This is the preset value for the supercapacitor voltage. z LF It is the voltage deviation of the supercapacitor in the low-frequency branch. U SC_ref - u SC The value after the zero-point compensation filter, i SC_ref This is the preset current value for the inner current loop of the supercapacitor. i Bat_ref This is the preset current value for the inner loop of the battery current. C sc It is the equivalent capacitance of a supercapacitor. R sc It is the equivalent resistance of the supercapacitor.

10. The method for coordinated frequency division support of QU nodes and hybrid energy storage in a flexible interconnected system according to claim 1, characterized in that, The d-axis electromotive force at node QU e d and q-axis electromotive force e q The specific calculation formula is as follows: ； in, ω n The inverter's rated angular frequency. Q ref The preset reactive power of the QU node, Q This represents the actual reactive power of the QU node. i dref This is the preset current value for the inner loop of the d-axis current at node QU. i qref This is the preset current value for the inner loop of the q-axis current at node QU.

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