Transducer, error amplification device and transconductance adjustment circuit for error amplifier

Abstract

The application relates to the technical field of electronic circuits, and discloses a transformer, an error amplifier device and a transconductance adjusting circuit of an error amplifier, wherein the transconductance adjusting circuit of the error amplifier comprises: a current detection module configured to detect an output end current of the error amplifier to obtain a current detection signal; and a feedback adjusting module configured to generate a current adjusting signal based on the current detection signal, and adjust the output end current of the error amplifier based on the current adjusting signal, so that the transconductance of the error amplifier is positively related to the absolute value of an input voltage difference of the error amplifier in a stepped manner, thereby easily compensating for system loop stability without changing the steady state, improving the adjusting speed of the system loop when the input voltage error is large, and improving the adjusting sensitivity of the error amplifier.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a transconductance adjustment circuit for an error amplifier, an error amplification device, and a converter. Background Technology

[0002] In existing DC-DC or AC-DC converters, the error amplifier basically operates with a constant transconductance Gm, which makes the system stability relatively well compensated in steady state.

[0003] However, when the error amplifier operates using transconductance Gm, its adjustment speed remains basically the same regardless of the magnitude of the input error. This results in a slower adjustment speed when the input error of the error amplifier is large, which affects the adjustment speed of the system loop and reduces the adjustment sensitivity of the error amplifier. Summary of the Invention

[0004] The purpose of this application is to provide a transconductance adjustment circuit for an error amplifier, an error amplification device having the transconductance adjustment circuit, and a converter having the transconductance adjustment circuit or error amplification device. By detecting the output current of the error amplifier for feedback adjustment, the transconductance of the error amplifier can change in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This makes it easy to compensate for the system loop stability without changing the steady state, while improving the adjustment speed of the system loop and increasing the adjustment sensitivity of the error amplifier when the input voltage error is large.

[0005] To achieve the above objectives, the main technical solutions adopted in this application include:

[0006] In a first aspect, embodiments of this application provide a transconductance adjustment circuit for an error amplifier, comprising: a current detection module configured to detect the output current of the error amplifier to obtain a current detection signal; and a feedback adjustment module configured to generate a current adjustment signal based on the current detection signal and adjust the output current of the error amplifier based on the current adjustment signal, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier.

[0007] According to the transconductance adjustment circuit of the error amplifier provided in the embodiments of this application, the current at the output terminal of the error amplifier is detected by the current detection module to obtain a current detection signal. In this way, the feedback adjustment module can generate a current adjustment signal based on the current detection signal and adjust the output terminal current of the error amplifier based on the current adjustment signal. This makes the transconductance of the error amplifier follow the absolute value of the input voltage difference of the error amplifier in a stepwise positive correlation. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, the system loop stability is easily compensated without changing the steady state, while the adjustment speed of the system loop is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is improved, and the reliable and stable operation of the system is ensured.

[0008] Optionally, in some embodiments of this application, the current detection module includes at least one current mirroring unit configured to mirror and sample the output current of the error amplifier to provide the current detection signal to the feedback adjustment module.

[0009] Optionally, in some embodiments of this application, the feedback adjustment module includes a current adjustment unit corresponding to each of the current mirror units. The current adjustment unit is configured to determine the relationship between the output current of the error amplifier and a preset reference current based on the current detection signal, and to generate the current adjustment signal based on the relationship between the output current of the error amplifier and the preset reference current.

[0010] Optionally, in some embodiments of this application, when at least one of the current mirroring units includes a first current mirroring unit and the feedback adjustment module includes a first current adjustment unit corresponding to the first current mirroring unit, the first current mirroring unit is configured to mirror and sample the sink current at the output terminal of the error amplifier when the error amplifier outputs a low level, so as to provide a first current detection signal to the first current adjustment unit; the first current adjustment unit is configured to generate a first current adjustment signal when it is determined from the first current detection signal that the sink current at the output terminal is greater than a first reference current, and the first current adjustment signal is applied to the output terminal of the error amplifier so as to raise the transconductance of the error amplifier by one step.

[0011] Optionally, in some embodiments of this application, there are multiple first current mirror units and multiple first current adjustment units, and the circuit topologies of the multiple first current mirror units are the same, and the circuit topologies of the multiple first current adjustment units are the same. Each first current adjustment unit generates a corresponding reference current, and the multiple reference currents generated by the multiple first current adjustment units increase in a stepwise manner.

[0012] Optionally, in some other embodiments of this application, when at least one of the current mirroring units includes a second current mirroring unit and the feedback adjustment module includes a second current adjustment unit corresponding to the second current mirroring unit, the second current mirroring unit is configured to mirror and sample the source current at the output terminal of the error amplifier when the error amplifier outputs a high level, so as to provide a second current detection signal to the second current adjustment unit; the second current adjustment unit is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the source current at the output terminal is greater than a second reference current, and the second current adjustment signal is applied to the output terminal of the error amplifier so as to raise the transconductance of the error amplifier by another step.

[0013] Optionally, in some other embodiments of this application, there are multiple second current mirror units and multiple second current adjustment units, and the circuit topologies of the multiple second current mirror units are the same, and the circuit topologies of the multiple second current adjustment units are the same. Each second current adjustment unit generates a corresponding reference current, and the multiple reference currents generated by the multiple second current adjustment units increase in a stepwise manner.

[0014] Optionally, in some other embodiments of this application, when at least one of the current mirroring units includes a first current mirroring unit and a second current mirroring unit, and the feedback adjustment module includes a first current adjustment unit and a second current adjustment unit corresponding to the first current mirroring unit and the second current mirroring unit, respectively, the first current mirroring unit is configured to mirror and sample the sink current at the output terminal of the error amplifier when the error amplifier outputs a low level, so as to provide a first current detection signal to the first current adjustment unit. The first current adjustment unit is configured to generate a first current detection signal when it is determined from the first current detection signal that the sink current at the output terminal is greater than a first reference current. A first current adjustment signal is applied to the output of the error amplifier to raise the transconductance of the error amplifier by one step. A second current mirroring unit is configured to mirror and sample the source current at the output of the error amplifier when the output of the error amplifier is high, so as to provide a second current detection signal to the second current adjustment unit. The second current adjustment unit is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the source current at the output is greater than a second reference current. The second current adjustment signal is applied to the output of the error amplifier to raise the transconductance of the error amplifier by another step.

[0015] Optionally, in some embodiments of this application, there are multiple first current mirror units and multiple first current adjustment units, and at least one second current mirror unit and multiple second current adjustment unit. The circuit topologies of the multiple first current mirror units are the same, the circuit topologies of the multiple first current adjustment units are the same, each first current adjustment unit generates a corresponding reference current, and the multiple reference currents generated by the multiple first current adjustment units increase in a stepwise manner.

[0016] Optionally, in some other embodiments of this application, the first current mirror unit and the first current regulating unit are each at least one, and the second current mirror unit and the second current regulating unit are each multiple, wherein the multiple second current mirror units have the same circuit topology, the multiple second current regulating units have the same circuit topology, each second current regulating unit generates a corresponding reference current, and the multiple reference currents generated by the multiple second current regulating units increase in a stepwise manner.

[0017] Optionally, in some embodiments of this application, the first current mirror unit includes: a first MOSFET, the first MOSFET being of the same type as the upper output stage MOSFET of the error amplifier, and the control terminal of the first MOSFET being connected to the control terminal of the upper output stage MOSFET; the first end of the first MOSFET being connected to the first end of the upper output stage MOSFET and then connected to a preset power supply; a second MOSFET, the second MOSFET being of the same type as the lower output stage MOSFET of the error amplifier, and the control terminal of the second MOSFET being connected to the control terminal of the lower output stage MOSFET; the first end of the second MOSFET being connected to the first end of the lower output stage MOSFET and then grounded; the second end of the second MOSFET being connected to the second end of the first MOSFET and having a first node; a third MOSFET, the control terminal of the third MOSFET being connected to the first node; the first end of the third MOSFET being connected to the preset power supply; the second end of the third MOSFET being connected to the control terminal of the third MOSFET; and a fourth MOSFET, the control terminal of the fourth MOSFET being connected to the control terminal of the third MOSFET; the first end of the fourth MOSFET being connected to the preset power supply; and the second end of the fourth MOSFET serving as the output terminal of the first current mirror unit.

[0018] Optionally, in some embodiments of this application, the first current regulation unit includes: a first current source, the positive terminal of which is connected to the second terminal of the fourth MOS transistor, the negative terminal of which is grounded, and the first current source being adapted to provide the first reference current; a fifth MOS transistor, the control terminal of which is connected to the second terminal of the fifth MOS transistor and also connected to the second terminal of the fourth MOS transistor, and the first terminal of the fifth MOS transistor is grounded; and a sixth MOS transistor, the control terminal of which is connected to the control terminal of the fifth MOS transistor, the first terminal of which is grounded, and the second terminal of which is connected to the output terminal of the error amplifier.

[0019] Optionally, in some embodiments of this application, the second current mirror unit includes: a seventh MOS transistor, the seventh MOS transistor being of the same type as the lower output stage transistor of the error amplifier, and the control terminal of the seventh MOS transistor being connected to the control terminal of the lower output stage transistor, and the first terminal of the seventh MOS transistor being connected to the first terminal of the lower output stage transistor and then grounded; an eighth MOS transistor, the eighth MOS transistor being of the same type as the upper output stage transistor of the error amplifier, and the control terminal of the eighth MOS transistor being connected to the control terminal of the upper output stage transistor, the first terminal of the eighth MOS transistor being connected to the first terminal of the upper output stage transistor and then connected to a preset power supply, the second terminal of the eighth MOS transistor being connected to the second terminal of the seventh MOS transistor, and having a second node; a ninth MOS transistor, the control terminal of the ninth MOS transistor being connected to the second node, the first terminal of the ninth MOS transistor being grounded, and the second terminal of the ninth MOS transistor being connected to the control terminal of the ninth MOS transistor; and a tenth MOS transistor, the control terminal of the tenth MOS transistor being connected to the control terminal of the ninth MOS transistor, the first terminal of the tenth MOS transistor being grounded, and the second terminal of the tenth MOS transistor serving as the output terminal of the second current mirror unit.

[0020] Optionally, in some embodiments of this application, the second current regulation unit includes: a second current source, the positive terminal of which is connected to the preset power supply, and the negative terminal of which is connected to the second terminal of the tenth MOS transistor, the second current source being adapted to provide the second reference current; an eleventh MOS transistor, the control terminal of which is connected to and connected to the second terminal of the eleventh MOS transistor, and the first terminal of which is connected to the preset power supply; and a twelfth MOS transistor, the control terminal of which is connected to the control terminal of the eleventh MOS transistor, the first terminal of which is connected to the preset power supply, and the second terminal of which is connected to the output terminal of the error amplifier.

[0021] Secondly, embodiments of this application provide an error amplification device, including a transconductance adjustment circuit of the error amplifier described in the above embodiments.

[0022] According to the error amplification device provided in the embodiments of this application, based on the transconductance adjustment circuit described in the above embodiments, feedback adjustment is performed by detecting the output current of the error amplifier, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, while the stability of the system loop is easily compensated without changing the steady state, the adjustment speed of the system loop is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is increased, and the reliable and stable operation of the system is ensured.

[0023] Thirdly, embodiments of this application provide a converter, including: a transconductance adjustment circuit of an error amplifier as described in the above embodiments; or an error amplification device as described in the above embodiments.

[0024] According to the converter provided in the embodiments of this application, based on the transconductance adjustment circuit of the error amplifier described in the above embodiments or the error amplification device described in the above embodiments, feedback adjustment can be performed by detecting the output current of the error amplifier, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, while the system loop stability is easily compensated without changing the steady state, the system loop adjustment speed is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is increased, and the reliable and stable operation of the system is ensured. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 A block diagram of a transconductance adjustment circuit for an error amplifier provided in one embodiment of this application;

[0027] Figure 2 A circuit diagram of a transconductance adjustment circuit for an error amplifier provided in one embodiment of this application;

[0028] Figure 3 A schematic diagram of transconductance adjustment of an error amplifier provided for one embodiment of this application;

[0029] Figure 4 A circuit diagram of a transconductance adjustment circuit for an error amplifier provided for another embodiment of this application;

[0030] Figure 5 A schematic diagram of transconductance adjustment of an error amplifier provided for another embodiment of this application;

[0031] Figure 6 A circuit diagram of a transconductance adjustment circuit for an error amplifier is provided as another embodiment of this application;

[0032] Figure 7 A schematic diagram of transconductance adjustment of an error amplifier provided in yet another embodiment of this application;

[0033] Figure 8 A circuit diagram of a transconductance adjustment circuit for an error amplifier is provided in another embodiment of this application;

[0034] Figure 9 A schematic diagram of transconductance adjustment of an error amplifier is provided in another embodiment of this application;

[0035] Figure 10 A circuit diagram of a transconductance adjustment circuit for an error amplifier is provided in another embodiment of this application;

[0036] Figure 11 A schematic diagram of transconductance adjustment of an error amplifier provided in another embodiment of this application;

[0037] Figure 12 A circuit diagram of a transconductance adjustment circuit for an error amplifier is provided for a specific embodiment of this application;

[0038] Figure 13 A schematic diagram of transconductance adjustment of an error amplifier provided for a specific embodiment of this application;

[0039] Figure 14 This is a block diagram of an error amplification device provided in one embodiment of this application. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0041] In related technologies, when the error amplifier operates using transconductance Gm, its adjustment speed is basically the same regardless of the magnitude of the input error. This can lead to a mismatch in adjustment speed when the input error of the error amplifier is large, which affects the adjustment speed of the system loop and reduces the adjustment sensitivity of the error amplifier.

[0042] Therefore, the transconductance adjustment circuit of the error amplifier, the error amplification device having the transconductance adjustment circuit, and the converter having the transconductance adjustment circuit or the error amplification device provided in the embodiments of this application perform feedback adjustment by detecting the output current of the error amplifier, so that the transconductance of the error amplifier can change in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. In this way, the system loop stability is easily compensated without changing the steady state, while the adjustment speed of the system loop is improved when the input voltage error is large, and the adjustment sensitivity of the error amplifier is improved.

[0043] The transconductance adjustment circuit of the error amplifier, the error amplification device having the transconductance adjustment circuit, and the converter having the transconductance adjustment circuit or the error amplification device provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0044] refer to Figure 1 The diagram shown is a block illustration of a transconductance adjustment circuit for an error amplifier according to an embodiment of this application. Figure 1 As shown, the transconductance adjustment circuit of the error amplifier includes a current detection module 10 and a feedback adjustment module 20.

[0045] The current detection module 10 is configured to detect the output current Iout of the error amplifier EA to obtain a current detection signal. The feedback adjustment module 20 is configured to generate a current adjustment signal based on the current detection signal and adjust the output current Iout of the error amplifier EA based on the current adjustment signal, so that the transconductance Gm of the error amplifier EA follows the absolute value of the input voltage difference between the error amplifier EA, i.e., the voltage difference between V1 and V2, in a stepwise positive correlation.

[0046] According to the formula Iout = Gm * (V1 - V2), when the transconductance Gm is constant, the output current Iout of the error amplifier EA is directly proportional to the absolute value of the voltage difference between the input error (V1 and V2). Therefore, when the voltage difference between V1 and V2 is small, there is no need to adjust the output current Iout of the error amplifier EA, keeping the transconductance Gm constant, thus ensuring good system stability. However, when the voltage difference between V1 and V2 is large, the current adjustment signal generated based on the current detection signal adjusts the output current Iout of the error amplifier EA, increasing the output current Iout and thus controlling the transconductance Gm to increase stepwise, improving the system loop's adjustment speed.

[0047] Optionally, in some embodiments of this application, the current detection module 10 includes at least one current mirroring unit configured to mirror and sample the output current Iout of the error amplifier EA to provide a current detection signal to the feedback adjustment module 20.

[0048] Furthermore, the feedback adjustment module 20 includes a current adjustment unit corresponding to each current mirror unit, that is, each current mirror unit corresponds to one current adjustment unit. In this way, the current adjustment unit can determine the relationship between the output current Iout of the error amplifier EA and the preset reference current based on the current detection signal, and generate a current adjustment signal based on the relationship between the output current of the error amplifier and the preset reference current.

[0049] For example, when the current Iout at the output terminal of the error amplifier EA is greater than the preset reference current based on the current detection signal, that is, when the voltage difference between V1 and V2 is large, the current adjustment unit adjusts the current Iout at the output terminal of the error amplifier EA to make it larger, thereby controlling the transconductance Gm to increase stepwise.

[0050] Furthermore, in one embodiment of this application, such as Figure 2As shown, in the case where at least one current mirror unit includes a first current mirror unit 101 and the feedback adjustment module 20 includes a first current adjustment unit 201 corresponding to the first current mirror unit 101, the first current mirror unit 101 is configured to mirror and sample the sink current at the output terminal of the error amplifier EA when the output of the error amplifier EA is low, so as to provide a first current detection signal to the first current adjustment unit 201. The first current adjustment unit 201 is configured to generate a first current adjustment signal when it is determined from the first current detection signal that the sink current at the output terminal of the error amplifier EA is greater than the first reference current Iref1. The first current adjustment signal is applied to the output terminal of the error amplifier EA to raise the transconductance Gm of the error amplifier EA by a step, such as... Figure 3 As shown.

[0051] Specifically, such as Figure 2 As shown, the first current mirror unit 101 includes a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, and a fourth MOSFET M4. The first MOSFET M1 is of the same type as the upper MOSFET of the output stage of the error amplifier, for example, both are PMOS transistors. The control terminal of the first MOSFET M1 is connected to the control terminal A of the upper MOSFET of the output stage. After the first terminal of the first MOSFET M1 is connected to the first terminal of the upper MOSFET of the output stage, it is connected to the preset power supply VDD. The second MOSFET M2 is of the same type as the lower MOSFET of the output stage of the error amplifier, for example, both are NMOS transistors. The control terminal of the second MOSFET M2 is connected to the control terminal B of the lower MOSFET of the output stage. After the first terminal of the second MOSFET M2 is connected to the first terminal of the lower MOSFET of the output stage, it is grounded to VSS. The second terminal of the second MOSFET M2 is connected to the second terminal of the first MOSFET M1 and has a first node. The control terminal of the third MOSFET M3 is connected to the first node. The first terminal of the third MOSFET M3 is connected to the preset power supply VDD. The second terminal of the third MOSFET M3 is connected to the control terminal of the third MOSFET M3. The first terminal of the fourth MOSFET M4 is connected to the preset power supply VDD. The second terminal of the fourth MOSFET M4 serves as the output terminal of the first current mirror unit 101.

[0052] In this design, the first MOSFET M1 is of the same type as the upper transistor in the output stage of the error amplifier, which can both be PMOS transistors. The second MOSFET M2 is of the same type as the lower transistor in the output stage of the error amplifier, which can both be NMOS transistors. Thus, the output current of the error amplifier is mirrored by the first MOSFET M1 and the second MOSFET M2 to obtain a mirror current characterizing the output current of the error amplifier. When the current flowing through the first MOSFET M1 is greater than the current flowing through the second MOSFET M2, the difference between the current flowing through the first MOSFET M1 and the current flowing through the second MOSFET M2, which is the output sink current of the error amplifier EA, is stored by the third PMOS transistor M3. Then, the output sink current of the error amplifier EA is obtained by mirroring the third PMOS transistor M4. The first current adjustment unit 201 adjusts the output sink current of the error amplifier EA.

[0053] Optionally, in one embodiment of this application, such as Figure 2 As shown, the first current regulation unit 201 includes a first current source, a fifth MOSFET M5, and a sixth MOSFET M6. The positive terminal of the first current source is connected to the second terminal of the fourth MOSFET M4, and the negative terminal of the first current source is grounded to VSS. The first current source is adapted to provide a first reference current Iref1. The control terminal of the fifth MOSFET M5 is connected to the second terminal of the fifth MOSFET M5 and is also connected to the second terminal of the fourth MOSFET M4. The first terminal of the fifth MOSFET M5 is grounded to VSS. The control terminal of the sixth MOSFET M6 is connected to the control terminal of the fifth MOSFET M5. The first terminal of the sixth MOSFET M6 is grounded to VSS, and the second terminal of the sixth MOSFET M6 is connected to the output terminal OUT of the error amplifier EA.

[0054] Among them, the fifth MOSFET M5 and the sixth MOSFET M6 can be NMOS transistors.

[0055] In this embodiment, when the sink current at the output terminal of the error amplifier EA, mirrored by the fourth MOSFET M4, is greater than the first reference current Iref1, the current difference between the sink current at the output terminal of the error amplifier EA and the first reference current Iref1 is used by the fifth MOSFET M5 and the sixth MOSFET M6 to generate a first current adjustment signal. This first current adjustment signal is applied to the output terminal of the error amplifier EA, causing the output current of the error amplifier EA to increase by one step. Thus, while the input error, i.e., the voltage difference between V1 and V2, remains unchanged, the transconductance Gm of the error amplifier increases by one step. Specifically, it can be described as follows: Figure 3 As shown.

[0056] The magnitude of the first current adjustment signal is determined based on the channel width-to-length ratio W / L of M5:M6.

[0057] In some embodiments of this application, such as Figure 4 As shown, there can be multiple first current mirror units 101 and multiple first current adjustment units 201, and the circuit topologies of the multiple first current mirror units 101 and the multiple first current adjustment units 201 are the same. Each first current adjustment unit 201 generates a corresponding reference current, such as Iref1, Iref1', Iref1'', etc., and the multiple reference currents generated by the multiple first current adjustment units increase in a stepwise manner.

[0058] In other words, the first reference current provided by the first current source in each first current mirror unit 101 is different in magnitude and increases sequentially. The channel width-to-length ratio (W / L) of M5 and M6 in each first current adjustment unit 201 can be the same or different. Thus, multiple first current mirror units 101 and corresponding multiple first current adjustment units 201 can make the transconductance Gm of the error amplifier EA follow the increase of the input error, i.e., the voltage difference between V1 and V2, in a stepwise manner. Specifically, as shown... Figure 5 As shown.

[0059] Alternatively, in another embodiment of this application, such as Figure 6 As shown, in the case where at least one current mirror unit includes a second current mirror unit 102 and the feedback adjustment module 20 includes a second current adjustment unit 202 corresponding to the second current mirror unit 102, the second current mirror unit 102 is configured to mirror and sample the source current at the output terminal of the error amplifier EA when the error amplifier EA outputs a high level, so as to provide a second current detection signal to the second current adjustment unit 202. The second current adjustment unit 202 is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the source current at the output terminal of the error amplifier EA is greater than the second reference current Iref2. The second current adjustment signal is applied to the output terminal of the error amplifier EA to raise the transconductance Gm of the error amplifier EA by another step, such as... Figure 7 As shown.

[0060] Specifically, such as Figure 6As shown, the second current mirror unit 102 includes a seventh MOSFET M7, an eighth MOSFET M8, a ninth MOSFET M9, and a tenth MOSFET M10. The seventh MOSFET M7 is of the same type as the lower output stage MOSFET of the error amplifier, for example, both are NMOS transistors. The control terminal of the seventh MOSFET M7 is connected to the control terminal B of the lower output stage MOSFET. The first terminal of the seventh MOSFET M7 is connected to the first terminal of the lower output stage MOSFET and then grounded to VSS. The eighth MOSFET M8 is of the same type as the upper output stage MOSFET of the error amplifier, for example, both are PMOS transistors. The control terminal of the eighth MOSFET M8 is connected to the control terminal A of the upper output stage MOSFET. The first terminal of the eighth MOSFET M8 is connected to the first terminal of the upper output stage MOSFET and then connected to the preset power supply VDD. The second terminal of the eighth MOSFET M8 is connected to the second terminal of the seventh MOSFET M7 and has a second node. The control terminal of the ninth MOSFET M9 is connected to the second node. The first terminal of the ninth MOSFET M9 is grounded to VSS. The second terminal of the ninth MOSFET M9 is connected to the control terminal of the ninth MOSFET M9. The control terminal of the tenth MOSFET M10 is connected to the control terminal of the ninth MOSFET M9. The first terminal of the tenth MOSFET M10 is grounded to VSS. The second terminal of the tenth MOSFET M10 serves as the output terminal of the second current mirror unit 202.

[0061] Among them, the seventh MOSFET M7 is of the same type as the lower transistor of the output stage of the error amplifier, which can both be NMOS transistors, and the eighth MOSFET M8 is of the same type as the upper transistor of the output stage of the error amplifier, which can both be PMOS transistors. In this way, the output current of the error amplifier is mirrored by the seventh MOSFET M7 and the eighth MOSFET M8 to obtain the mirror current characterizing the output current of the error amplifier. When the current flowing through the seventh MOSFET M7 is greater than the current flowing through the eighth MOSFET M8, the current difference between the current flowing through the seventh MOSFET M7 and the current flowing through the eighth MOSFET M8 is stored by the ninth MOSFET M9, which is the source current of the output of the error amplifier EA. Then, the source current of the output of the error amplifier EA is obtained by mirroring it by the tenth MOSFET M10, which is NMOS transistor. The second current adjustment unit 202 adjusts the source current of the output of the error amplifier EA.

[0062] Alternatively, in another embodiment of this application, such as Figure 6As shown, the second current regulation unit 202 includes a second current source, an eleventh MOSFET M11, and a twelfth MOSFET M12. The positive terminal of the second current source is connected to a preset power supply VDD, and the negative terminal of the second current source is connected to the second terminal of the tenth MOSFET M10. The second current source is adapted to provide a second reference current Iref2. The control terminal of the eleventh MOSFET M11 is connected to the second terminal of the eleventh MOSFET M11 and is also connected to the second terminal of the tenth MOSFET M10. The first terminal of the eleventh MOSFET M11 is connected to the preset power supply VDD. The control terminal of the twelfth MOSFET M12 is connected to the control terminal of the eleventh MOSFET M11. The first terminal of the twelfth MOSFET M12 is connected to the preset power supply VDD, and the second terminal of the twelfth MOSFET M12 is connected to the output terminal of the error amplifier EA.

[0063] Among them, the eleventh MOS transistor M11 and the twelfth MOS transistor M12 can be PMOS transistors.

[0064] In this embodiment, when the source current at the output terminal of the error amplifier EA, mirrored by the tenth MOSFET M10, is greater than the second reference current Iref2, the current difference between the source current at the output terminal of the error amplifier EA and the second reference current Iref2 is used by the eleventh MOSFET M11 and the twelfth MOSFET M12 to generate a second current adjustment signal. This second current adjustment signal is applied to the output terminal of the error amplifier EA, causing the output current of the error amplifier EA to increase by one step. Thus, while the input error, i.e., the voltage difference between V1 and V2, remains unchanged, the transconductance Gm of the error amplifier increases by another step. Specifically, it can be as follows: Figure 7 As shown.

[0065] The magnitude of the second current adjustment signal is determined based on the channel width-to-length ratio W / L of M11:M12.

[0066] In other embodiments of this application, such as Figure 8 As shown, there are multiple second current mirror units 102 and multiple second current adjustment units 202, and the circuit topologies of the multiple second current mirror units 102 and the multiple second current adjustment units 202 are the same. Each second current adjustment unit 202 generates a corresponding reference current, such as Iref2, Iref2', Iref2'', etc., and the multiple reference currents generated by the multiple second current adjustment units 202 increase in a stepwise manner.

[0067] Similarly, the second reference currents provided by the second current sources in each second current mirror unit 102 are of different magnitudes and increase sequentially. The channel width-to-length ratio (W / L) of M11:M12 in each second current adjustment unit 202 can be the same or different. Thus, multiple second current mirror units 102 and corresponding multiple second current adjustment units 202 can make the transconductance Gm of the error amplifier EA follow the increase of the input error, i.e., the voltage difference between V1 and V2, in a step-like manner, specifically as follows... Figure 9 As shown.

[0068] Optionally, in yet another embodiment of this application, such as Figure 10 As shown, in the case where at least one current mirror unit includes a first current mirror unit 101 and a second current mirror unit 102, and the feedback adjustment module 20 includes a first current adjustment unit 201 and a second current adjustment unit 202 corresponding to the first current mirror unit 101 and the second current mirror unit 102 respectively, the first current mirror unit 101 is configured to mirror and sample the sink current at the output terminal of the error amplifier EA when the output of the error amplifier EA is low, so as to provide a first current detection signal to the first current adjustment unit 201. The first current adjustment unit 201 is configured to generate a first current adjustment signal when it is determined from the first current detection signal that the sink current at the output terminal of the error amplifier EA is greater than the first reference current Iref1. The first current adjustment signal is applied to the output terminal of the error amplifier EA to raise the transconductance Gm of the error amplifier EA by a step, such as... Figure 11 As shown. The second current mirroring unit 102 is configured to mirror and sample the source current at the output terminal of the error amplifier EA when the output of the error amplifier EA is high, so as to provide a second current detection signal to the second current adjustment unit 202. The second current adjustment unit 202 is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the source current at the output terminal of the error amplifier EA is greater than the second reference current Iref2. The second current adjustment signal is applied to the output terminal of the error amplifier EA to raise the transconductance Gm of the error amplifier EA by another step, such as... Figure 11 As shown.

[0069] In other words, when the input voltage V2 of the error amplifier EA is greater than V1, the output of the error amplifier EA is low. Furthermore, when the input error of the error amplifier EA, i.e., the voltage difference between V1 and V2, is large, if the sink current at the output of the error amplifier EA is greater than the first reference current Iref1, then the first current adjustment unit 201 generates a first current adjustment signal and applies it to the output of the error amplifier, causing the transconductance Gm of the error amplifier EA to increase by a step. Figure 11 As shown; when the input voltage V2 of the error amplifier EA is less than V1, the error amplifier EA outputs a high level. Furthermore, when the input error of the error amplifier EA, i.e., the voltage difference between V1 and V2, is large, if the output current source of the error amplifier EA is greater than the second reference current Iref2, a second current adjustment signal is generated by the second current adjustment unit 202 and applied to the output of the error amplifier, causing the transconductance Gm of the error amplifier EA to rise by another step, such as... Figure 11 As shown.

[0070] Therefore, in this embodiment, regardless of whether V1 is greater than V2 or less than V2, as long as the voltage difference between V1 and V2 is large, the output current Iout of the error amplifier EA can be adjusted based on the current adjustment signal generated by the current detection signal. This increases the output current Iout of the error amplifier EA, thereby controlling the transconductance Gm to increase stepwise and improving the adjustment speed of the system loop. However, when the voltage difference between V1 and V2 is small, for example, when the output source current of the error amplifier EA is less than or equal to the second reference current Iref2, or the output sink current of the error amplifier EA is less than or equal to the first reference current Iref1, there is no need to adjust the output current Iout of the error amplifier EA, keeping the transconductance Gm constant. This provides better compensation for system stability.

[0071] Optionally, in some embodiments of this application, there are multiple first current mirror units 101 and multiple first current adjustment units 201, and at least one second current mirror unit 102 and multiple second current adjustment units 202. The multiple first current mirror units 101 and the multiple first current adjustment units 201 have the same circuit topology. Furthermore, each first current adjustment unit 201 generates a corresponding reference current, and the multiple reference currents generated by the multiple first current adjustment units 201 increase in a stepwise manner.

[0072] In other words, in this embodiment, the first current mirror unit 101 and the first current adjustment unit 201 can be multiple current mirror structures and current adjustment structures with the same circuit topology, respectively. The second current mirror unit 102 and the second current adjustment unit 202 can be one or multiple current mirror structures and current adjustment structures with the same circuit topology. The reference current provided by the current source in each first current adjustment unit 201 increases in a stepwise manner, and the reference current provided by the current source in each second current adjustment unit 202 also increases in a stepwise manner.

[0073] Optionally, in some other embodiments of this application, there is at least one first current mirror unit 101 and a first current adjustment unit 201, and there are multiple second current mirror units 102 and multiple second current adjustment units 202, wherein the multiple second current mirror units 102 have the same circuit topology, and the multiple second current adjustment units 202 have the same circuit topology. Furthermore, each second current adjustment unit 202 generates a corresponding reference current, and the multiple reference currents generated by the multiple second current adjustment units 202 increase in a stepwise manner.

[0074] In other words, in this embodiment, the second current mirror unit 102 and the second current adjustment unit 202 can be multiple current mirror structures and current adjustment structures with the same circuit topology, respectively. The first current mirror unit 101 and the first current adjustment unit 201 can be one or multiple current mirror structures and current adjustment structures with the same circuit topology. The reference current provided by the current source in each first current adjustment unit 201 increases in a stepwise manner, and the reference current provided by the current source in each second current adjustment unit 202 also increases in a stepwise manner.

[0075] The circuit topology of the first current mirror unit 101 and the first current adjustment unit 201 is as follows: Figure 2 As shown, the circuit topology of the second current mirror unit 102 and the second current adjustment unit 202 is as follows: Figure 6 As shown, I will not go into details here.

[0076] Optionally, in another embodiment of this application, such as Figure 12 As shown, there are multiple first current mirror units 101 and multiple first current adjustment units 201, and the circuit topologies of the multiple first current mirror units 101 and the multiple first current adjustment units 201 are the same. Furthermore, there are multiple second current mirror units 102 and multiple second current adjustment units 202, and the circuit topologies of the multiple second current mirror units 102 and the multiple second current adjustment units 202 are the same.

[0077] In this system, the first reference current provided by the first current source in each first current mirror unit 101 is of different magnitude and increases sequentially. The channel width-to-length ratio (W / L) of M5 and M6 in each first current adjustment unit 201 can be the same or different. Thus, multiple first current mirror units 101 and corresponding multiple first current adjustment units 201 can make the transconductance Gm of the error amplifier EA follow the increase of the input error, i.e., the voltage difference between V1 and V2, in a step-like manner. Specifically, as shown... Figure 13As shown. Similarly, the second reference currents provided by the second current sources in each second current mirror unit 102 are of different magnitudes and increase sequentially. The channel width-to-length ratio (W / L) of M11:M12 in each second current adjustment unit 202 can be the same or different. Thus, multiple second current mirror units 102 and corresponding multiple second current adjustment units 202 can make the transconductance Gm of the error amplifier EA follow the increase of the input error, i.e., the voltage difference between V1 and V2, in a step-like manner, specifically as follows... Figure 13 As shown.

[0078] In summary, according to the transconductance adjustment circuit of the error amplifier provided in this application embodiment, the current detection module 10 detects the output current Iout of the error amplifier to obtain a current detection signal. In this way, the feedback adjustment module 20 can generate a current adjustment signal based on the current detection signal and adjust the output current of the error amplifier based on the current adjustment signal, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, the system loop stability is easily compensated without changing the steady state, while the adjustment speed of the system loop is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is improved, and the reliable and stable operation of the system is ensured.

[0079] In some embodiments of this application, such as Figure 14 As shown, an error amplification device 100 is also provided, including a transconductance adjustment circuit 200 of the error amplifier described in the above embodiments.

[0080] According to the error amplification device 100 provided in the embodiments of this application, based on the transconductance adjustment circuit 200 described in the above embodiments, feedback adjustment is performed by detecting the output current of the error amplifier, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, while the stability of the system loop is easily compensated without changing the steady state, the adjustment speed of the system loop is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is increased, and the reliable and stable operation of the system is ensured.

[0081] In some embodiments of this application, a converter is also provided, including the transconductance adjustment circuit of the error amplifier described in the above embodiments. Alternatively, in other embodiments of this application, a converter is also provided, including the error amplification device described in the above embodiments.

[0082] The converter can be either a DC-DC converter or an AC-DC converter.

[0083] According to the converter provided in the embodiments of this application, based on the transconductance adjustment circuit of the error amplifier described in the above embodiments or the error amplification device described in the above embodiments, feedback adjustment can be performed by detecting the output current of the error amplifier, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier. This achieves the goal of keeping the transconductance Gm constant when the input error of the error amplifier is small, and adjusting the transconductance Gm to increase when the input error of the error amplifier is large. Thus, while the system loop stability is easily compensated without changing the steady state, the system loop adjustment speed is improved when the input voltage error is large, the adjustment sensitivity of the error amplifier is increased, and the reliable and stable operation of the system is ensured.

[0084] In the description of this specification, the terms "one embodiment," "some embodiments," "embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0085] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make modifications, alterations, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A transconductance adjustment circuit for an error amplifier, characterized in that, include: A current detection module is configured to detect the output current of the error amplifier to obtain a current detection signal; The feedback adjustment module is configured to generate a current adjustment signal based on the current detection signal, and adjust the output current of the error amplifier based on the current adjustment signal, so that the transconductance of the error amplifier changes in a stepwise positive correlation with the absolute value of the input voltage difference of the error amplifier.

2. The transconductance adjustment circuit of the error amplifier according to claim 1, characterized in that, The current detection module includes at least one current mirroring unit, which is configured to mirror and sample the output current of the error amplifier to provide the current detection signal to the feedback adjustment module.

3. The transconductance adjustment circuit of the error amplifier according to claim 2, characterized in that, The feedback adjustment module includes a current adjustment unit corresponding to each of the current mirror units. The current adjustment unit is configured to determine the relationship between the output current of the error amplifier and a preset reference current based on the current detection signal, and to generate the current adjustment signal based on the relationship between the output current of the error amplifier and the preset reference current.

4. The transconductance adjustment circuit of the error amplifier according to claim 3, characterized in that, In the case where at least one of the current mirror units includes a first current mirror unit, and the feedback regulation module includes a first current regulation unit corresponding to the first current mirror unit. The first current mirroring unit is configured to mirror and sample the sink current at the output terminal of the error amplifier when the output of the error amplifier is low, so as to provide a first current detection signal to the first current adjustment unit. The first current adjustment unit is configured to generate a first current adjustment signal when it is determined from the first current detection signal that the output sink current is greater than the first reference current. The first current adjustment signal is applied to the output of the error amplifier to increase the transconductance of the error amplifier by one step.

5. The transconductance adjustment circuit of the error amplifier according to claim 4, characterized in that, There are multiple first current mirror units and multiple first current regulation units, and the circuit topologies of the multiple first current mirror units and the multiple first current regulation units are the same. Each of the first current regulation units generates a corresponding reference current, and the multiple reference currents generated by the multiple first current regulation units increase in a stepwise manner.

6. The transconductance adjustment circuit of the error amplifier according to claim 3, characterized in that, In the case where at least one of the current mirror units includes a second current mirror unit, and the feedback regulation module includes a second current regulation unit corresponding to the second current mirror unit. The second current mirroring unit is configured to mirror and sample the source current at the output terminal of the error amplifier when the error amplifier outputs a high level, so as to provide a second current detection signal to the second current adjustment unit; The second current adjustment unit is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the output source current is greater than the second reference current. The second current adjustment signal is applied to the output of the error amplifier to raise the transconductance of the error amplifier by another step.

7. The transconductance adjustment circuit of the error amplifier according to claim 6, characterized in that, There are multiple second current mirror units and multiple second current regulation units, and the circuit topologies of the multiple second current mirror units and the multiple second current regulation units are the same. Each of the second current regulation units generates a corresponding reference current, and the multiple reference currents generated by the multiple second current regulation units increase in a stepwise manner.

8. The transconductance adjustment circuit of the error amplifier according to claim 3, characterized in that, In the case where at least one of the current mirror units includes a first current mirror unit and a second current mirror unit, and the feedback adjustment module includes a first current adjustment unit and a second current adjustment unit corresponding to the first current mirror unit and the second current mirror unit, respectively. The first current mirroring unit is configured to mirror and sample the sink current at the output terminal of the error amplifier when the output of the error amplifier is low, so as to provide a first current detection signal to the first current adjustment unit. The first current adjustment unit is configured to generate a first current adjustment signal when it is determined from the first current detection signal that the sink current at the output terminal is greater than a first reference current. The first current adjustment signal is applied to the output terminal of the error amplifier so as to raise the transconductance of the error amplifier by one step. The second current mirroring unit is configured to mirror and sample the source current at the output terminal of the error amplifier when the output of the error amplifier is high, so as to provide a second current detection signal to the second current adjustment unit. The second current adjustment unit is configured to generate a second current adjustment signal when it is determined from the second current detection signal that the source current at the output terminal is greater than a second reference current. The second current adjustment signal is applied to the output terminal of the error amplifier so as to raise the transconductance of the error amplifier by another step.

9. The transconductance adjustment circuit of the error amplifier according to claim 8, characterized in that, There are multiple first current mirror units and multiple first current adjustment units, and at least one second current mirror unit and multiple second current adjustment unit. The circuit topologies of the multiple first current mirror units are the same, the circuit topologies of the multiple first current adjustment units are the same, each first current adjustment unit generates a corresponding reference current, and the multiple reference currents generated by the multiple first current adjustment units increase in a stepwise manner.

10. The transconductance adjustment circuit of the error amplifier according to claim 8, characterized in that, There are at least one first current mirror unit and at least one first current regulating unit, and there are multiple second current mirror units and multiple second current regulating units. The multiple second current mirror units have the same circuit topology, the multiple second current regulating units have the same circuit topology, each second current regulating unit generates a corresponding reference current, and the multiple reference currents generated by the multiple second current regulating units increase in a stepwise manner.

11. The transconductance adjustment circuit of the error amplifier according to any one of claims 4, 5, 8-10, characterized in that, The first current mirror unit includes: The first MOS transistor is of the same type as the upper transistor of the output stage of the error amplifier, and the control terminal of the first MOS transistor is connected to the control terminal of the upper transistor of the output stage. After the first terminal of the first MOS transistor is connected to the first terminal of the upper transistor of the output stage, it is connected to a preset power supply. The second MOS transistor is of the same type as the lower output stage transistor of the error amplifier, and the control terminal of the second MOS transistor is connected to the control terminal of the lower output stage transistor. The first terminal of the second MOS transistor is connected to the first terminal of the lower output stage transistor and then grounded. The second terminal of the second MOS transistor is connected to the second terminal of the first MOS transistor and has a first node. The third MOS transistor has its control terminal connected to the first node, its first terminal connected to the preset power supply, and its second terminal connected to the control terminal. The fourth MOS transistor has its control terminal connected to the control terminal of the third MOS transistor. The first terminal of the fourth MOS transistor is connected to the preset power supply, and the second terminal of the fourth MOS transistor serves as the output terminal of the first current mirror unit.

12. The transconductance adjustment circuit of the error amplifier according to claim 11, characterized in that, The first current regulating unit includes: A first current source, the positive terminal of which is connected to the second terminal of the fourth MOS transistor, and the negative terminal of which is grounded, the first current source being adapted to provide the first reference current; The fifth MOS transistor has its control terminal connected to its second terminal and also connected to the second terminal of the fourth MOS transistor. The first terminal of the fifth MOS transistor is grounded. The sixth MOS transistor has its control terminal connected to the control terminal of the fifth MOS transistor, its first terminal grounded, and its second terminal connected to the output terminal of the error amplifier.

13. The transconductance adjustment circuit of the error amplifier according to any one of claims 6, 7, 8-10, characterized in that, The second current mirror unit includes: The seventh MOS transistor is of the same type as the lower output stage transistor of the error amplifier, and the control terminal of the seventh MOS transistor is connected to the control terminal of the lower output stage transistor. The first terminal of the seventh MOS transistor is connected to the first terminal of the lower output stage transistor and then grounded. The eighth MOS transistor is of the same type as the upper output stage transistor of the error amplifier, and the control terminal of the eighth MOS transistor is connected to the control terminal of the upper output stage transistor. The first terminal of the eighth MOS transistor is connected to the first terminal of the upper output stage transistor and then connected to a preset power supply. The second terminal of the eighth MOS transistor is connected to the second terminal of the seventh MOS transistor and has a second node. The ninth MOS transistor has its control terminal connected to the second node, its first terminal grounded, and its second terminal connected to its control terminal. The tenth MOS transistor has its control terminal connected to the control terminal of the ninth MOS transistor. The first terminal of the tenth MOS transistor is grounded, and the second terminal of the tenth MOS transistor serves as the output terminal of the second current mirror unit.

14. The transconductance adjustment circuit of the error amplifier according to claim 13, characterized in that, The second current regulating unit includes: The second current source has its positive terminal connected to the preset power supply and its negative terminal connected to the second terminal of the tenth MOS transistor. The second current source is adapted to provide the second reference current. The eleventh MOSFET has its control terminal connected to its second terminal and also connected to the second terminal of the tenth MOSFET. The first terminal of the eleventh MOSFET is connected to the preset power supply. The twelfth MOS transistor has its control terminal connected to the control terminal of the eleventh MOS transistor. The first terminal of the twelfth MOS transistor is connected to the preset power supply, and the second terminal of the twelfth MOS transistor is connected to the output terminal of the error amplifier.

15. An error amplification device, characterized in that, The transconductance adjustment circuit includes the error amplifier according to any one of claims 1-14.

16. A converter, characterized in that, include: The transconductance adjustment circuit of the error amplifier according to any one of claims 1-14; or The error amplification device according to claim 15.

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