Method for determining inductance current peak, control circuit and boost circuit system

Abstract

The application provides a method for determining an inductor current peak value, a control circuit and boost circuit system, and relates to the technical field of switching power supply. The method is applied to a control circuit in a boost circuit system based on a peak current mode control. The method comprises the following steps: determining a valley signal waiting delay time of a previous switching period of a power switch tube; compensating a compensation charge amount corresponding to the valley signal waiting delay time to a current switching period of the power switch tube; and determining a compensated inductor current peak value according to a corresponding relationship between the charge amount after compensation of the current switching period and the inductor current peak value. In this way, more charge amount can be obtained from a power grid in the current switching period, so as to compensate for the average current lacking due to the extension of the switching period, and the average current of the system in the whole power frequency period is consistent with the theoretical value, thereby achieving the purpose of reducing THD.

Description

Technical Field

[0001] This application relates to the field of switching power supply technology, and in particular to a method for determining the peak value of inductor current, a control circuit, and a boost circuit system. Background Technology

[0002] With the rapid development of power electronics technology, switching power supplies are widely used in various electrical equipment such as industrial control, communication equipment, consumer electronics, and light-emitting diode (LED) drivers, and their impact on the power grid is becoming increasingly significant. Traditional diode uncontrolled rectifier circuits suffer from low power factor (PF) and high total harmonic distortion (THD) due to the pulsed input current. This not only wastes electrical energy but also causes harmonic pollution to the power grid and interferes with the normal operation of other electrical equipment.

[0003] To address the aforementioned issues, Power Factor Correction (PFC) technology has emerged. Among these, the boost topology has become the mainstream topology choice for medium- and high-power PFC circuits due to its advantages such as simple structure, strong boost capability, continuous input current, and ease of achieving high power factors. Currently, the control modes of Boost PFC mainly include average current-mode control and peak current-mode control. Peak current-mode control (PCM) adopts a dual closed-loop control architecture, with an outer voltage loop and an inner current loop. It has advantages such as fast response speed, strong cycle-by-cycle overcurrent protection capability, and excellent dynamic suppression performance against input voltage disturbances and load step changes, and is widely used in medium- and high-frequency Boost PFC circuits.

[0004] Peak current mode control (PFC) technology based on quasi-resonant conduction can effectively improve the power factor (PF) of switching power supplies, achieving a better power factor correction effect. Furthermore, due to the introduction of quasi-resonant conduction technology, the switching losses of the power switch are reduced, giving this quasi-resonant conduction PFC technology advantages such as high conversion efficiency and excellent electromagnetic compatibility. However, it requires waiting for the resonant valley of the drain-source voltage of the power switch to be reached after the switching cycle timing condition is met before the power switch can be turned on, thus necessitating a forced extension of the switching cycle. But extending the switching cycle leads to a decrease in the average current within that switching cycle, ultimately resulting in a higher THD (Total Power Displacement) over the entire power frequency cycle. Summary of the Invention

[0005] This application provides a method for determining the peak inductor current, a control circuit, and a boost circuit system to solve the problem in related technologies of Boost PFC based on quasi-resonant conduction peak current mode control that the average current within the switching cycle decreases due to the extension of the switching cycle, ultimately resulting in a high THD of the input AC current throughout the power frequency cycle.

[0006] In a first aspect, this application provides a method for determining the peak value of inductor current, applied to a control circuit in a boost circuit system based on peak current mode control. The control circuit is electrically connected to the boost circuit in the boost circuit system. The control circuit controls the boost inductor in the boost circuit to perform energy conversion by controlling the on / off state of the power switching transistor in the boost circuit. The energy conversion includes magnetization or demagnetization. The method for determining the peak value of inductor current includes: Determine the valley signal waiting delay time of the previous switching cycle of the power switch; The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch, and the peak value of the inductor current is determined according to the correspondence between the compensation charge and the peak value of the inductor current in the current switching cycle.

[0007] In an optional design, the step of compensating the amount of charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch, and determining the peak value of the compensated inductor current based on the correspondence between the compensated charge amount and the peak value of the inductor current in the current switching cycle, includes: Obtain the absolute value of the AC voltage input to the boost circuit and the DC voltage value output; The inductor current discontinuity time of the current switching cycle is determined based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value of the current switching cycle, and the theoretical average current value of the current switching cycle. The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensation charge and the inductor current peak value of the current switching cycle, the compensation inductor current peak value is determined.

[0008] In an optional design, the step of compensating the amount of charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch, and determining the peak value of the compensated inductor current based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensated amount of charge and the peak value of the inductor current in the current switching cycle, includes: The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensation charge and the peak inductor current of the current switching cycle, the peak inductor current after compensation is determined using the following formula: ; Among them, I´ peak(n) I represents the peak value of the inductor current after compensation. avg_ref V represents the theoretical average current value of the current switching cycle, L represents the inductance value of the boost inductor in the boost circuit, and V represents the voltage across the boost circuit. ac V represents the absolute value of the AC voltage. out The DC voltage value, ΔT sw(n-1) T represents the valley signal waiting delay time of the previous switching cycle. dly(n) This indicates the discontinuity time of the inductor current during the current switching cycle; The compensation charge corresponding to the valley signal waiting delay time is I. avg_ref With the ΔT sw(n-1) The product of.

[0009] In one alternative design, the discontinuity time of the inductor current in the current switching cycle remains unchanged before and after compensation for the peak inductor current of the current switching cycle.

[0010] In one optional design, determining the inductor current discontinuity time for the current switching cycle based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value for the current switching cycle, and the theoretical average current value for the current switching cycle includes: Based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value of the current switching cycle, and the theoretical average current value of the current switching cycle, the inductor current discontinuity time of the current switching cycle is determined using the following formula: ; Among them, T dly(n) T represents the discontinuity time of the inductor current in the current switching cycle. sw(n) I represents the switching cycle setting value of the current switching cycle. avg_ref V represents the theoretical average current value of the current switching cycle, L represents the inductance value of the boost inductor in the boost circuit, and V represents the voltage across the boost circuit. ac V represents the absolute value of the AC voltage. out This indicates the DC voltage value.

[0011] In one alternative design, determining the valley signal wait delay time of the previous switching cycle of the power switch includes: The valley signal waiting delay time of the previous switching cycle is obtained by timing from the end of the previous switching cycle to the start of the current switching cycle of the power switch transistor using a timer. or, The actual switching cycle and the compensated theoretical switching cycle setting value of the power switch in the previous switching cycle are obtained, and the time difference between the actual switching cycle and the compensated theoretical switching cycle setting value is determined. The time difference is determined as the valley signal waiting delay time of the previous switching cycle.

[0012] In an optional design, after determining the compensated peak inductor current based on the correspondence between the compensated charge amount and the peak inductor current according to the current switching cycle, the method for determining the peak inductor current further includes: Based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle, the theoretical switching cycle setting value of the current switching cycle is updated to obtain the compensated theoretical switching cycle setting value.

[0013] In an optional design, updating the theoretical switching cycle setting value for the current switching cycle based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle to obtain the compensated theoretical switching cycle setting value includes: Based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle, the theoretical switching cycle setting value of the current switching cycle is updated using the following formula to obtain the compensated theoretical switching cycle setting value: ; Among them, T´ sw(n) I' represents the compensated theoretical switching cycle setting value. peak(n) V represents the peak value of the inductor current after compensation, L represents the inductance value of the boost inductor in the boost circuit, and V represents the peak value of the inductor current after compensation. ac V represents the absolute value of the AC voltage. out T represents the DC voltage value. dly(n) This indicates the discontinuity time of the inductor current during the current switching cycle.

[0014] Secondly, this application provides a control circuit applied to a boost circuit system based on peak current mode control. The control circuit is used to be electrically connected to the boost circuit in the boost circuit system. The control circuit is used to control the boost inductor in the boost circuit to perform energy conversion by controlling the conduction or cutoff of the power switching transistor in the boost circuit. The energy conversion includes magnetization or demagnetization. The control circuit is also used to perform the method for determining the peak value of the inductor current as described in any of the first aspects above.

[0015] Thirdly, this application provides a boost circuit system based on peak current mode control, including a boost circuit and a control circuit as described in the second aspect above, wherein the boost circuit is electrically connected to the control circuit.

[0016] The method, control circuit, and boost circuit system for determining the peak inductor current provided in this application determine the valley signal waiting delay time of the previous switching cycle of the power switch and compensate the power switch with the compensation charge corresponding to the valley signal waiting delay time in the current switching cycle. Based on the correspondence between the compensated charge and the peak inductor current in the current switching cycle, the peak inductor current is determined. This can be achieved without changing the architecture of the boost circuit system based on peak current mode control and without adding hardware resources. The compensation charge corresponding to the valley signal waiting delay time of the previous switching cycle is compensated to the current switching cycle on a cycle-by-cycle basis, thereby increasing the peak inductor current in the current switching cycle. This encourages the system to obtain more charge from the power grid in the current switching cycle, thereby compensating for the average current lost due to the extension of the switching cycle. This makes the average current of the system consistent with the theoretical value throughout the entire power frequency cycle, thus achieving the goal of reducing THD. Attached Figure Description

[0017] Figure 1 A schematic diagram of a Boost circuit system based on peak current mode control is provided for an embodiment of this application; Figure 2 This is a waveform diagram showing the current state of the boost inductor and the voltage state of the power switch in the Boost circuit under both DCM and CRM operating modes in the embodiments of this application. Figure 3 A schematic diagram illustrating the principle of the method for determining the peak inductor current provided in the embodiments of this application; Figure 4 This is a schematic diagram illustrating the principle that, due to the extension of the switching cycle, the amount of charge needs to be compensated to maintain the average current required by the boost inductor in the embodiments of this application. Figure 5 This is one of the flowcharts illustrating the method for determining the peak inductor current provided in an embodiment of this application; Figure 6 A second schematic flowchart illustrating the method for determining the peak inductor current provided in this application embodiment; Figure 7 This diagram illustrates the effect of charge compensation on the average inductor current before and after using the inductor current peak determination method provided in the embodiments of this application. Detailed Implementation

[0018] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c alone can mean: a alone, b alone, c alone, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c. a, b, and c can be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0019] The terms “center,” “longitudinal,” “lateral,” “up,” “down,” “left,” “right,” “front,” and “rear,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0020] The terms "connected" and "connected" should be interpreted broadly. For example, in circuit structures, "connected" or "connected" can refer not only to physical connections but also to electrical or signal connections. This could be a direct connection (physical connection) or an indirect connection via at least one intermediate component, as long as the circuit is connected. It could also refer to the internal connection between two components. Similarly, a signal connection can refer to a connection via a circuit or a medium, such as radio waves. Those skilled in the art will understand the specific meaning of these terms in this application based on the specific circumstances.

[0021] To address the issues of low power factor (PF) and high total harmonic distortion (THD) in diode-controlled uncontrolled rectifier circuits due to the pulsed input current, power factor correction (PFC) technology was developed. PFC technology addresses problems such as current waveform distortion and voltage / current phase shift caused by nonlinear loads, inductive or capacitive loads in power systems. It employs circuit topology, control strategies, or reactive power compensation devices to actively correct the input current waveform, bringing the AC current waveform closer to a standard sine wave and ensuring the current phase is essentially consistent with the grid voltage phase. This increases the actual active power ratio of electrical equipment, raises the power factor, suppresses harmonic current generation, reduces reactive power losses, and ultimately reduces additional losses and electromagnetic pollution in power grid lines and substations, optimizing power quality and improving energy utilization efficiency.

[0022] Among them, the boost topology has become the mainstream topology choice for medium and high power PFC circuits due to its advantages such as simple structure, strong boost capability, continuous input current, and ease of achieving high power factor. Currently, the control modes of Boost PFC mainly include average current-mode control and peak current-mode control. Among them, peak current-mode control (PCM) adopts a dual closed-loop control architecture, with an outer voltage loop and an inner current loop. It has advantages such as fast response speed, strong cycle-by-cycle overcurrent protection capability, and excellent dynamic suppression performance against input voltage disturbances and load step changes, and is widely used in medium and high frequency Boost PFC circuits.

[0023] Quasi-resonant (QR) technology is a soft-switching technology in power electronics. It utilizes the boost inductor and parasitic capacitance in a Boost circuit to form a resonant circuit, achieving local LC resonance only during the brief transition phase of the power switch's turn-on or turn-off. This allows the power switch to conduct in a zero-voltage switching (ZVS) state, reducing the voltage and current during turn-on and turn-off, thus significantly reducing switching losses and improving circuit efficiency, especially under medium- and high-frequency operating conditions where its energy-saving advantages are more pronounced. Currently, the combination of quasi-resonant (QR) technology and Boost PFC has become an industry trend. For example, combining quasi-resonant conduction with peak current mode control attempts to balance high power factor, low harmonic distortion, and high efficiency, but many areas still require improvement.

[0024] The Boost PFC technology solution based on quasi-resonant conduction peak current mode control comprises two main modules: a main circuit and a control circuit. The control circuit utilizes peak current mode dual closed-loop control, integrating quasi-resonant conduction detection and control units to achieve precise control, efficient drive, and comprehensive protection of the main circuit. The overall architecture can adopt a modular design, resulting in a simple structure that is easy to integrate and can be widely applied in medium to large power switching power supplies. The main circuit can employ a Boost topology, its core function being to convert the mains frequency AC input into a stable high-voltage DC output while simultaneously sinusoidalizing the input current to improve the power factor.

[0025] Specifically, Figure 1 An exemplary schematic diagram of a Boost circuit system based on peak current mode control provided in an embodiment of this application is shown, with reference to... Figure 1 As shown, the Boost circuit system based on peak current mode control includes a Boost circuit 110 and a control circuit 120 electrically connected to the Boost circuit 110. The Boost circuit 110 can convert the power frequency AC input into a stable high-voltage DC output, while simultaneously achieving sinusoidal input current. The control circuit 120 can control the boost inductor BL in the Boost circuit 110 to perform energy conversion by controlling the on or off state of the power switch Q0 in the Boost circuit 110. This energy conversion may include magnetization or demagnetization.

[0026] like Figure 1 As shown, the Boost circuit 110 may include an input filter unit 111, a power frequency rectifier bridge 112, a boost inductor BL, a power switch Q0, a freewheeling diode D0, and an output filter unit 113.

[0027] For example, the input filtering unit 111 may include a common-mode inductor, a differential-mode inductor, and a filter capacitor. The input filtering unit 111 can be used to suppress electromagnetic interference (EMI) in the power grid, while filtering out high-frequency harmonics in the pulsating DC voltage after rectification, making the input voltage more stable and avoiding interference with the accuracy of peak current sampling and quasi-resonant detection. The common-mode inductor can be made of a high-permeability magnetic core, the differential-mode inductor's inductance value can be designed according to the input current specifications, and the filter capacitor can be an X capacitor or a Y capacitor to meet electromagnetic compatibility (EMC) standards.

[0028] For example, the power frequency rectifier bridge 112 can be composed of four diodes forming a full-wave rectifier bridge, used to receive external power frequency AC input and convert the AC voltage into DC voltage, providing an input source for the subsequent boost circuit 110's voltage conversion. The diodes in the rectifier bridge can be selected as devices with low forward voltage drop and fast recovery characteristics, which can reduce rectification losses and improve circuit efficiency.

[0029] For example, the boost inductor BL, as the core energy storage component of the Boost circuit 110, is connected in series between the output of the power frequency rectifier bridge 112 and the drain of the power switch Q0, undertaking the dual functions of energy storage and current shaping. The boost inductor BL can be made of a magnetic core with high saturation magnetic density and low loss (such as a ferrite core). The inductance value of the boost inductor BL can be designed according to the input voltage range, output power, and the switching frequency of the power switch Q0, balancing energy storage capacity and current ripple suppression. The switching frequency of the power switch Q0 refers to the number of times the power switch Q0 completes a full turn-on and turn-off cycle per unit time. For example, the leakage inductance can be reduced by optimizing the winding process of the boost inductor BL, avoiding voltage spikes in the switch caused by leakage inductance, and providing favorable conditions for quasi-resonant conduction.

[0030] For example, the power switch Q0 can be a super-junction metal-oxide-semiconductor field-effect transistor (SJ-MOSFET) or a silicon carbide (SiC) semiconductor field-effect transistor, which features low on-resistance, high switching speed, and low parasitic capacitance, effectively reducing conduction and switching losses. Figure 1 As shown, the source of the power switch Q0 can be used to connect the sampling resistor R5 in series, so that the control circuit 120 can collect the peak current signal.

[0031] For example, the freewheeling diode D0 can be a fast recovery diode or a Schottky diode. The freewheeling diode D0 provides a freewheeling path for the boost inductor BL when the power switch Q0 is turned off, releasing the energy stored in the boost inductor BL. Specifically, the freewheeling diode D0 needs to have low forward voltage drop and fast recovery time to reduce freewheeling losses and avoid reverse current surges caused by excessively long recovery times, thereby protecting the power switch Q0.

[0032] For example, the output filter unit 113 may include an output capacitor Cout, which may be a large-capacity electrolytic capacitor. The output filter unit 113 can be used to filter out high-frequency ripple in the DC voltage after the boost circuit 110 has converted the voltage, outputting a stable DC voltage and ensuring that the output voltage ripple meets the load requirements.

[0033] like Figure 1 As shown, the control circuit 120 is used to implement peak current mode PFC based on quasi-resonant conduction. Its control loop is based on dual closed-loop control and integrates quasi-resonant conduction detection function to achieve precise control of the input current. The control circuit 120 may include an input voltage sampling unit 121, an output voltage sampling unit 122, a peak current sampling unit 123, a zero-crossing detection unit 124, a dual closed-loop control unit 125, and a drive unit 126.

[0034] The input voltage sampling unit 121 can be used to sample the input AC voltage, convert the high voltage signal of the input AC voltage into a low voltage signal through the first voltage divider resistor R1 and the second voltage divider resistor R2, and obtain the phase of the input AC voltage through the low voltage signal.

[0035] The output voltage sampling unit 122 can be used to sample the output DC voltage. The high voltage signal of the output DC voltage is converted into a low voltage signal through the third voltage divider resistor R3 and the fourth voltage divider resistor R4. The low voltage signal is then introduced as a feedback quantity into the voltage loop control unit A1 of the dual closed-loop control unit 125 to realize closed-loop feedback control.

[0036] The peak current sampling unit 123 can be used to acquire the peak current signal of the boost inductor BL in real time, providing feedback to the current loop control unit A2 in the dual closed-loop control unit 125. Its sampling method can employ a series sampling resistor, with the sampling resistor R5 connected in series between the source of the power switch Q0 and ground GND. The current signal of the boost inductor BL is obtained by detecting the voltage across the sampling resistor R5. The sampling resistor R5 can be a precision resistor with a low temperature coefficient and high accuracy, thus reducing the impact of temperature drift on sampling accuracy. Simultaneously, an RC filter circuit can be used to filter out high-frequency noise in the sampled signal, ensuring the accuracy of the sampled signal.

[0037] The core function of the zero-crossing detection unit 124 (also known as the quasi-resonant conduction detection unit) is to detect the demagnetization state of the boost inductor BL and the drain voltage waveform of the power switch Q0, accurately determine the quasi-resonant conduction timing, and realize zero voltage switching (ZVS) of the power switch Q0.

[0038] The zero-crossing detection unit 124 monitors the change in current of the boost inductor BL in real time. When the current of the boost inductor BL drops to zero, it determines that the inductor demagnetization is over, and at this time the drain voltage of the power switch Q0 begins to resonate. When the current of the boost inductor BL rises to cross zero, the drain voltage of the power switch Q0 drops to the bottom (resonance valley). The zero-crossing detection unit 124 generates a quasi-resonant conduction trigger signal to control the power switch Q0 to conduct, achieving near-zero voltage conduction, thereby minimizing the switching losses of the power switch Q0.

[0039] The dual closed-loop control unit 125 may include a voltage loop control unit A1 and a current loop control unit A2. The voltage loop control unit A1 is used to stabilize the output voltage. It compares the acquired output voltage signal with a preset reference voltage Vref and generates a peak current reference signal via a proportional-integral (PI) regulator, which is then input to the current loop control unit A2. The parameters of the PI regulator in the voltage loop control unit A1 are adaptively adjustable. Specifically, the adjustment coefficient can be dynamically optimized based on changes in the output load and input voltage, thereby improving the stability and dynamic response speed of the output voltage. The current loop control unit A2 is used to control the sinusoidal nature of the input current. It compares the inductor peak current signal acquired by the peak current sampling unit 123 with the reference signal generated by the voltage loop control unit A1. When the inductor peak current reaches the reference signal generated by the voltage loop control unit A1, a turn-off signal is generated to control the power switch Q0 to turn off. When the zero-crossing detection unit 124 generates a conduction trigger signal, the current loop control unit A2 generates a conduction signal to control the power switch Q0 to turn on, achieving cycle-by-cycle control of the peak current.

[0040] The drive unit 126 can receive the turn-on or turn-off signal output by the dual closed-loop control unit 125, amplify it into a drive signal that the power switch Q0 can recognize, and use the drive signal to drive the power switch Q0 to turn on and off.

[0041] according to Figure 1 The Boost circuit system shown is based on peak current mode control. In the steady-state operation of the quasi-resonant peak current mode PFC, the system's operating state will adaptively switch between discontinuous conduction mode (DCM) and critical conduction mode (CRM) as the input sinusoidal current in phase with the input AC voltage changes.

[0042] DCM refers to a working mode in which the current of the boost inductor BL in the Boost circuit drops to zero at the end of the power switch Q0's turn-off phase within a single switching cycle. For the remaining time, no current flows through the boost inductor BL, creating a zero-current resting region until the power switch turns on again in the next cycle, at which point the current is re-established. In this mode, the inductor energy of the boost inductor BL is completely released within a single cycle, with no remaining energy stored. DCM mode is primarily suitable for light-load, low-power operating conditions, such as DC-DC light-load standby and AC-DC zero-crossing low-power PFC scenarios. CRM refers to a working mode in which the current of the boost inductor BL in the Boost circuit drops to zero at the end of a single switching cycle, and the power switch immediately turns on in the next cycle. The current waveform of the boost inductor BL is continuous without interruption or reverse current flow, with no zero-current resting region. It operates at the critical boundary between continuous and intermittent conditions, and can also be called a boundary conduction mode. This operating mode often occurs in transitional conditions where load power is dynamically switched and AC-DC power frequency is gradually changed. It is the core intermediate state of multi-mode dynamic switching.

[0043] Figure 2 The diagram shows waveforms illustrating the current state of the boost inductor and the voltage state of the power switch in the Boost circuit under both DCM and CRM operating modes. Wherein, I... L This represents the current in the boost inductor BL in the Boost circuit, V. DS This represents the drain-source voltage of the power switch Q0, V. GS This represents the gate-source voltage of the power switch Q0.

[0044] Combination Figure 1 and Figure 2 When the sinusoidal current input to the system is at a large value (i.e., peak value), the power factor correction (PFC) will operate in critical conduction mode (CRM), and the quasi-resonant conduction detection unit (i.e., zero-crossing detection unit 124) will detect the demagnetization state of the boost inductor BL in real time. When the current I of the boost inductor BL... L When the voltage drops to zero, the boost inductor BL is considered to be in a demagnetized state, but at this time the drain-source voltage V of the power switch Q0 is still zero. DS It is still at its peak. After the boost inductor BL is demagnetized, the boost inductor BL and the parasitic capacitance of the power switch Q0 form a resonant circuit. The energy stored in the parasitic capacitance of the power switch Q0 will begin to resonate in the circuit, and the drain-source voltage V of the power switch Q0 will increase. DS The resonance effect begins to decrease. When the drain-source voltage V of power switch Q0... DS When the voltage drops to the bottom (i.e., the resonant valley point), the current I in the boost inductor BL... LThe voltage will be in a rising-to-zero state, satisfying the quasi-resonant conduction condition, generating a quasi-resonant conduction signal, and achieving near-zero voltage conduction. When the power switch Q0 is turned on, the input AC voltage will charge the boost inductor BL, and the current I of the boost inductor BL will... L As the voltage rises, the current I in the boost inductor BL increases. L After being converted into a sampling signal by the peak current sampling unit 123, it is compared with the reference signal output by the voltage loop control unit A1. When the sampling signal is greater than the reference signal, a turn-off signal is generated to control the power switch Q0 to turn off. After the power switch Q0 is turned off, the current I in the boost inductor BL... L It begins to descend, and then repeats the above process.

[0045] When the sinusoidal current input to the system is at a relatively small value (i.e., a valley value), the power factor correction (PFC) will operate in discontinuous conduction mode (DCM). When the required sinusoidal current input is small, the peak current of the boost inductor BL is often small. If the critical conduction mode is maintained, the switching frequency of the power switch Q0 will become extremely high. Therefore, after the boost inductor BL is demagnetized, a delay needs to be inserted to extend the resonant time after the power switch Q0 is turned off, thereby reducing the switching frequency of the power switch Q0 to keep it within a suitable range. Specifically, when the current of the boost inductor BL drops to zero, it is considered that the boost inductor BL is in a demagnetized state, but at this time the drain-source voltage V of the power switch Q0 is... DS It is still at its peak. After the boost inductor BL is demagnetized, the boost inductor BL and the parasitic capacitance of the power switch Q0 form a resonant circuit. The energy stored in the parasitic capacitance of the power switch Q0 will begin to resonate in the circuit, and the drain-source voltage V of the power switch Q0 will increase. DS As the resonance effect begins to decrease, an additional delay needs to be inserted to maintain the switching frequency of the power switch Q0 within a suitable range, even if the PFC is operating in DCM mode. This delay can be mitigated by the current in the boost inductor BL or the drain-source voltage V. DS The waveform observed is at least one complete resonant cycle. This occurs when the delay condition is met and the drain-source voltage V of the power switch Q0 is... DS When the voltage drops to the bottom (i.e., the resonant valley point), the current I in the boost inductor BL... L The voltage will be in a rising-to-zero state, satisfying the quasi-resonant conduction condition, generating a quasi-resonant conduction signal, and achieving near-zero voltage conduction. When the power switch Q0 is turned on, the input AC voltage will charge the boost inductor BL, and the current I of the boost inductor BL will... L The current I in the boost inductor BL rises, at which point... LThe peak current sampling unit 123 converts the signal into a sampling signal, which is then compared with the reference signal output by the voltage loop control unit A1. When the sampling signal is greater than the reference signal, a turn-off signal is generated, controlling the power switch Q0 to turn off. After the power switch Q0 is turned off, the current I in the boost inductor BL... L It begins to descend, and then repeats the above process.

[0046] according to Figure 1 and Figure 2 The description states that, in related technologies, Boost PFC technology based on quasi-resonant conduction peak current mode control can effectively improve the power factor (PF) of switching power supplies, achieving a better power factor correction effect. Furthermore, due to the introduction of quasi-resonant conduction technology, the switching losses of the power switch are reduced, giving this Boost PFC technology advantages such as high conversion efficiency and excellent electromagnetic compatibility. However, it requires waiting for the resonant valley of the drain-source voltage of the power switch to be reached after the switching cycle timing condition is met before the power switch can be turned on, thus necessitating a forced extension of the power switch's switching cycle. However, the peak inductor current calculated in the loop does not compensate for this extended time difference; that is, the amount of charge transferred within a single switching cycle remains constant, while the average current I of the boost inductor BL within a single switching cycle... avg The calculation formula can be expressed as the following formula (1): I avg =Q / T sw (1) Where Q represents the amount of charge transferred in a single switching cycle, and T sw Indicates the switching cycle.

[0047] According to formula (1), the extension of the switching cycle will lead to a decrease in the average current within the switching cycle, and the decrease in the average current will eventually lead to an increase in the THD of the system throughout the entire power frequency cycle.

[0048] Furthermore, with the switching frequency of the power switch remaining constant, the peak value of the inductor current calculated by the loop will also change as the average current varies with the phase of the input AC voltage, resulting in different demagnetization times for each switching cycle. Since the parameters of the resonant circuit where the resonance effect occurs remain unchanged after demagnetization, the resonant period of the drain-source voltage of the power switch can also be considered a fixed value. The timing of the power switch's switching cycle may end at any point during drain-source voltage resonance, leading to different additional delays within each switching cycle, thus causing the entire system to exhibit a power frequency-based cycle variation with the input AC voltage.

[0049] Based on this, the embodiments of this application, without changing the original control structure or adding hardware resources, that is, without changing... Figure 1Based on the architecture of the Boost circuit system with peak current mode control shown, a method for determining the peak inductor current is provided. This method can detect the switching cycle of the power switch Q0 in real time through a timer in the system, obtain the extra delay in the previous switching cycle, and compensate the current switching cycle with the corresponding compensation charge. This compensates for the peak inductor current of the boost inductor BL in the current switching cycle, promotes the amount of charge drawn from the grid in the current switching cycle, and effectively replenishes the charge missing due to the waiting delay. This, in turn, compensates for the missing average current, so that the average current of the system in the entire power frequency cycle is consistent with the theoretical value, thereby reducing the THD of the AC input current of the system.

[0050] Specifically, Figure 3 This diagram illustrates the principle of the method for determining the peak inductor current provided in an embodiment of this application. (Refer to...) Figure 3 As shown, taking PFC operating in discontinuous conduction mode (DCM) as an example, the dynamic process of inductor current in a single switching cycle can be divided into four stages, and each stage is represented by a time quantity, namely: inductor magnetization stage (T on ), Inductor demagnetization stage (T) off ), the discontinuous phase of inductor current (T) dly ) and the valley signal waiting delay phase (ΔT) sw The inductor magnetization phase, inductor demagnetization phase, and inductor current discontinuity phase are included within the theoretical switching frequency set by the system, i.e., the single switching cycle T set by the system. sw Includes the inductor magnetization stage (T on ), Inductor demagnetization stage (T) off ) and the discontinuous phase of inductor current (T dly When PFC operates in critical conduction mode (CRM), unlike DCM mode, the inductor current discontinuous phase (T) occurs. dly The duration of ) is 0.

[0051] Assuming that no compensation is performed for the inductor current peak during the (n-1)th switching cycle, i.e., the inductor current peak value I during the (n-1)th switching cycle... peak(n-1) This equals the theoretical peak inductor current I calculated by the dual closed-loop control unit 125 during the switching cycle without compensation. peak_ref Then, in the (n-1)th switching cycle, the timer switching cycle setting value T is... sw(n-1) After that, it is necessary to wait for the bottom signal for a delay time ΔT. sw(n-1) Only then can the drain-source voltage resonance valley signal of the power switch Q0 be received, thereby turning on the power switch Q0.

[0052] Figure 4This illustration shows a schematic diagram illustrating the principle that, due to the extended switching cycle, a certain amount of charge needs to be compensated to maintain the average current required by the boost inductor in an embodiment of this application. Figure 3 and Figure 4 Within a single switching cycle, during the set switching cycle T sw Within, the amount of charge transmitted is Q, but due to the valley signal waiting delay time ΔT sw Due to its existence, the actual switching cycle will be longer than the set switching cycle by ΔT. sw This will cause the average current during that switching cycle to decrease. To maintain the average current during that switching cycle, ΔT can be compensated. sw The amount of charge ΔQ corresponding to the time interval.

[0053] Combination Figure 4 Taking the current switching cycle as the nth switching cycle as an example, according to the charge calculation formula, the amount of charge missing in the (n-1)th switching cycle due to the extension of the switching cycle can be expressed as the following formula (2): (2) Where, ΔQ (n-1) This represents the amount of charge missing, or the amount of charge to be compensated; I avg_ref This represents the theoretical average current value required during the (n-1)th switching cycle, which is also the current value output by the voltage loop control unit A1; ΔT sw(n-1) This indicates the waiting time for the bottom signal.

[0054] Based on this, in the embodiments of this application, the amount of charge ΔQ missing in the (n-1)th switching cycle can be... (n-1) By appropriately increasing the peak inductor current I during the nth switching cycle peak(n) Compensation can be performed. In fact, the delay ΔT caused by waiting for the drain-source voltage resonance valley signal during the (n-1)th switching cycle can be compensated. sw(n-1) The processing is combined into the nth switching cycle to reduce the valley signal waiting delay time ΔT. sw(n-1) The corresponding compensation charge ΔQ (n-1) Compensation is applied up to the nth switching cycle, thereby increasing the peak inductor current I. peak(n) This ensures that the AC current input to the Boost circuit 110, after filtering, maintains the same average current as expected.

[0055] Based on this principle, the following is combined with Figures 5-7 The method for determining the peak inductor current provided in the embodiments of this application will be described in detail. This method for determining the peak inductor current can be applied to, for example... Figure 1 The control circuit 120 shown is part of a Boost circuit system based on peak current mode control.

[0056] Figure 5 This document illustrates one of the flowcharts for a method to determine the peak inductor current provided in an embodiment of this application. (Refer to...) Figure 5 As shown, the method for determining the peak value of the inductor current may include the following steps 510 to 520.

[0057] Step 510: Determine the valley signal waiting delay time of the previous switching cycle of the power switch.

[0058] In the current switching cycle, such as Figure 3 In the nth switching cycle, the control circuit 120 can first determine the position of the power switch Q0 in the previous switching cycle, such as... Figure 3 The valley signal waiting delay time ΔT in the (n-1)th switching cycle sw(n-1) .

[0059] Exemplary, in one embodiment, combined with Figure 1 In the current switching cycle, the control circuit 120 can use a timer to time the period from the end of the previous switching cycle to the start of the current switching cycle of the power switch Q0, thus obtaining the valley signal waiting delay time of the previous switching cycle. For example, combined with... Figure 3 The control circuit 120 can use a timer to time the duration between the end time A of the (n-1)th switching cycle and the start time B of the nth switching cycle, and obtain the valley signal waiting delay time ΔT of the (n-1)th switching cycle. sw(n-1) .

[0060] Alternatively, in another embodiment, the control circuit 120 can acquire the actual switching period and the compensated theoretical switching period setting value of the power switch Q0 in the previous switching cycle, determine the time difference between the actual switching period and the compensated theoretical switching period setting value, and then determine this time difference as the valley signal waiting delay time of the previous switching cycle. For example, combined with Figure 3 The control circuit 120 can obtain the actual switching period T of the power switch Q0 in the (n-1)th switching cycle through the timer. (n-1) and the compensated theoretical switching cycle setting value T sw(n-1) Then determine the actual switching period T. (n-1) Compared with the compensated theoretical switching cycle setting value T sw(n-1) The time difference T between (n-1) -T sw(n-1) This allows us to obtain the valley signal waiting delay time ΔT for the (n-1)th switching cycle. sw(n-1) .

[0061] Understandably, in Figure 3In this context, it is assumed that no compensation is performed for the inductor current peak during the (n-1)th switching cycle. Therefore, the compensated theoretical switching cycle setting is the system's theoretical switching cycle setting value T. sw(n-1) For the nth switching cycle, which is the previous switching cycle of the (n+1)th switching cycle, its compensated theoretical switching cycle setting value is T´. sw(n) In the (n+1)th switching cycle, the control circuit 120 can obtain the actual switching cycle T of the power switch Q0 in the nth switching cycle through the timer. (n) and the compensated theoretical switching cycle setting value T´ sw(n) Then determine the actual switching period T. (n) Compared with the compensated theoretical switching cycle setting value T´ sw(n) The time difference T between (n) -T´ sw(n) This allows us to obtain the valley signal waiting delay time ΔT for the nth switching cycle. sw(n) .

[0062] Step 520: Compensate the amount of charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch, and determine the peak value of the inductor current after compensation based on the correspondence between the amount of charge after compensation and the peak value of the inductor current in the current switching cycle.

[0063] Combination Figure 3 and Figure 4 Taking the current switching cycle as the nth switching cycle as an example, the control circuit 120 determines the valley signal waiting delay time ΔT for the (n-1)th switching cycle. sw(n-1) Then, the valley signal can be delayed for a time interval ΔT. sw(n-1) Introduced into the nth switching cycle, the valley signal is used to wait for a delay time ΔT. sw(n-1) The missing charge due to the extra delay in the (n-1)th switching cycle is compensated for in the nth switching cycle, based on the charge Q in the nth switching cycle after compensation. (n) The calculation formula, namely the corresponding relationship between the compensated charge and the peak value of the inductor current shown in the following formula (3), determines the peak value of the compensated inductor current: (3) Among them, I avg_ref T' represents the theoretical average current value required in the nth switching cycle. on(n) T' represents the compensated inductor magnetization time during the nth switching cycle. off(n) T represents the demagnetization time of the inductor after compensation during the nth switching cycle. dly(n) ΔT represents the duration of discontinuity of the inductor current during the nth switching cycle. sw(n-1) I' represents the valley signal waiting delay time in the (n-1)th switching cycle.peak(n) This represents the peak inductor current after compensation in the nth switching cycle.

[0064] For the compensated inductor magnetization time T´ on(n) ,according to Figure 1 The circuit structure shown can be represented by the following formula (4): (4) Among them, I´ peak(n) V represents the peak inductor current after compensation in the nth switching cycle, L represents the inductance value of the boost inductor BL in the Boost circuit 110, and V represents the peak inductor current after compensation in the nth switching cycle. ac This represents the absolute value of the AC voltage input to the Boost circuit 110.

[0065] For the compensated inductor demagnetization time T´ off(n) ,according to Figure 1 The circuit structure shown can be represented by the following formula (5): (5) Among them, I´ peak(n) V represents the peak inductor current after compensation in the nth switching cycle, L represents the inductance value of the boost inductor BL in the Boost circuit 110, and V represents the peak inductor current after compensation in the nth switching cycle. ac This represents the absolute value of the AC voltage input to the Boost circuit 110, V. out This indicates the DC voltage value output by the Boost circuit 110.

[0066] By combining the above formulas (2)-(5), the peak value of the compensated inductor current I´ can be determined. peak(n) .

[0067] The method for determining the peak inductor current provided in this application determines the valley signal waiting delay time of the previous switching cycle of the power switch, and compensates the amount of charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch. Based on the correspondence between the compensated charge and the peak inductor current in the current switching cycle, the peak inductor current is determined. This method can compensate the amount of charge corresponding to the valley signal waiting delay time of the previous switching cycle to the current switching cycle without changing the architecture of the boost circuit system based on peak current mode control or adding hardware resources. This increases the peak inductor current in the current switching cycle, prompting the system to obtain more charge from the grid in the current switching cycle. This compensates for the average current lost due to the extension of the switching cycle, making the average current of the system consistent with the theoretical value throughout the entire power frequency cycle, thereby achieving the goal of reducing THD.

[0068] based on Figure 5The method for determining the peak value of the inductor current in the corresponding embodiment, combined with the principle of the above formulas (2)-(5), in one embodiment, step 520 compensates the amount of compensation charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch tube, and determines the peak value of the compensated inductor current according to the correspondence between the amount of compensation charge after the current switching cycle and the peak value of the inductor current, which may include the following steps 521-523.

[0069] Step 521: Obtain the absolute value of the AC voltage input to the boost circuit and the DC voltage value output.

[0070] Control circuit 120 can obtain the absolute value V of the input AC voltage from Boost circuit 110. ac and the output DC voltage value V out Specifically, in combination Figure 1 The control circuit 120 can sample the output DC voltage value through the output voltage sampling unit 122, sample the AC voltage input to the Boost circuit 110 through the input voltage sampling unit 121, and determine the absolute value of the AC voltage.

[0071] Step 522: Based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value of the current switching cycle, and the theoretical average current value of the current switching cycle, determine the discontinuity time of the inductor current in the current switching cycle.

[0072] Combination Figure 1 and Figure 3 As shown, taking the current switching cycle as the nth switching cycle as an example, the switching cycle setting value for the current switching cycle can be the theoretical switching cycle setting value T´ after charge compensation. sw(n) , that is, T´ on(n) +T´ off(n) Alternatively, the current switching cycle setting value can be the theoretical switching cycle setting value T without charge compensation. sw(n) That is, T on(n) +T off(n) The switching cycle setting value for the current switching cycle can be obtained using a timer, or determined based on circuit parameters such as the structure of the Boost circuit 110 and the inductance value of the boost inductor BL. The theoretical average current value I for the current switching cycle... avg_ref It can be obtained from the voltage loop control unit A1.

[0073] Considering that increasing the peak inductor current will proportionally extend both the inductor magnetization and demagnetization times, keeping the current constant for each switching cycle could significantly affect the valley signal delay time in the nth switching cycle, leading to abrupt and discontinuous compensation in the (n+1)th switching cycle. This could result in adverse effects such as reduced noise and electromagnetic compatibility. Therefore, to maintain stable inductor current compensation between adjacent switching cycles, in one embodiment of this application, the discontinuity time of the inductor current before and after compensation in each switching cycle remains unchanged. That is, before and after compensating the peak inductor current of the current switching cycle, the discontinuity time of the inductor current in the current switching cycle remains constant.

[0074] Based on this, combined Figure 3 As shown, the compensated theoretical switching cycle setting value T´ sw(n) Compared to the theoretical switching cycle setting value T without compensation sw(n) There will be a time extension, the extension time ΔT on+off(n) It can be represented as ΔT on+off(n) =T´ on(n) +T´ off(n) -T on(n) -T off(n) .

[0075] Accordingly, in one embodiment, the control circuit 120 obtains the absolute value V of the AC voltage input to the Boost circuit 110. ac and the output DC voltage value V out Then, it can be based on the absolute value V of the AC voltage. ac DC voltage value V out The current switching cycle setting value T sw(n) And the theoretical average current value I of the current switching cycle avg_ref The discontinuity time of the inductor current in the current switching cycle is determined using the following formula (6): (6) Among them, T dly(n) This indicates the discontinuity time of the inductor current during the current switching cycle, and L represents the inductance value of the boost inductor BL in the Boost circuit 110.

[0076] Step 523: Compensate the amount of charge corresponding to the valley signal waiting delay time to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensated amount of charge and the peak value of the inductor current in the current switching cycle, determine the peak value of the compensated inductor current.

[0077] Specifically, by integrating the above formulas (2)-(5), we can obtain the equation shown in formula (7): (7) Formula (7) represents the peak inductor current I'. peak(n) The two-variable linear equation, considering the peak inductor current I´ peak(n) If the value is a positive real value, then the unique peak inductor current I´ can be obtained by solving. peak(n) From this, the peak inductor current I´ can be obtained. peak(n) The expression can characterize the relationship between the charge amount after compensation in the current switching cycle and the peak value of the inductor current.

[0078] Based on this, after determining the inductor current discontinuity time of the current switching cycle, the control circuit 120 can compensate the amount of charge corresponding to the valley signal waiting delay time of the previous switching cycle to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensated amount of charge and the peak value of the inductor current, the peak value of the compensated inductor current is determined using the following formula (8): (8) Among them, I´ peak(n) I represents the peak value of the inductor current after compensation. avg_ref V represents the theoretical average current value of the current switching cycle, L represents the inductance value of the boost inductor BL in the Boost circuit 110, and V represents the voltage across the circuit. ac V represents the absolute value of AC voltage. out Represents the DC voltage value, ΔT sw(n-1) T represents the valley signal waiting delay time of the previous switching cycle. dly(n) This indicates the duration of the inductor current discontinuity during the current switching cycle.

[0079] According to formula (8), it can be understood that the valley signal waiting delay time ΔT in the previous switching cycle is... sw(n-1) The corresponding compensation charge is the theoretical average current value I of the current switching cycle. avg_ref The waiting delay time ΔT between the valley signal and the previous switching cycle sw(n-1) The product of.

[0080] In this way, the control circuit 120 can determine the theoretical average current value I based on the current switching cycle. avg_ref The absolute value V of the AC voltage input to the Boost circuit 110 ac The DC voltage value V output by the Boost circuit 110 out The inductance value L of the boost inductor BL, and the valley signal waiting delay time ΔT of the previous switching cycle. sw(n-1) The peak inductor current I' after compensation within the current switching cycle is determined by the discontinuity of the inductor current during the current switching cycle. peak(n) The peak current of the inductor, I´peak(n) The peak inductor current is improved compared to before compensation, thus, based on the peak inductor current I´ after compensation peak(n) It can obtain more charge from the grid within a single switching cycle to compensate for the lack of charge caused by the extension of the switching cycle, thereby maintaining the average current within the switching cycle at the required value and thus achieving the goal of reducing THD.

[0081] according to Figure 3 The principle shown is to delay the waiting time ΔT for the valley signal of the resonant valley signal of the drain-source voltage of the power switch Q0 during the (n-1)th switching cycle. sw(n-1) Merging the processing into the nth switching cycle will cause the theoretical switching cycle of the nth switching cycle to be extended by ΔT compared to the theoretical switching cycle before compensation. on+off(n) In order to obtain an accurate theoretical switching cycle, after determining the peak value of the compensated inductor current based on the correspondence between the compensated charge and the peak value of the inductor current in the current switching cycle, the control circuit 120 can also update the theoretical switching cycle setting value of the current switching cycle based on the peak value of the compensated inductor current and the discontinuity time of the inductor current in the current switching cycle, so as to obtain the compensated theoretical switching cycle setting value.

[0082] Specifically, in combination Figure 1 and Figure 3 Taking the current switching cycle as the nth switching cycle as an example, the control circuit 120 can base its calculations on the compensated peak inductor current I´. peak(n) and the inductor current discontinuity time T of the current switching cycle dly(n) The theoretical switching cycle setting value for the current switching cycle is updated using the following formula (9) to obtain the compensated theoretical switching cycle setting value: (9) Among them, T´ sw(n) Indicates the compensated theoretical switching cycle setting value, I´ peak(n) V represents the peak value of the inductor current after compensation, L represents the inductance value of the boost inductor BL in the Boost circuit 110, and V represents the peak value of the inductor current after compensation. ac This represents the absolute value of the AC voltage input to the Boost circuit 110, V. out T represents the DC voltage value output by the Boost circuit 110. dly(n) This indicates the duration of the inductor current discontinuity during the current switching cycle.

[0083] In this way, an accurate switching cycle setting value can be obtained for each switching cycle, and this switching cycle setting value can be applied to the calculation of the compensation amount to obtain a more accurate inductor current peak value.

[0084] Based on the derivation process of the above formula (8), Figure 6 This is a second schematic flowchart illustrating the method for determining the peak inductor current provided in an embodiment of this application. (Refer to...) Figure 6 As shown, the method for determining the peak value of the inductor current may include the following steps 610 to 650.

[0085] Step 610: Obtain the absolute value V of the AC voltage. ac and DC voltage value V out .

[0086] Control circuit 120 can obtain the absolute value V of the input AC voltage from Boost circuit 110. ac and the output DC voltage value V out Specifically, in combination Figure 1 The control circuit 120 can sample the output DC voltage value through the output voltage sampling unit 122, sample the AC voltage input to the Boost circuit 110 through the input voltage sampling unit 121, and determine the absolute value of the AC voltage.

[0087] Step 620: Determine the valley signal waiting delay time ΔT of the previous switching cycle. sw(n-1) .

[0088] The control circuit 120 can update the switching cycle timing of a single switching cycle on a cycle-by-cycle basis to obtain the actual switching cycle of a single switching cycle. For the previous switching cycle, the difference between the actual switching cycle of the previous switching cycle and the compensated theoretical switching cycle setting value can be determined to obtain the valley signal waiting delay time of the previous switching cycle.

[0089] Specifically, in combination Figure 3 Taking the current switching cycle as the nth switching cycle and the previous switching cycle as the (n-1)th switching cycle as an example, in the nth switching cycle, the control circuit 120 can use a timer to time from the end time A of the (n-1)th switching cycle to the start time B of the nth switching cycle, and obtain the valley signal waiting delay time ΔT of the (n-1)th switching cycle. sw(n-1) Alternatively, the control circuit 120 can obtain the actual switching period T of the power switch Q0 in the (n-1)th switching cycle through a timer. (n-1) and the compensated theoretical switching cycle setting value T sw(n-1) Then determine the actual switching period T. (n-1) Compared with the compensated theoretical switching cycle setting value T sw(n-1) The time difference T between (n-1) -T sw(n-1) This allows us to obtain the valley signal waiting delay time ΔT for the (n-1)th switching cycle. sw(n-1) .

[0090] Understandably, in Figure 3 In this context, it is assumed that no compensation is performed for the inductor current peak during the (n-1)th switching cycle. Therefore, the compensated theoretical switching cycle setting is the system's theoretical switching cycle setting value T. sw(n-1) For the nth switching cycle, which is the previous switching cycle of the (n+1)th switching cycle, its compensated theoretical switching cycle setting value is T´. sw(n) In the (n+1)th switching cycle, the control circuit 120 can obtain the actual switching cycle T of the power switch Q0 in the nth switching cycle through the timer. (n) and the compensated theoretical switching cycle setting value T´ sw(n) Then determine the actual switching period T. (n) Compared with the compensated theoretical switching cycle setting value T´ sw(n) The time difference T between (n) -T´ sw(n) This allows us to obtain the valley signal waiting delay time ΔT for the nth switching cycle. sw(n) .

[0091] Step 630: Determine the inductor current discontinuity time T of the current switching cycle. dly(n) .

[0092] Specifically, the control circuit 120 can be based on the absolute value V of the AC voltage. ac DC voltage value V out The current switching cycle setting value T sw(n) And the theoretical average current value I of the current switching cycle avg_ref The inductor current discontinuity time T of the current switching cycle is determined using the above formula (6). dly(n) .

[0093] Step 640: Determine the peak inductor current I' after compensation during the current switching cycle. peak(n) .

[0094] Specifically, the control circuit 120 can be based on the theoretical average current value I of the current switching cycle. avg_ref The absolute value of AC voltage V ac DC voltage value V out The inductance value L of the boost inductor, and the valley signal waiting delay time ΔT of the previous switching cycle. sw(n-1) and the inductor current discontinuity time T of the current switching cycle dly(n) The peak inductor current I´ after compensation within the current switching cycle is determined using the above formula (8). peak(n) .

[0095] Step 650: Based on the compensated peak inductor current I´ peak(n) and the inductor current discontinuity time T of the current switching cycle dly(n)Update the theoretical switching cycle setting value for the current switching cycle.

[0096] Specifically, the control circuit 120 can be based on the compensated peak inductor current I´ peak(n) and the inductor current discontinuity time T of the current switching cycle dly(n) Using the above formula (9), update the theoretical switching cycle setting value of the current switching cycle to obtain the theoretical switching cycle setting value T´ after compensation for the current switching cycle. sw(n) .

[0097] In this way, while increasing the peak inductor current, an accurate theoretical switching cycle setting value can be obtained after the peak inductor current changes. This theoretical switching cycle setting value can then be applied to the calculation of the compensation amount for the next switching cycle, ensuring the accuracy of the peak inductor current calculation.

[0098] According to the method for determining the peak inductor current in the above embodiments, Figure 7 An exemplary diagram illustrates the effect of charge compensation on the average inductor current before and after using the inductor current peak determination method provided in this application embodiment, wherein T mains This indicates the power frequency cycle of the AC power grid connected to the Boost circuit 110. See also... Figure 7 As shown, before compensation, the average current I of the boost inductor BL is... avg The current exhibits a stepped fluctuation, with the average current decreasing due to the extension of the switching cycle. However, by using the inductor current peak determination method of this application for inductor current peak compensation, the amount of charge drawn from the grid during the current switching cycle can be increased. This compensation can effectively replenish the amount of charge lost due to waiting delay, thereby compensating for the missing average current. This makes the average current of the system consistent with the theoretical value throughout the entire power frequency cycle, thus reducing the THD of the system input AC current.

[0099] The method for determining the peak inductor current provided in this application compensates for the peak inductor current periodically based on the switching cycle timing value without changing the structure of the original peak current mode controlled boost circuit system or adding hardware resources. This compensates for the missing charge due to the resonant valley signal delay of the drain-source voltage of the power switch, thereby making the average current consistent with the control requirement and reducing the THD of the system input AC current. Moreover, by keeping the inductor current discontinuity time constant before and after compensation, the valley signal waiting delay can be kept relatively stable, thus ensuring a relatively stable compensation amount.

[0100] This application embodiment also provides a control circuit, which can be applied to, for example... Figure 1 The boost circuit system shown is based on peak current mode control. This control circuit is used in conjunction with, for example, a boost circuit system based on peak current mode control. Figure 1The Boost circuit 110 in the peak current-mode control-based boost circuit system shown is electrically connected. This control circuit can be used to control the energy conversion of the boost inductor BL in the Boost circuit 110 by controlling the on or off of the power switch Q0 in the Boost circuit 110. The energy conversion may include magnetization or demagnetization.

[0101] In the embodiments of this application, the control circuit is also used to perform the method for determining the peak value of the inductor current as described in any of the above embodiments, which will not be repeated here.

[0102] Based on the method for determining the peak inductor current described in any of the above embodiments, this application also provides a computer-readable storage medium. For example, a non-transitory computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a CD-ROM, magnetic tape, a floppy disk, and an optical data storage device, etc. The storage medium stores computer instructions for executing the method for determining the peak inductor current described in any of the above embodiments.

[0103] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware to implement them. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0104] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations thereof that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.

Claims

1. A method for determining the peak value of inductor current, characterized in that, A control circuit applied to a boost circuit system based on peak current mode control, wherein the control circuit is electrically connected to the boost circuit in the boost circuit system, and the control circuit is used to control the boost inductor in the boost circuit to perform energy conversion by controlling the conduction or cutoff of the power switch in the boost circuit, wherein the energy conversion includes magnetization or demagnetization; the method for determining the peak value of the inductor current includes: Determine the valley signal waiting delay time of the previous switching cycle of the power switch; The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch, and the peak value of the inductor current is determined according to the correspondence between the compensation charge and the peak value of the inductor current in the current switching cycle.

2. The method for determining the peak value of inductor current according to claim 1, characterized in that, The step of compensating the power switch transistor with the amount of charge corresponding to the valley signal waiting delay time and adjusting it to the current switching cycle, and determining the peak value of the inductor current based on the correspondence between the compensated charge and the peak value of the inductor current in the current switching cycle, includes: Obtain the absolute value of the AC voltage input to the boost circuit and the DC voltage value output; The inductor current discontinuity time of the current switching cycle is determined based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value of the current switching cycle, and the theoretical average current value of the current switching cycle. The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensation charge and the inductor current peak value of the current switching cycle, the compensation inductor current peak value is determined.

3. The method for determining the peak value of inductor current according to claim 2, characterized in that, The step of compensating the power switch transistor with the compensation charge corresponding to the valley signal waiting delay time to the current switching cycle, and determining the compensated inductor current peak value based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensated charge amount of the current switching cycle and the inductor current peak value, includes: The compensation charge corresponding to the valley signal waiting delay time is applied to the current switching cycle of the power switch. Based on the correspondence between the inductor current discontinuity time of the current switching cycle and the compensation charge and the peak inductor current of the current switching cycle, the peak inductor current after compensation is determined using the following formula: ； Among them, I´ peak(n) I represents the peak value of the inductor current after compensation. avg_ref V represents the theoretical average current value of the current switching cycle, L represents the inductance value of the boost inductor in the boost circuit, and V represents the voltage across the boost circuit. ac V represents the absolute value of the AC voltage. out The DC voltage value, ΔT sw(n-1) T represents the valley signal waiting delay time of the previous switching cycle. dly(n) This indicates the discontinuity time of the inductor current during the current switching cycle; The compensation charge corresponding to the valley signal waiting delay time is I. avg_ref With the ΔT sw(n-1) The product of.

4. The method for determining the peak value of inductor current according to claim 2, characterized in that, Before and after compensating for the peak inductor current of the current switching cycle, the discontinuity time of the inductor current in the current switching cycle remains unchanged.

5. The method for determining the peak value of the inductor current according to claim 4, characterized in that, The determination of the inductor current discontinuity time for the current switching cycle based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value for the current switching cycle, and the theoretical average current value for the current switching cycle includes: Based on the absolute value of the AC voltage, the DC voltage value, the switching cycle setting value of the current switching cycle, and the theoretical average current value of the current switching cycle, the inductor current discontinuity time of the current switching cycle is determined using the following formula: ； Among them, T dly(n) T represents the discontinuity time of the inductor current in the current switching cycle. sw(n) I represents the switching cycle setting value of the current switching cycle. avg_ref V represents the theoretical average current value of the current switching cycle, L represents the inductance value of the boost inductor in the boost circuit, and V represents the voltage across the boost circuit. ac V represents the absolute value of the AC voltage. out This indicates the DC voltage value.

6. The method for determining the peak value of inductor current according to claim 1, characterized in that, The determination of the valley signal waiting delay time of the previous switching cycle of the power switch includes: The valley signal waiting delay time of the previous switching cycle is obtained by timing from the end of the previous switching cycle to the start of the current switching cycle of the power switch transistor using a timer. or, The actual switching cycle and the compensated theoretical switching cycle setting value of the power switch in the previous switching cycle are obtained, and the time difference between the actual switching cycle and the compensated theoretical switching cycle setting value is determined. The time difference is determined as the valley signal waiting delay time of the previous switching cycle.

7. The method for determining the peak value of inductor current according to any one of claims 1 to 6, characterized in that, After determining the peak value of the compensated inductor current based on the correspondence between the compensated charge amount and the peak value of the inductor current according to the current switching cycle, the method for determining the peak value of the inductor current further includes: Based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle, the theoretical switching cycle setting value of the current switching cycle is updated to obtain the compensated theoretical switching cycle setting value.

8. The method for determining the peak value of inductor current according to claim 7, characterized in that, The step of updating the theoretical switching cycle setting value of the current switching cycle based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle to obtain the compensated theoretical switching cycle setting value includes: Based on the compensated peak inductor current and the inductor current discontinuity time of the current switching cycle, the theoretical switching cycle setting value of the current switching cycle is updated using the following formula to obtain the compensated theoretical switching cycle setting value: ； Among them, T´ sw(n) I' represents the compensated theoretical switching cycle setting value. peak(n) V represents the peak value of the inductor current after compensation, L represents the inductance value of the boost inductor in the boost circuit, and V represents the peak value of the inductor current after compensation. ac V represents the absolute value of AC voltage. out T represents the DC voltage value. dly(n) This indicates the discontinuity time of the inductor current during the current switching cycle.

9. A control circuit, characterized in that, The control circuit is applied to a boost circuit system based on peak current mode control. The control circuit is electrically connected to the boost circuit in the boost circuit system. The control circuit is used to control the boost inductor in the boost circuit to perform energy conversion by controlling the conduction or cutoff of the power switching transistor in the boost circuit. The energy conversion includes magnetization or demagnetization. The control circuit is also used to perform the method for determining the peak value of the inductor current as described in any one of claims 1 to 8.

10. A boost circuit system based on peak current mode control, characterized in that, It includes a boost circuit and a control circuit as described in claim 9, wherein the boost circuit is electrically connected to the control circuit.

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