A driving circuit, a control method and a test system

CN122908574APending Publication Date: 2026-10-13HANGZHOU FIRSTACK TECH
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Patent Information

Application Number
CN202611227824.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-13
Publication Date
2026-10-13

AI Technical Summary

Technical Problem

[0004]然而,由于驱动电路与被测功率器件之间的距离较远,驱动回路容易产生较大的寄生参数,在高速开关驱动过程中,容易影响门极驱动过程的稳定性,从而使驱动性能难以兼顾开关速度及驱动稳定性,进而影响功率器件的测试效果和可靠性

Benefits of technology

[0016]本申请提供的驱动电路,在第一开关管的开通过程中控制限流电路的限流值由第一限流值降低至第二限流值,使第一开关管的驱动电流在开通过程中分阶段调整,既能够利用第一限流值对应的较大驱动电流提高第一开关管门极电压的上升速度,使第一开关管快速进入导通状态,又能够利用第二限流值对应的较小驱动电流减小驱动回路寄生参数引起的门极电压过冲及振荡,提高第一开关管导通过程的稳定性,从而兼顾第一开关管的开关速度和驱动稳定性,提高功率器件远程门极驱动的性能。

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Abstract

The application discloses a driving circuit, a control method and a test system. In the on process of a first switch tube, the current limiting value of a current limiting circuit is controlled to decrease from a first current limiting value to a second current limiting value, so that the driving current of the first switch tube is adjusted in stages in the on process. The rising speed of the gate voltage of the first switch tube can be improved by using the larger driving current corresponding to the first current limiting value, so that the first switch tube quickly enters the on state. The overshoot and oscillation of the gate voltage caused by the parasitic parameters of the driving circuit can be reduced by using the smaller driving current corresponding to the second current limiting value, so that the stability of the on process of the first switch tube is improved. The switching speed and the driving stability of the first switch tube are considered, and the performance of the remote gate driving of the power device is improved.
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Description

Technical Field

[0001] This application relates to the field of power electronics technology, specifically to a drive circuit, control method, and testing system. Background Technology

[0002] Dynamic high-temperature and high-humidity reliability testing is typically used to verify the long-term reliability of power devices under harsh environments such as high temperature and high humidity. To simulate the actual operating conditions of power devices, high-speed switching drive is usually required during the testing process.

[0003] During dynamic high temperature and high humidity reliability testing, due to the limitations of the test environment, the drive circuit is usually located outside the temperature chamber, while the power device under test is located inside the temperature chamber. The drive circuit and the power device under test are connected through a drive loop to realize the conduction and shutdown control of the power device under test.

[0004] However, due to the large distance between the drive circuit and the power device under test, the drive circuit is prone to generating large parasitic parameters. During high-speed switching drive, these parameters can easily affect the stability of the gate drive process, making it difficult to balance switching speed and drive stability in terms of drive performance. Consequently, this affects the test results and reliability of the power device. Summary of the Invention

[0005] In view of this, this application provides a driving circuit, control method and testing system that can improve the performance of remote gate drive of power devices.

[0006] To solve the above problems, the technical solution provided in this application is as follows: This application provides a driving circuit for driving a first switching transistor located inside a temperature chamber, with the driving circuit located outside the temperature chamber. The driving circuit includes a current limiting circuit, a controller, and a driving chip. The first terminal of the current limiting circuit is connected to the positive terminal of a power supply, the second terminal is connected to the source of the first switching transistor, and the third terminal is connected to the negative terminal of the power supply. The first terminal of the driving chip is connected to the positive terminal of the power supply, the second terminal is grounded, and the third terminal is connected to the gate of the first switching transistor. The controller controls the driving chip to output a driving signal to drive the first switching transistor to turn on. During the turn-on process of the first switching transistor, the current limiting value of the current limiting circuit is controlled to be a first current limiting value to provide a driving current corresponding to the first current limiting value to the first switching transistor. Under preset adjustment conditions, the current limiting value of the current limiting circuit is reduced from the first current limiting value to a second current limiting value to adjust the driving current in stages during the turn-on process of the first switching transistor. The second current limiting value is less than the first current limiting value.

[0007] In one possible implementation, the driving circuit further includes a voltage sampling circuit; the voltage sampling circuit is used to acquire the gate voltage of the first switching transistor; the controller is specifically used to determine that the preset adjustment conditions are met when the gate voltage is detected to reach the set voltage, and control the current limiting value of the current limiting circuit to decrease from the first current limiting value to the second current limiting value.

[0008] One possible implementation is a controller, specifically used to determine, after a first preset time has elapsed since the drive signal begins to be output, that a preset adjustment condition is met, and control the current limiting circuit to reduce the current limiting value from the first current limiting value to the second current limiting value.

[0009] One possible implementation is that the time required for the current limiting circuit to reduce the current limiting value from the first current limiting value to the second current limiting value is a second preset time; the sum of the first preset time and the second preset time is less than or equal to the turn-on time of the first switching transistor; the turn-on time is the time required for the gate voltage of the first switching transistor to rise from the beginning to reach the target turn-on voltage.

[0010] In one possible implementation, the controller is further configured to control the current limiting circuit to decrease from the first current limiting value to an intermediate current limiting value when the current limiting value of the current limiting circuit is the first current limiting value; and to control the current limiting circuit to decrease from the intermediate current limiting value to a second current limiting value when a preset adjustment condition is met; wherein the first current limiting value is greater than the intermediate current limiting value and the intermediate current limiting value is greater than the second current limiting value.

[0011] One possible implementation is that the current limiting circuit includes a transistor and a base control circuit; the first terminal of the base control circuit is connected to the positive terminal of the power supply, the second terminal of the base control circuit is connected to the base of the transistor, and the third terminal of the base control circuit is connected to the negative terminal of the power supply; the emitter of the transistor is connected to the negative terminal of the power supply, and the collector of the transistor is connected to the source of the first switching transistor; a controller is used to control the base control circuit to adjust the base voltage of the transistor, thereby adjusting the current limiting value of the current limiting circuit.

[0012] One possible implementation includes a base control circuit comprising: a first resistor, a second resistor, a third resistor, a capacitor, and a second switching transistor; a first terminal of the first resistor is connected to the positive terminal of a power supply, and a second terminal of the first resistor is connected to the base of the transistor, the first terminal of the second resistor, and the first terminal of the capacitor; the second terminals of the second resistor and the second terminal of the capacitor are both connected to the negative terminal of the power supply; the emitter of the transistor is connected to the negative terminal of the power supply through the third resistor; the second switching transistor is connected in parallel with the first resistor; a controller is used to control the second switching transistor to conduct before outputting a drive signal, so as to configure the base control circuit in a first control state; an output drive signal is used to drive the first switching transistor to conduct, the base voltage of the transistor rises to the first base voltage, so that the current limiting value of the current limiting circuit reaches the first current limiting value; under the condition of satisfying a preset adjustment condition, the second switching transistor is controlled to turn off, the base voltage of the transistor decreases from the first base voltage to the second base voltage, so that the current limiting value of the current limiting circuit decreases from the first current limiting value to the second current limiting value; the second base voltage is less than the first base voltage.

[0013] This application also provides a control method for a drive circuit. The drive circuit is used to drive a first switching transistor, which is located inside a temperature chamber, while the drive circuit is located outside the temperature chamber. The drive circuit includes a current limiting circuit and a controller. A first terminal of the current limiting circuit is connected to the positive terminal of a power supply, a second terminal of the current limiting circuit is connected to the source terminal of the first switching transistor, and a third terminal of the current limiting circuit is connected to the negative terminal of the power supply. A drive signal is output to drive the first switching transistor to start conducting. During the turn-on process of the first switching transistor, the current limiting value of the control current limiting circuit is set to a first current limiting value to provide a drive current corresponding to the first current limiting value to the first switching transistor. Under the condition of satisfying a preset adjustment condition, the current limiting value of the control current limiting circuit is reduced from the first current limiting value to a second current limiting value to adjust the drive current in stages during the turn-on process of the first switching transistor. The second current limiting value is less than the first current limiting value.

[0014] One possible implementation is that after the drive signal starts to be output, if a first preset time has elapsed, it is determined that the preset adjustment conditions are met, and the current limiting value of the control current limiting circuit is reduced from the first current limiting value to the second current limiting value.

[0015] This application also provides a testing system, including the driving circuit provided in any of the above implementations, and further including a temperature chamber and a first switching transistor; the first switching transistor is located inside the temperature chamber, and the driving circuit is located outside the temperature chamber; the driving circuit is used to drive the first switching transistor.

[0016] The driving circuit provided in this application controls the current limiting value of the current limiting circuit to decrease from a first current limiting value to a second current limiting value during the turn-on process of the first switching transistor. This allows the driving current of the first switching transistor to be adjusted in stages during the turn-on process. It can both utilize the larger driving current corresponding to the first current limiting value to increase the rise speed of the gate voltage of the first switching transistor, enabling the first switching transistor to quickly enter the conduction state, and utilize the smaller driving current corresponding to the second current limiting value to reduce gate voltage overshoot and oscillation caused by parasitic parameters of the driving circuit, thereby improving the stability of the first switching transistor's conduction process. Thus, it balances the switching speed and driving stability of the first switching transistor, improving the performance of remote gate driving of power devices. Attached Figure Description

[0017] Figure 1 A schematic diagram of a driving circuit provided in an embodiment of this application; Figure 2 A schematic diagram of another driving circuit provided in an embodiment of this application; Figure 3 A schematic diagram of the gate voltage of a first switching transistor provided in an embodiment of this application; Figure 4 A schematic diagram of another driving circuit provided in an embodiment of this application; Figure 5 A schematic diagram of yet another driving circuit provided in an embodiment of this application; Figure 6 A flowchart illustrating a control method for a driving circuit provided in an embodiment of this application; Figure 7 This is a schematic diagram of a testing system provided in an embodiment of this application. Detailed Implementation

[0018] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the embodiments of this application will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0019] Dynamic high-temperature and high-humidity reliability testing is typically used to verify the long-term reliability of power devices under high-temperature and high-humidity environments. To simulate the actual operating conditions of power devices, high-speed switching drive is usually required during the testing process.

[0020] Because the drive circuit is typically located outside the temperature chamber, while the power device under test (DUT) is located inside, and the drive circuit and DUT are connected via a drive loop, the drive loop is relatively long and prone to generating significant parasitic parameters. When a larger gate drive current is used to increase the switching speed of the power device, gate voltage overshoot and oscillation can easily occur; conversely, reducing the gate drive current to improve drive stability reduces the gate voltage rise rate, making it difficult to meet the requirements of high-speed switching drive. Therefore, related technologies struggle to balance the switching speed of the power device with the stability of remote gate drive, thus affecting the test results and reliability of the power device.

[0021] In view of this, this application provides a driving circuit, control method and testing system that can improve the performance of remote gate drive of power devices.

[0022] The driving circuit provided in this application can be applied to dynamic high temperature and high humidity reliability testing equipment, as well as other application scenarios that require remote driving of switching transistors. This application does not make any specific limitations on this.

[0023] The following is combined Figures 1 to 3 The driving circuit provided in the embodiments of this application is described.

[0024] See Figure 1 , Figure 1 This is a schematic diagram of a driving circuit provided in an embodiment of this application.

[0025] See Figure 2 This figure is a schematic diagram of another driving circuit provided in an embodiment of this application.

[0026] See Figure 3 The figure is a schematic diagram of the gate voltage of a first switching transistor provided in an embodiment of this application.

[0027] The driving circuit provided in this application embodiment is used to drive a first switching transistor Q1. The first switching transistor Q1 is located inside the temperature chamber 100, and the driving circuit is located outside the temperature chamber 100. The driving circuit includes a current limiting circuit 10, a driving chip 20, and a controller 30.

[0028] The first switching transistor Q1 can be a SiC type metal-oxide-semiconductor field-effect transistor (MOSFET), a GaN type metal-oxide-semiconductor field-effect transistor (MOSFET), or other power switching devices, and this application does not specifically limit it. For ease of understanding, this application's embodiments use a SiC MOSFET as an example for illustration.

[0029] The first terminal of the current limiting circuit 10 is used to connect to the positive terminal of the power supply U, the second terminal of the current limiting circuit 10 is used to connect to the source of the first switching transistor Q1, and the third terminal of the current limiting circuit 10 is used to connect to the negative terminal of the power supply U.

[0030] The first terminal of the driver chip 20 is used to connect to the positive terminal of the power supply U, the second terminal of the driver chip 20 is grounded, and the third terminal of the driver chip 20 is used to connect to the gate of the first switching transistor Q1.

[0031] The controller 30 is used to control the driver chip 20 to output a drive signal to drive the first switch Q1 to start conducting. During the turn-on process of the first switch Q1, the current limiting circuit 10 is controlled to set a first current limiting value to provide the first switch Q1 with a drive current corresponding to the first current limiting value. Under the condition of satisfying the preset adjustment conditions, the current limiting value of the control circuit 10 is reduced from the first current limiting value to a second current limiting value to adjust the drive current in stages during the turn-on process of the first switch Q1. The second current limiting value is less than the first current limiting value.

[0032] In this embodiment, since the driving circuit is located outside the temperature chamber 100 and the first switching transistor Q1 is located inside the temperature chamber 100, the driving chip 20 and the first switching transistor Q1, as well as the current limiting circuit 10 and the first switching transistor Q1, need to be connected through a driving circuit. Due to the length of the driving circuit, the driving circuit is prone to generating large parasitic parameters.

[0033] like Figure 2 As shown, due to the relatively long length of the drive circuit, a first parasitic inductance L1 is formed between the drive chip 20 and the first switch Q1, and a second parasitic inductance L2 is formed between the current limiting circuit 10 and the first switch Q1. During the high-speed conduction of the first switch Q1, the first parasitic inductance L1 and the second parasitic inductance L2 can easily cause voltage spikes in the gate circuit, and cause gate voltage overshoot and oscillation of the first switch Q1, thereby reducing the drive stability of the first switch Q1.

[0034] Based on this, in this embodiment, the controller 30 controls the driver chip 20 to output a drive signal to drive the first switch Q1 to start conducting. After the first switch Q1 starts conducting, the controller 30 first controls the current limiting circuit 10 to operate at a first current limiting value. Since the drive current corresponding to the first current limiting value is relatively large, it can increase the rise speed of the gate voltage of the first switch Q1, enabling the first switch Q1 to quickly enter the conduction state and improving the switching speed of the first switch Q1.

[0035] After the preset adjustment conditions are met, the controller 30 controls the current limiting circuit 10 to enter the second current limiting stage, reducing the current limiting value of the current limiting circuit 10 from the first current limiting value to the second current limiting value. Since the drive current corresponding to the second current limiting value is less than the drive current corresponding to the first current limiting value, the gate charging speed gradually decreases as the gate voltage of the first switching transistor Q1 continues to rise to the target turn-on voltage. This reduces the gate voltage overshoot and oscillation caused by the parasitic inductance of the drive circuit, and improves the stability of the first switching transistor Q1 during conduction.

[0036] like Figure 3 As shown, during the turn-on process of the first switch Q1, the gate voltage of the first switch Q1 rises at a first rising rate during the first time period t1, and continues to rise to the target turn-on voltage during the second time period t2. The first time period t1 corresponds to the current limiting circuit 10 operating at the first current limiting value, and the second time period t2 corresponds to the current limiting circuit 10 operating at the second current limiting value.

[0037] During the turn-on process of the first switch Q1, the drive current output by the current limiting circuit 10 maintains a large current value during the first time period t1, and gradually decreases after meeting the preset adjustment conditions. Therefore, the gate voltage of the first switch Q1 rises rapidly at a large rate in the early stage of the turn-on process, and continues to rise at a smaller rate in the later stage of the turn-on process, until it reaches the target turn-on voltage and remains stable. Thus, this application can meet the high-speed turn-on requirement of the first switch Q1 while reducing gate voltage overshoot and oscillation caused by parasitic parameters of the drive circuit, and can balance the turn-on speed and drive stability of the first switch Q1.

[0038] The driving circuit provided in this application embodiment controls the current limiting value of the current limiting circuit to decrease from a first current limiting value to a second current limiting value during the turn-on process of the first switching transistor. This allows the driving current of the first switching transistor to be adjusted in stages during the turn-on process. It can both utilize the larger driving current corresponding to the first current limiting value to increase the rise speed of the gate voltage of the first switching transistor, enabling the first switching transistor to quickly enter the conduction state, and utilize the smaller driving current corresponding to the second current limiting value to reduce gate voltage overshoot and oscillation caused by parasitic parameters of the driving circuit, thereby improving the stability of the first switching transistor's conduction process. This balances the switching speed and driving stability of the first switching transistor, improving the performance of remote gate driving of power devices.

[0039] See also Figure 1 To maximize both the switching speed and driving stability of the first switching transistor, in this embodiment, when the first switching transistor Q1 begins to conduct, the controller 30 controls the current limiting circuit 10 to output a first current limiting value. The first current limiting value can be the maximum current limiting value that the current limiting circuit 10 can output, providing a larger driving current so that the gate voltage of the first switching transistor Q1 rises rapidly, meeting the requirements of high-speed switching for a higher voltage change rate. When a preset adjustment condition is met, the controller 30 controls the current limiting value of the current limiting circuit 10 to begin a smooth decrease, gradually decreasing to a second current limiting value. The second current limiting value can be the minimum current limiting value that the current limiting circuit 10 can output, reducing the driving current during the turn-on-end phase of the first switching transistor Q1, thereby reducing gate voltage overshoot and oscillation.

[0040] One possible implementation is that after the first switching transistor is turned on, the current limiting circuit can return to its initial operating state to prepare for the next turn-on process of the first switching transistor.

[0041] One possible implementation is that, in order to improve the integration of the driving circuit, the current limiting circuit provided in this application embodiment can be integrated into the driving chip, which will not be described in detail here.

[0042] The following describes the implementation method of determining the preset adjustment conditions in the embodiments of this application.

[0043] In one possible implementation, the driving circuit provided in this application embodiment further includes a voltage sampling circuit. The voltage sampling circuit is used to acquire the gate voltage of the first switching transistor.

[0044] Specifically, when the gate voltage of the first switching transistor is detected to reach the set voltage, the controller determines that the preset adjustment conditions are met and controls the current limiting circuit to reduce the current limiting value from the first current limiting value to the second current limiting value.

[0045] In this embodiment, the voltage sampling circuit can acquire the gate voltage of the first switching transistor and send the gate voltage to the controller. The controller determines the current conduction stage of the first switching transistor based on the gate voltage. When the controller detects that the gate voltage of the first switching transistor reaches the set voltage, it indicates that the first switching transistor has completed the initial fast charging of the turn-on process. At this time, the controller controls the current limiting circuit to enter the second current limiting stage, reducing the current limiting value of the current limiting circuit from the first current limiting value to the second current limiting value, thereby reducing the drive current of the first switching transistor.

[0046] This application does not specifically limit the value of the set voltage. The set voltage can be set according to the device parameters of the first switching transistor, the target turn-on voltage, or actual application requirements. For example, the set voltage can be set to 70% of the target turn-on voltage of the first switching transistor to ensure a rapid rise in gate voltage while reducing gate voltage overshoot and oscillation.

[0047] In this embodiment, the gate voltage is used as the basis for judging the preset adjustment conditions. The controller can adjust the current limiting value of the current limiting circuit according to the actual conduction state of the first switch, so that the timing of the current limiting circuit entering the second current limiting stage matches the actual conduction state of the first switch, which helps to improve the accuracy of current limiting adjustment and further takes into account the conduction speed and driving stability of the first switch.

[0048] In one possible implementation, embodiments of this application may also determine whether a preset adjustment condition is met based on the duration after the drive signal begins to be output.

[0049] In this embodiment of the application, the controller is specifically used to determine that the preset adjustment conditions are met after a first preset time has elapsed after the drive signal starts to be output, and control the current limiting value of the current limiting circuit to decrease from the first current limiting value to the second current limiting value.

[0050] In this embodiment, the controller starts timing after outputting the drive signal. When the timing duration reaches the first preset time, the controller determines that the preset adjustment condition is met and controls the current limiting circuit to enter the second current limiting stage, so that the current limiting value of the current limiting circuit is reduced from the first current limiting value to the second current limiting value.

[0051] This application does not specifically limit the value of the first preset time in its embodiments. The first preset time can be set according to the turn-on time of the first switch, the parameters of the drive circuit, or actual application requirements. For example, it can be 10 ns.

[0052] The embodiments of this application use the duration after the drive signal starts output as the basis for judging the preset adjustment conditions. The current limit value can be adjusted in stages without adding a gate voltage detection circuit, which can simplify the implementation process of current limit control, reduce control complexity, and at the same time meet the control requirements of remote gate drive for the timing of current limit adjustment.

[0053] In one possible implementation, in the driving circuit provided in this application embodiment, the time required for the current limiting circuit to reduce the current limiting value from the first current limiting value to the second current limiting value is a second preset time; the sum of the first preset time and the second preset time is less than or equal to the turn-on time of the first switching transistor; the turn-on time is the time required for the gate voltage of the first switching transistor to rise from the beginning to reach the target turn-on voltage.

[0054] In this embodiment, the controller controls the current limiting circuit to maintain a first current limiting value for a first preset time. After the first preset time ends, the controller controls the current limiting circuit to gradually reduce the current limiting value for a second preset time, so that the current limiting value of the current limiting circuit smoothly transitions to the second current limiting value, rather than switching from the first current limiting value to the second current limiting value instantaneously, thereby further reducing the gate voltage fluctuation caused by sudden gate current changes.

[0055] Since the sum of the first preset time and the second preset time is less than or equal to the turn-on time of the first switch, the process of reducing the current limit value from the first current limit value to the second current limit value can be completed before the first switch is turned on, so that the drive current changes according to the preset law throughout the turn-on process.

[0056] This application embodiment sets the first preset time and the second preset time within the turn-on time range of the first switch, so that the current limiting value can be adjusted before the first switch is turned on; the smooth transition of the current limiting value is achieved through the second preset time, which helps to reduce the gate voltage fluctuation caused by the sudden change in drive current, improve the stability of the first switch conduction process, and further improve the remote gate drive performance.

[0057] This application does not specifically limit the number of adjustment stages for the current limiting value of the current limiting circuit. The gate charging process can be divided into two or more stages based on the device parameters of the first switching transistor, the gate charge, the turn-on time, or the actual driving requirements. This application does not make specific limitations in this regard. For example, when the gate charge of the first switching transistor is large or the turn-on time is long, the controller can set multiple intermediate current limiting values ​​to further optimize the gate charging process.

[0058] To make it easier to understand, we will use three-stage adjustment as an example below.

[0059] In one possible implementation, in this embodiment of the application, the controller is further configured to control the current limiting circuit to reduce the current limiting value from the first current limiting value to an intermediate current limiting value when the current limiting value of the current limiting circuit is the first current limiting value; and to control the current limiting value of the current limiting circuit to reduce the current limiting value from the intermediate current limiting value to a second current limiting value when a preset adjustment condition is met; wherein the first current limiting value is greater than the intermediate current limiting value and the intermediate current limiting value is greater than the second current limiting value.

[0060] In this embodiment, the controller can divide the gate charging process of the first switching transistor into multiple stages, and control the current limiting circuit to sequentially output a first current limiting value, an intermediate current limiting value, and a second current limiting value, thereby gradually reducing the drive current. The first current limiting value corresponds to a larger drive current, the intermediate current limiting value corresponds to a drive current between the first and second current limiting values, and the second current limiting value corresponds to a smaller drive current, thus causing the gate voltage of the first switching transistor to gradually rise to the target turn-on voltage according to a preset rule.

[0061] The specific value of the intermediate current limit and the corresponding duration can be set according to the device parameters of the first switching transistor, the gate charge, the target on-state voltage, and the parasitic parameters of the drive circuit, so as to adapt to the driving requirements of different power devices and different application scenarios.

[0062] This application embodiment sets an intermediate current limit value to further smooth the transition of the drive current between the first current limit value and the second current limit value. This helps to further reduce gate voltage fluctuations and overshoot, improve the stability of the gate drive process, meet the drive requirements of different power devices, and further improve the remote gate drive performance.

[0063] To make it easier to understand, we will continue to use the example of dividing the current limiting value into two stages to introduce the specific structure of the current limiting circuit.

[0064] See Figure 4 This figure is a schematic diagram of another driving circuit provided in an embodiment of this application.

[0065] The current limiting circuit provided in this application embodiment includes a transistor Q2 and a base control circuit 101.

[0066] The first terminal of the base control circuit 101 is connected to the positive terminal of the power supply U, the second terminal of the base control circuit 101 is connected to the base of the transistor Q2, and the third terminal of the base control circuit 101 is connected to the negative terminal of the power supply U. The emitter of the transistor Q2 is connected to the negative terminal of the power supply U, and the collector of the transistor Q2 is connected to the source of the first switching transistor Q1.

[0067] The controller 30 is used to control the base control circuit 101 to adjust the base voltage of the transistor Q2, thereby adjusting the current limiting value of the current limiting circuit.

[0068] In this embodiment, transistor Q2 is used as the current-limiting device. The controller 30 adjusts the conduction level of transistor Q2 by controlling its base voltage, thereby adjusting the current-limiting value of the current-limiting circuit. When the base voltage of transistor Q2 is high, its conduction level is deep, and the current-limiting circuit outputs a larger current-limiting value; when the base voltage of transistor Q2 decreases, its conduction level becomes shallower, and the current-limiting value output by the current-limiting circuit decreases accordingly. Therefore, by controlling the base voltage of transistor Q2 according to a preset pattern, the controller 30 can achieve phased adjustment of the current-limiting value.

[0069] In the initial stage of the first switching transistor Q1 being turned on, the controller 30 controls the transistor Q2 to maintain a high base voltage, so that the current limiting circuit outputs the first current limiting value; after the preset adjustment conditions are met, the controller 30 controls the base voltage of the transistor Q2 to decrease, so that the current limiting circuit outputs the second current limiting value, thereby realizing the phased adjustment of the drive current.

[0070] The embodiments of this application adjust the current limiting value of the current limiting circuit by controlling the base voltage of the transistor, so that the current limiting circuit can output different current limiting values ​​according to the conduction stage of the first switching transistor, which is beneficial to improving the flexibility and adjustability of current limiting control and providing adapted gate drive capability for different power devices.

[0071] The following is combined Figure 5 This application describes the base control circuit provided in the embodiments.

[0072] See Figure 5 This figure is a schematic diagram of another driving circuit provided in an embodiment of this application.

[0073] The base control circuit provided in this application embodiment may include a first resistor R1, a second resistor R2, a third resistor R3, a capacitor C, and a second switch Q3.

[0074] The first end of the first resistor R1 is used to connect to the positive terminal of the power supply U, and the second end of the first resistor R1 is connected to the base of the transistor Q2, the first end of the second resistor R2, and the first end of the capacitor C.

[0075] The second terminal of the second resistor R2 and the second terminal of the capacitor C are both connected to the negative terminal of the power supply U. The emitter of the transistor Q2 is connected to the negative terminal of the power supply U through the third resistor R3.

[0076] The second switch Q3 is connected in parallel with the first resistor R1.

[0077] This application does not specifically limit the specific parameters of the first resistor R1, the second resistor R2, the third resistor R3, and the capacitor C, nor does it specifically limit the selection of the first resistor R1, the second resistor R2, the third resistor R3, and the capacitor C. These parameters can be set according to the device parameters of the first switching transistor Q1, the gate charge, the driving voltage, and the actual application requirements. For example, the second resistor R2 can be an adjustable resistor to adjust the base voltage of the transistor Q2; the capacitance value of the capacitor C can be set according to the driving requirements to adjust the rate of decrease of the base voltage after the second switching transistor Q3 is turned off, thereby adjusting the rate of change of the current limiting value.

[0078] By reasonably setting the parameters of the first resistor R1, the second resistor R2, the third resistor R3, and the capacitor C, the embodiments of this application can take into account the turn-on speed, gate voltage stability, and drive reliability of the first switch Q1, so as to adapt to the drive requirements of different devices and different application scenarios.

[0079] For example, the resistance of the first resistor R1 can be 10kΩ, the resistance of the second resistor R2 can be 1kΩ, the resistance of the third resistor R3 can be 1Ω, and the capacitance of the capacitor C can be 220pF.

[0080] The controller 30 is used to control the second switch Q3 to turn on before outputting the drive signal, so as to configure the base control circuit 101 to a first control state; output the drive signal to drive the first switch Q1 to turn on, and the base voltage of the transistor Q2 rises to the first base voltage, so that the current limiting value of the current limiting circuit 10 reaches the first current limiting value; after the preset adjustment conditions are met, the controller controls the second switch Q3 to turn off, so that the base voltage of the transistor Q2 decreases from the first base voltage to the second base voltage, so that the current limiting value of the current limiting circuit 10 decreases from the first current limiting value to the second current limiting value.

[0081] In this embodiment, before outputting the drive signal, the controller 30 controls the second switch Q3 to turn on, causing the first resistor R1 to be in a bypass state. At this time, the transistor Q2 can maintain a high base voltage, providing a large drive current for the first switch Q1 to start conducting. When the preset adjustment conditions are met, the controller 30 controls the second switch Q3 to turn off, the first resistor R1 participates in the voltage division of the base control circuit 101, the base voltage of the transistor Q2 gradually decreases, and the current limiting value output by the current limiting circuit 10 decreases accordingly, causing the drive current of the first switch Q1 to gradually decrease, thus realizing the staged adjustment of the gate drive current.

[0082] This application embodiment changes the operating state of the base control circuit by controlling the conduction state of the second switch, so that the base voltage of the transistor changes according to a preset law, thereby realizing the phased adjustment of the current limiting value of the current limiting circuit. While ensuring the rapid conduction of the first switch, it reduces the gate voltage overshoot and oscillation, improves the stability of the first switch conduction process, and further improves the remote gate drive performance.

[0083] To facilitate understanding, the following example illustrates the calculation process for the current limiting value, using a power supply U with a voltage of 20V, a first resistor R1 with a resistance of 10kΩ, a second resistor R2 with a resistance of 1kΩ, a third resistor R3 with a resistance of 1Ω, and a capacitor C with a capacitance of 220pF.

[0084] When the second switch Q3 is turned on and the first resistor R1 is short-circuited, the base voltage of transistor Q2 is approximately 20V. At this time, the current limiting value of the current limiting circuit is IC = (20-0.7)V / 1Ω ≈ 19A. After the second switch Q3 is turned off, the first resistor R1 is connected to the circuit, and the base voltage of transistor Q2 gradually decreases to approximately 1.6V. At this time, the current limiting value of the current limiting circuit decreases to IC = (1.6-0.7)V / 1Ω ≈ 0.9A, thereby reducing the gate voltage overshoot and oscillation of the first switch Q1 at the end of its turn-on process. Therefore, the current limiting circuit can provide staged current limiting control from high current to low current during the turn-on process of the first switch Q1.

[0085] One possible implementation is that after the first switch Q1 is turned on, the controller 30 can re-control the second switch Q3 to turn on, so that the base control circuit 101 returns to the first control state, and the transistor Q2 re-establishes the conduction capability corresponding to the first base voltage, thereby restoring the current limiting circuit 10 to the current limiting capability corresponding to the first current limiting value, and preparing for the next conduction process of the first switch Q1.

[0086] Based on the driving circuit provided in the above embodiments, this application also provides a control method for the driving circuit.

[0087] See Figure 6 The figure is a flowchart of a control method for a drive circuit provided in an embodiment of this application.

[0088] In the driving circuit provided in this embodiment, the driving circuit is used to drive a first switching transistor, which is located inside the temperature chamber, while the driving circuit is located outside the temperature chamber. The driving circuit includes a current limiting circuit and a controller; the first terminal of the current limiting circuit is used to connect to the positive terminal of the power supply, the second terminal of the current limiting circuit is used to connect to the source terminal of the first switching transistor, and the third terminal of the current limiting circuit is used to connect to the negative terminal of the power supply.

[0089] The control method for the driving circuit provided in this application includes: S601: Outputs a drive signal to drive the first switching transistor to turn on. During the turn-on process of the first switching transistor, the current limiting circuit is controlled to set the current limiting value to the first current limiting value, so as to provide the first switching transistor with a drive current corresponding to the first current limiting value.

[0090] S602: Under the condition of meeting the preset adjustment conditions, the current limiting value of the control current limiting circuit is reduced from the first current limiting value to the second current limiting value, so as to adjust the drive current in stages during the turn-on process of the first switching transistor; the second current limiting value is less than the first current limiting value.

[0091] In this embodiment, the first switching transistor begins to conduct after the output drive signal. This embodiment first controls the current limiting circuit to output a first current limiting value, maintaining a large drive current for the first switching transistor, thereby increasing the rise speed of the gate voltage of the first switching transistor and enabling it to quickly enter the conduction state.

[0092] After the preset adjustment conditions are met, the current limiting circuit of this application controls the output of a second current limiting value, thereby reducing the drive current of the first switching transistor. At this time, the gate voltage of the first switching transistor continues to rise to the target turn-on voltage, and the gate voltage overshoot and oscillation caused by parasitic parameters of the drive circuit can be reduced, thereby improving the stability of the first switching transistor's conduction process.

[0093] The control method provided in this application reduces the current limiting value of the current limiting circuit from a first current limiting value to a second current limiting value during the turn-on process of the first switching transistor. This allows the drive current of the first switching transistor to be adjusted in stages during the turn-on process, which can both increase the gate voltage rise speed of the first switching transistor and reduce gate voltage overshoot and oscillation during the turn-on process. This balances the conduction speed and drive stability of the first switching transistor and improves the performance of remote gate drive of power devices.

[0094] In one possible implementation, after the drive signal starts to be output, and after a first preset time has elapsed, if the preset adjustment conditions are met, the current limiting value of the current limiting circuit is controlled to decrease from the first current limiting value to the second current limiting value.

[0095] The embodiments of this application determine the switching timing of the current limit value by using the duration after the drive signal starts to be output. While ensuring the normal conduction of the first switching transistor, the drive current is adjusted in stages, which is beneficial to balance the difficulty of control implementation and the performance of remote gate drive.

[0096] Based on the driving circuit provided in the above embodiments, this application also provides a testing system.

[0097] See Figure 7 The figure is a schematic diagram of a testing system provided in an embodiment of this application.

[0098] The testing system provided in this application includes a drive circuit 200, a temperature chamber 100, and a first switching transistor Q1. The first switching transistor Q1 is located inside the temperature chamber 100, and the drive circuit is located outside the temperature chamber 100. The drive circuit is used to drive the first switching transistor Q1.

[0099] In this embodiment, the temperature chamber 100 provides a preset test environment for the first switching transistor Q1. The drive circuit 200 is located outside the temperature chamber 100, which avoids the drive circuit 200 operating in a high-temperature and high-humidity environment for a long time. The first switching transistor Q1 is located inside the temperature chamber 100, which allows for dynamic high-temperature and high-humidity reliability testing under the preset test environment.

[0100] The drive circuit 200 is connected to the first switch Q1 through a drive loop, and the drive current is adjusted in stages according to the method provided in the above embodiment so that the first switch Q1 completes the conduction process.

[0101] In the testing system provided in this application embodiment, the first switching transistor under test is located inside the temperature chamber, and the driving circuit is located outside the temperature chamber. In the first stage, the driving circuit adopts a larger first current limiting value to ensure that the gate voltage change rate of the first switching transistor meets the requirements of high-speed switching, thereby satisfying the effective verification of threshold voltage drift in dynamic high temperature and high humidity reliability testing. In the second stage, a smaller second current limiting value is adopted to reduce the driving current and reduce gate voltage overshoot and oscillation caused by drive circuit inductance. Through the above-mentioned staged current limiting control, this application embodiment can balance high gate voltage change rate and gate driving stability under remote gate driving conditions, thereby meeting the aging index of dynamic high temperature and high humidity reliability testing equipment and improving the reliability and test effect of dynamic high temperature and high humidity reliability testing.

[0102] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0103] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A driving circuit, characterized in that, The driving circuit is used to drive the first switching transistor, which is located inside the temperature chamber, and the driving circuit is located outside the temperature chamber; the driving circuit includes: a current limiting circuit, a controller, and a driving chip; The first terminal of the current limiting circuit is used to connect to the positive terminal of the power supply, the second terminal of the current limiting circuit is used to connect to the source terminal of the first switching transistor, and the third terminal of the current limiting circuit is used to connect to the negative terminal of the power supply. The first terminal of the driver chip is used to connect to the positive terminal of the power supply, the second terminal of the driver chip is grounded, and the third terminal of the driver chip is used to connect to the gate of the first switching transistor. The controller is used to control the driver chip to output a drive signal to drive the first switch to start conducting; during the turn-on process of the first switch, the current limiting circuit is controlled to set a first current limiting value to provide a drive current corresponding to the first current limiting value to the first switch; under the condition of satisfying a preset adjustment condition, the current limiting value of the current limiting circuit is controlled to decrease from the first current limiting value to a second current limiting value to adjust the drive current in stages during the turn-on process of the first switch; the second current limiting value is less than the first current limiting value.

2. The driving circuit according to claim 1, characterized in that, The driving circuit further includes a voltage sampling circuit; the voltage sampling circuit is used to acquire the gate voltage of the first switching transistor. The controller is specifically configured to, when detecting that the gate voltage has reached a set voltage, determine that the preset adjustment condition is met, and control the current limiting value of the current limiting circuit to decrease from the first current limiting value to the second current limiting value.

3. The driving circuit according to claim 1, characterized in that, The controller is specifically configured to, after the drive signal starts to be output and a first preset time has elapsed, determine that the preset adjustment condition is met, and control the current limiting value of the current limiting circuit to decrease from the first current limiting value to the second current limiting value.

4. The driving circuit according to claim 3, characterized in that, The time required for the current limiting circuit to reduce the current limiting value from the first current limiting value to the second current limiting value is the second preset time; The sum of the first preset time and the second preset time is less than or equal to the turn-on time of the first switch; the turn-on time is the time required for the gate voltage of the first switch to rise from the start to reach the target turn-on voltage.

5. The driving circuit according to claim 1, characterized in that, The controller is further configured to, when the current limiting value of the current limiting circuit is a first current limiting value, control the current limiting value of the current limiting circuit to decrease from the first current limiting value to an intermediate current limiting value; and when the preset adjustment condition is met, control the current limiting value of the current limiting circuit to decrease from the intermediate current limiting value to a second current limiting value. The first current limiting value is greater than the intermediate current limiting value, and the intermediate current limiting value is greater than the second current limiting value.

6. The driving circuit according to claim 1, characterized in that, The current limiting circuit includes a transistor and a base control circuit; The first terminal of the base control circuit is used to connect to the positive terminal of the power supply, the second terminal of the base control circuit is connected to the base of the transistor, and the third terminal of the base control circuit is used to connect to the negative terminal of the power supply; the emitter of the transistor is used to connect to the negative terminal of the power supply, and the collector of the transistor is used to connect to the source of the first switching transistor. The controller is used to control the base control circuit to adjust the base voltage of the transistor, thereby adjusting the current limiting value of the current limiting circuit.

7. The driving circuit according to claim 6, characterized in that, The base control circuit includes: a first resistor, a second resistor, a third resistor, a capacitor, and a second switching transistor; The first end of the first resistor is connected to the positive terminal of the power supply, and the second end of the first resistor is connected to the base of the transistor, the first end of the second resistor, and the first end of the capacitor, respectively; the second end of the second resistor and the second end of the capacitor are both connected to the negative terminal of the power supply; the emitter of the transistor is connected to the negative terminal of the power supply through the third resistor. The second switch is connected in parallel with the first resistor; The controller is configured to control the second switch to turn on before outputting the drive signal, so as to configure the base control circuit to a first control state; output the drive signal to drive the first switch to turn on, the base voltage of the transistor rises to a first base voltage, so that the current limiting value of the current limiting circuit reaches a first current limiting value; and, under the condition of satisfying a preset adjustment condition, control the second switch to turn off, the base voltage of the transistor decreases from the first base voltage to a second base voltage, so that the current limiting value of the current limiting circuit decreases from the first current limiting value to the second current limiting value. The second base voltage is less than the first base voltage.

8. A control method for a drive circuit, characterized in that, The driving circuit is used to drive the first switching transistor, which is located inside the temperature chamber, and the driving circuit is located outside the temperature chamber. The driving circuit includes a current limiting circuit and a controller. The first terminal of the current limiting circuit is used to connect to the positive terminal of the power supply, the second terminal of the current limiting circuit is used to connect to the source terminal of the first switching transistor, and the third terminal of the current limiting circuit is used to connect to the negative terminal of the power supply. A drive signal is output to drive the first switch to turn on; during the turn-on process of the first switch, the current limiting circuit is controlled to set a first current limiting value to provide a drive current corresponding to the first current limiting value to the first switch; when a preset adjustment condition is met, the current limiting value of the current limiting circuit is controlled to decrease from the first current limiting value to a second current limiting value to adjust the drive current in stages during the turn-on process of the first switch; the second current limiting value is less than the first current limiting value.

9. The control method according to claim 8, characterized in that, After the drive signal starts to be output, if a first preset time has elapsed, and the preset adjustment condition is determined to be met, the current limiting value of the current limiting circuit is controlled to decrease from the first current limiting value to the second current limiting value.

10. A testing system, characterized in that, The circuit includes the driving circuit according to any one of claims 1-7, and further includes a temperature chamber and a first switching transistor; The first switching transistor is located inside the temperature chamber, and the driving circuit is located outside the temperature chamber; the driving circuit is used to drive the first switching transistor.