Converter and control circuit, secondary control chip and control method thereof

CN122908600APending Publication Date: 2026-10-13JOULWATT TECH INC LTD
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Patent Information

Application Number
CN202512043291.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-30
Publication Date
2026-10-13

AI Technical Summary

Technical Problem

[0003]然而,对于反激变换器的输入电压不固定、宽范围的应用场景,如果输入电压较低,由于初级侧开关管存在寄生电容,那么抽掉初级侧寄生电容上的电压较小,这样从次级传递到初级的负电流就会变得较大,而随着输入电压的不断升高,检流电阻Rcs’上的负电流幅值不断减小

Benefits of technology

[0007]根据本申请实施例提供的变换器的控制电路,通过电压差值获取单元获取用于表征在主功率开关管开通的情况下同步整流开关管的漏源电压与变换器的输出电压之间电压差值的第一电压差值,来与变换器的输入电压的变化情况进行关联,这样调节控制单元能够根据第一电压差值对同步整流开关管的负向激磁开通时间进行调节,以使同步整流开关管的负向激磁开通时间跟随输入电压进行变化,确保初级侧的负电流在输入高低压下保持一致,大大降低变换器在低输入电压时的导通损耗。

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Abstract

The application relates to the technical field of switching power supplies, and discloses a converter, a control circuit, a secondary control chip and a control method, the converter comprising a main power switch tube arranged on a primary side and a synchronous rectification switch tube arranged on a secondary side, the control circuit comprising: a voltage difference value acquisition unit configured to acquire a first voltage difference value, the first voltage difference value being used for representing a voltage difference value between a drain-source voltage of the synchronous rectification switch tube and an output voltage of the converter under the condition that the main power switch tube is turned on and being associated with an input voltage of the converter; and an adjustment control unit configured to adjust a negative excitation turn-on time of the synchronous rectification switch tube according to the first voltage difference value, so that the negative excitation turn-on time of the synchronous rectification switch tube changes along with the input voltage, thereby keeping the negative current on the primary side consistent under high and low input voltages and greatly reducing the conduction loss of the converter under low input voltage.
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Description

Technical Field

[0001] This application relates to the field of switching power supply technology, and in particular to a control circuit for a converter, a secondary control chip for a converter, a converter, and a control method for a converter. Background Technology

[0002] like Figure 1 As shown, for a flyback converter where the secondary side is the master controller, the turn-on signal of the primary-side switch is transmitted by the secondary side. For example, when the control chip on the primary side detects a negative voltage at the CS pin, it immediately controls the primary-side switch to turn on, achieving ZVS (Zero Voltage Switch) control of the primary-side switch. The peak negative current ipkp on the primary-side current sensing resistor Rcs' is determined by the negative current excitation time tzvs of the secondary rectifier switch and the output voltage Vout, i.e., ipks = Vout. tzvs / Ls, the negative current on the primary side is ipkp=ipks / N=Vout tzvs / Ls / N=Vout tzvs / (Lm N), Lm is the magnetizing inductance on the primary side, Ls is the magnetizing inductance on the secondary side, N is the turns ratio of the secondary side to the primary side, and ipks is the peak value of the negative current on the secondary side. Therefore, by adjusting Vout... If tzvs is set to a fixed value, the negative current detected by the control chip on the primary side will not change with the output voltage. Therefore, by setting tzvs, a suitable negative current can be selected so that the flyback converter achieves the minimum loss and the optimal efficiency.

[0003] However, for applications where the input voltage of a flyback converter is variable and spans a wide range, if the input voltage is low, the voltage across the primary-side parasitic capacitor is small when it is removed due to the parasitic capacitance of the primary-side switch. This results in a larger negative current flowing from the secondary to the primary. As the input voltage increases, the magnitude of the negative current across the current sensing resistor Rcs' decreases. Therefore, related technologies typically use the primary negative current at higher input voltages as the criterion for the primary-side control chip to determine the negative voltage at the CS pin. This leads to a large negative current magnitude across the current sensing resistor Rcs' at lower input voltages. To maintain the same output current Io, Io = [(Ipks-) + (ipks+)] / 2 Dons, where Dons is the duty cycle of the secondary rectifier, will make the peak currents of the primary and secondary currents very high, thus causing the conduction losses of the primary and secondary sides of the flyback converter to become larger. Summary of the Invention

[0004] The purpose of this application is to provide a control circuit for a converter, a secondary control chip integrating the control circuit, a converter having the control circuit or the secondary control chip, and a control method for the converter. By obtaining a first voltage difference value used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter, the method correlates the change in the input voltage of the converter. It also fully considers the relationship that the junction capacitance decreases as the drain-source voltage of the switch increases, thereby adjusting the negative excitation turn-on time of the synchronous rectifier switch to ensure that the negative current on the primary side remains consistent under high and low input voltages, and greatly reducing the conduction loss of the converter at low input voltages.

[0005] To achieve the above objectives, the main technical solutions adopted in this application include:

[0006] In a first aspect, embodiments of this application provide a control circuit for a converter, the converter including a main power switch on the primary side and a synchronous rectifier switch on the secondary side, the control circuit including: a voltage difference acquisition unit configured to acquire a first voltage difference, wherein the first voltage difference is used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on, and is associated with the input voltage of the converter; and an adjustment control unit configured to adjust the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage.

[0007] According to the control circuit of the converter provided in the embodiments of this application, a first voltage difference value is obtained by the voltage difference acquisition unit to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on. This first voltage difference value is then correlated with the change of the input voltage of the converter. In this way, the control unit can adjust the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference value, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage. This ensures that the negative current on the primary side remains consistent under high and low input voltages, and greatly reduces the conduction loss of the converter at low input voltages.

[0008] Secondly, embodiments of this application provide a secondary control chip for a converter, the secondary control chip integrating the control circuit of the converter described in the above embodiments.

[0009] According to the secondary control chip of the converter provided in the embodiments of this application, by integrating the control circuit of the converter described in the above embodiments, the negative excitation turn-on time of the synchronous rectifier switch can be adjusted based on the compensation signal characterizing the input voltage of the converter. At the same time, the relationship between the junction capacitance and the decrease of the drain-source voltage of the switch is fully considered, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage, ensuring that the negative current on the primary side remains consistent under high and low input voltages, and greatly reducing the conduction loss of the converter at low input voltages.

[0010] Thirdly, embodiments of this application provide a converter, including: a main power switch transistor disposed on the primary side and a synchronous rectifier switch transistor disposed on the secondary side; a control circuit of the converter described in the above embodiments, or a secondary control chip of the converter described in the above embodiments.

[0011] According to the converter provided in the embodiments of this application, based on the control circuit of the converter described in the above embodiments or the secondary control chip described in the above embodiments, it is possible to control the compensation signal characterizing the input voltage of the converter to adjust the negative excitation turn-on time of the synchronous rectifier switch. At the same time, it also fully considers the relationship that the junction capacitance decreases as the drain-source voltage of the switch increases, so as to realize that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage, ensuring that the negative current on the primary side remains consistent under high and low input voltages, and greatly reducing the conduction loss of the converter at low input voltages.

[0012] Fourthly, embodiments of this application provide a control method for a converter, the converter including a main power switch on the primary side and a synchronous rectifier switch on the secondary side, the control method including: acquiring a first voltage difference, wherein the first voltage difference is used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on, and is associated with the input voltage of the converter; adjusting the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage.

[0013] According to the converter control method provided in the embodiments of this application, a first voltage difference is obtained to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on. This difference is then correlated with the changes in the input voltage of the converter to adjust the negative excitation turn-on time of the synchronous rectifier switch. This ensures that the negative excitation turn-on time of the synchronous rectifier switch follows the changes in the input voltage, thereby maintaining a consistent negative current on the primary side under both high and low input voltages and significantly reducing the conduction loss of the converter at low input voltages. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0015] Figure 1 This is a circuit diagram of a converter in related technologies;

[0016] Figure 2 A circuit diagram of a converter provided in one embodiment of this application;

[0017] Figure 3 A block diagram of a control circuit for a converter provided in the first embodiment of this application;

[0018] Figure 4 A block diagram of a control circuit for a converter provided in the second embodiment of this application;

[0019] Figure 5 A block diagram of a control circuit for a converter provided in the third embodiment of this application;

[0020] Figure 6 A block diagram of a control circuit for a converter provided in the fourth embodiment of this application;

[0021] Figure 7 A block diagram of a control circuit for a converter provided in the fifth embodiment of this application;

[0022] Figure 8 A schematic diagram of a ZVS control waveform of a converter provided in one embodiment of this application;

[0023] Figure 9 A block diagram of a control circuit for a converter provided in the sixth embodiment of this application;

[0024] Figure 10 A block diagram of a control circuit for a converter provided in the seventh embodiment of this application;

[0025] Figure 11 A schematic diagram showing the curves of the compensated volt-second threshold and negative excitation turn-on time following the input voltage, provided in one embodiment of this application;

[0026] Figure 12 A block diagram of a control circuit for a converter provided in the eighth embodiment of this application;

[0027] Figure 13 A block diagram of a control circuit for a converter provided in the ninth embodiment of this application;

[0028] Figure 14 A schematic diagram of the curves showing the compensation current and negative excitation turn-on time following the input voltage, provided for another embodiment of this application;

[0029] Figure 15 A block diagram of a control circuit for a converter provided in the tenth embodiment of this application;

[0030] Figure 16 A schematic diagram showing the curves of the jointly compensated volt-second threshold and the compensation voltage following the input voltage, provided in another embodiment of this application;

[0031] Figure 17 This is a schematic diagram of the junction capacitance of the primary main power switch transistor as a function of drain-source voltage, provided in one embodiment of this application.

[0032] Figure 18 A schematic diagram of the junction capacitance of a secondary synchronous rectifier switch as a function of drain-source voltage, provided in one embodiment of this application;

[0033] Figure 19 A block diagram of a control circuit for a converter provided in the eleventh embodiment of this application;

[0034] Figure 20 A block diagram of a control circuit for a converter provided in the twelfth embodiment of this application;

[0035] Figure 21 This application also provides a schematic diagram of the curves showing the change of the volt-second threshold and the transformation voltage following the output voltage after joint compensation, according to an embodiment of the present application.

[0036] Figure 22 This is a block diagram of a control circuit for a converter provided in the thirteenth embodiment of this application. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] The control circuit of the converter, the secondary control chip integrating the control circuit, the converter having the control circuit or the secondary control chip, and the control method of the converter provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0039] refer to Figure 2 The diagram shown is a circuit schematic of a converter according to an embodiment of this application. Figure 2 As shown, the converter 300 includes a main power switch Q1 on the primary side, a synchronous rectifier switch M1 on the secondary side, a secondary control chip 100, and a primary control chip 200. The control pin GT of the primary control chip 200 is connected to the control terminal of the main power switch Q1. The current detection pin CS of the primary control chip 200 is connected to one end of a sampling resistor Rcs and to the source of the main power switch Q1. The other end of the sampling resistor Rcs is connected to ground. The primary control chip 200 provides a drive signal Vgs_p to the control terminal of the main power switch Q1 based on secondary feedback information and the negative current information on the sampling resistor Rcs, driving the main power switch Q1 to perform ZVS turn-on. The control pin GT of the secondary control chip 100 is connected to the control terminal of the synchronous rectifier switch M1. The node between the drain and secondary winding of the synchronous rectifier switch M1 is connected to the switching node pin SW of the secondary control chip 100. The source of the synchronous rectifier switch M1 is connected to ground. The output voltage detection pin Vout of the secondary control chip 100 is connected to the output terminal of the converter 300. The volt-second threshold setting pin VT of the secondary control chip 100 is connected to ground through the volt-second threshold configuration resistor Rvt. The secondary control chip 100 determines the voltage based on the output voltage Vo of the converter 300 and the synchronous rectifier switch... The drain-source voltage Vds_s of transistor M1 provides a drive signal Vgs_s to the control terminal of synchronous rectifier switch transistor M1. The synchronous rectifier switch transistor M1 can be turned on using a small pulse turn-on method with negative excitation controllable. The turn-on time tzvs is set based on the volt-second threshold configuration resistor Rvt. During the tzvs period of the synchronous rectifier switch transistor M1's negative excitation turn-on, additional reverse excitation is performed on the excitation inductance of converter 300 (e.g., provided by the primary winding), i.e., a negative excitation current is generated. After the synchronous rectifier switch transistor M1 is turned off, the main power switch transistor Q1 is turned on at zero voltage at ZVS.

[0040] And, as Figure 3 As shown, the control circuit 400 of the converter includes a voltage difference acquisition unit 41 and an adjustment control unit 42.

[0041] The voltage difference acquisition unit 41 is configured to acquire a first voltage difference, wherein the first voltage difference can be used to characterize the voltage difference between the drain-source voltage Vds_s of the synchronous rectifier switch M1 and the output voltage Vo of the converter when the main power switch Q1 is turned on. For example, there is a corresponding coefficient relationship between the first voltage difference and the voltage difference Vds_s-Vo, and the voltage difference Vds_s-Vo is associated with the input voltage Vin of the converter to represent the change of the input voltage Vin.

[0042] Specifically, in one example of this application, the output voltage Vo of the converter can be detected through the output voltage detection pin Vout of the secondary control chip 100, and the drain-source voltage Vds_s of the synchronous rectifier switch M1 when the main power switch Q1 is turned on can be detected through the switching node pin SW of the secondary control chip 100. Thus, the voltage difference acquisition unit 41 can obtain the voltage difference Vds_s-Vo, which can be converted to obtain the first voltage difference. Furthermore, when the main power switch Q1 is turned on, the voltage difference Vds_s-Vo = Vin / N between the drain-source voltage Vds_s of the secondary synchronous rectifier switch M1 and the output voltage Vo of the converter is detected, where N is the turns ratio of the secondary winding to the primary winding. Therefore, the voltage difference Vds_s-Vo can reflect the change in the input voltage Vin of the converter.

[0043] Thus, the adjustment control unit 42 is configured to adjust the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 according to the first voltage difference, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 changes with the input voltage Vin.

[0044] Optionally, in some embodiments of this application, such as Figure 3 As shown, the voltage difference acquisition unit 41 includes a first subtractor 411 and a first sample-and-hold circuit 412. The positive input terminal of the first subtractor 411 is adapted to connect to the drain-source voltage Vds_s of the synchronous rectifier switch, and the negative input terminal of the first subtractor 411 is adapted to connect to the output voltage Vo of the converter. The input terminal of the first sample-and-hold circuit 412 is connected to the output terminal of the first subtractor 411. The first sample-and-hold circuit 412 is configured to sample when the main power switch Q1 is turned on to obtain the voltage difference Vds_s-Vo, and hold it when the main power switch Q1 is turned off to output the first voltage difference. The control unit 42 uses the first voltage difference to adjust and control the synchronous rectifier switch M1 during the negative excitation turn-on time tzvs.

[0045] Alternatively, in some other embodiments of this application, such as Figure 4As shown, the voltage difference acquisition unit 41 includes: a second sample-and-hold circuit 413 and a second subtractor 414. The input terminal of the second sample-and-hold circuit 413 is adapted to be connected to the drain-source voltage Vds_s of the synchronous rectifier switch M1. The second sample-and-hold circuit 413 is configured to sample when the main power switch Q1 is turned on to obtain the drain-source voltage Vds_s, and to hold it when the main power switch Q1 is turned off. The positive input terminal of the second subtractor 414 is connected to the output terminal of the second sample-and-hold circuit 422. The negative input terminal of the second subtractor 414 is adapted to be connected to the output voltage Vo of the converter to output the first voltage difference. This also facilitates the adjustment control unit 42 to use the first voltage difference to adjust and control the synchronous rectifier switch M1 during the negative excitation turn-on time tzvs.

[0046] Therefore, the voltage difference acquisition unit 41 can obtain the first voltage difference that characterizes the input voltage Vin of the converter, so that the control unit 42 can use the first voltage difference to adjust the negative excitation turn-on time tzvs of the synchronous rectifier switch M1.

[0047] Optionally, in some embodiments of this application, the adjustment control unit 42 is further configured to integrate the output voltage Vo of the converter within the negative excitation turn-on time tzvs to obtain a volt-second integral value, and when the volt-second integral value is greater than the volt-second threshold of the converter, control the synchronous rectifier switch M1 to turn off so that the negative excitation turn-on ends. The volt-second integral value and / or the volt-second threshold can be compensated according to a first voltage difference so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 increases with the increase of the input voltage Vin.

[0048] refer to Figure 3 , Figure 4 or Figure 5 As shown, the adjustment control unit 42 is configured to compensate the volt-second threshold Vref of the converter according to the first voltage difference in order to adjust the negative excitation turn-on time tzvs of the synchronous rectifier switch M1.

[0049] Furthermore, such as Figure 3 or Figure 4 As shown, the adjustment control unit 42 includes a first voltage / current converter 421, a second voltage / current converter 422, and a first comparator 423.

[0050] The first voltage / current converter 421 has its input terminal adapted to receive a first voltage difference. It is configured to convert the first voltage difference to output a first compensation signal I1 (Vds_s-Vo), which is a current compensation signal associated with the voltage difference Vds_s-Vo. The second voltage / current converter 422 has its input terminal adapted to receive the converter's output voltage Vo. Its output terminal is grounded through a first integrating capacitor C1. It is configured to convert the converter's output voltage Vo into an output current Io. During the negative excitation turn-on time, tzvs uses the output current Io to charge the first integrating capacitor C1 to generate the first volt-second integral value Vc1. The first input terminal of the first comparator 423 is adapted to receive the first volt-second integral value Vc1, and the second input terminal of the first comparator 423 is adapted to receive the first volt-second threshold Vref1 obtained after compensation by the first compensation signal I1 (Vds_s-Vo). The first comparator 423 is configured to output a turn-off control signal, namely the ZVS_gate turn-off signal, when the first volt-second integral value Vc1 is greater than the first volt-second threshold Vref1, so as to control the synchronous rectifier switch M1 to turn off.

[0051] In other words, the adjustment control unit 42 of this embodiment compensates the volt-second threshold Vref of the converter according to the first compensation signal I1 (Vds_s-Vo) so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 changes with the input voltage Vin.

[0052] Therefore, in some embodiments of this application, in order to optimize the negative current when the input voltage of the converter is low and reduce the effective values ​​of the primary and secondary currents, the voltage difference between the secondary currents Vds_s and Vo can be detected after the synchronous rectifier switch M1 is turned off, i.e., when the main power switch Q1 is turned on, and compensation can be performed based on the voltage difference. This is because Vo The value of tzvs decreases as Vds_s - Vo decreases, i.e., Vo... As the input voltage Vin decreases, the negative current on the primary sampling resistor Rcs also decreases. This causes the threshold for turning off the synchronous rectifier switch M1 to increase as the input voltage Vin increases. Consequently, the negative excitation turn-on time tzvs at lower input voltages will be shorter than that at higher input voltages, ensuring that the magnitude of the negative current on the primary side remains consistent under both high and low voltage conditions, thus reducing conduction losses at lower input voltages.

[0053] Among them, such as Figure 3As shown, when the main power switch Q1 is turned on, the drain-source voltage Vds_s of the synchronous rectifier switch M1, which is detected by the switching node pin SW of the secondary control chip 100, can be subtracted by the output voltage Vo of the converter, which is detected by the output voltage detection pin Vout, through the first subtractor 411. The voltage difference Vds_s-Vo can be obtained, and then sampled and held by the first sample-and-hold circuit 412 to obtain the first voltage difference. In this way, when the synchronous rectifier switch M1 is turned on with negative excitation, the first voltage / current converter 421 can convert the first voltage difference into the first compensation signal I1 (Vds_s-Vo), so as to achieve compensation when the synchronous rectifier switch M1 is turned on with negative excitation, so as to adjust the volt-second threshold.

[0054] Furthermore, combined Figure 2 and Figure 3 As shown, the adjustment control unit 42 can compensate the volt-second threshold Vref of the converter by superimposing the first compensation signal I1 (Vds_s-Vo) onto the volt-second threshold setting pin VT of the secondary control chip 100, thereby obtaining the first volt-second threshold Vref1.

[0055] The volt-second threshold setting pin VT is connected to ground via the volt-second threshold configuration resistor Rvt and to the reference current source Iref. Thus, the first compensation signal I1 (Vds_s-Vo) is superimposed with the reference current source Iref, generating a compensated first volt-second threshold Vref1 on the volt-second threshold configuration resistor Rvt. This first volt-second threshold Vref1 is output through the volt-second threshold setting pin VT. Vref1 is used to control the negative excitation turn-on time tzvs of the synchronous rectifier switch M1. Specifically, through the superposition and compensation of the first compensation signal I1 (Vds_s-Vo), the negative excitation turn-on time tzvs of the low voltage is made smaller than that of the high voltage, thus avoiding excessive conduction losses caused by excessive primary and secondary currents when the input voltage is low.

[0056] Optionally, in some embodiments of this application, such as Figure 5 As shown, the adjustment control unit 42 is configured to compensate for a volt-second threshold based on a first voltage difference, wherein the adjustment control unit 42 includes a first adder 424, a third voltage / current converter 425, and a second comparator 426.

[0057] The first input terminal of the first adder 424 is adapted to receive a first voltage difference, and the second input terminal of the first adder 424 is adapted to receive a first reference voltage, which is the voltage generated by the reference current source Iref across the volt-second threshold configuration resistor Rvt. The first adder 424 is configured to add the first voltage difference to the first reference voltage to obtain a second volt-second threshold Vref2. The input terminal of the third voltage / current converter 425 is adapted to receive the output voltage Vo of the converter, and the output terminal of the third voltage / current converter 425 is grounded through the second integrating capacitor C2. The third voltage / current converter 425 is configured to receive the first voltage difference. The converter is configured to convert the output voltage Vo of the converter into an output current Io, and to charge the second integrating capacitor C2 with the output current Io during the negative excitation turn-on time tzvs to generate the second volt-second integral value Vc2. The first input terminal of the second comparator 426 is adapted to be connected to the second volt-second integral value Vc2, and the second input terminal of the second comparator 426 is adapted to be connected to the second volt-second threshold Vref2. The second comparator 426 is configured to output a turn-off control signal, namely the ZVS_gate turn-off signal, when the second volt-second integral value Vc2 is greater than the second volt-second threshold Vref2, so as to control the synchronous rectifier switch M1 to turn off.

[0058] As can be seen, when the main power switch Q1 is turned on, the drain-source voltage Vds_s of the synchronous rectifier switch M1 detected by the switching node pin SW of the secondary control chip 100 can be subtracted by the output voltage Vo of the converter detected by the output voltage detection pin Vout through the first subtractor 411 to obtain the voltage difference Vds_s-Vo. This difference is then sampled and held by the first sample-and-hold circuit 412 to obtain the first voltage difference. In this way, when the synchronous rectifier switch M1 is turned on with negative excitation, the first adder 424 can add the first voltage difference to the first reference voltage to achieve compensation when the synchronous rectifier switch M1 is turned on with negative excitation, so as to adjust the volt-second threshold.

[0059] Thus, the third voltage / current converter 425 converts the converter's output voltage Vo into an output current Io, and charges the second integrating capacitor C2 during the negative excitation turn-on time tzvs to obtain the second volt-second integral value Vc2. When the second volt-second integral value Vc2 is greater than the second volt-second threshold, the second comparator 426 outputs a turn-off control signal, namely the ZVS_gate turn-off signal, to control the synchronous rectifier switch M1 to turn off, thereby realizing the ZVS turn-on of the main switching power transistor Q1.

[0060] Alternatively, in some other embodiments of this application, such as Figure 6 or Figure 7As shown, the adjustment control unit 42 is also configured to compensate for the volt-second integral value based on the first voltage difference in order to adjust the negative excitation turn-on time tzvs of the synchronous rectifier switch M1.

[0061] Furthermore, such as Figure 6 As shown, the adjustment control unit 42 includes a fourth voltage / current converter 427, a fifth voltage / current converter 428, a third subtractor 429, and a third comparator 430.

[0062] The fourth voltage / current converter 427 has its input terminal adapted to receive a first voltage difference. It is configured to convert the first voltage difference to output a first compensation signal I1 (Vds_s-Vo), which is a compensation current associated with the voltage difference Vds_s-Vo. The fifth voltage / current converter 428 has its input terminal adapted to receive the converter's output voltage Vo. It is configured to convert the converter's output voltage Vo into an output current Io. The positive input terminal of the third subtractor 429 is connected to the output terminal of the fifth voltage / current converter 428, and the negative input terminal of the third subtractor 429 is connected to the fourth voltage / current converter 427. The output terminal of the third subtractor 429 is connected to... The third integrating capacitor C3 is grounded. The third subtractor 429 is configured to subtract the output current Io from the first compensation signal I1 (Vds_s-Vo) to output the compensated current. During the negative excitation turn-on time tzvs, the compensated current is used to charge the third integrating capacitor C3 to generate the third volt-second integral value Vc3. The first input terminal of the third comparator 430 is adapted to be connected to the third volt-second integral value Vc3, and the second input terminal of the third comparator 430 is adapted to be connected to the volt-second threshold Vref of the converter. The third comparator 430 is configured to output a turn-off control signal, namely the ZVS_gate turn-off signal, when the third volt-second integral value Vc3 is greater than the volt-second threshold Vref of the converter, so as to control the synchronous rectifier switch M1 to turn off.

[0063] In other words, the adjustment control unit 42 in this embodiment compensates the output current Io corresponding to the output voltage Vo of the converter according to the first compensation signal I1 (Vds_s-Vo), thereby compensating the volt-second integral value during the negative excitation turn-on time, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 changes with the input voltage Vin.

[0064] In this context, the first compensation signal I1 (Vds_s-Vo) is applied to the third integrating capacitor C3, meaning the compensated current output by the third subtractor 429 is equal to Io-I1 (Vds_s-Vo), while the converter's volt-second threshold Vref remains unchanged (Vref=Iref). Rvt), Vo tzvs is proportional to Io tzvs, and the third volt-second integral value Vc3 is proportional to [Io-I1(Vds_s-Vo)]. Since tzvs ends when the third volt-second integral value Vc3 reaches the volt-second threshold Vref, it can be known that because Io-I1(Vds_s-Vo) decreases as Vin increases, tzvs increases as Vin increases, thus realizing Vo. The purpose of increasing tzvs with Vin is to achieve the goal of increasing the negative current on the primary sampling resistor Rcs as the input voltage Vin increases. This means that the negative excitation turn-on time tzvs when the input voltage is high will be greater than that when the input voltage is low, so that the amplitude of the negative current on the primary side remains consistent under high and low voltage conditions, reducing the conduction loss when the input voltage is low.

[0065] Optionally, in some embodiments of this application, the adjustment control unit 42 is further configured to compensate for the volt-second integral value based on the first voltage difference to adjust the negative excitation turn-on time tzvs of the synchronous rectifier switch M1, wherein, as Figure 7 As shown, the adjustment control unit 42 includes a fourth subtractor 431, a sixth voltage / current converter 432, and a fourth comparator 433.

[0066] The positive input of the fourth subtractor 431 is adapted to be connected to the output voltage Vo of the converter, and the negative input of the fourth subtractor 431 is adapted to be connected to the first voltage difference. The fourth subtractor 431 is configured to subtract the output voltage Vo of the converter from the first voltage difference to obtain the compensated voltage. The input of the sixth voltage / current converter 432 is connected to the output of the fourth subtractor 431, and the output of the sixth voltage / current converter 432 is grounded through the fourth integrating capacitor C4. The sixth voltage / current converter 432 is configured to convert the compensated voltage into a compensated current I (Vo-ΔV1), where ΔV1... V1 is the first voltage difference, and the fourth integrating capacitor C4 is charged with the compensated current I (Vo-ΔV1) during the negative excitation turn-on time tzvs to generate the fourth volt-second integral value Vc4. The first input terminal of the fourth comparator 433 is adapted to receive the fourth volt-second integral value Vc4, and the second input terminal of the fourth comparator 433 is adapted to receive the volt-second threshold Vref of the converter. The fourth comparator 433 is configured to output a turn-off control signal, namely the ZVS_gate turn-off signal, when the fourth volt-second integral value Vc4 is greater than the volt-second threshold Vref of the converter, so as to control the synchronous rectifier switch M1 to turn off.

[0067] As can be seen, when the main power switch Q1 is turned on, the drain-source voltage Vds_s of the synchronous rectifier switch M1, detected by the switching node pin SW of the secondary control chip 100, can be subtracted from the output voltage Vo of the converter detected by the output voltage detection pin Vout through the first subtractor 411 to obtain the voltage difference Vds_s-Vo. This difference is then sampled and held by the first sample-and-hold circuit 412 to obtain the first voltage difference. Thus, when the synchronous rectifier switch M1 is negatively energized and turned on, the output voltage Vo of the converter can be compared with the first voltage difference through the fourth subtractor 431. The difference is subtracted, so the sixth voltage / current converter 432 transforms the difference between the output voltage Vo and the first voltage difference into a compensated current I (Vo-ΔV1), which charges the fourth integrating capacitor C4 to obtain the fourth volt-second integral value Vc4. When the fourth volt-second integral value Vc4 is greater than the volt-second threshold Vref, the fourth comparator 433 outputs a turn-off control signal, namely the ZVS_gate turn-off signal, to control the synchronous rectifier switch M1 to turn off, thereby realizing volt-second integral value compensation when the synchronous rectifier switch M1 is negatively energized and turned on, ensuring the ZVS turn-on of the main switching power transistor Q1.

[0068] Specifically, in one embodiment of this application, combined with Figure 3 and Figure 8 As shown, when the main power switch Q1 is turned on, the synchronous rectifier switch M1 is turned off. For example, Vgs_s is low and Vgs_p is high. The primary winding is charged, and the primary side magnetizing current ip gradually increases. The voltage Vcs on the sampling resistor Rcs changes from negative to positive and gradually increases along with ip. The secondary side magnetizing current is is zero. At this time, the output voltage Vo of the converter can be detected by the output voltage detection pin Vout of the secondary control chip 100, and the drain-source voltage Vds_ of the synchronous rectifier switch M1 can be detected by the switching node pin SW of the secondary control chip 100. The voltage difference Vds_s-Vo between the two can be obtained by sampling and holding the voltage difference Vds_s-Vo. Then, the first voltage difference is obtained by sampling and holding the voltage difference Vds_s-Vo. When ZVS_gate becomes high, the synchronous rectifier switch M1 is turned on to perform negative excitation. At this time, the first voltage difference can be converted into the first compensation signal I1 (Vds_s-Vo) by the first voltage / current converter 421. The first compensation signal I1 (Vds_s-Vo) is superimposed on Rvt and used together with the reference current source Iref to set the volt-second threshold Vref, thereby realizing the compensation of the volt-second threshold.

[0069] Furthermore, after ZVS_gate goes high and the synchronous rectifier switch M1 is negatively energized and turned on, the sampled output voltage Vo is converted into an output current Io by the second voltage / current converter 422, which charges the first integrating capacitor C1 to obtain the first volt-second integral value Vc1. When the voltage Vc1 of the first integrating capacitor C1 is greater than the first volt-second threshold, it is equal to Iref. Rvt+I1(Vds_s-Vo) After Rvt, the first comparator 423 outputs a ZVS_gate turn-off signal, which controls the synchronous rectifier switch M1 to turn off. The primary control chip 200 detects the negative voltage Vcs and controls the main power switch Q1 to turn on, thus realizing the ZVS turn-on of the main power switch Q1. This process is repeated.

[0070] Therefore, this embodiment can make the volt-second threshold for ZVS_gate turn-on increase with the increase of input voltage, thereby reducing the amplitude of negative current of ZVS_gate under low input voltage and thus reducing conduction loss.

[0071] Optionally, in some embodiments of this application, the voltage difference acquisition unit 41 is further configured to control the first voltage difference to increase non-linearly as the voltage difference increases, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 increases non-linearly as the input voltage Vin increases.

[0072] In other words, when the voltage difference acquisition unit 41 acquires the first voltage difference based on the drain-source voltage Vds_s of the synchronous rectifier switch M1 and the output voltage Vo of the converter, it can make the first voltage difference increase nonlinearly as the voltage difference increases through nonlinear conversion.

[0073] For example, when performing a nonlinear transformation on the first voltage difference, the non-fixed value K can be placed separately on the sampling of Vds_s and Vo, that is, K is connected to the positive input terminal of the first subtractor 411. Vds_s, the negative input of the first subtractor 411 is connected to K. Alternatively, a non-fixed K can be placed on the operation of the first subtractor 411 or on the sampling and holding of the first sample-and-hold circuit 412 to achieve a non-linear increase in the first voltage difference as the voltage difference increases. This will not be elaborated on in detail here.

[0074] Optionally, in some other embodiments of this application, the adjustment control unit 42 is further configured to compensate the volt-second integral value and / or volt-second threshold value according to the first voltage difference, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 increases nonlinearly with the increase of the input voltage Vin.

[0075] Among them, such as Figure 9 or Figure 10 As shown, the adjustment control unit 42 is also configured to perform a nonlinear transformation on the first voltage difference to obtain a second compensation signal, and to compensate the volt-second threshold Vref of the converter according to the second compensation signal, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 increases nonlinearly with the increase of the input voltage Vin.

[0076] For example, with Figure 3 Compared to the embodiments shown, Figure 9 In the illustrated embodiment, the first voltage / current converter 421 is replaced with a first nonlinear voltage / current converter 434. This allows the first nonlinear voltage / current converter 434 to perform a nonlinear conversion on the first voltage difference, resulting in the second compensation signal K. I2(Vds_s-Vo) is a compensation current signal that is associated with the voltage difference Vds_s-Vo and changes nonlinearly thereafter. Then, the second compensation signal K... The sum of I2 (Vds_s-Vo) and the reference current source Iref generates a compensated volt-second threshold Vref4 on the volt-second threshold configuration resistor Rvt. This compensated volt-second threshold Vref4 is output through the volt-second threshold setting pin VT. The compensated volt-second threshold Vref4 is used to control the negative excitation turn-on time tzvs of the synchronous rectifier switch M1, i.e., through the second compensation signal K. The superposition compensation of I2(Vds_s-Vo) makes the compensated volt-second threshold Vref4=[K I2(Vds_s-Vo)+Iref] Rvt increases non-linearly with Vin, ensuring that the negative excitation turn-on time tzvs increases non-linearly with Vin. This avoids excessive conduction losses caused by excessive primary and secondary currents at low input voltages. Simultaneously, it fully considers the relationship between junction capacitance and drain-source voltage of the switching transistor, ensuring that the magnitude of the negative current tends to be consistent under high and low input voltages. Here, K is a non-fixed value that can vary with Vin.

[0077] Or, with Figure 5 Compared to the embodiments shown, Figure 10 In the illustrated embodiment, the first adder 424 is replaced by a nonlinear superposition unit 435. This allows the nonlinear superposition unit 435 to nonlinearly superimpose the first voltage difference with the first reference voltage, thereby compensating for the volt-second threshold and obtaining the compensated volt-second threshold Vref5=K. (Vds_s-Vo)+Vref is used to control the negative excitation turn-on time tzvs of the synchronous rectifier switch M1, i.e., through K The nonlinear superposition compensation of (Vds_s-Vo) makes the compensated volt-second threshold Vref5=K. (Vds_s-Vo)+Vref increases non-linearly with Vin, ensuring that the negative excitation turn-on time tzvs increases non-linearly with Vin. This avoids excessive conduction losses caused by excessive primary and secondary currents at low input voltages. It also fully considers the relationship between junction capacitance and drain-source voltage of the switching transistor, ensuring that the magnitude of the negative current tends to be consistent under high and low input voltages. Here, K is a non-fixed value that can vary with Vin.

[0078] Furthermore, the curves showing the changes in the compensated volt-second threshold Vref5 and the negative excitation turn-on time tzvs with Vin can be obtained as follows: Figure 11 As shown.

[0079] Alternatively, in some other embodiments of this application, such as Figure 12 or Figure 13 As shown, the adjustment control unit 42 is also configured to perform a nonlinear transformation on the first voltage difference to obtain a third compensation signal, and to compensate the volt-second integral value according to the third compensation signal, so that the negative excitation turn-on time tzvs of the synchronous rectifier switch M1 increases nonlinearly with the increase of the input voltage Vin.

[0080] Among them, with Figure 6 Compared to the embodiments shown, Figure 12 In the illustrated embodiment, the fourth voltage / current converter 427 is replaced by a second nonlinear voltage / current converter 436. This allows the second nonlinear voltage / current converter 436 to perform a nonlinear conversion on the first voltage difference, resulting in the third compensation signal K. I3 (Vds_s-Vo) is a compensation current signal that is associated with the voltage difference Vds_s-Vo and changes nonlinearly. Then, the output current Io obtained from the fifth voltage / current converter 428 is combined with the third compensation signal K by the third subtractor 429. Subtracting I3(Vds_s-Vo) yields the compensated current. This compensated current is used to charge the third integrating capacitor C3 during the negative excitation turn-on time tzvs, thus regulating the negative excitation turn-on time tzvs of the synchronous rectifier switch M1. The compensated current decreases non-linearly with increasing Vin, ensuring that tzvs increases non-linearly with increasing Vin. This avoids excessive conduction losses due to excessive primary and secondary currents at low input voltages. Simultaneously, the relationship between junction capacitance and drain-source voltage of the switch is fully considered, ensuring that the magnitude of the negative current remains consistent across high and low input voltages. Here, K is a non-fixed value that can vary with Vin.

[0081] Or, with Figure 7 Compared to the embodiments shown, Figure 13In the illustrated embodiment, the fourth subtractor 431 is replaced by a nonlinear subtractor 437. The nonlinear subtractor 437 performs a nonlinear subtraction between the first voltage difference and the converter's output voltage Vo, resulting in the compensated voltage Vo-K. (Vds_s-Vo), for example, by performing a nonlinear transformation on the first voltage difference, we can obtain K. (Vds_s-Vo), then the converter's output voltage Vo and K Subtracting (Vds_s-Vo) yields the compensated voltage, which is then converted to voltage Vo-K by the sixth voltage / current converter 432. (Vds_s-Vo) is converted into the compensated current I[Vo-K] [(Vds_s-Vo)] is used to control the negative excitation turn-on time tzvs of the synchronous rectifier switch M1, that is, through the compensated current I[Vo-K] [(Vds_s-Vo)] charges the fourth integrating capacitor C4, thereby adjusting the negative excitation turn-on time tzvs of the synchronous rectifier switch M1, and the compensated current I[Vo-K [(Vds_s-Vo)] decreases non-linearly with increasing Vin, so that tzvs increases non-linearly with increasing Vin, avoiding excessive conduction losses caused by excessive primary and secondary currents when the input voltage is low. At the same time, it fully considers the relationship between junction capacitance and drain-source voltage of the switching transistor, ensuring that the magnitude of the negative current tends to be consistent under high and low input voltages. Here, K is a non-fixed value and can vary with Vin.

[0082] Furthermore, the curves showing the changes in compensated current and negative excitation turn-on time tzvs with Vin can be obtained as follows: Figure 14 As shown.

[0083] Optionally, in some embodiments of this application, such as Figure 15 As shown, the control circuit of the converter described above also includes a first compensation signal generation unit 11. The first compensation signal generation unit 11 is configured to obtain the drain-source voltage Vds_s of the synchronous rectifier switch M1 when the main power switch Q1 is turned on, and to perform a nonlinear transformation on the drain-source voltage Vds_s of the synchronous rectifier switch to generate a fourth compensation signal K. Ids_s is used to recompensate the compensated volt-second threshold to obtain the third volt-second threshold Vref3.

[0084] Furthermore, the first compensation signal generation unit 11 includes a third sample-and-hold circuit 113, a third nonlinear voltage / current converter 111, a compensation resistor R0, and a fifth subtractor 112. The input terminal of the third sample-and-hold circuit 113 is adapted to connect the drain-source voltage Vds_s of the synchronous rectifier switch, and samples and holds the drain-source voltage Vds_s of the synchronous rectifier switch, so as to facilitate the use of the fourth compensation signal K during the negative excitation turn-on time tzvs. Ids_s is compensated, and the input terminal of the third nonlinear voltage / current converter 111 is connected to the output terminal of the third sample-and-hold circuit 113. The third nonlinear voltage / current converter 111 is configured to transform the drain-source voltage Vds_s of the synchronous rectifier switch sampled and held by the third sample-and-hold circuit 113 to output a nonlinear switching current K. Ids_s is the fourth compensation signal. One end of the compensation resistor R0 is connected to the output of the third nonlinear voltage / current converter 111, and the other end of the compensation resistor R0 is grounded. The positive input of the fifth subtractor 112 is suitable for connecting the volt-second threshold compensated by the first compensation signal I1 (Vds_s-Vo), and the negative input of the fifth subtractor 112 is suitable for connecting the nonlinear switching current K. The voltage signal V across the compensation resistor R0 of Ids_s R0 The fifth subtractor 112 is configured to subtract the volt-second threshold compensated by the first compensation signal I1 (Vds_s-Vo) from the voltage signal V. R0 Subtraction is performed to recompensate the compensated volt-second threshold.

[0085] It is understood that in other embodiments of this application, when recompensating the compensated volt-second threshold, the first voltage difference can be nonlinearly converted by a nonlinear voltage / current converter to obtain a nonlinear compensation current, or the first compensation signal I1 (Vds_s-Vo) can be superimposed with the reference current source Iref, and then the nonlinear switching current K can be subtracted. Ids_s, and then the jointly compensated volt-second threshold is generated on the volt-second threshold configuration resistor Rvt. The output is then set via the volt-second threshold setting pin VT to control the negative excitation turn-on time tzvs of the synchronous rectifier switch M1. This achieves a non-linear increase in the jointly compensated volt-second threshold as Vin increases. Specifically, it can be seen as follows... Figure 16 As shown.

[0086] Specifically, such as Figure 17 As shown, the junction capacitance C2' of the primary main power switch Q1 decreases nonlinearly as the Vds_p voltage increases, and the energy required for the junction capacitance C2' to discharge is E1 = 1 / 2. C2' (Vin + N*Vo)^2 increases non-linearly with the increase of Vin, and the overall trend is that it first increases and then decreases. Similarly, as... Figure 18 As shown, the junction capacitance C3' of the secondary synchronous rectifier switch M1 decreases nonlinearly as the voltage Vds_s increases. The energy required to charge the secondary junction capacitance C3' is E2 = 1 / 2. C3' (Vo+Vin / N)^2 will also increase nonlinearly with the increase of Vin, and the overall trend is that it is larger first and then smaller.

[0087] Therefore, in some embodiments of this application, it is necessary to consider the relationship between junction capacitance and drain-source voltage, and to perform nonlinear compensation on the ZVS_gate turn-on control signal so that the magnitude of the negative current under high and low voltage is consistent, thereby reducing conduction loss.

[0088] Specifically, in one embodiment of this application, combined with Figure 8 , Figure 15 and Figure 16 As shown, when the main power switch Q1 is turned on, the synchronous rectifier switch M1 is turned off. For example, Vgs_s is low and Vgs_p is high. The primary winding is charged, and the primary side magnetizing current ip gradually increases. The voltage Vcs on the sampling resistor Rcs changes from negative to positive and gradually increases along with ip. The secondary side magnetizing current is is zero. At this time, the output voltage Vo of the converter can be detected by the output voltage detection pin Vout of the secondary control chip 100, and the drain-source voltage Vds of the synchronous rectifier switch M1 can be detected by the switching node pin SW of the secondary control chip 100. The voltage difference Vds_s-Vo between the two can be obtained by sampling and holding the voltage difference Vds_s-Vo. Then, the first voltage difference is obtained by sampling and holding the voltage difference Vds_s-Vo. When ZVS_gate becomes high, the synchronous rectifier switch M1 is turned on to perform negative excitation. At this time, the first voltage difference is converted into a current compensation signal I1 (Vds_s-Vo) by the first voltage / current converter 421. The current compensation signal I1 (Vds_s-Vo) is superimposed on Rvt and used together with the reference current source Iref to set the volt-second threshold Vref, thereby realizing the compensation of the volt-second threshold.

[0089] Furthermore, the drain-source voltage Vds_s of the synchronous rectifier switch M1, detected by the switching node pin SW of the secondary control chip 100, is sampled and held by the third sample-and-hold circuit 113. When ZVS_gate goes high, the synchronous rectifier switch M1 is negatively energized and turned on. The drain-source voltage Vds_s of the synchronous rectifier switch is nonlinearly converted by the third nonlinear voltage / current converter 111 to output a nonlinear switching current, which flows through the compensation resistor R0 to generate V.R0 The compensated volt-second threshold is then compensated again.

[0090] Therefore, after ZVS_gate goes high and the synchronous rectifier switch M1 is negatively energized and turned on, the sampled output voltage Vo is converted into output current Io by the second voltage / current converter 422, which charges the first integrating capacitor C1. When the voltage of the first integrating capacitor C1 is greater than the volt-second threshold after two compensations, i.e., the third volt-second threshold Vref3 = Iref Rvt+I1(Vds_s-Vo) Rvt-V R0 Then, the first comparator 423 outputs a ZVS_gate turn-off signal, controlling the synchronous rectifier switch M1 to turn off. The primary control chip 200 detects the negative voltage Vcs and controls the main power switch Q1 to turn on, thus realizing the ZVS turn-on of the main power switch Q1. This process is repeated.

[0091] In this way, the volt-second threshold for ZVS_gate to turn on can be increased as the input voltage increases. At the same time, the effect of junction capacitance decreasing with input voltage can be considered, so that the magnitude of negative current tends to be consistent under high and low voltage conditions, thereby reducing conduction losses.

[0092] Optionally, in some embodiments of this application, such as Figure 19 or Figure 20 As shown, the control circuit of the converter also includes a second compensation signal generation unit 12, which is configured to generate a fifth compensation signal based on the converter's output voltage Vo, so as to compensate the converter's volt-second threshold together with the first voltage difference.

[0093] Among them, such as Figure 19 As shown, the second compensation signal generation unit 12 may include a voltage converter 121 and a second adder 122. The voltage converter 121 is used to convert the output voltage Vo of the converter to obtain the converted voltage Vb. The second adder 122 superimposes the converted voltage Vb onto the voltage generated by the second compensation signal K. The I2 (Vds_s-Vo) compensated volt-second threshold, together with the first voltage difference, compensates for the volt-second threshold of the converter, and the second compensation signal K I2(Vds_s-Vo) can be a compensated volt-second threshold generated on the volt-second threshold configuration resistor Rvt by superimposing it with the reference current source Iref.

[0094] Optionally, the voltage converter 121 can also perform nonlinear conversion on the output voltage Vo of the converter, so that the volt-second threshold after common compensation increases nonlinearly with the increase of the output voltage Vo, and also increases nonlinearly with the increase of the input voltage Vin. The curves showing the changes of the conversion voltage Vb and the volt-second threshold after common compensation with the output voltage Vo are as follows: Figure 21 As shown.

[0095] Or, such as Figure 20 As shown, the second compensation signal generation unit 12 may include a seventh voltage / current converter 123. The seventh voltage / current converter 123 is used to convert the output voltage Vo of the converter to obtain the conversion current Ib, and then the conversion current Ib is compared with the second compensation signal K. I2 (Vds_s-Vo) and the reference current source Iref are superimposed to generate a jointly compensated volt-second threshold on the volt-second threshold configuration resistor Rvt, and output through the volt-second threshold setting pin VT, thereby achieving compensation of the converter's volt-second threshold together with the first voltage difference.

[0096] Among them, the seventh voltage / current converter 123 can also perform nonlinear conversion on the output voltage Vo of the converter, so that the volt-second threshold after joint compensation increases nonlinearly with the increase of the output voltage Vo, and also increases nonlinearly with the increase of the input voltage Vin.

[0097] Therefore, considering the energy required for discharging the primary junction capacitor C2' and the energy required for charging the secondary junction capacitor C3', which will also increase nonlinearly with the increase of Vo, the volt-second threshold can be compensated by nonlinearly transforming the output voltage Vo and then using it together with the first voltage difference. This will result in the volt-second threshold after joint compensation increasing nonlinearly with the increase of the output voltage Vo, and also increasing nonlinearly with the increase of the input voltage Vin.

[0098] Optionally, with such Figure 9 Compared to the embodiments shown, Figure 22 The illustrated embodiment replaces the second voltage / current converter 422 with a fourth nonlinear voltage / current converter 440. This allows the fourth nonlinear voltage / current converter 440 to perform a nonlinear conversion on the converter's output voltage Vo, resulting in the sixth compensation signal H. Io, where the coefficient H decreases as Vo increases, and the sixth compensation signal H Io charges the first integrating capacitor C1, generating a new volt-second integral value Vc0 on the first integrating capacitor C1. The first nonlinear voltage / current converter 434 performs a nonlinear conversion on the first voltage difference to obtain the second compensation signal K. I2(Vds_s-Vo), then the second compensation signal K The superposition of I2 (Vds_s-Vo) and the reference current source Iref generates a compensated volt-second threshold on the volt-second threshold configuration resistor Rvt. The output is achieved through the volt-second threshold setting pin VT, thereby realizing that the compensated volt-second threshold increases nonlinearly with the increase of the output voltage Vo, and also increases nonlinearly with the increase of the input voltage Vin.

[0099] In summary, the control circuit 400 of the converter provided in the embodiments of this application obtains a first voltage difference value through the voltage difference acquisition unit 41, which characterizes the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on. This first voltage difference value is then correlated with the changes in the input voltage of the converter. In this way, the control unit can adjust the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference value, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage. At the same time, the relationship between the junction capacitance and the decrease of the drain-source voltage of the switch is fully considered and compensated together to ensure that the negative current on the primary side remains consistent under high and low input voltages, which greatly reduces the conduction loss of the converter at low input voltages.

[0100] In some embodiments of this application, a secondary control chip 100 for a converter is also provided, which can integrate the control circuit 400 of the converter described in the above embodiments.

[0101] According to the secondary control chip 100 of the converter provided in the embodiments of this application, by integrating the control circuit 400 of the converter described in the above embodiments, the negative excitation turn-on time of the synchronous rectifier switch can be adjusted based on the compensation signal characterizing the input voltage of the converter. At the same time, the relationship between the junction capacitance and the decrease of the drain-source voltage of the switch is fully considered, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage, ensuring that the negative current on the primary side remains consistent under high and low input voltage, and greatly reducing the conduction loss of the converter at low input voltage.

[0102] In some embodiments of this application, such as Figure 2 As shown, a converter 300 is also provided, including a main power switch Q1 disposed on the primary side and a synchronous rectifier switch M1 disposed on the secondary side, as well as a secondary control chip 100 of the converter according to the above embodiment.

[0103] In some other embodiments of this application, a converter 300 is also provided, including a main power switch Q1 disposed on the primary side and a synchronous rectifier switch M1 disposed on the secondary side, as well as a control circuit 400 of the converter described in the above embodiments.

[0104] According to the converter 300 provided in the embodiments of this application, based on the control circuit 400 of the converter described in the above embodiments or the secondary control chip 100 described in the above embodiments, it is possible to control the compensation signal characterizing the input voltage of the converter to adjust the negative excitation turn-on time of the synchronous rectifier switch. At the same time, it also fully considers the relationship that the junction capacitance decreases as the drain-source voltage of the switch increases, so as to realize that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage, ensuring that the negative current on the primary side remains consistent under high and low input voltages, and greatly reducing the conduction loss of the converter at low input voltages.

[0105] Furthermore, embodiments of this application provide a control method for a converter, wherein the converter includes a main power switch disposed on the primary side and a synchronous rectifier switch disposed on the secondary side, and the control method includes:

[0106] S100, obtain a first voltage difference value, wherein the first voltage difference value is used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on, and is associated with the input voltage of the converter.

[0107] S200 adjusts the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage.

[0108] It should be noted that the specific execution process of the converter control method in this application embodiment is consistent with the control principle of the converter control circuit described in the above embodiment, and will not be repeated here.

[0109] According to the converter control method provided in the embodiments of this application, a first voltage difference is obtained to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on. This difference is then correlated with the changes in the input voltage of the converter to adjust the negative excitation turn-on time of the synchronous rectifier switch so that the negative excitation turn-on time of the synchronous rectifier switch follows the change in input voltage. At the same time, the relationship between the decrease in junction capacitance as the drain-source voltage of the switch increases is fully considered and compensated for to ensure that the negative current on the primary side remains consistent under high and low input voltages, which greatly reduces the conduction loss of the converter at low input voltages.

[0110] In the description of this specification, the terms "one embodiment," "some embodiments," "embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0111] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make modifications, alterations, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A control circuit for a converter, characterized in that, The converter includes a main power switch on the primary side and a synchronous rectifier switch on the secondary side. The control circuit includes: A voltage difference acquisition unit is configured to acquire a first voltage difference, wherein the first voltage difference is used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on, and is associated with the input voltage of the converter; An adjustment control unit is configured to adjust the negative excitation turn-on time of the synchronous rectifier switch according to the first voltage difference, so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage.

2. The control circuit of the converter according to claim 1, characterized in that, The voltage difference acquisition unit includes: The first subtractor has its positive input terminal adapted to be connected to the drain-source voltage of the synchronous rectifier switch, and its negative input terminal adapted to be connected to the output voltage of the converter. A first sample-and-hold circuit is connected to the output of the first subtractor. The first sample-and-hold circuit is configured to sample when the main power switch is turned on and hold when the main power switch is turned off, so as to output the first voltage difference.

3. The control circuit of the converter according to claim 1, characterized in that, The voltage difference acquisition unit includes: A second sample-and-hold circuit is configured to sample the voltage of the synchronous rectifier switch when the main power switch is turned on and hold the voltage when the main power switch is turned off. The second subtractor has its positive input connected to the output of the second sample-and-hold circuit, and its negative input is adapted to be connected to the output voltage of the converter to output the first voltage difference.

4. The control circuit of the converter according to claim 1, characterized in that, The adjustment control unit is further configured to integrate the output voltage of the converter during the negative excitation turn-on time to obtain a volt-second integral value, and when the volt-second integral value is greater than the volt-second threshold of the converter, control the synchronous rectifier switch to turn off so that the negative excitation turn-on ends. The volt-second integral value and / or the volt-second threshold are compensated according to the first voltage difference so that the negative excitation turn-on time of the synchronous rectifier switch increases with the increase of the input voltage.

5. The control circuit of the converter according to claim 4, characterized in that, The adjustment control unit is configured to compensate for the volt-second threshold based on the first voltage difference, the adjustment control unit comprising: A first voltage / current converter, wherein the input terminal of the first voltage / current converter is adapted to receive the first voltage difference, and the first voltage / current converter is configured to convert the first voltage difference to output a first compensation signal; The second voltage / current converter has an input terminal adapted to be connected to the output voltage of the converter, and an output terminal grounded through a first integrating capacitor. The second voltage / current converter is configured to convert the output voltage of the converter into an output current and to charge the first integrating capacitor with the output current during the negative excitation turn-on time to generate a first volt-second integral value. A first comparator has a first input terminal adapted to receive the first volt-second integral value, and a second input terminal adapted to receive a first volt-second threshold value obtained after compensation by the first compensation signal. The first comparator is configured to output a turn-off control signal to control the synchronous rectifier switch to turn off when the first volt-second integral value is greater than the first volt-second threshold value.

6. The control circuit of the converter according to claim 4, characterized in that, The adjustment control unit is configured to compensate for the volt-second threshold based on the first voltage difference, the adjustment control unit comprising: A first adder, wherein a first input terminal of the first adder is adapted to receive the first voltage difference, and a second input terminal of the first adder is adapted to receive a first reference voltage, and the first adder is configured to add the first voltage difference to the first reference voltage to obtain a second volt-second threshold. A third voltage / current converter, the input of which is adapted to be connected to the output voltage of the converter, the output of which is grounded through a second integrating capacitor, the third voltage / current converter being configured to convert the output voltage of the converter into an output current, and to charge the second integrating capacitor with the output current during the negative excitation turn-on time to generate a second volt-second integral value; A second comparator, wherein a first input of the second comparator is adapted to receive the second volt-second integral value, and a second input of the second comparator is adapted to receive the second volt-second threshold value, is configured to output a turn-off control signal to control the synchronous rectifier switch to turn off when the second volt-second integral value is greater than the second volt-second threshold value.

7. The control circuit of the converter according to claim 4, characterized in that, The adjustment control unit is configured to compensate the volt-second integral value based on the first voltage difference, and the adjustment control unit includes: A fourth voltage / current converter, wherein the input terminal of the fourth voltage / current converter is adapted to receive the first voltage difference, and the fourth voltage / current converter is configured to convert the first voltage difference to output a first compensation signal; A fifth voltage / current converter, wherein the input terminal of the fifth voltage / current converter is adapted to be connected to the output voltage of the converter, and the fifth voltage / current converter is configured to convert the output voltage of the converter into an output current; The third subtractor has its positive input connected to the output of the fifth voltage / current converter and its negative input connected to the fourth voltage / current converter. The output of the third subtractor is grounded through a third integrating capacitor. The third subtractor is configured to subtract the output current from the first compensation signal to output a compensated current, and to charge the third integrating capacitor with the compensated current during the negative excitation turn-on time to generate a third-second integral value. A third comparator, wherein a first input of the third comparator is adapted to receive the third volt-second integral value, and a second input of the third comparator is adapted to receive the volt-second threshold of the converter, the third comparator being configured to output a turn-off control signal to control the synchronous rectifier switch to turn off when the third volt-second integral value is greater than the volt-second threshold of the converter.

8. The control circuit of the converter according to claim 4, characterized in that, The adjustment control unit is configured to compensate the volt-second integral value based on the first voltage difference, and the adjustment control unit includes: A fourth subtractor, wherein the positive input terminal of the fourth subtractor is adapted to be connected to the output voltage of the converter, and the negative input terminal of the fourth subtractor is adapted to be connected to the first voltage difference, and the fourth subtractor is configured to subtract the output voltage of the converter from the first voltage difference to obtain a compensated voltage; A sixth voltage / current converter, the input of which is connected to the output of the fourth subtractor, and the output of which is grounded through a fourth integrating capacitor, is configured to convert the compensated voltage into a compensated current and charge the fourth integrating capacitor with the compensated current during the negative excitation turn-on time to generate a fourth volt-second integral value. A fourth comparator, wherein a first input of the fourth comparator is adapted to receive the fourth volt-second integral value, and a second input of the fourth comparator is adapted to receive the volt-second threshold of the converter, the fourth comparator being configured to output a turn-off control signal to control the synchronous rectifier switch to turn off when the fourth volt-second integral value is greater than the volt-second threshold of the converter.

9. The control circuit of the converter according to any one of claims 1-8, characterized in that, The voltage difference acquisition unit is further configured to control the first voltage difference to increase non-linearly as the voltage difference increases, so that the negative excitation turn-on time of the synchronous rectifier switch increases non-linearly as the input voltage increases.

10. The control circuit of the converter according to claim 4, characterized in that, The adjustment control unit is further configured to compensate the volt-second integral value and / or the volt-second threshold value according to the first voltage difference, so that the negative excitation turn-on time of the synchronous rectifier switch increases nonlinearly with the increase of the input voltage.

11. The control circuit of the converter according to claim 10, characterized in that, The adjustment control unit is further configured to perform a nonlinear transformation on the first voltage difference to obtain a second compensation signal, and to compensate the volt-second threshold of the converter according to the second compensation signal, so that the negative excitation turn-on time of the synchronous rectifier switch increases nonlinearly with the increase of the input voltage.

12. The control circuit of the converter according to claim 10, characterized in that, The adjustment control unit is further configured to perform a nonlinear transformation on the first voltage difference to obtain a third compensation signal, and to compensate the volt-second integral value according to the third compensation signal, so that the negative excitation turn-on time of the synchronous rectifier switch increases nonlinearly with the increase of the input voltage.

13. The control circuit of the converter according to claim 4, characterized in that, Also includes: The first compensation signal generation unit is configured to acquire the drain-source voltage of the synchronous rectifier switch when the main power switch is turned on, and to perform a nonlinear transformation on the drain-source voltage of the synchronous rectifier switch to generate a fourth compensation signal so as to re-compensate the compensated volt-second threshold.

14. The control circuit of the converter according to claim 4, characterized in that, Also includes: A second compensation signal generation unit is configured to generate a fifth compensation signal based on the output voltage of the converter, so as to compensate the volt-second threshold of the converter together with the first voltage difference.

15. A secondary control chip for a converter, characterized in that, The secondary control chip integrates the control circuit of the converter according to any one of claims 1-14.

16. A converter, characterized in that, include: The main power switch is located on the primary side and the synchronous rectifier switch is located on the secondary side; The control circuit of the converter according to any one of claims 1-14, or the secondary control chip of the converter according to claim 15.

17. A control method for a converter, characterized in that, The converter includes a main power switch on the primary side and a synchronous rectifier switch on the secondary side, and the control method includes: Obtain a first voltage difference value, wherein the first voltage difference value is used to characterize the voltage difference between the drain-source voltage of the synchronous rectifier switch and the output voltage of the converter when the main power switch is turned on, and is associated with the input voltage of the converter; The negative excitation turn-on time of the synchronous rectifier switch is adjusted according to the first voltage difference so that the negative excitation turn-on time of the synchronous rectifier switch changes with the input voltage.