A method for interception and demodulation of frequency hopping signals

Abstract

The application relates to the technical field of communication, in particular to a method for intercepting and demodulating a frequency hopping signal, which comprises the following steps: firstly, delaying an input signal; simultaneously, detecting the frequency hopping signal to obtain a signal frequency point, bandwidth, start time and end time of each hop; then, using the detection information to guide the delayed data to carry out frequency conversion filtering processing to obtain narrowband data of each hop signal; finally, demodulating the narrowband single-hop signal. The frequency hopping signal intercepting and demodulating method designed by the application is used for solving the problems of signal interception and demodulation when the target signal is a frequency hopping signal, is easy to implement, has small operation amount, and thus has practical application value.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and more specifically to a method for intercepting and demodulating frequency hopping signals. Background Technology

[0002] Frequency hopping communication has been widely used in the field of communications due to its strong anti-interference and anti-interception capabilities and its "variable hopping speed" characteristics. The number of devices and frequency bands involved is increasing, and it has become the mainstream communication method in military communications.

[0003] Interception of frequency-hopping signals is a key technology in frequency-hopping communication reconnaissance and has become one of the research hotspots in frequency-hopping communication technology. Its identification accuracy can directly affect the subsequent demodulation results. Existing algorithms such as dual sliding window detection and correlation detection have a large amount of computation or require prior information, and cannot accurately and quickly obtain the starting position of the frequency-hopping signal, making it difficult to meet application requirements. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to avoid the shortcomings of the above-mentioned background technology and provide a new and easy-to-implement method for intercepting and demodulating frequency hopping signals.

[0005] The technical solution adopted in this invention is: A method for intercepting and demodulating frequency-hopping signals, implemented using FPGA+DSP technology, includes the following steps: (1) The DDR buffers the sampled data with a delay; at the same time, the FFT in the FPGA performs frequency hopping signal detection processing on the sampled data and outputs continuous spectrum data to the DSP; (2) The DSP calculates the parameters of each signal based on the continuous spectrum data, including signal frequency, bandwidth, level, occurrence time and duration; (3) The DSP uses each signal parameter to calculate the corresponding control parameters, including control frequency, decimation factor, filter coefficient, start time and end time, and queries the idle resources of each DDC in the FPGA, and writes the calculated control parameters into each DDC in sequence. (4) The DDC in the FPGA extracts the corresponding time signal from the DDR according to the start time and end time, and performs frequency conversion and filtering on the extracted data according to the control parameters, and outputs the processed signal to the DSP. (5) The DSP performs burst signal detection and analyzes the precise frequency, signal type and symbol rate of the signal, and then demodulates the effective signal to obtain the demodulation result.

[0006] The specific process of step (2) includes: The DSP receives continuous spectrum data, calculates the maximum hold spectrum, minimum hold spectrum, and instantaneous spectrum, and uses the maximum hold spectrum, minimum hold spectrum, and instantaneous spectrum to statistically analyze the spectral line states. It then calculates signal parameters, including signal frequency, bandwidth, level, occurrence time, and duration, based on the spectral line states.

[0007] The specific process of step (5) includes: The DSP sequentially queries the result flag of each DDC data channel. When the flag is 1, the data is stored in the internal buffer space. Then, it sequentially queries the data processing core. If the data processing core is idle, the data to be processed in the buffer space is sent to the idle data processing core. The data processing core queries the data in the buffer space. If a data flag is found, it first performs burst signal detection, then analyzes the precise frequency, signal type and symbol rate of the signal, and finally completes the demodulation of the valid signal and outputs the demodulation result.

[0008] Compared with the prior art, the present invention has the following advantages: 1. This invention employs input signal delay processing and frequency hopping signal detection. It uses the frequency point, bandwidth, start time, and end time of each hop signal to guide narrowband processing of the delayed data. Finally, it demodulates the narrowband single-hop signal. The computational load is small and it is easy to implement in engineering.

[0009] 2. This invention addresses the problem of intercepting and demodulating frequency hopping signals, freeing it from the constraints of traditional complex sliding window algorithms and related detection algorithms that require prior information, thus offering greater versatility and adaptability. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the working process of the present invention. Detailed Implementation

[0011] Reference Figure 1 The working process of this invention includes: signal delay buffering processing, frequency hopping signal detection processing, guided frequency conversion filtering processing, and narrowband data distribution and demodulation processing.

[0012] The present invention will now be described in further detail with reference to the accompanying drawings.

[0013] (1) The sampled data is input through a DDR buffer, which is connected to the FPGA and can perform broadband raw sampled data buffering. The capacity is sufficient to buffer the data for no less than 1 second. The buffered data is used for subsequent DDC (downconversion and filtering) processing. The FPGA performs FFT processing on the sampled data and outputs a continuous spectrum to the DSP.

[0014] (2) The DSP receives continuous spectrum data, calculates the maximum hold spectrum, minimum hold spectrum and instantaneous spectrum; and uses the maximum hold spectrum, minimum hold spectrum and instantaneous spectrum to count the spectral line status; and calculates parameters such as signal frequency, bandwidth, level, occurrence time and duration through the spectral line status.

[0015] (3) DSP calculates DDC control parameters: By detecting the output frequency, bandwidth, occurrence time, and duration, the DSP calculates the control frequency, decimation factor, filter coefficients, start time, and end time, and queries the idle DDC resources in the FPGA. The calculated control parameters are then written to each DDC to complete the DDC control. In order to handle high-speed signals as much as possible, the FPGA should be designed with as many DDC resources as possible.

[0016] (4) After receiving the DDC control parameters, the DDC in the FPGA extracts the corresponding time signal from the DDR according to the start time and end time, performs frequency conversion and filtering on the extracted data according to the control parameters, and outputs the processed signal to the DSP.

[0017] (5) The DSP queries the result flag of each DDC data in turn. When the flag is 1, the data is stored in the internal buffer space. Then the data processing core is queried in turn. If the data processing core is idle, the data to be processed in the buffer space is sent to the idle data processing core. The data processing core queries the data in the buffer space. If a data flag is found, the burst signal is detected first, then the precise frequency, signal type and symbol rate of the signal are analyzed, and finally the demodulation of the effective signal is completed and the demodulation result is output.

Claims

1. A method for intercepting and demodulating frequency-hopping signals, the method being implemented using FPGA+DSP technology, characterized in that, Includes the following steps: (1) The DDR buffers the sampled data with a delay; at the same time, the FFT in the FPGA performs frequency hopping signal detection processing on the sampled data and outputs continuous spectrum data to the DSP; (2) The DSP calculates the parameters of each signal based on the continuous spectrum data, including signal frequency, bandwidth, level, occurrence time and duration; (3) The DSP uses each signal parameter to calculate the corresponding control parameters, including control frequency, decimation factor, filter coefficient, start time and end time, and queries the idle resources of each DDC in the FPGA, and writes the calculated control parameters into each DDC in sequence. (4) The DDC in the FPGA extracts the corresponding time signal from the DDR according to the start time and end time, and performs frequency conversion and filtering on the extracted data according to the control parameters, and outputs the processed signal to the DSP. (5) The DSP performs burst signal detection and analyzes the precise frequency, signal type and symbol rate of the signal, and then demodulates the effective signal to obtain the demodulation result.

2. The method for intercepting and demodulating frequency-hopping signals according to claim 1, characterized in that, Step (2) includes the following specific processes: The DSP receives continuous spectrum data, calculates the maximum hold spectrum, minimum hold spectrum, and instantaneous spectrum, and uses the maximum hold spectrum, minimum hold spectrum, and instantaneous spectrum to statistically analyze the spectral line states. It then calculates signal parameters, including signal frequency, bandwidth, level, occurrence time, and duration, based on the spectral line states.

3. The method for intercepting and demodulating frequency-hopping signals according to claim 1, characterized in that, Step (5) includes the following specific processes: The DSP sequentially queries the result flag of each DDC data channel. When the flag is 1, the data is stored in the internal buffer space. Then, it sequentially queries the data processing core. If the data processing core is idle, the data to be processed in the buffer space is sent to the idle data processing core. The data processing core queries the data in the buffer space. If a data flag is found, it first performs burst signal detection, then analyzes the precise frequency, signal type and symbol rate of the signal, and finally completes the demodulation of the valid signal and outputs the demodulation result.

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