A method and system for network traffic exchange among multiple simulation processes based on shared memory
Patent Information
- Application Number
- CN202611028531.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-10
- Publication Date
- 2026-10-13
AI Technical Summary
[0003](1)单进程多端口Testbench方式:所有端口共享同一仿真内核,无法体现端口间真实的进程级并发,单进程内存与编译规模随端口数急剧膨胀,难以混合接入不同团队或不同语言编译的端口模型
[0041]与现有技术相比,本发明的有益效果是:本基于共享内存的多仿真进程网络流量交换方法及系统,具有以下好处:
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Figure CN122909219A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of EDA simulation system technology, specifically to a method and system for exchanging network traffic among multiple simulation processes based on shared memory. Background Technology
[0002] During the functional verification of DPUs, switching chips, and network interface card (SoC) systems, engineers need to verify behaviors such as packet forwarding, flow control, and time synchronization between multiple ports in a simulation environment. Current mainstream multi-port traffic simulation methods have the following shortcomings:
[0003] (1) Single-process multi-port Testbench method: All ports share the same simulation kernel, which cannot reflect the real process-level concurrency between ports. The memory and compilation scale of a single process expand rapidly with the number of ports, making it difficult to mix port models compiled by different teams or different languages.
[0004] (2) Inter-process co-simulation method based on TCP / IP Socket: Each transmission and reception requires passing through the kernel protocol stack and data copying, resulting in limited throughput and high latency; it only provides point-to-point byte streams and lacks multi-port switching, broadcasting, multicasting, backpressure and other switch semantics.
[0005] (3) Shared memory co-simulation method (such as US7346482B1, US20060070042A1): storage consistency and clock synchronization for hardware / software co-simulation, not for network packet exchange between multiple peer simulation processes, and does not have switch elements such as ports, channels, forwarding tables, and flow control.
[0006] (4) Real shared memory exchange chip architecture (such as US5720032A, US6535516): It is a physical device hardware architecture that runs a physical clock. It cannot be used directly for pure software simulation, nor can it be aligned with the simulation time of simulators such as VCS.
[0007] The main shortcomings of existing technologies also include: time base mismatch (inconsistency between simulation time and physical time leads to distortion of bandwidth statistics and 1588 PTP); susceptibility to deadlock (blocking transmission and reception will result in a deadlock across the entire link if a port gets stuck); lack of flow control backpressure (lack of a two-dimensional pause mechanism for water level and bandwidth); inflexible topology (hard-coded number of ports and forwarding relationships, requiring recompilation when adding new ports); and poor performance and scalability (high latency and low throughput of data copying via the kernel protocol stack). To address these issues, we propose a multi-simulation process network traffic exchange method and system based on shared memory. Summary of the Invention
[0008] The technical problem to be solved by the present invention is to overcome the existing defects and provide a multi-simulation process network traffic exchange method and system based on shared memory. This method and system enables multiple independent VCS simulation processes to exchange messages through a central exchange process, supports arbitrary topologies such as one-to-one, N-to-one, broadcast, and multicast, achieves zero-copy high-throughput communication, unified flow control and time synchronization for simulation time, and has the ability to prevent deadlock, dynamically adjust topology and automatically clean up. This method and system can effectively solve the problems in the background technology.
[0009] To achieve the above objectives, the present invention provides the following technical solution: a multi-simulation process network traffic exchange system based on shared memory, comprising;
[0010] The simulator port layer contains multiple independent VCS simulation processes. Each VCS simulation process simulates a network port, and each VCS simulation process is compiled and run independently.
[0011] The DPI-C port interface layer provides a standard C language interface between each VCS simulation process and the shared memory. Each VCS simulation process reads and writes the shared memory through the DPI-C port interface layer.
[0012] The shared memory switching engine layer contains a central switching process. The central switching process uses a single-threaded main loop to non-blockingly poll all online port sending channels, and completes packet parsing, forwarding, backpressure control, MAC learning and 1588 time synchronization in shared memory.
[0013] The shared memory data area is a contiguous address space in which the global header, port information array, channel information array, and slot pool are arranged sequentially.
[0014] Each port is allocated two unidirectional channels: a transmitting channel TX=2N and a receiving channel RX=2N+1, where N is the port number. The transmitting channel is used by the VCS simulation process to send messages to the central switching process, and the receiving channel is used by the central switching process to forward messages to the VCS simulation process.
[0015] Furthermore, each unidirectional channel consists of an idle Slot singly linked list, a ready message FIFO queue, a first System V semaphore, a second System V semaphore, and a process-shared mutex lock;
[0016] The free Slot singly linked list is formed by linking Slots that are in an idle state in the Slot pool, and is used to manage free storage units;
[0017] The ready message FIFO queue is used to store the Slot index of the head of the message chain that has been written and is waiting to be read;
[0018] The first System V semaphore counts the number of free slots in the singly linked list of free slots, and the second System V semaphore counts the number of ready messages in the ready message FIFO queue.
[0019] Process-shared mutex locks are used to protect the FIFO queue of ready messages from mutual exclusion.
[0020] Furthermore, the central exchange process includes:
[0021] The message parsing module is used to read messages from the sending channel, verify the validity of the message's magic field, and distinguish between control frames and data frames;
[0022] The forwarding decision module is used to determine the target port of a packet based on the static target port or MAC learning results, and to perform flooding, bitmask copying or targeted forwarding based on the broadcast address, multicast address or unicast address respectively.
[0023] The Pause back pressure control module is used to send a Pause control frame to the target port based on the dual-dimensional trigger conditions of the receiving channel's water level and bandwidth, and to send a Pause release control frame when the conditions are released.
[0024] The 1588 PTP time synchronization module is used to track the maximum value of the most recent message timestamps on all ports as the master clock, and broadcasts a PTP_SYNC frame to all online ports when the progress exceeds the synchronization interval;
[0025] The port lifecycle management module is used to manage the migration of each port between OFFLINE, ONLINE and DRAINING states, and periodically detect the port PID to achieve automatic cleanup of crashed ports;
[0026] In the shared memory data area, the global header contains switch configuration, PTP configuration and MAC table, the port information array stores the status information of each port, the channel information array stores the status information of each channel, and the slot pool is the packet data storage area.
[0027] A method for exchanging network traffic among multiple simulated processes based on shared memory includes the following steps:
[0028] S1: Create and initialize the shared memory area and semaphore set, start the central switching process, and wait for each VCS simulation process to connect.
[0029] S2: Each VCS simulation process calls the sw_port_open function to open the corresponding port through the DPI-C interface, writes port information to the shared memory to register its own vcs_pid, completes port registration and enters ONLINE state;
[0030] S3: The sending-end VCS simulation process calls the sw_port_send function to transmit the target port number and message data through the DPI-C interface. The sending-end VCS simulation process writes the message into the sending channel corresponding to its own port and writes the current simulation timestamp into the message's exchange header.
[0031] S4: The central switching process uses a single-threaded main loop to non-block poll all the sending channels of ports in the ONLINE state. When a packet is read, the magic field of the packet is checked. If it is a control frame, it is handed over to the control process. If it is a data frame, it enters the forwarding decision process.
[0032] S5: The central switching process makes forwarding decisions based on the destination port of the message: if the destination port is not in the Pause state, the message is written to the receiving channel corresponding to the destination port; if the destination port is in the Pause state, the message is temporarily stored in the pending buffer of the source port and retransmitted after the Pause is lifted.
[0033] S6: Each receiving end VCS simulation process calls the sw_port_recv function to read the message forwarded by the central switching process from the receiving channel corresponding to its own port through the DPI-C interface, and strips the switching header to obtain the original message data;
[0034] S7: At the end of each main loop, the central switching process sequentially performs Pause release check, PTP synchronization, MAC aging, port PID liveness detection and statistical printing, and automatically exits and destroys shared memory and semaphore set when all ports are offline.
[0035] Furthermore, in step S3, the specific steps for the sending end VCS simulation process to write the message into the sending channel include: calculating the required number of slots M by rounding up the message length; then, performing a P operation on the first System V semaphore to request M free slots, and if the request fails, returning SW_TX_FULL or blocking and waiting; next, writing the message data into the requested M slots in fragments, and linking the M slots into a chain using the next_slot_idx field of each slot; then placing the head slot index of the chain into the tail of the ready message FIFO queue; finally, performing a V operation on the second System V semaphore to notify the central switching process that there are new ready messages.
[0036] Furthermore, in step S5, the forwarding decision includes static forwarding mode and MAC learning forwarding mode. In static forwarding mode, the central switching process directly determines the target port based on the dst_port field in the packet switching header. If dst_port=0xFF, it is determined to be a broadcast. In MAC learning forwarding mode, the central switching process extracts the source MAC address and destination MAC address from the Ethernet header of the packet, writes the source MAC address into the MAC table according to the FNV-1a hash algorithm, records the learning port and learning timestamp, ages the entries in the MAC table that exceed the preset aging time according to the monotonic clock cycle, and then makes a forwarding decision based on the destination MAC address.
[0037] Furthermore, the forwarding decision based on the destination MAC address specifically includes: if the destination MAC address is a broadcast address, the packet is flooded to all ports in the ONLINE state; if the destination MAC address is a multicast address, the member_mask bitmask of the multicast group is queried, and the packet is copied to all member ports marked in the member_mask; if the multicast group does not exist, the packet is flooded to all online ports; if the destination MAC address is a unicast address, the MAC table is queried, and if a match is found, the packet is forwarded to the learning port recorded in the matched entry; if no match is found, the packet is flooded to all ports in the ONLINE state.
[0038] Furthermore, it also includes a Pause backpressure control step: Each receiving channel maintains a water level count and a bandwidth count within the simulation time window. When the water level of the receiving channel exceeds a preset high water level threshold or the bandwidth of the receiving channel exceeds a preset rate limit, a Pause condition is triggered. Then, the central switching process sends a Pause control frame to the target port corresponding to the receiving channel that triggered the Pause condition, causing the target port to suspend packet transmission and marking the target port's state as Pause. Next, when the water level of the receiving channel falls below a preset low water level threshold and the bandwidth falls below a preset rate limit, the Pause condition is released. Finally, the central switching process sends a Pause release control frame to the target port, removing the Pause mark from the target port's state and re-sending the packets temporarily stored in the source port's pending buffer into the forwarding decision.
[0039] Furthermore, it includes a three-layer deadlock prevention mechanism: The first layer is backpressure prevention: when the water level or bandwidth of the receiving channel exceeds the limit, a Pause backpressure is triggered. When the sending VCS simulation process calls sw_port_send, it returns the SW_PAUSED status code to notify the upper layer to pause transmission; The second layer is non-blocking write protection: when the central switching process writes a message to the receiving channel, it adopts a non-blocking write method. If there are not enough idle slots in the receiving channel, the current message is directly discarded and the drop_pkts count is incremented. When the sending VCS simulation process requests a slot, it adopts the try_alloc method. If the request fails, it immediately returns the SW_TX_FULL status code without blocking and waiting; The third layer is timeout fallback: when the receiving VCS simulation process calls sw_port_recv, it supports timeout waiting mode. If a message is not received after the preset timeout period, it returns the SW_TIMEOUT status code; the central switching process checks the PID of each port every 2 seconds. If the port PID is detected to be non-existent, the corresponding port is automatically set to OFFLINE.
[0040] Furthermore, in step S7, the port PID liveness detection and state transition specifically include: the port state machine includes OFFLINE, ONLINE, and DRAINING states. The OFFLINE state indicates that the port is not registered or has been closed, the ONLINE state indicates that the port is operating normally, and the DRAINING state indicates that the port is being drained. When the VCS simulation process exits normally, it calls the sw_port_close function to send a PORT_DOWN control frame to the central switching process. After receiving the PORT_DOWN control frame, the central switching process transfers the corresponding port to the DRAINING state, waits for the port's transmission channel to be drained or a timeout of 1 second, and then transfers the port to the OFFLINE state. Every 2 seconds, the central switching process reads the vcs_pid recorded in the port information. If the kill system call detects that the vcs_pid no longer exists, it determines that the corresponding port has crashed and automatically transfers the port to the DRAINING state until the OFFLINE state. When the central switching process detects that all ports are in the OFFLINE state, the central switching process automatically exits and calls shmctl and semctl to destroy the shared memory and semaphore set.
[0041] Compared with the prior art, the beneficial effects of the present invention are as follows: This multi-simulation process network traffic exchange method and system based on shared memory has the following advantages:
[0042] 1. Process-level concurrency and topology flexibility: Multiple independent VCS simulation processes are compiled and run independently, and interconnected through shared memory switches to form arbitrary topologies such as one-on-one, N-on-1, broadcast, and multicast; changes in the number of ports or forwarding relationships do not require recompiling the port model, and it can be reused after compilation, which greatly improves verification efficiency.
[0043] 2. Flow control and time synchronization consistent with simulation time: All time-related functions (bandwidth statistics, Pause back pressure, 1588 PTP) are based on the simulation timestamp (VCS `$time`) carried in the message. Regardless of whether the simulation is faster or slower than the physical time, the rate calculation and clock synchronization results are consistent with the simulation world, which fundamentally solves the bandwidth distortion and PTP failure problems caused by the mismatch between simulation time and physical time in traditional solutions.
[0044] 3. High throughput, low latency, and no deadlock: Packets are copied only within shared memory, bypassing the kernel protocol stack, avoiding system calls and data copy overhead, thus achieving low latency and high throughput; the central switching process adopts non-blocking polling, combined with a three-layer anti-blocking mechanism (backpressure prevention, non-blocking write, and timeout fallback), ensuring that the entire link does not deadlock or get stuck under high-pressure N-to-1 and port crash scenarios, guaranteeing continuous simulation operation.
[0045] 4. Full switch semantic support: Provides rich switch behaviors such as port, bidirectional channel, broadcast / multicast, MAC learning and aging, dynamic forwarding, and Pause flow control. It can directly simulate the multi-port interaction of real switching chips, and its application scope is far beyond simple point-to-point socket communication.
[0046] 5. Easy integration and transparent to users: All underlying shared memory operations are encapsulated through the standard DPI-C interface. VCStestbench developers only need to call a few simple `sw_port_*` functions, without having to worry about complex details such as shared memory management and semaphore synchronization. It is easy to port and quickly deploy to existing verification environments.
[0047] 6. Automatic cleanup and resource reclamation: The port lifecycle state machine and PID detection mechanism ensure that ports that exit normally or crash can be automatically cleaned up. After all ports are offline, the switching process automatically destroys shared memory and semaphores to avoid residual garbage occupying system resources.
[0048] 7. Strong compatibility and scalability: Supports System V semaphore sets and is compatible with older emulators; it can be used for large-scale simulation verification and regression testing through pure C test programs (timestamp rollback to physical clock), with one set of code applicable to multiple scenarios. Attached Figure Description
[0049] Figure 1 This is a diagram of the overall system architecture of the present invention;
[0050] Figure 2 This is a diagram showing the shared memory layout and port-to-channel mapping of this invention.
[0051] Figure 3 This is a timing diagram of channel ring buffer read / write and dual-semaphore synchronization in this invention;
[0052] Figure 4 This is a flowchart of the non-blocking main loop of the switching engine in this invention;
[0053] Figure 5 This is a flowchart of the forwarding decision and Pause backpressure determination process of this invention;
[0054] Figure 6 This is the port lifecycle state machine diagram of the present invention. Detailed Implementation
[0055] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0056] Please see Figure 1-6 This embodiment provides a technical solution: a multi-simulation process network traffic exchange system based on shared memory and its implementation method.
[0057] I. System Overall Architecture (see...) Figure 1 )
[0058] like Figure 1 As shown, the system consists of four layers from top to bottom:
[0059] Emulator port layer: Multiple independent VCS simulation processes (such as process 0, process 1... process N-1), each process simulates a network port, is compiled and runs independently, and interacts with shared memory through the DPI-C interface.
[0060] The DPI-C port interface layer provides a set of standard C functions (such as `sw_port_open`, `sw_port_send`, `sw_port_recv`, and `sw_port_close`) for the VCS simulation process to call, enabling read and write operations on shared memory. This layer encapsulates all shared memory details and is transparent to the upper-layer Testbench.
[0061] Shared memory switching engine layer: A single-threaded pure C central switching process (`shm_switch`) polls all online port sending channels in a non-blocking main loop, responsible for packet parsing, forwarding decisions, Pause backpressure control, MAC learning and aging, 1588 PTP time synchronization, port lifecycle management and statistical printing.
[0062] Shared memory data area: A contiguous memory space created by `shmget`, which is laid out in the following order: global header (containing switch configuration, PTP configuration, MAC table, etc.), port information array (`port_info`), channel information array (`channel_info`), and slot pool (packet data storage area).
[0063] II. Shared Memory Layout and Channel Mapping (see...) Figure 2 )
[0064] like Figure 2 As shown, the shared memory area is a contiguous address space. Each port is allocated two unidirectional channels:
[0065] Transmit channel TX = 2N (used for VCS simulation process → central switching process)
[0066] Receive channel RX = 2N+1 (used for central switching process → VCS simulation process)
[0067] It supports up to 32 ports (64 channels in total). This dual-channel design ensures complete decoupling of transmission and reception, preventing mutual blocking.
[0068] III. Channel Structure and Read / Write Synchronization Mechanism (see...) Figure 3 )
[0069] Each unidirectional channel (e.g.) Figure 3 (As shown) It consists of the following data structures:
[0070] The free Slot singly linked list is composed of free Slots in the Slot pool linked together by the `next_slot_idx` field, and manages free storage units.
[0071] Ready message FIFO queue: Stores the slot index of the head of the message chain that has been written and is waiting to be read. It is implemented using a lock-free queue and protected by a mutex lock.
[0072] The first System V semaphore (EMPTY): counts the number of free slots, used by the writer to request space.
[0073] The second System V semaphore (FILLED): counts the number of ready messages, used by the reader to wait for data.
[0074] Process shared mutex lock: Used to protect enqueue / dequeue operations of a ready FIFO queue.
[0075] Write process (producer, such as VCS sender or switching process, writes to the receive channel):
[0076] 1. Calculate the required number of slots M by rounding up the message length (`M = ceil(len / slot_size)`).
[0077] 2. Perform a `semop` P operation on the EMPTY semaphore to request M free slots; if the request fails (there are not enough free slots), return the corresponding status according to the calling mode (blocking / non-blocking / timeout);
[0078] 3. Fragment the message data and write it into the M allocated slots, and link them into a chain using the `next_slot_idx` field of each slot;
[0079] 4. Lock, enqueue the head slot index to the tail of the ready FIFO queue, and unlock;
[0080] 5. Perform a V operation on the FILLED semaphore to notify the reader that a new message has arrived.
[0081] Reading process (consumer, such as the central switching process polling the sending channel, or the VCS receiver reading the receiving channel):
[0082] 1. Based on the calling mode, perform `trywait` / `timedwait` / `wait` operations on the FILLED semaphore to wait for a ready message;
[0083] 2. Lock, dequeue one chain head index from the head of the ready FIFO queue, then unlock;
[0084] 3. Read data sequentially along the Slot chain and assemble it into a complete message;
[0085] 4. Return each slot in the chain to the free list one by one, and perform a V operation (release space) on the EMPTY semaphore.
[0086] The entire process involves copying messages only once within shared memory, without going through the kernel protocol stack, thus achieving zero-copy high-throughput communication.
[0087] IV. Central Exchange Engine Main Loop (see...) Figure 4 )
[0088] The central exchange process uses a single-threaded main loop ( Figure 4 Continuously perform the following steps:
[0089] 1. Poll all ports in the `ONLINE` state and attempt to read packets from the transmit channel (TX) of each port (non-blocking `try_recv`).
[0090] 2. If a message is read, verify the validity of the `magic` field; distinguish between control frames (such as `PORT_UP`, `PORT_DOWN`, `PAUSE`, `PAUSE_RELEASE`, `PTP_SYNC`, etc.) and data frames.
[0091] The control frame is handed over to the control processing module (such as updating port status, triggering Pause / Cancel, and processing PTP synchronization).
[0092] The data frame enters the forwarding decision module.
[0093] 3. Forwarding Decision (see below): After determining the target port, check if the target port is in the Pause state:
[0094] If not paused, an attempt is made to write a message to the receive channel (RX) of the target port (non-blocking `try_send`); if writing fails (channel is full), the message is dropped and `drop_pkts` is incremented.
[0095] If the packet is in the Pause state, it will be temporarily stored in the `pending` buffer queue of the source port and will be resent for forwarding after the Pause is lifted.
[0096] 4. At the end of each main loop iteration, the following steps are executed sequentially:
[0097] Pause release check: Iterate through each receive channel. If both the water level and bandwidth are below the recovery threshold, send a `PAUSE_RELEASE` control frame and retransmit the messages in the `pending` buffer.
[0098] PTP Synchronization: If PTP is enabled, check if the master clock advance exceeds the synchronization interval. If so, broadcast a `PTP_SYNC` frame to all online ports.
[0099] MAC aging: If MAC learning is enabled, the MAC table is scanned at monotonic clock cycles, and entries that exceed the aging time are deleted.
[0100] Port PID liveness detection: Read the `vcs_pid` recorded on each port every 2 seconds, and check if the process exists by `kill(pid, 0)`. If it does not exist, automatically set the port to `OFFLINE`.
[0101] Statistics Print: Output statistical information such as send / receive, packet loss, and pause count for each port every 5 seconds.
[0102] 5. If all ports are in the `OFFLINE` state, the switching process will automatically exit and call `shmctl` and `semctl` to destroy the shared memory and semaphore set.
[0103] V. Forwarding Decisions and MAC Learning (see...) Figure 5 )
[0104] Forwarding decision support has two modes:
[0105] Static forwarding mode (default): Directly reads the `dst_port` field from the packet exchange header (0 to N-1 for unicast, 0xFF for broadcast). If broadcast, the packet is copied to all online ports.
[0106] MAC learning forwarding mode (enabled via `--mac-learn`):
[0107] 1. Extract the source MAC address and destination MAC address from the Ethernet header of the message.
[0108] 2. Write the source MAC to the MAC table (256 buckets) using the FNV-1a hash algorithm, and record the learning port and learning timestamp (monotonic clock).
[0109] 3. Look up the MAC address in the MAC table based on the destination MAC address:
[0110] If it is a broadcast address (all 1s), it will be flooded to all online ports.
[0111] If it is a multicast address (40th bit is 1), query the `member_mask` bitmask of the multicast group and copy the packet to all member ports; if the multicast group does not exist, flood it.
[0112] If it is a unicast address, it will be forwarded to the learning port if the table lookup matches; otherwise, it will be flooded.
[0113] 4. Periodic aging (default 300 seconds) deletes expired entries.
[0114] Pause back pressure control (see...) Figure 5 (Right-side judgment process)
[0115] Each receive channel maintains a water level (the number of currently occupied slot bytes) and bandwidth within the simulation time window (the cumulative number of bytes based on message timestamps).
[0116] When the water level is greater than the high water level threshold (default 75%) or the bandwidth is greater than the rate limit (e.g., 1Gbps), the Pause condition is triggered. The central switching process sends a `PAUSE` control frame to the target port corresponding to the channel, and the target port enters the Pause state and stops sending.
[0117] When the water level is less than the low water level threshold (default 25%) and the bandwidth is less than the rate limit, Pause is released, a `PAUSE_RELEASE` control frame is sent, and the temporary message is retransmitted.
[0118] VI. Port Lifecycle Management (see...) Figure 6 )
[0119] The port state machine contains three states:
[0120] OFFLINE: The port is not registered or is closed.
[0121] ONLINE: The port is operating normally and can send and receive messages.
[0122] DRAINING: The port is being drained and will no longer receive new packets. It is waiting for existing packets to be processed.
[0123] State transition rules ( Figure 6 ):
[0124] The VCS process successfully calls `sw_port_open` → switches from OFFLINE to ONLINE and registers `vcs_pid`.
[0125] The VCS process normally calls `sw_port_close` → sends a `PORT_DOWN` control frame. The switching process then switches the port to DRAINING, and switches to OFFLINE after its transmission channel is empty (or after a 1-second timeout).
[0126] The swap process detects that `vcs_pid` does not exist (process crash) → automatically switches to DRAINING, and switches to OFFLINE after the process is drained.
[0127] When all ports are OFFLINE, the switching process automatically exits and cleans up resources.
[0128] VII. Three-layer anti-deadlock mechanism
[0129] To prevent a complete deadlock caused by any port freezing or crashing, the system has three layers of built-in protection:
[0130] 1. Backpressure prevention (layer 1): When the receiving channel water level / bandwidth exceeds the limit, a Pause frame is actively sent. The sending end will receive the SW_PAUSED return code in sw_port_send, and the upper layer can pause transmission accordingly.
[0131] 2. Non-blocking write protection (second layer): The switching process writes to the receive channel using `try_write`. If the channel is full, it directly discards the data and counts `drop_pkts`. The sending end requests a slot using `try_alloc`. If there is no space, it immediately returns `SW_TX_FULL` and never blocks.
[0132] 3. Timeout fallback (third layer): The receiver `sw_port_recv` supports timeout parameters, and returns `SW_TIMEOUT` upon timeout; the switching process periodically checks the PID, and automatically sets the crashed port OFFLINE to avoid infinite waiting. VIII. Specific Implementation Methods
[0134] Example 1: Basic Verification of 2-Port Pairs
[0135] Start the switching process (port 2, 32 slots, 2048 bytes per slot):
[0136] bash
[0137] . / shm_switch --ports 2 --slots 32 --slot-size 2048
[0138] ```
[0139] Port 0 sends 100 64-byte packets unidirectionally to port 1, and port 1 receives and verifies them.
[0140] bash
[0141] . / test_port 0 send 1 100 64
[0142] . / test_port 1 recv 100 10 # Timeout 10ms
[0143] ```
[0144] Two-way hitting test:
[0145] bash
[0146] . / test_port 0 bidir 1 100 64
[0147] ```
[0148] In actual testing, there was no packet loss or deadlock, the serial numbers were continuous, and the data content was consistent.
[0149] Example 2: 8-to-1 pressure and broadcast
[0150] Start the port 8 switching process:
[0151] bash
[0152] . / shm_switch --ports 8 --slots 64 --slot-size 2048 &
[0153] ```
[0154] Ports 1-7 simultaneously send traffic to port 0, which receives and counts packet losses; port 0 sends 20 broadcast packets, which are received by all online ports.
[0155] bash
[0156] . / test_port 0 broadcast 20 64
[0157] ```
[0158] In an 8-on-1 scenario, the packet loss rate is controllable (depending on the total number of slots and the rate limit), and the link does not freeze.
[0159] Example 3: MAC Learning and Multicast
[0160] Enable MAC learning (300-second aging time):
[0161] bash
[0162] . / shm_switch --ports 8 --slots 64 --slot-size 2048 --mac-learn --mac-age 300 &
[0163] ```
[0164] Port 0 sends a frame with an Ethernet header (source MAC address: AA:BB:CC:DD:EE:00, destination MAC address: FF:FF:FF:FF:FF:FF). The switching process learns the source MAC address and associates it with port 0. Subsequent unicast frames sent to this MAC address can be forwarded to port 0. Multicast test: Port 1 joins the multicast group `01:00:5e:00:00:01`. Port 0 sends a message to this multicast address. Port 1 receives the message, but other ports do not.
[0165] Example 4: Pause back pressure and 1588 PTP
[0166] Configure a rate limit of 1Gbps, a high water level of 75%, a low water level of 25%, and enable PTP (interval of 1000 simulated microseconds):
[0167] bash
[0168] . / shm_switch --ports 4 --slots 32 --slot-size 2048 \
[0169] --rx-rate-limit 1000000000 --pause-high 0.75 --pause-low 0.25 \
[0170] --ptp-enable --ptp-interval 1000
[0171] ```
[0172] When the water level or bandwidth of a receiving channel exceeds the limit, the switching process automatically sends a Pause frame, and the sending end receives `SW_PAUSED`. After the condition is resolved, a Pause release is sent and forwarding resumes. The PTP module broadcasts Sync frames at simulation time intervals, and the timestamps of all ports are aligned.
[0173] Example 5: VCS Integration (DPI-C Transparent Call)
[0174] In the SystemVerilog test platform, by importing the port API via DPI-C, there's no need to worry about shared memory details:
[0175] ```systemverilog
[0176] import "DPI-C" function int sw_port_open(int shm_key, int port_id);
[0177] import "DPI-C" function int sw_port_send(int port_id, int dst_port,
[0178] input byte unsigned data[], int len, longint sim_ns);
[0179] import "DPI-C" function int sw_port_recv(int port_id, output byteunsigned data[],
[0180] int max_len, int timeout_ms, output longint recv_sim_ns);
[0181] ```
[0182] Compilation commands (example):
[0183] bash
[0184] vcs -full64 -sverilog shm_sv_port_api.sv sv_switch_port.sv tb_switch_test.sv \
[0185] shm_switch_core.c shm_switch_port.c \
[0186] -CFLAGS "-std=c11 -pthread" -LDFLAGS "-lpthread -lrt" -o simv
[0187] ```
[0188] In Testbench, the above functions are called directly. When `send` is called, the current `$time` is automatically filled in as the simulation timestamp. When `recv` is called, the exchange header is automatically stripped and the original data and the received timestamp are returned.
[0189] IX. Actual Operation Results (VCS Q-2020.03-SP2-7)
[0190] The configuration of port 8 was verified on a 224-core / 251GB server. Typical logs are as follows:
[0191] ```
[0192] [Switch] Starting: ports=8 slots=64 slot_size=2048 shm_key=0x12345678
[0193] [Switch] MAC learning enabled, age=300 sec
[0194] [Switch] PTP enabled, interval=1000 ms (sim time)
[0195] [Switch] Ready, waiting for ports to connect...
[0196] [Switch] Port 0: PAUSE triggered (wm=78% rate=1024Mbps reason=0x3)
[0197] [Switch] Port 0: PAUSE released (wm=22% rate=640Mbps)
[0198] [Switch] PTP Sync #1 at sim_time=1000000 ns
[0199] [Switch] === Stats ===
[0200] Port 0: TX 1000 pkts / 64.0KB RX 7000 pkts / 448.0KB DROP 0 PAUSE 2[ONLINE]
[0201] ```
[0202] Test results: No packet loss or deadlock during 2-port multicast; controllable drop and smooth link operation under 8-to-1 pressure; broadcast / multicast delivered as expected; correct unicast direction after MAC learning; Pause correctly triggered and resolved when water level / bandwidth exceeded limits; PTP correctly broadcast Sync according to simulation time intervals.
[0203] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.
Claims
1. A multi-simulated process network traffic exchange system based on shared memory, characterized in that: include; The simulator port layer contains multiple independent VCS simulation processes. Each VCS simulation process simulates a network port, and each VCS simulation process is compiled and run independently. The DPI-C port interface layer provides a standard C language interface between each VCS simulation process and the shared memory. Each VCS simulation process reads and writes the shared memory through the DPI-C port interface layer. The shared memory switching engine layer contains a central switching process. The central switching process uses a single-threaded main loop to non-blockingly poll all online port sending channels, and completes packet parsing, forwarding, backpressure control, MAC learning and 1588 time synchronization in shared memory. The shared memory data area is a contiguous address space in which the global header, port information array, channel information array, and slot pool are arranged sequentially. Each port is allocated two unidirectional channels: a transmitting channel TX=2N and a receiving channel RX=2N+1, where N is the port number. The transmitting channel is used by the VCS simulation process to send messages to the central switching process, and the receiving channel is used by the central switching process to forward messages to the VCS simulation process.
2. The multi-simulation process network traffic exchange system based on shared memory according to claim 1, characterized in that: Each unidirectional channel consists of a singly linked list of idle slots, a FIFO queue of ready messages, a first System V semaphore, a second System V semaphore, and a process-shared mutex lock; The free Slot singly linked list is formed by linking Slots that are in an idle state in the Slot pool, and is used to manage free storage units; The ready message FIFO queue is used to store the Slot index of the head of the message chain that has been written and is waiting to be read; The first System V semaphore counts the number of free slots in the singly linked list of free slots, and the second System V semaphore counts the number of ready messages in the ready message FIFO queue. Process-shared mutex locks are used to protect the FIFO queue of ready messages from mutual exclusion.
3. The multi-simulation process network traffic exchange system based on shared memory according to claim 1, characterized in that: The central switching process includes: The message parsing module is used to read messages from the sending channel, verify the validity of the message's magic field, and distinguish between control frames and data frames; The forwarding decision module is used to determine the target port of a packet based on the static target port or MAC learning results, and to perform flooding, bitmask copying or targeted forwarding based on the broadcast address, multicast address or unicast address respectively. The Pause back pressure control module is used to send a Pause control frame to the target port based on the dual-dimensional trigger conditions of the receiving channel's water level and bandwidth, and to send a Pause release control frame when the conditions are released. The 1588 PTP time synchronization module is used to track the maximum value of the most recent message timestamps on all ports as the master clock, and broadcasts a PTP_SYNC frame to all online ports when the progress exceeds the synchronization interval; The port lifecycle management module is used to manage the migration of each port between OFFLINE, ONLINE and DRAINING states, and periodically detect the port PID to achieve automatic cleanup of crashed ports; In the shared memory data area, the global header contains switch configuration, PTP configuration and MAC table, the port information array stores the status information of each port, the channel information array stores the status information of each channel, and the slot pool is the packet data storage area.
4. A method for exchanging network traffic across multiple simulated processes based on shared memory according to any one of claims 1-3, characterized in that, Includes the following steps: S1: Create and initialize the shared memory area and semaphore set, start the central switching process, and wait for each VCS simulation process to connect. S2: Each VCS simulation process calls the sw_port_open function to open the corresponding port through the DPI-C interface, writes port information to the shared memory to register its own vcs_pid, completes port registration and enters ONLINE state; S3: The sending-end VCS simulation process calls the sw_port_send function to transmit the target port number and message data through the DPI-C interface. The sending-end VCS simulation process writes the message into the sending channel corresponding to its own port and writes the current simulation timestamp into the message's exchange header. S4: The central switching process uses a single-threaded main loop to non-block poll all the sending channels of ports in the ONLINE state. When a packet is read, the magic field of the packet is checked. If it is a control frame, it is handed over to the control process. If it is a data frame, it enters the forwarding decision process. S5: The central switching process makes forwarding decisions based on the destination port of the message: if the destination port is not in the Pause state, the message is written to the receiving channel corresponding to the destination port. If the target port is in the Pause state, the packet will be temporarily stored in the pending buffer of the source port and retransmitted after the Pause is lifted. S6: Each receiving end VCS simulation process calls the sw_port_recv function to read the message forwarded by the central switching process from the receiving channel corresponding to its own port through the DPI-C interface, and strips the switching header to obtain the original message data; S7: At the end of each main loop, the central switching process sequentially performs Pause release check, PTP synchronization, MAC aging, port PID liveness detection and statistical printing, and automatically exits and destroys shared memory and semaphore set when all ports are offline.
5. The method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 4, characterized in that: In step S3, the specific steps for the sending end VCS simulation process to write the message into the sending channel include: calculating the required number of slots M by rounding up the message length; then, performing a P operation on the first System V semaphore to request M free slots, and returning SW_TX_FULL or blocking and waiting if the request fails; next, writing the message data into the requested M slots in fragments, and linking the M slots into a chain using the next_slot_idx field of each slot; then placing the head slot index of the chain into the tail of the ready message FIFO queue; finally, performing a V operation on the second System V semaphore to notify the central switching process that there are new ready messages.
6. The method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 4, characterized in that: In step S5, the forwarding decision includes static forwarding mode and MAC learning forwarding mode. In static forwarding mode, the central switching process directly determines the target port based on the dst_port field in the packet switching header. If dst_port=0xFF, it is determined to be a broadcast. In MAC learning forwarding mode, the central switching process extracts the source MAC address and destination MAC address from the Ethernet header of the packet, writes the source MAC address into the MAC table according to the FNV-1a hash algorithm and records the learning port and learning timestamp, ages the entries in the MAC table that exceed the preset aging time according to the monotonic clock cycle, and then makes a forwarding decision based on the destination MAC address.
7. A method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 6, characterized in that: The forwarding decision based on the destination MAC address specifically includes: if the destination MAC address is a broadcast address, the packet is flooded to all ports in the ONLINE state; if the destination MAC address is a multicast address, the member_mask bitmask of the multicast group is queried, and the packet is copied to all member ports marked in the member_mask; if the multicast group does not exist, the packet is flooded to all online ports; if the destination MAC address is a unicast address, the MAC table is queried, and if a match is found, the packet is forwarded to the learning port recorded in the matched entry; if no match is found, the packet is flooded to all ports in the ONLINE state.
8. A method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 4, characterized in that: It also includes a Pause back pressure control step: maintain a water level count and a bandwidth count within the simulation time window for each receiving channel. When the water level of the receiving channel exceeds a preset high water level threshold or the bandwidth of the receiving channel exceeds a preset rate limit, the Pause condition is triggered. Then, the central switching process sends a Pause control frame to the target port corresponding to the receiving channel that triggered the Pause condition, causing the target port to suspend sending packets and marking the target port's state as Pause. Next, when the water level of the receiving channel falls below the preset low water level threshold and the bandwidth falls below the preset rate limit, the Pause condition is lifted. Finally, the central switching process sends a Pause release control frame to the target port, removing the Pause mark from the target port's state and resending the packets temporarily stored in the pending buffer of the source port to the forwarding decision.
9. A method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 4, characterized in that: It also includes a three-layer deadlock prevention mechanism: The first layer is backpressure prevention: when the water level or bandwidth of the receiving channel exceeds the limit, a Pause backpressure is triggered. When the sending VCS simulation process calls sw_port_send, it returns the SW_PAUSED status code to notify the upper layer to pause transmission; The second layer is non-blocking write protection: when the central switching process writes a message to the receiving channel, it adopts a non-blocking write method. If there are not enough idle slots in the receiving channel, the current message is directly discarded and the drop_pkts count is incremented. When the sending VCS simulation process requests a slot, it adopts the try_alloc method. If the request fails, it immediately returns the SW_TX_FULL status code without blocking and waiting; The third layer is timeout fallback: when the receiving VCS simulation process calls sw_port_recv, it supports timeout waiting mode. If a message is not received after the preset timeout period, it returns the SW_TIMEOUT status code; the central switching process checks the PID of each port every 2 seconds. If the port PID is detected to be non-existent, it automatically sets the corresponding port to the OFFLINE state.
10. A method for exchanging network traffic among multiple simulated processes based on shared memory according to claim 4, characterized in that: In step S7, the port PID liveness detection and state transition specifically include: the port state machine includes OFFLINE, ONLINE, and DRAINING states. The OFFLINE state indicates that the port is not registered or has been closed, the ONLINE state indicates that the port is operating normally, and the DRAINING state indicates that the port is draining. When the VCS simulation process exits normally, it calls the sw_port_close function to send a PORT_DOWN control frame to the central switching process. After receiving the PORT_DOWN control frame, the central switching process transitions the corresponding port to the DRAINING state, waits for the port's transmission channel to drain or times out by 1 second, and then transitions the port to the OFFLINE state. Every 2 seconds, the central switching process reads the vcs_pid recorded in the port information. If the kill system call detects that the vcs_pid no longer exists, it determines that the corresponding port has crashed and automatically transitions the port to the DRAINING state until the OFFLINE state. When the central switching process detects that all ports are in the OFFLINE state, the central switching process automatically exits and calls shmctl and semctl to destroy the shared memory and semaphore set.
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