Component carrier with at least one opening and method of manufacturing a component carrier

Abstract

Described herein are a component carrier and a method of manufacturing a component carrier, the component carrier comprising: at least one electrically insulating layer structure (106) and at least one electrically conductive layer structure (104); the at least one insulating layer structure (106) comprising at least one opening (108) connecting a main surface (101) of the at least one electrically insulating layer structure (106) with at least one portion of the at least one electrically conductive layer structure (104), the at least one opening (108) being delimited by a lateral wall (109), the lateral wall (109) comprising two portions, a first portion (109a) and a second portion (109b), which are arranged on top of one another in the thickness direction of the at least one insulating layer structure (106), the two portions (109a, 109b) having different extensions from one another in the thickness direction of the at least one insulating layer structure (106).

Description

Technical Field

[0001] This invention relates to a component carrier comprising at least one electrically insulating layer structure and at least one electrically conductive layer structure. The component carrier further includes at least one opening connecting a main surface of the at least one electrically insulating layer structure to at least a portion of the at least one electrically conductive layer structure. The at least one opening is defined by a lateral wall comprising a first portion and a second portion. These two portions extend in different directions from each other. The invention also relates to a method of manufacturing such a component carrier. Background Technology

[0002] With the increasing functionality of products equipped with component carriers containing one or more electronic components, the miniaturization of these electronic components, and the growing number of electronic components to be mounted on component carriers such as printed circuit boards, increasingly robust array-like components or packages with multiple electronic components are being used. These components have multiple contacts or connections with increasingly smaller spacing between these contacts. During operation, heat dissipation from such electronic components and the component carrier itself is becoming increasingly important. For example, effective protection against electromagnetic interference (EMI) is becoming increasingly important. Simultaneously, the component carrier must be mechanically robust and electrically and magnetically reliable to enable operation, even under harsh conditions.

[0003] For certain applications, it is necessary to connect a component carrier to other devices, such as an IC chip or other component carriers. For such connections, solder bumps or solder balls can be provided. Solder bumps can be placed on top of smaller electrically conductive elements located on the main surface of the component carrier. To connect the component carrier to another device, that other device is placed on the solder bump and a soldering process is performed. Because solder bumps require only a small surface area, using solder bumps for connections allows for high package density connections.

[0004] Since the solder bump is positioned on the surface of the component carrier, a connection must be provided from the solder bump to an electrically conductive structure located within the component carrier. This connection can be achieved by providing a via through at least one electrically insulating structure that forms part of the main surface of the component carrier. Such a via can be provided by drilling a hole in the electrically insulating structure, connecting the main surface to the electrically conductive structure within the component carrier. After drilling, the hole can be filled with an electrically conductive material, for example, by electroplating. However, current techniques for manufacturing vias for connection to solder bumps have several drawbacks: the electrically insulating structure may be damaged or delaminated during drilling, such as laser drilling. Furthermore, drilling may leave residues of the electrically insulating structure within the hole, particularly at the bottom of the via adjacent to the electrically conductive structure within the component carrier. These residues may extend towards the bottom of the hole, forming foot structures, thus reducing the reliability of the via. For example, via breakage may occur due to residue in the form of foot-like structures. Furthermore, the hole may not have a regular shape due to the drilling process. In many cases, the hole size near the main surface is larger than the hole size near the electrically conductive structure. The drilled hole shape may be, for example, tapered. Such tapered drilling occurs, for example, during laser drilling. Overall irregularity can result in vias that connect solder bumps to the electrically conductive structure having irregular shapes. This irregular shape of the via can lead to poor signal integrity performance of the connection. Summary of the Invention

[0005] It may be necessary to provide an improved connection between the electrical conductive structure located within the component carrier and the electrical conductive structure located on the surface of the component carrier. The electrical conductive structure on the surface of the component carrier may, for example, be a solder bump.

[0006] A component carrier and a method for manufacturing the component carrier are described.

[0007] According to an aspect of the present invention, a component carrier (e.g., a printed circuit board or IC substrate) is described, the component carrier comprising:

[0008] The system comprises at least one electrically insulating layer structure (e.g., a reinforced / unreinforced resin layer or a protective layer) and at least one electrically conductive layer structure (e.g., a metal layer). The at least one insulating layer structure includes at least one opening (e.g., a hole) that connects the main surface of the at least one electrically insulating layer structure to at least a portion of the at least one electrically conductive layer structure. The at least one opening is defined by a lateral wall (which may surround the opening). The lateral wall comprises two portions: a first portion and a second portion, which are arranged vertically relative to each other in the thickness direction of the at least one insulating layer structure. The two portions have different extensions (e.g., different shapes or different dimensions) in the thickness direction of the at least one insulating layer structure.

[0009] According to another aspect of the invention, a method for manufacturing a component carrier (e.g., a component carrier as described above) is described, wherein the method comprises:

[0010] Forming a stacked component comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure;

[0011] At least one opening is formed, which connects the main surface of at least one electrically insulating layer structure to at least a portion of at least one electrically conductive layer structure. The at least one opening is defined by a lateral wall comprising two parts: a first part and a second part, which are arranged vertically relative to each other in the thickness direction of at least one insulating layer structure.

[0012] These two parts have different extensions in the thickness direction of at least one insulating layer structure.

[0013] In the context of this application, the term "component carrier" may specifically refer to a support structure capable of housing one or more components on and / or within the support structure to provide mechanical support and / or electrical connectivity. In other words, a component carrier can be configured as a mechanical and / or electronic carrier for a component. Specifically, a component carrier can be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. Specifically, a component carrier can also be implemented as a flexible substrate or a semi-rigid substrate. A component carrier can also be a hybrid board combining different types of component carriers of the above types. The term "component carrier" includes a finished component carrier that has been manufactured to all its functions. The term "component carrier" also includes any preforms of the finished component carrier that appear between manufacturing steps. A component carrier can also be a panel comprising multiple unfinished or finished printed circuit boards (PCBs).

[0014] In the context of this application, the term "stack" may specifically refer to an arrangement of multiple flat, layered structures mounted parallel to each other. For example, a stack may be a laminated stack, i.e., comprising multiple layered structures joined by the application of heat and / or pressure.

[0015] In the context of this application, the term "layer structure" may specifically refer to continuous layers, graphical layers, or multiple discontinuous islands in a common plane.

[0016] In the context of this application, the term "main surface" for a body (e.g., a stack) may specifically refer to one of two opposing largest surfaces of the body. The main surface may be connected by circumferential lateral walls. The thickness of a body such as a stack may be defined by the vertical distance between the two opposing main surfaces.

[0017] In the context of this application, the term "opening" may specifically refer to a cavity, via, or recess within a layered structure. A cavity, via, or recess may extend through the layer such that the central axis or axis of symmetry of the cavity is perpendicular or substantially perpendicular to the parallel main surfaces of the layer or stack. An opening may be an empty space or may be filled with a material, such as an electrically conductive material.

[0018] In the context of this application, the term "lateral wall" may specifically refer to a wall adjacent to an opening in a layered structure in the thickness direction. A lateral wall may have different portions. At least a portion of a lateral wall may be straight or curved (e.g., concave and / or convex).

[0019] In the context of this application, the terms "first part" and "second part" may specifically refer to different portions or segments of the lateral wall of the opening. A boundary may exist between the first part and the second part. For example, such a boundary may exist between different profiles (extension, size) or different properties (roughness) of the two parts.

[0020] Since the first and second parts of the lateral wall are respectively surrounding or adjacent to a part or segment of the opening, the two different parts or segments of the opening can also be referred to as "the first part" and "the second part".

[0021] In the context of this application, the term "thickness direction of at least one insulating layer structure" may specifically refer to a direction oriented perpendicular to at least one main surface of the at least one insulating layer structure. Preferably, the at least one insulating layer structure comprises two opposite main surfaces oriented parallel to each other.

[0022] According to exemplary embodiments, the present invention can be based on the idea of ​​providing openings with improved shapes in an electrical insulation layer structure to improve the integrity of vias. The improved shape has advantages regarding signal integrity performance, connection reliability, and the reliability of the component carrier. To improve the shape of the opening, the opening is manufactured in at least two distinct manufacturing steps, preferably in two consecutive manufacturing steps. Because the opening is manufactured in at least two manufacturing steps, the opening or its sidewall comprises two portions: a first portion and a second portion, wherein these two portions extend differently from each other in the thickness direction of at least one insulation layer structure. These two portions, differing from each other in their extension or shape, are the footprint of at least two manufacturing steps. This footprint is visible at the component carrier and in both the semi-finished and finished states of the component carrier.

[0023] An opening is formed starting from at least one insulating layer structure that does not yet have an opening. The opening connects the main surface of the electrically insulating layer structure—particularly the main surface of the electrically insulating layer structure opposite to at least one electrically conductive structure—to at least one electrically conductive layer structure. Thus, the opening provides a passage from the main surface of the electrically insulating layer structure to the electrically conductive layer structure. According to the concept of the invention, the opening is divided into two parts with different extensions in the thickness direction. According to related technologies, for example by laser drilling, an opening can be provided that provides only one extension in the thickness direction. Openings formed by laser drilling typically have a tapered shape, thus forming a tapered through-hole after the opening is filled with an electrically conductive material. Furthermore, openings formed solely by laser drilling include a constant extension or constant characteristic of the sidewalls of the opening. According to the invention, the two parts of the opening extend in different ways, and therefore allow for improvements in the shape of the opening in terms of signal integrity performance and reliable adhesive bonding between the electrically conductive material filled in the opening and the electrically insulating layer structure. For example, the two parts can be shaped such that the tapered shape of the entire opening is avoided or at least suppressed. For example, the different extensions of the two parts can be achieved by using different manufacturing processes for each of the two parts. For example, a first portion adjacent to the conductive layer structure can be fabricated using a chemical etching or stripping process, which allows for an extension of the essentially cylindrical first portion. A second portion, located above and adjacent to the first portion, can be fabricated by laser drilling, comprising a slightly tapered extension in the thickness direction. In this example, because the first portion is nearly cylindrical and the second portion has a less pronounced tapering due to extending only a portion of the depth of the opening in the thickness direction, the two portions, arranged vertically to each other in the thickness direction, together provide an improved shape. This improved shape results in improved signal integrity performance. Furthermore, particularly the region where the first and second portions are adjacent to each other can improve the adhesion of the conductive material filled into the opening to provide a via. For example, regions within the opening with different roughness—particularly the difference in roughness between the first and second portions—can be used to improve the adhesion of the conductive material filled into the opening. Additionally, due to the two fabrication steps used to form the opening, undercuts can also be formed in the opening to support adhesion between the conductive material filled into the via and the insulating layer structure. It has been confirmed that dividing the opening into a first part and a second part can also improve the product production run rate. Therefore, the manufacturing time of the described component carrier is shorter than that of related technologies.

[0024] The described component carrier includes an opening having a side wall composed of two parts. These parts extend in different ways and allow for an improved shape of the opening compared to an opening composed of only one part. The improved shape of the opening according to the invention provides an improved connection between the electrically conductive structure located within the component carrier and the electrically conductive structure located at the surface of the component carrier.

[0025] The described method for manufacturing the component carrier allows for the provision of the described component carrier in a simple and reliable manner. According to the concept of the invention, the two portions of the side wall of the opening are formed to have different extension patterns in the thickness direction of at least one insulating layer structure.

[0026] The described component carrier and the described method of manufacturing such a component carrier meet the requirement of providing an improved connection between the electrically conductive structure located within the component carrier and the electrically conductive structure located on the surface of the component carrier. In particular, an improved connection can be provided for solder protrusions on the main surface of the component carrier.

[0027] Exemplary Implementation

[0028] In this implementation, the different extensions of the two portions are inclined differently from each other relative to the thickness direction of at least one insulating layer structure. The inclinations of the two portions can differ from each other. Inclination can mean that, in the cross-sectional view of the opening, the side walls are sloping. The first portion can have a smaller inclination than the second portion. Furthermore, the first portion may not have an inclination, but may include a cylindrical shape, while the second portion may have an inclination and may include a tapered shape. The different shapes or inclinations of the two portions provide flexibility and tolerance in the design of the product or component carrier. Simultaneously, this offers the advantage that such an opening can improve the quality and reliability of the product or component carrier.

[0029] In implementation, the different extensions of the two parts are different shapes from each other. The shape can refer to its form in three-dimensional space. For example, the first part may include a cylindrical shape, while the second part may include a conical shape. The shape can be regular and constant in the circumferential direction around the central axis of the opening. The shape can also be irregular and asymmetrical around the central axis of the opening. For example, at least one of the two parts may not be symmetrical in at least one insulating layer structure in a top view. For example, the first part may have an asymmetrical rectangular shape in the top view, while the second part may have a symmetrical circular shape. Essentially, the regular shape formed by the present invention increases the tolerance for the layout of the opening design density. This means that the present invention can increase the density of openings and allows for the successful production of higher-density electrically conductive layer structures using current technology without additional investment. This not only improves yield and product quality but also reduces the cost of more advanced products.

[0030] In this embodiment, the first portion is closer to at least one electrically conductive layer structure, while the second portion is closer to the main surface of at least one electrically insulating layer structure. The first portion is defined as being closer to the electrically conductive layer structure. Furthermore, compared to related technologies, the diameter of the first portion is increased, thereby providing a larger channel for signal transmission. This can reduce the resistance in the electrical path. This improves signal transmission efficiency and reduces the skin effect. Simultaneously, this improves the consistency of the conductive material filling and reduces the risk of voids, thus improving reliability.

[0031] In one embodiment, the first portion and the second portion are positioned adjacent to each other in the thickness direction of at least one insulating layer structure. The first portion and the second portion may be directly adjacent in the thickness direction. Alternatively, an intermediate portion may exist between the first portion and the second portion, connecting the two portions. The intermediate portion can provide a buffer for thermal stress accumulated at or within the opening, allowing stress to be more dispersed into the interior of the opening through the intermediate portion, thereby reducing the risk of cracking.

[0032] In this embodiment, the planar extension of the first portion differs from that of the second portion in a direction perpendicular to the thickness direction of at least one insulating layer structure. A planar extension is an extension in a direction perpendicular to both the thickness direction and the central axis of the opening. The planar extension can indicate the area of ​​the corresponding portion. Furthermore, the planar extension can also indicate the shape or form of the portion in a plane perpendicular to the thickness direction. Therefore, the first and second portions are aligned, meaning that the opening with both portions has a more regular shape compared to related technologies. This design not only improves the quality of the electrically conductive material filling the opening but also enhances the signal integrity of the manufactured component carrier.

[0033] In one embodiment, the planar extension of the first portion is less than the planar extension of the second portion in a direction perpendicular to the thickness direction of at least one insulating layer structure. In this embodiment, the area defined by the first portion is smaller than the area defined by the second portion. For example, the diameter of the first portion may be smaller than the diameter of the second portion. This is a manufacturing imprint of the invention, and it can also help distribute thermal stress across the two portions, thereby improving the stability of the opening and preventing internal cracks in the opening.

[0034] In this embodiment, the diameter of the first portion differs from the diameter of the second portion. Diameter refers to the diameter in a direction perpendicular to the thickness direction of at least one insulating layer structure. Preferably, the diameter of the first portion is smaller than the diameter of the second portion.

[0035] In one embodiment, a stepped portion is provided between the first and second portions. This stepped portion can be formed by an edge or a corner. Specifically, a stepped portion is provided when the two portions extend in different planes in a direction perpendicular to the thickness direction. The stepped portion can have a surface oriented parallel to the main surface. The surface of the stepped portion can face the main surface of the component carrier or insulating layer structure. The stepped portion helps define the shape of the first and second portions. Through this step, the first and second portions can have straighter sidewalls compared to related technologies. In one embodiment, the first portion includes a straight shape in an axial section of at least one opening. In a section parallel to the central axis of the opening, the first portion can be straight. Preferably, in this section, the first portion has a linear shape oriented parallel to the thickness direction of at least one insulating layer structure. Therefore, this can improve the filling of the electrically conductive material and the signal transmission efficiency of the manufactured component carrier. Alternatively, the straight shape in this section can also be inclined relative to the thickness direction.

[0036] In one embodiment, the first portion extends cylindrically in the thickness direction. In this embodiment, the first portion is not inclined relative to the thickness direction. Alternatively, the first portion may also have an inclination and include a tapered extension in the thickness direction.

[0037] In one embodiment, the first portion extends in the thickness direction of at least one insulating layer structure. The first portion may extend straight in the thickness direction. In such a configuration, the first portion may be cylindrical. This type of design can increase the diameter of the opening in the first portion, thereby improving the consistency of the electrical conductive material filling and reducing the risk of voids during filling, thus improving the mechanical stability of the opening and the component carrier.

[0038] In one embodiment, the side wall at one end of the first portion is inclined, specifically, the side wall at one end of the first portion is inclined toward the second portion, and particularly wherein, in a direction perpendicular to the thickness direction of at least one insulating layer structure, the planar extension of the portion of the first portion adjacent to at least one electrically conductive layer structure is greater than the planar extension of the portion of the first portion adjacent to the second portion. In this embodiment, the first portion is inclined such that, in a cross-section parallel to the intermediate extension of the opening, the diameter of the end portion of the first portion adjacent to the second portion is smaller than the diameter of the end portion of the first portion adjacent to the electrically conductive layer structure. In this embodiment, the first portion may have an (inverted) tapered shape. Such a tapered shape increases the contact area between the opening and the electrically conductive layer structure. Furthermore, the surface area of ​​the first portion is also increased. The increased surface area provides better adhesion of the electrically conductive material filled into the first portion and the opening. This type of design helps to improve the high-density packaging of component carriers because the smaller diameter at the bottom of the layer allows for greater tolerance in the formation of the opening. Therefore, this provides more freedom and flexibility for designs with high-density packaging due to increased manufacturing capabilities. In addition, this can reduce damage to the bottom of the via during the opening formation process.

[0039] In this embodiment, the outer end portion of the first portion adjacent to the second portion has an arc shape. The outer end portion of the first portion may include an arc shape; preferably, it may include a flat arc shape. The arc-shaped end portion may connect to a step portion disposed between the first and second portions. The arc shape of the end portion of the first portion may vary in the circumferential direction of the first portion. The curvature of the arc may be greater in one region of the circumferential direction than in another. The arc can provide a smooth transition from the first portion to the step portion and / or to the second portion. Therefore, this ensures complete filling of the entire opening without the risk of voids, and thus improves signal integrity.

[0040] In one embodiment, the lateral walls of the second portion are inclined toward the main surface of at least one electrically insulating layer structure. Specifically, in a direction perpendicular to the thickness direction of the at least one insulating layer structure, the planar extension of the portion of the second portion adjacent to the first portion is smaller than the planar extension of the portion of the second portion adjacent to the main surface of the at least one electrically insulating layer structure. In this embodiment, the second portion has a tapered shape leading to the main surface of the at least one electrically insulating layer structure. This tapered shape can be formed using laser drilling. Since the smaller diameter at the bottom of the layer allows for greater tolerance in laser drilling, this type of design can help improve high-density packaging of the product, thus providing greater freedom and flexibility in designs with high-density packaging due to increased manufacturing capabilities. The first portion can also have a tapered shape in combination with the tapered shape of the second portion. The tapered shape of the first portion can be inverted with the tapered shape of the second portion. Therefore, the two portions together can have an hourglass shape. This configuration provides improved adhesion of the electrically conductive material filled into the opening due to the increased contact surface between the opening and the electrically conductive material. Furthermore, the hourglass shape of the opening provides a form closure for the electrically conductive material filled into it, and increases the mechanical stability of the component's load-bearing structure. Alternatively, the second part can also be a vertical cylindrical shape instead of an inclined or conical one. This type of design allows for greater precision in the opening and reduces resistance during power transmission.

[0041] In one implementation, the extension of the second portion in the thickness direction is tapered. Alternatively, the extension of the second portion can be cylindrical. In either case, since the opening is divided into two parts, each extending only a portion of the opening in the thickness direction, the overall opening has a less pronounced tapered shape compared to a through-hole according to related art.

[0042] In this implementation, the surface roughness of the first portion differs from that of the second portion. This difference in surface roughness between the first and second portions may be an effect of different manufacturing processes used to produce the first and second portions. To increase the diameter of the first portion and improve the consistency between the first and second portions, exposure techniques can be applied to form the first portion. The first portion can be formed by exposing and developing the bottom of the opening, which provides a flat and straight bottom for the formation of the second portion. The second portion can be formed using very precise laser drilling techniques (e.g., excimer laser or UV laser drilling), resulting in a straighter and more uniformly sized second portion within the opening. The different surface roughness of these two portions can be seen in the cross-section of the finished component carrier.

[0043] In this embodiment, the first and second portions are formed in two consecutive manufacturing steps using the same manufacturing process. Both the first and second portions can be manufactured using a photolithography process. Two photolithography processes can be performed, such as exposure, development, and stripping. The first portion is formed by patterning a dry film through a process involving exposure and development. After the remaining dry film is placed at the bottom of the opening, a photosensitive dielectric material (e.g., solder resist) is laminated or coated onto the remaining dry film. A second photolithography process is applied to form the second portion on the dry film by using exposure to polymerize a portion of the photosensitive dielectric material and using development to dissolve the unpolymerized portions of the photosensitive dielectric material, thereby removing the material to form the second portion. The remaining dry film is then stripped by using chemicals to loosen the bonding areas between the dry film and other materials, followed by high-pressure washing to remove the material from that location. Therefore, the first and second portions have different extension patterns in the thickness direction of at least one insulating layer structure. However, using the same manufacturing process for both portions can provide a more regular shape for the entire opening compared to using different manufacturing steps. For example, two photolithography processes used for manufacturing can be used to reduce the tapered extension of each of the two sections. The resulting openings with more consistent shape and size will facilitate filling the openings with conductive material and improve the signal integrity of the manufactured component carrier. Furthermore, the surface roughness of the two sections can differ, but the roughness variation between them can be less than that provided by using different manufacturing processes. Therefore, the skin effect in the openings can be reduced, thereby reducing signal loss during transmission.

[0044] In this implementation, the roughness of the first portion is less than that of the second portion. The lower roughness of the first portion can be achieved by forming it using a chemical process. This chemical process removes the material used to pattern the first portion, and it does not actually affect or damage the sidewall morphology of the opening. The higher roughness of the second portion is likely an effect of forming it using a drilling process. The second portion is formed by laser drilling, which essentially uses laser energy to ablate the material to form a portion of the opening. This ablation affects the morphology or physical properties of the material. On one hand, the higher roughness of the second portion can promote adhesion between the electrically conductive material to be filled into the opening and the sidewalls of the opening. On the other hand, the lower roughness of the first portion can reduce the resistance of the conductive material, thereby improving the quality and efficiency of signal transmission. Therefore, the different roughnesses on these two portions can compensate for each other's adhesion and electrical properties in a surprisingly synergistic way.

[0045] In this embodiment, a step portion exists between the first and second portions, and the surface roughness of the step portion facing the main surface of at least one electrically insulating layer structure differs from the roughness of the first portion. The surface roughness of the step portion may differ from the surface roughness of the first portion. This difference in roughness can result from different manufacturing processes used to form the surfaces of the first portion and the step portion. Since the step portion is formed after the first portion is formed, and is formed together with the second portion by laser drilling, the step portion will also be ablated by laser energy, resulting in a rough surface. This greater roughness promotes adhesion between the electrically conductive material to be filled into the opening and the sidewalls of the opening. This reduces the risk of cracks and / or delamination within or near the opening.

[0046] In this embodiment, the surface roughness of the stepped portion is greater than that of the first portion. The greater surface roughness of the stepped portion may be a result of the drilling process used to form the surfaces of the second portion and the stepped portion. The greater surface roughness of the stepped portion provides good adhesion for conductive materials that can be filled into the opening. Furthermore, the smaller surface roughness of the first portion can compensate for the resistance caused by the stepped portion in the opening, thereby improving signal integrity compared to vias in related technologies.

[0047] In one embodiment, the first portion has a constant roughness on its surface. The surface roughness of the first portion may be constant or uniform, and there are no regions with roughness greater or less. This constant roughness can be provided to form the first portion using a chemical process, such as a peeling process.

[0048] In an embodiment, at least one insulating layer structure includes a filler, particularly wherein the filler comprises fibers or spherical elements. The insulating layer structure may include fillers that improve the mechanical properties of the layer structure and / or adjust the Dk and Df values ​​of the insulating layer structure. The filler may, for example, be fibers or spherical elements. The fibers or spherical elements may be made of glass or carbon. The filler may be embedded in a matrix made of resin.

[0049] In this embodiment, the first portion does not have exposed filler. The first portion may have a smooth surface and no exposed filler at the surface. The surface of the first portion may be formed solely from a matrix material with at least one insulating layer structure. This configuration can be provided when the first portion is formed using, for example, a peeling chemical process. Due to the absence of exposed filler, the filling of conductive material in the first portion can be more efficient, and resistance can also be improved simultaneously.

[0050] In an embodiment, the second portion includes exposed filler and / or filler seat. In the second portion, there may be exposure due to the removal of the filler from the filler seat, resulting in the absence of the filler seat. The exposed filler and / or filler seat creates a greater roughness compared to a surface that does not contain exposed filler or filler seat. The exposed filler or filler seat may be a result of a drilling process used to form the second portion. During such drilling, the matrix and the filler of at least one insulating layer structure are subjected to mechanical and / or thermal stresses. Due to these stresses, some of the filler is removed from the matrix. By removing the filler, an empty filler seat remains at the surface. In other areas, stress may only remove the matrix from the filler, and the filler remains in the filler seat but is exposed at the surface of the second portion. The filler exposed at the surface can provide anchoring points for the sidewalls and the conductive material filled into the openings, improving adhesion between the sidewalls and the conductive material and preventing cracking or delamination.

[0051] In embodiments, the surface of the stepped portion includes exposed filler and / or filler seats. Where a stepped portion exists between the first and second portions, having a surface facing the main surface of the component carrier, this surface may also include exposed filler and / or filler seats. These exposed filler and / or filler seats may be the result of the drilling process used to form the second portion and the stepped portion, as described in relation to previous embodiments. Forming (micro)openings or vias by drilling offers significant advantages because it allows for the formation of openings or vias with diameters of 20 μm to 15 μm, particularly 12 μm to 8 μm, and more specifically 5 μm to 2 μm. When openings are formed using exposure techniques (where the filler inside the photosensitive dielectric material may not be exposed, and the chemical composition of the developing apparatus cannot dissolve the filler), the limitation on opening size is not affected by the filler inside the dielectric material. More importantly, exposed filler provides the advantage of improved adhesion between the sidewalls and the conductive material filled into the opening.

[0052] In this embodiment, the first and second portions are positioned off-center from each other in a plane perpendicular to the thickness direction of at least one insulating layer structure. The center or intermediate axes of the first and second portions may be offset from each other. This off-centering may occur if different manufacturing processes are used to form the first and second portions. Due to the different manufacturing processes, separate alignment must be performed for each process. Therefore, tolerances in alignment can exist, which are visible at the finished component carrier in the form of off-centering or alignment offset between the two portions. This provides flexibility in designing high-density openings and the ability to manufacture the component carrier with less effort.

[0053] In this implementation, multiple openings are provided, and in a plane perpendicular to the thickness direction of at least one insulating layer structure, there is a planar eccentricity between a first portion and a second portion of each opening. The first and second portions of the openings are eccentric to each other in different directions. This configuration may be the result of different alignments in the manufacturing of the first and second portions. Due to different tolerances in alignment or different manufacturing accuracy in different manufacturing processes, positional offsets between the first and second portions can occur with less effort. This eccentricity can be equal for all openings; alternatively, this eccentricity can be different for at least a portion of the openings compared to another portion of the openings. This also provides the significant advantage that product quality and reliability of high-density products used for high-performance computing can be ensured through internal technology without requiring substantial investment in additional technology.

[0054] In an embodiment, at least one electrical insulating layer structure includes a solder resist, and more particularly, at least one electrical insulating layer structure includes a solder resist layer. The solder resist defining the opening prevents solder from adhering to the main surface of the component carrier. In a configuration having an opening filled with a conductive material to form an electrically conductive connection, this connection can be used to place a solder bump on top of the component carrier. The solder resist adjacent to the electrically conductive connection and the solder bump prevents the solder from forming a short circuit between the two openings. In this way, a high packaging density of openings can be provided without the risk of damage or short circuits. With this invention, the limitations of openings formed by conventional methods—such as exposure in a solder resist—can be avoided.

[0055] In one embodiment, a conductive material is disposed in at least one opening, particularly wherein at least one opening is at least partially filled with a conductive material, preferably wherein the conductive material comprises copper. The conductive material within the opening can provide an electrically conductive connection between the main surfaces of at least one electrically conductive layer structure and at least one electrically insulating layer structure. In this way, vias can be formed within the openings. The volume of the conductive material can be the same for different openings, or it can vary between different openings due to manufacturing tolerances.

[0056] In this embodiment, conductive material fills at least one opening defined by the first and second portions. The conductive material can be filled into the first and second portions in a single manufacturing process step; for example, it can be filled into the first and second portions in a single manufacturing process step by electroplating. Although the first and second portions may have different diameters, shapes, or roughnesses, the filling of the conductive material can be accomplished with good quality in a single electroplating step because the present invention forms an opening with a consistent and desirable shape and size.

[0057] In one embodiment, the conductive material forms at least a portion of an electrically conductive connection extending along the thickness direction of at least one electrically insulating layer structure. The electrically conductive connection may form a through-hole connecting at least one electrically conductive structure to the main surface of a component carrier.

[0058] In one embodiment, the electrically conductive connection includes an extension extending beyond the opening. The extension may project along its thickness onto the main surface of the component carrier. The extension may form a disc or pad for arranging solder protrusions. The extension may be formed in the same process as the electrically conductive material being filled into the opening, thereby providing a consistent surface for the extension at the same level. Therefore, this provides a good interface for the formation of the next level structure.

[0059] In an embodiment, the extended portion of the electrically conductive connection has a planar extension in a direction perpendicular to the thickness direction of at least one electrically insulating layer structure. This planar extension is different from—and particularly larger than—the planar extension of the portion of the electrically conductive connection located inside the opening (the portion located inside the first and second portions) in a direction perpendicular to the thickness direction of at least one electrically insulating layer structure. The extension with a planar extension larger than the planar extension of the electrically conductive connection located inside the opening can form a pad or disc on top of the main surface of the component carrier. Furthermore, the extension protruding compared to the electrically conductive connection within the opening provides good fixation or adhesion of the electrically conductive connection within the electrically insulating layer structure. Typically, the extension may include a different material as an interlayer than the electrically conductive material to protect the electrically conductive structure and prevent ion migration from the electrically conductive structure to the outside, as this could affect subsequent soldering performance. The extension may also include solder material, such as solder bumps. A larger planar extension can provide a suitable interface for the formation of the interlayer and solder bumps, as the interlayer and solder bumps can be formed in a different process than the extension. The extension ultimately affects the height and consistency of the solder structure or bonding structure. Furthermore, the larger planar extension is also consistent with the size of the component that will be connected to the extension.

[0060] In one embodiment, the extension includes a connecting material, particularly nickel and tin, for soldering, at its open-facing outer end. The connecting material can be provided and applied as a solder bump on top of the outer end of the extension, the solder bump comprising nickel and tin (nickel and tin can be formed with good adhesion in the same process and provide a good bonding interface for the components).

[0061] In this embodiment, the component is connected to an electrically conductive connection, preferably to an extension of the electrically conductive connection. The component—preferably a high-end active component and, for example, an IC chip—can be connected to the electrically conductive connection. This connection can be completed during the soldering process.

[0062] In one embodiment, the stack includes multiple electrically insulating layer structures and multiple electrically conductive layer structures. In addition to at least one electrically conductive layer structure and at least one electrically insulating layer structure, multiple layer structures connected to the stack may also be provided. In this way, multiple functions can be provided for the component carrier.

[0063] In an embodiment, at least one electrically insulating layer structure including at least one opening is the outermost layer of the stack, and preferably, at least one electrically insulating layer structure including at least one opening is the outermost upper layer of the stack. When the opening is provided in the outermost layer of the stack, the opening can be used to form an electrically conductive connection or via that connects a structure within the component carrier to the main surface of the component carrier.

[0064] In one embodiment, an outermost bottom layer of the stack is disposed on a main surface opposite to at least one electrically insulating layer structure including at least one opening, the outermost bottom layer including at least one bottom opening, wherein the at least one bottom opening is different from at least one opening. The outermost layer on the main surface opposite to the main surface having the opening can be configured to connect a component carrier to an additional component or an additional component carrier. For such a connection, at least one bottom opening is provided that connects the main surface opposite the opening to an electrically conductive layer structure within the component carrier. The size, shape, and extent of the bottom opening differ from at least one opening in the outermost top layer of the component carrier. Furthermore, the number of bottom openings may differ from the number of openings. The central axis of at least one bottom opening may be offset relative to the central axis of at least one opening. The bottom opening can be used to form an electrical connection between the component carrier and a passive component such as a capacitor or inductor, or an electrical connection with an additional component carrier.

[0065] In an embodiment, at least one bottom opening is defined by a lateral wall that extends continuously, preferably in the thickness direction of the outermost bottom layer, and particularly wherein the lateral wall does not include a stepped portion. The bottom opening can be manufactured in a single manufacturing step. Thus, the bottom opening includes a continuous extension. Preferably, the bottom opening does not include a first portion and a second portion. The bottom opening can be manufactured or formed, for example, by exposing the outermost layer of the stack, which faces away from the outermost layer including the opening. The bottom opening can have a tapered shape. Because the elements connected to the bottom opening have a lower density, the requirements for connecting using a bottom opening are less than those for connecting using an opening, and therefore the bottom opening can be manufactured with a simple standard manufacturing process.

[0066] In an embodiment, at least one bottom opening has a planar extension in a direction perpendicular to the thickness direction of the outermost bottom layer, which differs from the planar extension of the at least one opening. Specifically, this planar extension differs from the planar extension of the first and / or second portions in a direction perpendicular to the thickness direction of the at least one insulating layer structure. The planar extension or area of ​​the bottom opening may differ from the planar extension or area of ​​the opening. Preferably, the planar extension of the bottom opening is larger than the planar extension of the opening. The bottom opening is configured to connect passive components or additional component carriers to the component carrier. This connection requires a lower package density than the connection of active high-side components to be connected to at least one opening. Therefore, due to the lower package density requirement, the planar extension of the bottom opening can be larger than the planar extension of the at least one opening. This type of design offers the significant advantages of allowing the bottom side of the component carrier to be manufactured with fewer processing steps and less effort, thereby increasing yield and reducing costs. Furthermore, the higher density at the top side and the lower density at the bottom side of the component carrier can meet the requirements of high-performance computing products with lower manufacturing costs.

[0067] In an implementation of this method, forming at least one opening is accomplished through the following steps:

[0068] Apply a protective layer on top of at least one electrically conductive layer structure;

[0069] Remove a portion of the protective layer, while another portion of the protective layer remains on at least one electrically conductive layer structure;

[0070] At least one insulating layer (e.g., a photosensitive dielectric material) is applied on top of at least one electrically conductive layer structure and the remainder of the protective layer;

[0071] Drill at least one blind hole in at least one insulating layer on top of at least one electrically conductive layer structure and the remainder of the protective layer, wherein a second portion of the opening is formed, wherein the second portion extends from the main surface of at least one electrically insulating layer to the remainder of the protective layer;

[0072] The remaining portion of the protective layer is removed via a second portion, forming a first portion of the opening, which extends from the second portion to at least one electrically conductive layer structure, wherein the first and second portions constitute the sidewalls of the opening. In this embodiment of the method, a protective layer is applied and formed to provide a negative form for the first portion of the opening. The protective layer may be a dry film made of a photosensitive material. Preferably, the protective layer is applied to the entire surface of the electrically conductive layer structure on top of the stack of layers. The protective layer is partially removed by exposure and development, such that only a portion of the protective layer remains in certain areas of the electrically conductive layer structure. An insulating layer is then applied to the remaining portion of the protective layer and on top of the electrically conductive layer structure. The second portion of the opening is formed by drilling into the top surface of the insulating layer. The drilling process is guided along the thickness direction and stops when the remaining portion of the protective layer is reached. In the next manufacturing step, the remaining portion of the protective layer is removed to form the first portion of the opening. The removal of the remaining portion of the protective layer is accomplished via a chemical process through the manufactured second portion, for example, by peeling through the manufactured second portion. By forming the first part and the second part, at least one electrical insulation layer structure serving as the outermost layer of the component carrier is formed in the applied electrical insulation layer.

[0073] In this embodiment of the method, the protective layer is a dry film, particularly a photosensitive dry film. The dry film is easy to apply and can be formed by exposure and development. Formation by exposure and development results in the remaining portion of the protective layer having a regular shape. Since the remaining portion of the protective layer forms the negative mold of the first part (the remaining portion is polymerized), a regular shape can be provided for the first part after the remaining portion of the protective layer is removed.

[0074] In this embodiment of the method, after the exposure and development steps of the protective layer, a portion of the protective layer is removed. This removal can be accomplished using chemical processes, such as a chemical stripping process to loosen the bond between the protective layer and other materials, followed by high-pressure washing to remove the loosened protective layer. After the chemical treatment, only a portion of the protective layer remains on top of the electrically conductive layer structure.

[0075] In an embodiment of this method, applying at least one insulating layer on top of at least one electrically conductive layer structure is achieved by laminating at least one insulating layer on top of other layers. For the lamination process, heat and / or pressure are applied to bond the insulating layer to the other layers. Alternatively, the insulating layer can be applied in an viscous state, for example, by spraying or coating.

[0076] In an embodiment of this method, drilling of at least one blind hole is performed by laser drilling, particularly by excimer laser drilling or ultraviolet laser drilling. Laser drilling is an efficient process for forming blind holes, enabling the rapid and precise fabrication of the second part. Laser drilling can also form very small (micro)holes or vias (laser drilling can form vias or holes with a minimum diameter of 2 micrometers in insulating materials).

[0077] In an embodiment of this method, the removal of the remaining portion of the protective layer via the second part is accomplished through a chemical process step, preferably by peeling. By using a chemical process such as peeling, the surfaces of the four first parts are not subjected to mechanical stress. Therefore, a smooth surface with constant roughness can be achieved for the open first part. Furthermore, the use of a chemical process also allows for the formation of undercut portions of the first part relative to the second part.

[0078] In an embodiment of the method, at least one opening having a first portion and a second portion is filled with a conductive material, preferably by electroplating. An electrically conductive connection is formed inside the opening, specifically, the electrically conductive connection includes an extension that extends beyond the opening. The opening is filled with conductive material to form the electrically conductive connection, which can constitute a via. Vias provided in this manner offer significantly improved signal integrity performance compared to vias formed in openings created through a single drilling process.

[0079] In one embodiment of the method, the connecting material is, in particular, solder, which is applied to the electrically conductive connection portion, preferably to an extension portion extending beyond the opening. In this embodiment, the connecting material is applied to the electrically conductive connection portion within the opening as the final step in the final manufacturing step of the component carrier. For example, the connecting material may be a solder protrusion placed on top of the electrically conductive connection portion.

[0080] In this implementation, the component carrier is formed into a plate. This facilitates a compact design, where the component carrier still provides a large base for mounting components on it. Furthermore, bare chips, particularly as examples of embedded electronic components, can be easily embedded into thin plates such as printed circuit boards due to their small thickness.

[0081] In one embodiment, the component carrier is configured as one of a printed circuit board, a substrate (particularly an IC substrate), a panel, and an interposer.

[0082] In the context of this application, the term "printed circuit board" (PCB) can specifically refer to a plate-shaped component carrier formed by laminating multiple electrically conductive layer structures with multiple electrically insulating layer structures, such lamination being carried out, for example, by applying pressure and / or by supplying heat. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may include resin and / or glass fiber, so-called prepreg, or FR4 material. The various electrically conductive layer structures can be connected to each other in a desired manner by forming holes through the laminate, for example, by laser drilling or mechanical drilling, and by partially or completely filling the holes with an electrically conductive material (partially copper) to form vias or any other through-hole connections. The filled holes connect the entire stack (the through-hole connections extend through multiple layers or the entire stack), or the filled holes connect at least two electrically conductive layers; these filled holes are referred to as vias. Similarly, optical interconnects can be formed through the various layers of the stack to receive electro-optical circuit boards (EOCBs). In addition to being able to embed one or more components into a printed circuit board, a printed circuit board is typically configured to house one or more components on one or both opposite surfaces of the board-shaped printed circuit board. The one or more components can be soldered to their respective main surfaces. The dielectric portions of the PCB may include resin with reinforcing fibers (such as glass fiber).

[0083] In the context of this application, the term "substrate" can specifically refer to a small component carrier. Relative to a PCB, a substrate can be a relatively small component carrier for mounting one or more components and can serve as a connection medium between one or more chips and another PCB. For example, a substrate can have approximately the same size as the components (particularly electronic components) to be mounted on it (e.g., in the case of chip-scale packages (CSPs)). More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks and a component carrier with a relatively high density of lateral and / or vertically arranged connections, comparable to a printed circuit board (PCB). Lateral connections are, for example, conductive paths, while vertical connections can be, for example, drilled holes. These lateral and / or vertical connections are arranged within the substrate and can be used to provide electrical, thermal, and / or mechanical connections between accommodated or unaccommodated components (e.g., bare wafers), particularly IC chips, and printed circuit boards or intermediate printed circuit boards. Therefore, the term "substrate" also includes "IC substrate." The dielectric portion of the substrate may include a resin having reinforcing particles (such as reinforcing spheres, particularly glass spheres).

[0084] In the context of this application, the term "inorganic layer structure" may specifically refer to a layer structure comprising inorganic materials, such as inorganic compounds. In particular, the dielectric material of the inorganic layer structure, or even the entire inorganic layer structure, may be made solely of inorganic materials or at least substantially solely of inorganic materials. In another embodiment, the inorganic layer structure may include an inorganic dielectric material and an additional, alternative dielectric material. The inorganic compound may be a compound lacking carbon-hydrogen bonds or a compound that is not an organic compound. In examples, the inorganic layer structure may include glass, such as silicon-based glass, particularly soda-lime glass, and / or borosilicate glass, and / or aluminosilicate glass, and / or lithium silicate glass, and / or alkali-free glass. In another example, the inorganic layer structure may include ceramic materials, such as aluminum nitride, and / or alumina, and / or silicon nitride, and / or boron nitride, and / or tungsten comprising ceramic materials. However, in another example, the inorganic layer structure may include semiconductor materials, such as silicon and / or germanium and / or silicon oxide and / or germanium oxide and / or silicon carbide and / or gallium nitride. In another embodiment, the inorganic layer structure may include (elemental) metals and / or metal alloys, such as copper and / or tin and / or bronze. In yet another embodiment, the inorganic layer structure may include inorganic materials not listed in the above examples, such as: MoS2, CuGaO2, AgAlO2, LiGaTe2, AgInSe2, CuFeS2, BeO.

[0085] The substrate or interlayer may include or be composed of the following: at least one layer of glass, silicon (Si), and / or photo-imaging or dry-etching organic material such as epoxy-based stacked material (e.g., epoxy-based stacked film), or polymer compound (which may or may not include photosensitive and / or thermosensitive molecules such as polyimide or polybenzoxazole).

[0086] In embodiments, at least one electrically insulating layer structure (and / or curable dielectric element) comprises at least one of the following: resins or polymers, such as epoxy resins, cyanate ester resins, benzocyclobutene resins, bismaleimide triazine resins, polystyrene derivatives (e.g., based on polyphenylene ether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymers (LCP), polytetrafluoroethylene (PTFE), polyvinylidene fluoride (PVDF), and / or combinations thereof. Reinforcing structures, such as those made of glass (multilayer glass) to form composite materials, such as meshes, fibers, spheres, or other types of filler particles, may also be used. The semi-cured resin combined with the reinforcing agent, such as fibers impregnated with the aforementioned resins, is called a prepreg. These prepregs are typically named according to their properties, for example, FR4 or FR5, to describe their flame-retardant characteristics. While prepregs, particularly FR4, are generally preferred for rigid PCBs, other materials, particularly epoxy-based laminates (e.g., stacked films) or photo-imageable dielectric materials, may also be used. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate resins may be preferred. In addition to these polymers, low-temperature co-fired ceramics (LTCC) or other low-DK, lower-DK, or ultra-low-DK materials can be used as electrical insulation layer structures in component carriers.

[0087] In embodiments, at least one electrically conductive layer structure comprises at least one of copper, aluminum, nickel, silver, gold, palladium, tungsten, carbon, platinum, (doped) silicon, and magnesium. While copper is generally preferred, other materials or other types of coatings thereof are also possible, particularly those coated with superconducting materials or conductive polymers, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT).

[0088] At least one component may be embedded in a component carrier and / or surface-mounted onto the component carrier. Such a component may be selected from: non-conductive inlays, conductive inlays (e.g., metallic inlays, preferably copper or aluminum), heat transfer units (e.g., heat pipes), optical guiding elements (e.g., optical waveguides or optical conductor connectors), electronic components, or combinations thereof. The inlay may be, for example, a metal block with or without an insulating material coating (IMS-inlay), which may be embedded or surface-mounted to facilitate heat dissipation. Suitable materials are defined by their thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on, but not limited to, metals, metal oxides, and / or ceramics, such as copper, alumina (Al₂O₃), or aluminum nitride (AlN). Other geometries with increased surface area are also frequently used to increase heat exchange capacity. In addition, components can be active electronic components (implementing at least one pn junction), passive electronic components such as resistors, inductors, or capacitors, electronic chips, storage devices (e.g., DRAM or other data memories), filters, integrated circuits (e.g., field-programmable gate arrays (FPGAs), programmable array logic (PALs), general-purpose array logic (GALs), and complex programmable logic devices (CPLDs)), signal processing components, power management components (e.g., field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, junction field-effect transistors (JFETs), or insulated-gate transistors). In-Ground Field-Effect Transistors (IGFETs), all of the aforementioned power management components are based on semiconductor materials, such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs), and / or any other suitable inorganic compound; optoelectronic interface elements; light-emitting diodes; optocouplers; voltage converters (e.g., DC / DC converters or AC / DC converters); cryptographic components; transmitters and / or receivers; electromechanical transducers; sensors; actuators; microelectromechanical systems (MEMS); microprocessors; capacitors; resistors; inductors; batteries; switches; cameras; antennas; logic chips; and energy harvesting units. However, other components can be embedded in the component carrier. For example, magnetic elements can be used as components. Such magnetic elements can be permanent magnets (e.g., ferromagnetic, antiferromagnetic, multiferroic, or ferrimagnetic elements, such as ferrite cores), or they can be paramagnetic. However, the component can also be an IC substrate, an interposer, or another component carrier, for example, in a board-in-board configuration. Components may be surface-mounted onto a component carrier and / or embedded within the component carrier. Furthermore, other components may be used, particularly those that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment.

[0089] In one embodiment, the component carrier is a laminated component carrier. In this embodiment, the component carrier is a multilayer composite structure that is stacked and connected together by applying pressure and / or heat.

[0090] After processing the internal layer structure of the component carrier, one or more additional electrically insulating and / or electrically conductive layer structures (particularly by lamination) can be used to symmetrically or asymmetrically cover one main surface or two opposite main surfaces of the processed layer structure. In other words, stacking can continue until the desired number of layers is obtained.

[0091] After the stacked components of the electrical insulation layer structure and the electrical conductivity layer structure are formed, the obtained layer structure or component carrier can be surface treated.

[0092] Specifically, regarding surface treatment, an electrically insulating solder resist can be applied to one or both opposing main surfaces of a laminate or component carrier. For example, this solder resist can be formed over the entire main surface and subsequently patterned to expose one or more electrically conductive surface portions for electrically connecting the component carrier to electronic peripherals. The solder resist-covered surface portions of the component carrier, particularly copper-containing surfaces, can be effectively protected against oxidation or corrosion.

[0093] Regarding surface treatment, the surface treatment portion can also be selectively applied to the exposed electrically conductive surface portion of the component carrier. This surface treatment portion can be an electrically conductive covering material on the exposed electrically conductive layer structure (e.g., specifically including copper or copper pads, conductive traces, etc.) on the surface of the component carrier. If this exposed electrically conductive layer structure is not protected, the exposed electrically conductive component carrier material (especially copper) may oxidize, making the component carrier less reliable.

[0094] The surface-treated portion can then be formed as a joint between, for example, a surface-mount component and a component carrier. The surface-treated portion protects the exposed conductive layer structure (particularly copper circuitry) and functions as a joining process with one or more components, for example, by soldering. Examples of suitable materials for the surface-treated portion include organic solderability protectant (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), gold (particularly hard gold), electroless tin, nickel-gold, nickel-palladium, etc. Attached Figure Description

[0095] The aspects of the invention as defined above, as well as other aspects of the invention, will become apparent from the examples of embodiments described below, and will be explained with reference to these examples of embodiments.

[0096] Figure 1 A side cross-sectional view of a component carrier according to an exemplary embodiment of the present invention is shown.

[0097] Figure 2 A side cross-sectional view of a component carrier according to the prior art is shown.

[0098] Figure 3 A side cross-sectional view of a first state during the manufacturing of a component carrier is shown, according to an exemplary embodiment of a method for manufacturing a component carrier.

[0099] Figure 4 A side cross-sectional view of a second state during component carrier manufacturing is shown, according to an exemplary embodiment of a method for manufacturing a component carrier.

[0100] Figure 5 A side cross-sectional view of a third state during the manufacturing of a component carrier is shown, according to an exemplary embodiment of a method for manufacturing a component carrier.

[0101] Figure 6 A side cross-sectional view of a fourth state during component carrier manufacturing is shown, according to an exemplary embodiment of a method for manufacturing a component carrier.

[0102] Figure 7 A side cross-sectional view of a fifth state during the manufacturing of a component carrier is shown, according to an exemplary embodiment of a method for manufacturing a component carrier.

[0103] Figure 8 A side cross-sectional view of a component carrier according to an exemplary embodiment of the present invention is shown during manufacturing.

[0104] Figure 9 Details of an exemplary embodiment of the present invention are shown in a side cross-sectional view. Detailed Implementation

[0105] Figure 1 A side cross-sectional view of a component carrier 100 according to an exemplary embodiment of the present invention is shown. Figure 1A portion of a component carrier 100 is shown in the diagram. The component carrier 100 includes at least one electrically insulating layer structure 106. In the illustrated embodiment, the electrically insulating layer structure 106 is formed of solder resist, particularly a solder resist layer. The component carrier 100 also includes at least one electrically conductive layer structure 104, which is located at the bottom of or at least partially within the electrically insulating layer structure 106. The electrically conductive layer structure 104 may include pads, traces, and other conductive patterns. An opening 108 connects the upper main surface 101 of the electrically insulating layer structure 106 to the electrically conductive layer structure 104. The opening 108 is defined by a lateral wall 109. The lateral wall 109 includes two portions: a first portion 109a adjacent to the electrically conductive layer structure 104 and a second portion 109b adjacent to the main surface 101. The second portion 109b is located above the first portion 109a. The first portion 109a and the second portion 109b are adjacent in the thickness direction of the insulating layer structure 106. In the thickness direction of the insulating layer structure 106, the two portions 109a and 109b extend differently from each other. In the illustrated embodiment, this different extension manifests as different inclinations, different shapes, and different planar extensions in a direction perpendicular to the thickness direction of the insulating layer structure 106. Details regarding the different extension patterns of the two portions 109a and 109b will be provided in [reference]. Figure 8 Describe it.

[0106] exist Figure 1 In the illustrated embodiment, the opening 108 is completely filled with an electrically conductive material to form an electrically conductive connection 110 extending in the thickness direction from the electrically conductive layer structure 104 to the main surface 101. The electrically conductive material within the opening 108 extends in the thickness direction and also forms an extension 110a of the electrically conductive connection 110. This extension 110a protrudes beyond the main surface 101 in the thickness direction. In the illustrated embodiment, the extension 110a has a planar extension in a direction perpendicular to the thickness direction, which is greater than the planar extension of the portion of the electrically conductive connection 110 located within the opening 108, and specifically, the planar extension of the extension 110a is greater than the planar extension of the portions of the electrically conductive connection 110 located within the first portion 109a and the second portion 109b. Therefore, a portion of the extension 110a covers the main surface 101. Furthermore, the extension 110a also protrudes beyond the sidewall 109 of the opening 108 in a direction perpendicular to the thickness direction. The outer end portion of the extension 110a facing the opening 108 includes a connecting material 111. In the illustrated embodiment, the connecting material 111 is solder, and solder protrusions are formed on the surface of the electrically conductive connection portion 110 opposite to the electrically conductive layer structure 104. The connecting material 111 can be used to connect components to the component carrier 100 by welding. Figure 1In the embodiment shown, the opening 108 is formed in the electrically insulating layer structure 106, which is the outermost layer of the stacked layers of the component carrier 100. With the electrically conductive material already filled into the opening 108 and forming the electrically conductive connection portion 110, the two portions 109a and 109b of the side wall 109 of the opening 108 are also clearly visible.

[0107] Figure 2 A side cross-sectional view of a component carrier according to the prior art is shown. The portion of the component carrier shown includes a solder bump B, which is connected to an electrically conductive layer structure 204 via a via V. The via V is formed by drilling an opening in an electrically insulating layer structure 206 using laser drilling. This opening has an irregular shape in the thickness direction of the insulating layer structure 206. Because it is manufactured by laser drilling, the opening is tapered. The dimension of the opening near the upper main surface of the electrically insulating layer structure 206 is larger than the dimension of the opening adjacent to the electrically conductive structure 204. This irregular shape of the via V, especially for high-performance computing products, can lead to poor signal integrity performance of the connection between the solder bump B and the electrically conductive layer structure 204. By increasing the laser beam power of the laser drilling, the shape of the via V may be improved, reducing the tapering degree of the via shape. However, such an increase in laser beam power may cause damage or delamination of the top layer of the component carrier.

[0108] Figures 3 to 7 Different states during the manufacturing of component carrier 100 using the method for manufacturing component carrier according to the present invention are shown.

[0109] Figure 3 A side cross-sectional view of a first state during the manufacturing of component carrier 100 is shown, according to an exemplary embodiment of a method for manufacturing component carrier 100. The component carrier 100 shown in the first state already includes a plurality of electrically insulating layer structures 106 and a plurality of electrically conductive layer structures 104. These layers are connected to form a stack. Furthermore, component carrier 100 may include embedded components. The following description relates to the manufacturing of the upper outermost layer of component carrier 100, which will include a plurality of openings 108 according to the invention in a later stage of manufacturing.

[0110] Figure 3 The first state during manufacturing is shown. A protective layer 120 is applied on top of the uppermost electrically conductive layer structure 104 of the stack. This protective layer 120 will be used to form the first portion 109a of the opening 108. The protective layer 120 is composed of a dry film. Figure 3The process begins in the first state shown, where the protective layer 120 is exposed and developed. Exposure is performed only on a portion of the surface area of ​​the protective layer 120, while another portion remains unexposed. After exposure and development, a portion of the protective layer 120 is removed, while the other portion remains on the electrically conductive layer structure 104. The removal of the portion of the protective layer 120 is accomplished through a chemical process, such as a stripping process.

[0111] Figure 4 A side cross-sectional view of a second state during the manufacturing of the component carrier 100 is shown, according to an exemplary embodiment of a method for manufacturing the component carrier 100. Figure 4 In the second state shown, Figure 3 A portion of the protective layer 120 applied in the indicated state is removed. Only a portion of the protective layer 120 remains on top of the electrically conductive layer structure 104. The remaining portion (sidewalls) of the protective layer 120 already has the dimensions and shape of the first portion 109a of the opening 108 to be formed in subsequent manufacturing steps. The remaining portion (sidewalls) of the protective layer 120 constitutes the negative form of the first portion 109a. During exposure of the protective layer 120, the planar extension range or diameter of the remaining portion of the protective layer 120 can be defined and adjusted.

[0112] Figure 5 A side cross-sectional view of a third state during the manufacturing of the component carrier 100, according to an exemplary embodiment of a method for manufacturing the component carrier 100. Figure 4 Starting in the second state shown, an insulating layer 106L is applied on top of the uppermost conductive layer structure 104 and the remainder of the protective layer 120. The insulating layer 106L covers the entire upper surface of the component carrier 100. After the insulating layer 106L is applied, its upper surface forms the main surface 101 of the component carrier 100. Figure 5 In the third state shown, the remaining portion of the protective layer 120 and the electrically conductive layer structure 104 are embedded within the insulating layer 106L. The insulating layer 106L is applied on top of the electrically conductive layer structure 104 by laminating it onto the other layers. Alternatively, the insulating layer 106L can be applied in an adhesive state, such as in the form of resin. In the illustrated embodiment, the insulating layer 106L is a solder resist, which is a photosensitive dielectric material and includes fillers.

[0113] Figure 6 A side cross-sectional view of a fourth state during the manufacturing of the component carrier 100 is shown, according to an exemplary embodiment of a method for manufacturing the component carrier 100. In the fourth state shown, in... Figure 5Multiple openings 108 are formed in the visible insulating layer 106L. First, a second portion 109b is formed by drilling blind holes in the insulating layer 106L. Drilling is performed by laser drilling, specifically by excimer laser drilling. Depending on the size of the openings 108, ultraviolet lasers can also be used to form the second portion 109b. Drilling of the blind holes begins at the main surface 101 and is guided along the thickness direction of the insulating layer 106L. Drilling stops when the blind holes reach the remaining portion of the protective layer 120. At an intermediate stage in forming the openings 108, only the second portion 109b is formed, extending from the main surface 101 to the remaining portion of the protective layer 120. After forming the second portion 109b, the remaining portion of the protective layer 120 is removed via the second portion 109b to form the first portion 109a. Removal of the remaining portion of the protective layer 120 is performed by a chemical process step, specifically by a stripping step. Figure 6 The fourth state shown illustrates the completed opening 108, which includes a lateral wall 109 comprising a first portion 109a and a second portion 109b. By forming the opening 108, the insulating layer 106L transforms into an electrically insulating layer structure 106. In the thickness direction of the insulating layer structure 106, the two portions 109a and 109b extend in different ways relative to each other. These different extension patterns of the two portions 109a and 109b... Figure 6 and Figure 7 Not visible in the text. Details regarding these two parts, 109a and 109b, are as follows: Figure 8 and Figure 1 As shown, and explained in the corresponding descriptions of these figures.

[0114] Figure 7 A side cross-sectional view of a fifth state during the manufacturing of the component carrier 100 is shown, according to an exemplary embodiment of the method for manufacturing the component carrier 100. Figure 7 The fifth state shown depicts the component carrier 100 in its completed state. From Figure 6 Starting in the fourth state, the openings 108 are filled with an electroplated conductive material. The conductive material forms an electrically conductive connection 110 in each opening 108. The electrically conductive connection 110 includes an extension 110a that extends beyond the opening 108 in the thickness direction of the insulating layer structure 106. Furthermore, a bonding material 111 has been applied to the electrically conductive connection 110. The bonding material 111 is solder, and a solder protrusion is formed on the top of each electrically conductive connection 110. For details regarding the electrically conductive connection 110, see [reference needed]. Figure 1 Described.

[0115] exist Figure 7In the completed state of the component carrier 100 shown, a plurality of bottom openings 112 are located in the outermost bottom layer, which is opposite to the electrical insulating layer structure 106 including the opening 108. Each bottom opening 112 is defined by a lateral wall that extends continuously in the thickness direction of the outermost bottom layer of the stack. The bottom openings 112 are different from the openings 108 located in the outermost top layer of the stack. The bottom openings 112 are formed in a single step, preferably by exposure. The bottom openings 112 do not include two distinct portions. Therefore, there is no step portion S in the lateral wall of the bottom openings 112. The bottom openings 112 have a planar extension in a direction perpendicular to the thickness direction of the outermost bottom layer, which is different from the planar extension of the openings 108, and in particular, the planar extension of the bottom openings 112 is different from the planar extension of the first portion 109a and / or the second portion 109b in a direction perpendicular to the thickness direction of the insulating layer structure 106 forming the outermost top layer of the stack. Bottom opening 112 is used to connect component carrier 100 to passive components, such as capacitors and inductors, or to connect component carrier 100 to a larger (solder) bump for connection to another component carrier with lower density. Bottom opening 112 is manufactured using a simple process because the requirements for signal integrity performance are lower since it connects to low-density components. In contrast, opening 108, located in the top outermost layer, i.e., the opening in the electrical insulation layer structure 106, has an optimized shape due to its two parts 109a, 109b. Compared to bottom opening 112, opening 108 with electrically conductive connection 110 has significantly higher signal integrity performance. The process of manufacturing opening 108 involves more steps than that of manufacturing bottom opening 112. However, opening 108 significantly improves the performance of component carrier 100 for connection to high-end components, which can be connected to component carrier 100 using connection material 111 as a solder bump.

[0116] Figure 8 A side cross-sectional view of a component carrier 100 during manufacturing is shown according to an exemplary embodiment of the present invention. Figure 8In the manufacturing state shown, the component carrier 100 includes an opening 108 that is not yet filled with electrically conductive material. The opening 108 is defined by a lateral wall 109. At the bottom, the opening 108 is defined by a portion of the electrically conductive layer structure 104. The opening 108 and / or the lateral wall 109 include a first portion 109a and a second portion 109b, wherein the first portion 109a is closer to at least one electrically conductive layer structure 104, and the second portion 109b is closer to the main surface 101 of at least one electrically insulating layer structure 106. The first portion 109a and the second portion 109b are adjacent to each other in the thickness direction of the insulating layer structure 106. The two portions 109a and 109b have different extension patterns in the thickness direction of the insulating layer structure 106. In the illustrated embodiment, the second portion 109b has a different angle of inclination compared to the first portion 109a. The second portion 109b has a slightly tapered shape, wherein the second portion 109b is inclined toward the main surface 101 of the electrical insulating layer structure 106 (the second portion may also have straight sidewalls), particularly in the direction perpendicular to the thickness direction of the insulating layer structure 106, the planar extension of the portion of the second portion 109b adjacent to the first portion 109a is smaller than the planar extension of the portion of the second portion 109b adjacent to the main surface 101. The first portion 109a extends in a straight shape, such that the extension of the first portion in the thickness direction is cylindrical. Therefore, the different extensions of the two portions 109a and 109b are also different shapes from each other. The first portion 109a may also have a tapered shape. However, the tapered shape of the first portion 109a may be different from the tapered shape of the second portion 109b. The first portion 109a may be inclined at one end, particularly from the conductive layer structure 104 toward the second portion 109b. Specifically, in the direction perpendicular to the thickness direction of the insulating layer structure 106, the planar extension of the portion of the first portion 109a adjacent to the conductive layer structure 104 is greater than the planar extension of the portion of the first portion 109a adjacent to the second portion 109b. Furthermore, in the direction perpendicular to the thickness direction of the insulating layer structure 106, the planar extension of the first portion 109a is smaller than the planar extension of the second portion 109b. Due to the different extension patterns of the two portions 109a and 109b in the direction perpendicular to the thickness direction, a step portion S is provided between the first portion 109a and the second portion 109b. Figure 8 and Figure 1 In the cross-section shown, the different shapes or extensions of the step portion S, the first portion 109a, and the second portion 109b are clearly visible.

[0117] In the illustrated embodiment, the roughness of the first portion 109a differs from that of the second portion 109b. The roughness of the first portion 109a is less than that of the second portion 109b. This difference in roughness is a result of different manufacturing processes used to manufacture the first portion 109a and the second portion 109b. The first portion 109a is manufactured by a chemical process, preferably by a stripping process. Therefore, the surface of the first portion 109a is smooth and has a lower roughness. In the illustrated embodiment, the insulating layer structure 106 includes fillers, which may be composed of spherical elements. The first portion 109a has no exposed filler because it is formed by a chemical process without mechanical deformation or wear during manufacturing. Therefore, during manufacturing, the filler adjacent to the first portion 109a is not subjected to stress and maintains its position embedded in the insulating layer structure 106. Preferably, no filler protrudes from the surface of the first portion 109a. Therefore, the first portion 109a has a constant roughness on its surface. However, the second portion 109b is manufactured by drilling. During drilling, the electrical insulation layer structure 106 with embedded filler is subjected to mechanical and / or thermal stress. Therefore, some filler may be removed from the filler seat and no longer embedded within the electrical insulation layer structure 106. After drilling through the second portion 109b, the second portion 109b includes exposed filler and / or exposed filler seat. The filler seat is a cavity containing filler that was removed during drilling. The different surface roughness between the first portion 109a and the second portion 109b is a result of different manufacturing processes and is visible in the cross-section of the opening 108. The step portion S between the first portion 109a and the second portion 109b has a different surface roughness than the first portion 109a. The surface roughness of the main surface 101 of the step portion S facing the electrical insulation layer structure 106 is greater than that of the first portion 109a because the surface of the step portion S was also manufactured during drilling. Details regarding the surface roughness of the step portion S will be referred to... Figure 9 Describe it.

[0118] exist Figure 8 In the illustrated embodiment, the electrical insulation layer structure 106 is a solder resist layer with embedded filler. Preferably, the opening 108 with lateral walls 109 is located in the outermost layer of the stack of layers constituting the component carrier 100.

[0119] Figure 9 Details of an exemplary embodiment of the invention are shown in the form of a side sectional view. The details shown depict the step S between the first portion 109a and the second portion 109b of the opening 108. The opening 108 and its side wall 109 are... Figure 1 and Figure 8 The implementation method shown corresponds to this. Therefore, regarding Figure 1 and Figure 8 The description also applies to Figure 9 The components shown. In Figure 9 In the details, it is immediately apparent that the step S has a high surface roughness. As shown in the reference... Figure 8 As explained, the second part 109b is manufactured by a drilling process. The surface of the step portion S, extending horizontally and facing the main surface 101 of the electrical insulation layer structure 106, is also formed during the drilling process of manufacturing the second part 109b. During the drilling process, the surface of the step portion S is subjected to mechanical stress, causing some of the filler embedded in the electrical insulation layer structure 106 to be removed or damaged. Therefore, the surface of the step portion S also includes exposed filler and / or filler seats. This results in an increased surface roughness of the step portion S compared to the smooth surface of the first part 109a. The higher surface roughness of the step portion S provides good adhesion for the conductive material used to fill the opening 108 and form the electrically conductive connection 110. The electrically conductive connection 110 is formed in an electroplating process. The conductive material of the electrically conductive connection 110 follows the rough surface of the step portion S. In this way, a form closure is formed between the rough surface of the step portion S and the electrically conductive connection 110. This type of closure ensures good adhesion of the electrically conductive connection 110 within the opening 108. Therefore, it effectively prevents the electrically conductive connection 110 from delaminating or separating from the electrically insulating layer structure 106. The higher surface roughness of the stepped portion S and the second portion 109b improves the mechanical stability and durability of the component carrier 100.

[0120] Figure Labels

[0121] 100 component carriers

[0122] 101 Main Surface

[0123] 104 Electrically Conductive Layer Structure

[0124] 106 Insulation Layer Structure

[0125] 106L insulation layer

[0126] 108 Opening

[0127] 109 Lateral walls

[0128] 109a Part 1

[0129] 109b Part 2

[0130] 110 Electrically Conductive Connection

[0131] 110a Extension

[0132] 111 Connecting materials

[0133] 120 protective layer

[0134] 204 Electrically Conductive Layer Structure

[0135] 206 Insulation Layer Structure

[0136] B solder bump

[0137] S-step section

[0138] V-via.

Claims

1. A component carrier (100), comprising: At least one electrically insulating layer structure (106) and at least one electrically conductive layer structure (104); wherein the at least one electrically insulating layer structure (106) includes at least one opening (108) connecting the main surface (101) of the at least one electrically insulating layer structure (106) to at least a portion of the at least one electrically conductive layer structure (104), and the at least one opening (108) is defined by a lateral wall (109) comprising two parts, namely a first part (109a) and a second part (109b), the first part (109a) and the second part (109b) being arranged vertically relative to each other in the thickness direction of the at least one electrically insulating layer structure (106). The two portions (109a, 109b) extend differently from each other in the thickness direction of the at least one electrical insulating layer structure (106).

2. The component carrier (100) according to claim 1, wherein, The different extensions of the two portions (109a, 109b) refer to the fact that the two portions have different inclinations relative to the thickness direction of the at least one electrical insulating layer structure (106).

3. The component carrier (100) according to any one of the preceding claims, wherein, The different extensions of the two parts (109a, 109b) refer to the fact that the two parts have different shapes from each other.

4. The component carrier (100) according to any one of the preceding claims, wherein, The first portion (109a) is closer to the at least one electrically conductive layer structure (104), and the second portion (109b) is closer to the main surface (101) of the at least one electrically insulating layer structure (106).

5. The component carrier (100) according to any one of the preceding claims, wherein, In a direction perpendicular to the thickness direction of the at least one electrically insulating layer structure (106), the planar extension of the first portion (109a) differs from the planar extension of the second portion (109b), particularly wherein, In a direction perpendicular to the thickness direction of the at least one electrically insulating layer structure (106), the planar extension of the first portion (109a) is smaller than the planar extension of the second portion (109b), and / or The diameter of the first part (109a) is different from the diameter of the second part (109b).

6. The component carrier (100) according to any one of the preceding claims, wherein, A step portion (S) is provided between the first portion (109a) and the second portion (109b).

7. The component carrier (100) according to any one of the preceding claims, wherein, In the axial cross-section of at least one of the openings (108), the first portion (109a) is vertical.

8. The component carrier (100) according to any one of claims 1 to 6, wherein, The lateral wall (109) slopes toward the second portion (109b) at one end of the first portion (109a), particularly wherein, In a direction perpendicular to the thickness direction of the at least one electrically insulating layer structure (106), the planar extension of the portion of the first portion (109a) adjacent to the at least one electrically conductive layer structure (104) is greater than the planar extension of the portion of the first portion (109a) adjacent to the second portion (109b).

9. The component carrier (100) according to any one of the preceding claims, wherein, In the axial cross-section of at least one of the openings (108), the second portion (109b) is inclined.

10. The component carrier (100) according to any one of the preceding claims, wherein, The roughness of the first part (109a) is different from that of the second part (109b), in particular The roughness of the first part (109a) is less than that of the second part (109b).

11. The component carrier (100) according to claim 6, wherein, The surface roughness of the stepped portion (S) is different from that of the first portion (109a).

12. The component carrier (100) according to claim 11, wherein, The roughness of the first portion (109a) is less than that of the second portion (109b), and in particular, the surface roughness of the stepped portion (S) is greater than that of the first portion (109a).

13. The component carrier (100) according to any one of the preceding claims, wherein, At least one electrically insulating layer structure (106) includes a filler, particularly wherein, The packing material includes spherical elements, particularly wherein the first portion (109a) is not exposed packing material.

14. The component carrier (100) according to any one of the preceding claims, wherein, The second part (109b) includes the exposed packing and / or packing seat.

15. The component carrier (100) according to any one of claims 6, 11 or 12, wherein, The surface of the stepped portion (S) includes the exposed packing and / or packing seat.

16. The component carrier (100) according to any one of the preceding claims, wherein, In a plane perpendicular to the thickness direction of the at least one electrically insulating layer structure (106), the first portion (109a) and the second portion (109b) are eccentrically arranged relative to each other, particularly wherein, A plurality of openings (108) are provided, and in a plane perpendicular to the thickness direction of the at least one electrical insulating layer structure (106), there is a planar eccentricity between the first portion (109a) and the second portion (109b) of the respective openings (108), in particular, wherein the first portion (109a) and the second portion (109b) of the openings (108) are eccentrically arranged in different directions from each other.

17. The component carrier (100) according to any one of the preceding claims, wherein, The at least one electrical insulating layer structure (106) includes a solder resist, and in particular, the solder resist is a solder resist layer.

18. The component carrier (100) according to any one of the preceding claims, wherein, A conductive material is provided in at least one of the openings (108), particularly wherein at least one of the openings (108) is at least partially filled with the conductive material, preferably wherein the conductive material comprises copper.

19. The component carrier (100) according to any one of the preceding claims, wherein, The stacked component includes multiple electrically insulating layer structures (106) and multiple electrically conductive layer structures (104), particularly wherein, The at least one electrically insulating layer structure (106) having at least one opening (108) is the outermost layer of the stack, preferably the upper outermost layer of the stack.

20. The component carrier (100) according to claim 19, wherein, On the main surface opposite to the at least one electrically insulating layer structure (106) including at least one of the openings (108), a bottom outermost layer of the stack is provided, the bottom outermost layer including at least one bottom opening (112), wherein at least one of the bottom openings (112) is different from at least one of the openings (108).

21. A method for manufacturing a component carrier (100), wherein, The method includes: A stack is formed, the stack comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); At least one opening (108) is formed, the opening connecting the main surface (101) of the at least one electrically insulating layer structure (106) to at least a portion of the at least one electrically conductive layer structure (104), the at least one opening (108) being defined by a lateral wall (109) comprising two parts, namely a first part (109a) and a second part (109b), the first part (109a) and the second part (109b) being arranged vertically relative to each other in the thickness direction of the at least one electrically insulating layer structure (106). The two portions (109a, 109b) extend differently from each other in the thickness direction of the at least one electrical insulating layer structure (106).

22. The method according to claim 21, wherein, At least one of the openings (108) is formed by following the steps below: A protective layer (120) is applied on top of the at least one electrically conductive layer structure (104); A portion of the protective layer (120) is removed, while another portion of the protective layer (120) remains on the at least one electrically conductive layer structure (104); At least one insulating layer (106L) is applied on top of the at least one electrically conductive layer structure (104) and the remaining portion of the protective layer (120); At least one blind hole is drilled in at least one insulating layer (106L) on top of the at least one electrically conductive layer structure (104) and the remaining portion of the protective layer (120), wherein a second portion (109b) of an opening (108) is formed, wherein the second portion (109b) extends from the main surface (101) of the at least one insulating layer (106L) to the remaining portion of the protective layer (120); The remaining portion of the protective layer (120) is removed via the second portion (109b), wherein a first portion (109a) of the opening (108) is formed, the first portion extending from the second portion (109b) to the at least one electrically conductive layer structure (104), wherein the first portion (109a) and the second portion (109b) constitute the sidewall (109) of the opening (108).

23. The method according to claim 22, wherein, The protective layer (120) is a dry film, specifically a photosensitive dry film or a dielectric film resist.

24. The method according to any one of claims 22 to 23, wherein, After the steps of exposing and developing the protective layer (120), a portion of the protective layer (120) is removed.

25. The method according to any one of claims 22 to 24, wherein, The drilling of the at least one blind hole is accomplished by laser drilling, and in particular, the drilling of the at least one blind hole is accomplished by excimer laser drilling.

26. The method according to any one of claims 22 to 25, wherein, The removal of the remaining portion of the protective layer (120) via the second part (109b) is accomplished by a chemical process step, preferably by peeling.

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