A process for embedding a chip in a circuit board and a circuit board

Abstract

The application discloses a process method for embedding a chip in a circuit board and the circuit board, and relates to the technical field of printed circuit board manufacturing processes. The method comprises the following steps: removing dry film in the embedding area of the chip on the target core plate through development, and performing copper reduction treatment on the exposed copper; performing alloy electroplating and sputtering copper on the embedding area, so that the embedding area is flush with the surface of the target core plate; performing pattern processing, brown oxidation pressing, and drilling on all the core plates, wherein the embedding area remains full copper and is not subjected to pattern processing; forming a ring-shaped empty slot through depth control fishing along the embedding area, wherein the ring-shaped empty slot breaks the copper layer of the sputtering copper; taking out the inner block of the ring-shaped empty slot, separating the bottom of the block at the alloy electroplating position, and forming a chip embedding slot; performing line transfer on the chip embedding slot and the opening plate surface, and then packaging the chip into the chip embedding slot. The application has the advantages of simple process, high space utilization, reduced chip signal transmission loss, and guaranteed transmission efficiency.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and in particular to a process method and a circuit board for embedding chips within a circuit board. Background Technology

[0002] Embedded technology can effectively solve problems such as signal transmission delay, heat dissipation, and package size limitations by directly embedding chips, passive components (such as resistors and capacitors) or antennas into the circuit board, thus meeting the requirements of high-density integration and high performance.

[0003] Current embedded circuit board manufacturing processes involve soldering the original chip onto a packaging substrate, and then soldering the packaging substrate onto the circuit board. This process is complex and occupies excessive three-dimensional space. Furthermore, in this packaging structure, the chip's signals first travel to the packaging substrate, then to the circuit board for switching, then back to the packaging substrate, and finally back to the chip. This long transmission path results in low signal transmission efficiency and high signal loss. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a process method and circuit board for embedding chips in a circuit board, thereby solving the technical problems of complex process, large space occupation, low chip signal transmission efficiency and high loss in the existing chip embedding methods.

[0005] To achieve the above objectives, the present invention is implemented using the following technical solution:

[0006] In a first aspect, the present invention provides a process method for embedding a chip within a circuit board, comprising:

[0007] The embedded area of ​​the chip on the target CCL core board is developed to remove the dry film, and the exposed copper is subjected to copper reduction treatment.

[0008] The embedded area is alloy electroplated and sputtered with copper to restore its height to be flush with the surface of the target CCL core board.

[0009] The target CCL core board and all other inner CCL core boards are patterned, browned and laminated, and drilled. The embedded area is kept in full copper and no patterning is performed.

[0010] A controlled-depth retrieval process is carried out along the perimeter of the buried area to form an annular retrieval groove, which breaks through the sputtered copper layer.

[0011] The inner block of the annular emptying groove is removed, and the bottom of the block is separated at the alloy electroplating point to form a chip embedding groove.

[0012] The circuitry is transferred to the chip embedding groove and its opening surface, and then the chip is embedded in the chip embedding groove for encapsulation. The gap between the chip and the chip embedding groove is filled with resin to complete the embedding process.

[0013] Optionally, the copper reduction process includes removing copper with a thickness of 1 to 5 μm.

[0014] Optionally, the alloy electroplating includes sequentially electroplating germanium, nickel, and cobalt into the embedded area, with a total thickness of less than 500 nm.

[0015] Optionally, the drilling includes: removing the excess adhesive from the laminated plate formed by browning and pressing before drilling, then drilling the inner layer positioning hole with X-ray, and then drilling the interconnection holes for connecting each CCL chip.

[0016] Optionally, the controlled-depth retrieval along the perimeter of the burial area to form an annular retrieval trough includes:

[0017] With precise depth control capabilities, it can directly control the depth to break through the sputtered copper layer;

[0018] Without precise depth control capabilities, the depth is controlled to 2-4µm above the sputtered copper layer, and then laser processing is used to break through the sputtered copper layer.

[0019] Optionally, the step of transferring circuitry to the chip embedding trench and its opening surface, and then embedding the chip into the chip embedding trench for packaging, includes:

[0020] Electroplating copper is performed on the chip embedding trench and the holes formed by drilling. A liquid photosensitive film is inserted into the chip embedding trench and cured.

[0021] A photosensitive dry film is applied to the entire board surface at the opening of the chip embedding trench, and then exposed and developed to obtain the circuit pattern.

[0022] The circuit pattern is electroplated with copper and tin, the liquid photosensitive film and photosensitive dry film are removed, the chip is developed and etched into the bottom copper of the embedded tank and the tin layer of the electroplated tin is removed.

[0023] Solder is applied to the pads in the chip embedding trench or ion-bonded, and the chip is then embedded in the chip embedding trench for packaging.

[0024] Optionally, the exposure and development process to reveal the circuit pattern includes:

[0025] First, the entire board surface at the opening of the chip embedding trench is exposed. Then, the insertion points of the chip embedding trench relative to the chip pins are laser-etched. Finally, development is performed.

[0026] Optionally, the step of transferring circuitry to the chip embedding trench and its opening surface, and then embedding the chip into the chip embedding trench for packaging, includes:

[0027] The drilled holes are electroplated with copper, and a liquid photosensitive film is inserted into the chip embedding tank and cured.

[0028] A photosensitive dry film is applied to the entire board surface at the opening of the chip embedding trench, and then exposed and developed to obtain the circuit pattern.

[0029] Remove the liquid photosensitive film and the photosensitive dry film, apply conductive paste to the pads in the chip embedding groove, insert the chip, and bake to cure and encapsulate.

[0030] Secondly, the present invention provides a circuit board with an embedded chip, which is manufactured using the process described above.

[0031] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0032] This invention provides a process and circuit board for embedding chips within a circuit board. This method overcomes the complex process of soldering the chip to a packaging substrate and then the packaging substrate to the circuit board, saving packaging costs and three-dimensional space. In traditional packaging structures, the chip's signal is first transmitted to the packaging substrate, then exchanged on the circuit board, then transmitted back to the packaging substrate, and finally back to the chip. This traditional structure results in long transmission paths and significant signal loss. However, in this technology, the chip's signal is directly transmitted back to the chip after interaction on the circuit board. This embedding method shortens signal transmission time and reduces transmission distance, thus minimizing transmission loss. Attached Figure Description

[0033] Figure 1 This is a schematic flowchart of a process method for embedding chips in a circuit board according to an embodiment of the present invention.

[0034] Figure 2 This is a schematic diagram of alloy electroplating and copper sputtering in the embedded area provided by an embodiment of the present invention;

[0035] Figure 3 This is a schematic diagram of a controlled-depth retrieval process along the perimeter of the buried area to form an annular retrieval trough, provided by an embodiment of the present invention.

[0036] Figure 4 This is a schematic diagram of forming a chip embedding trench according to an embodiment of the present invention;

[0037] Figure 5 This is a schematic diagram illustrating the arrangement of the liquid photosensitive film and the photosensitive dry film provided in an embodiment of the present invention;

[0038] Figure 6 This is a schematic diagram of laser engraving on the PIN differential insertion position provided in an embodiment of the present invention;

[0039] Figure 7 This is a schematic diagram of tin electroplating provided in an embodiment of the present invention;

[0040] Figure 8 This is a schematic diagram of the film removal process provided in an embodiment of the present invention;

[0041] Figure 9 This is a schematic diagram of desoldering provided in an embodiment of the present invention;

[0042] Figure 10 This is a schematic diagram of the chip packaging provided in an embodiment of the present invention;

[0043] Figure 11 This is a schematic diagram of multilayer lamination provided in an embodiment of the present invention. Detailed Implementation

[0044] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0045] Example 1

[0046] like Figure 1 As shown, this embodiment of the invention provides a process method for embedding a chip within a circuit board, including the following steps:

[0047] Step S1: Develop and remove the dry film from the embedded area of ​​the chip on the target CCL chip board, and perform copper reduction treatment on the exposed copper.

[0048] The specific process is as follows: the buried area is developed to remove the photosensitive dry film, other areas are protected by the photosensitive dry film, and the copper exposed by the development is reduced by 1 to 5 μm in thickness to leave space for the subsequent preparation of the alloy release layer.

[0049] The other inner layers are processed with normal patterns. The only difference is that the upper area of ​​the chip packaging area is designed differently during the design process. The lower area has normal wiring, and there are pads in the hole area of ​​the chip packaging.

[0050] Step S2: Perform alloy electroplating and copper sputtering on the embedded area to restore its height to be flush with the surface of the target CCL core board.

[0051] Specifically, in this embodiment, the alloy electroplating includes sequentially electroplating germanium, nickel, and cobalt into the embedded area, with a total thickness of less than 500 nm.

[0052] Germanium, nickel, and cobalt constitute the alloy release layer, such as Figure 2 As shown, the ordered Co layer is coherently bonded to the support, while the disordered Ge-Ni layer is weakly bonded to copper. Separation is achieved by utilizing the difference in lattice matching.

[0053] To ensure the smooth operation of the alloy release layer, its thickness is limited to less than 500nm, which results in gaps on the upper side of the alloy release layer. To ensure the normal progress of subsequent steps, copper sputtering is performed to make the embedded area flush with the surface of the target CCL core board.

[0054] Step S3: Perform pattern processing, browning and lamination, and drilling on the target CCL core board and all other inner CCL core boards. The embedded area remains pure copper and is not patterned.

[0055] Step S3 is a traditional process, in which drilling includes: removing the excess adhesive from the laminated plate formed by browning and pressing before drilling, then drilling the inner layer positioning holes with X-ray, and then drilling the interconnection holes connecting each CCL chip.

[0056] Step S4: Perform controlled-depth scooping along the perimeter of the buried area to form an annular scooping groove, which breaks through the sputtered copper layer.

[0057] Annular scooping channel Figure 3 As shown, there are two methods for its preparation:

[0058] With precise depth control capabilities, the depth electron needle probes the bottom, directly controlling the depth to break through the sputtered copper layer.

[0059] Without precise depth control capabilities, a depth electron probe is used to probe the bottom and control the depth to 2-4µm above the sputtered copper layer. Then, laser processing is used to break through the sputtered copper layer.

[0060] Those skilled in the art can flexibly choose from the above two methods for preparing the annular scooping groove, or other methods, as long as the final requirements can be met, according to actual needs.

[0061] Step S5: Remove the inner block of the annular emptying groove, and separate the bottom of the block at the alloy electroplating point to form a chip embedding groove.

[0062] Chip embedding trenches, such as Figure 4 The alloy peeling layer and the portion above it can be removed using a mechanical chuck.

[0063] Step S6: Transfer the circuitry to the chip embedding groove and its opening board surface, then embed the chip into the chip embedding groove for encapsulation, and fill the gap between the chip and the chip embedding groove with resin to complete the embedding process.

[0064] Step S6 can be divided into two technical routes: technical route one and technical route two.

[0065] Technical route one includes:

[0066] (1.1) Electroplating copper is performed on the chip embedding trench and the drilled holes. A liquid photosensitive film is inserted into the chip embedding trench and cured, such as... Figure 5As shown.

[0067] If the chip is buried at a sufficiently shallow depth, a dry photosensitive film can be used instead of a liquid photosensitive film, thus saving on processes and costs.

[0068] (1.2) Apply a photosensitive dry film to the entire board surface at the opening of the chip embedding trench, and expose and develop it to obtain the circuit pattern. Since the depth of the chip embedding trench affects the exposure, it can be designed as follows:

[0069] First, the entire board surface at the opening of the chip embedding trench is exposed. Then, the insertion points of the chip embedding trench relative to the chip pins are laser-etched. Finally, development is performed. Figure 6 As stated above.

[0070] (1.3) Electroplating copper and tin onto the circuit pattern, removing the liquid photosensitive film and photosensitive dry film, developing and etching the bottom copper of the chip embedded in the tank and removing the tin layer from the electroplated tin, such as Figures 7 to 9 As shown.

[0071] (1.4) Apply solder or ion-bond to the pads in the chip embedding trench, and then embed the chip in the chip embedding trench for packaging, such as... Figure 10 As shown.

[0072] Technical route two includes:

[0073] (2.1) Electroplat copper into the holes formed by drilling, and insert liquid photosensitive film into the chip embedding tank and cure it;

[0074] (2.2) Apply a photosensitive dry film to the entire board surface at the opening of the chip embedding groove, and expose and develop it to obtain the circuit pattern;

[0075] (2.3) Remove the liquid photosensitive film and the photosensitive dry film, apply conductive paste to the pads in the chip embedding groove, insert the chip and bake to cure and encapsulate.

[0076] Furthermore, the prepared laminate can be laminated with other layers, increasing the flexibility of the manufacturing process.

[0077] As a supplement to the above scheme, if the chip is buried in the buried via layer of HDI, then HDI processing is performed after the chip is buried. If the chip is buried in the outer layer of the HDI blind via, then step S6 is performed after the blind via is processed after lamination is completed.

[0078] Example 2

[0079] Based on the process method provided in Embodiment 1, this embodiment of the invention provides a circuit board with an embedded chip, which is manufactured using the process method described above.

[0080] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A process for embedding a chip within a circuit board, characterized in that, include: The embedded area of ​​the chip on the target CCL core board is developed to remove the dry film, and the exposed copper is subjected to copper reduction treatment. The embedded area is alloy electroplated and sputtered with copper to restore its height to be flush with the surface of the target CCL core board. The target CCL core board and all other inner CCL core boards are patterned, browned and laminated, and drilled. The embedded area is kept in full copper and no patterning is performed. A controlled-depth retrieval process is carried out along the perimeter of the buried area to form an annular retrieval groove, which breaks through the sputtered copper layer. The inner block of the annular emptying groove is removed, and the bottom of the block is separated at the alloy electroplating point to form a chip embedding groove. The circuitry is transferred to the chip embedding groove and its opening surface, and then the chip is embedded in the chip embedding groove for encapsulation. The gap between the chip and the chip embedding groove is filled with resin to complete the embedding process.

2. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The copper reduction process involves removing 1 to 5 μm of copper.

3. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The alloy electroplating includes sequential electroplating of germanium, nickel, and cobalt in the embedded area, with a total thickness of less than 500 nm.

4. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The drilling process includes: removing excess adhesive from the laminated plate formed by browning and pressing before drilling, then drilling inner layer positioning holes with X-ray, and then drilling interconnecting holes to connect each CCL chip.

5. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The process of controlling the depth of retrieval along the perimeter of the buried area to form an annular retrieval trough includes: With precise depth control capabilities, it can directly control the depth to break through the sputtered copper layer; Without precise depth control capabilities, the depth is controlled to 2-4µm above the sputtered copper layer, and then laser processing is used to break through the sputtered copper layer.

6. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The process of transferring circuitry to the chip embedding slot and its opening surface, and then embedding the chip into the chip embedding slot for packaging, includes: Electroplating copper is performed on the chip embedding trench and the holes formed by drilling. A liquid photosensitive film is inserted into the chip embedding trench and cured. A photosensitive dry film is applied to the entire board surface at the opening of the chip embedding trench, and then exposed and developed to obtain the circuit pattern. The circuit pattern is electroplated with copper and tin, the liquid photosensitive film and photosensitive dry film are removed, the chip is developed and etched into the bottom copper of the embedded tank and the tin layer of the electroplated tin is removed. Solder is applied to the pads in the chip embedding trench or ion-bonded, and the chip is then embedded in the chip embedding trench for packaging.

7. The process method for embedding a chip in a circuit board according to claim 6, characterized in that, The process of exposing and developing the circuit pattern includes: First, the entire board surface at the opening of the chip embedding trench is exposed. Then, the insertion points of the chip embedding trench relative to the chip pins are laser-etched. Finally, development is performed.

8. The process method for embedding a chip in a circuit board according to claim 1, characterized in that, The process of transferring circuitry to the chip embedding slot and its opening surface, and then embedding the chip into the chip embedding slot for packaging, includes: The drilled holes are electroplated with copper, and a liquid photosensitive film is inserted into the chip embedding tank and cured. A photosensitive dry film is applied to the entire board surface at the opening of the chip embedding trench, and then exposed and developed to obtain the circuit pattern. Remove the liquid photosensitive film and the photosensitive dry film, apply conductive paste to the pads in the chip embedding groove, insert the chip, and bake to cure and encapsulate.

9. A circuit board with an embedded chip, characterized in that, It is manufactured using the process described in any one of claims 1-8.

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