A dual avalanche region silicon-based fluorescence single-photon avalanche diode (SPAD) device and a method for implementing the same
Patent Information
- Application Number
- CN202610845230.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-11
- Publication Date
- 2026-10-13
AI Technical Summary
[0005]本发明目的在于针对上述现有SPAD器件在400-900 nm波段内存在的光子探测概率低、暗计数率高、填充因子低以及相邻器件串扰严重问题,提供了一种双雪崩区硅基荧光单光子雪崩二极管SPAD器件及其实现方法,通过构建由低压n阱/p型复合层形成的电场可调节次雪崩区以及由p型复合层/深n阱形成的主雪崩区,实现不同深度光生载流子的高效雪崩触发,从而提高器件对可见光至近红外荧光波段光子的整体探测能力;同时采用低掺杂p型外延层作为虚拟保护环,并结合STI和DTI隔离结构,有效降低边缘电场、抑制暗噪声和串扰,在减小器件尺寸的同时提高器件填充因子与阵列集成能力
1、本发明采用双雪崩区结构,其中主雪崩区由p型复合层和深n阱形成,位于距离器件表面较深的位置,能够提高500 nm至900 nm波段荧光及近红外光子的探测概率;次雪崩区由低压n阱和p型复合层形成,位于靠近器件表面的区域,能够提高400 nm至500 nm短波荧光光子的雪崩触发概率。因此,本发明能够提高400 nm至900 nm可见光至近红外荧光波段内的光子探测概率。
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Figure CN122909910A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a silicon-based fluorescent single-photon avalanche diode (SPAD) device with dual avalanche regions and its implementation method, belonging to the field of photoelectric detection technology. Background Technology
[0002] A single-photon avalanche diode (SPAD) is a high-sensitivity photodetector operating in Geiger mode, capable of single-photon level detection, and has wide applications in fluorescence lifetime imaging, biomedical detection, lidar, quantum communication, and low-light imaging.
[0003] Currently, silicon-based SPAD devices mainly employ shallow junction, medium junction, and deep junction structures. Shallow junction SPAD devices, due to the avalanche region being close to the device surface, exhibit high response to short-wavelength blue-violet light; however, they are susceptible to surface defects and interface states, resulting in a high dark count rate. Deep junction SPAD devices, with the avalanche region farther from the surface, have lower dark noise, but their detection efficiency for short-wavelength fluorescent photons is significantly reduced. While traditional medium junction structures offer a trade-off between response band and dark noise, they still struggle to simultaneously achieve high photon detection probability, high fill factor, and low dark noise performance in the 400-900 nm wavelength range.
[0004] On the other hand, traditional SPAD devices typically employ p-well guard rings or p+ guard ring structures to suppress edge breakdown. However, such structures significantly increase the device area, reduce the fill factor, and are difficult to effectively suppress crosstalk between adjacent pixels. Therefore, there is an urgent need to propose a novel SPAD device structure that can simultaneously improve the photon detection probability in the 400 nm to 900 nm visible to near-infrared fluorescence bands, reduce the dark count rate, decrease the device size, and reduce crosstalk. Summary of the Invention
[0005] The purpose of this invention is to address the problems of low photon detection probability, high dark count rate, low fill factor, and severe crosstalk between adjacent devices in existing SPAD devices in the 400-900 nm wavelength range. It provides a dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device and its implementation method. By constructing an electric field-tunable secondary avalanche region formed by a low-voltage n-well / p-type composite layer and a primary avalanche region formed by a p-type composite layer / deep n-well, efficient avalanche triggering of photogenerated carriers at different depths is achieved, thereby improving the overall detection capability of the device for photons in the visible to near-infrared fluorescence band. Simultaneously, a low-doped p-type epitaxial layer is used as a virtual guard ring, combined with STI and DTI isolation structures, effectively reducing the edge electric field, suppressing dark noise and crosstalk, and improving the device fill factor and array integration capability while reducing device size.
[0006] The technical solution adopted by this invention to solve its technical problem is: a dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device, comprising a semiconductor substrate, a p-type epitaxial layer, a p-type composite layer, a deep n-well, a low-voltage n-well, an n-well, an anode contact region, a first cathode contact region, a second cathode contact region, a shallow trench isolation structure, and a deep trench isolation structure. The SPAD device of this invention is based on a p-type substrate and a p-type epitaxial layer. An n-type buried layer is disposed in or below the p-type substrate, and a deep n-well is disposed above the n-type buried layer. A p-type composite layer and a low-voltage n-well are disposed in the p-type epitaxial layer. The p-type composite layer and the deep n-well form a main avalanche region located in a deeper region of the device, and the low-voltage n-well and the p-type composite layer form a secondary avalanche region near the device surface. The low-doped p-type epitaxial layers on both sides of the main avalanche region and the secondary avalanche region constitute a virtual protective ring, used to reduce the edge electric field of the avalanche region and suppress premature edge breakdown.
[0007] Furthermore, the main avalanche region of the present invention is located below the secondary avalanche region, and the depth of the main avalanche region from the device surface is greater than the depth of the secondary avalanche region from the device surface, so as to improve the detection probability of the device for fluorescent photons and near-infrared photons in the 500 nm to 900 nm band.
[0008] Furthermore, the present invention provides a dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device, characterized in that the secondary avalanche region is disposed close to the device surface, and its electric field strength can be adjusted by applying a bias voltage to the low-voltage n-well to improve the avalanche triggering probability of the device for fluorescent photons in the 400 nm to 500 nm wavelength band.
[0009] Furthermore, a neutral absorption region is formed between the primary avalanche region and the secondary avalanche region of the present invention. Photogenerated carriers generated in the neutral absorption region can drift towards the primary avalanche region and / or the secondary avalanche region under the action of a reverse electric field, and trigger avalanche multiplication in the primary avalanche region and / or the secondary avalanche region.
[0010] Furthermore, the virtual guard ring of the present invention is composed of a low-doped p-type epitaxial layer. The electric field intensity of the virtual guard ring region is lower than that of the main avalanche region and the secondary avalanche region, which is used to reduce the edge electric field of the device, reduce the defect-assisted tunneling effect, and reduce the dark count rate.
[0011] Furthermore, the p-type composite layer of the present invention has a p+ injection region on its surface as an anode contact region, the low-pressure n-well has an n+ injection region on its surface as a contact region of cathode 1, and the n-well has an n+ injection region on its surface as a contact region of cathode 2; a shallow trench is provided between the anode contact region and the cathode contact region to suppress the accumulation of electric field on the device surface.
[0012] Furthermore, the device of the present invention has a photosensitive window above the active region, and no metal silicide layer is formed in the area corresponding to the photosensitive window to reduce the blocking and absorption of incident fluorescent photons; when multiple SPAD devices are arranged in an array, a deep trench isolation structure is provided between adjacent SPAD devices to reduce electrical crosstalk and / or optical crosstalk between adjacent devices.
[0013] This invention also provides a method for fabricating a dual avalanche region silicon-based fluorescent SPAD device. The method, applied to a dual avalanche region silicon-based fluorescent SPAD device, includes the following steps: forming an n-type buried layer in a p-type substrate; forming a p-type epitaxial layer on the p-type substrate with the n-type buried layer; forming a deep n-well above the n-type buried layer, and forming a p-type composite layer and a low-voltage n-well in the p-type epitaxial layer, such that the p-type composite layer and the deep n-well form a primary avalanche region, and the low-voltage n-well and the p-type composite layer form a secondary avalanche region; retaining the low-doped p-type epitaxial layer located on both sides of the primary and secondary avalanche regions as a virtual protective ring; forming a p+ implantation region, an n+ implantation region, shallow trench isolation, and a photosensitive window on the device surface, and forming an anode, cathode 1, and cathode 2 through metal interconnects.
[0014] Furthermore, the p-type epitaxial layer of the present invention is disposed on a semiconductor substrate. The p-type composite layer is disposed within the p-type epitaxial layer. The deep n-well is disposed below the p-type composite layer and forms a main avalanche region with the p-type composite layer. The main avalanche region is located at a certain depth from the device surface and is used to improve the photon detection probability of mid-to-long-wavelength fluorescent photons.
[0015] Furthermore, the low-voltage n-well described in this invention is disposed in a region near the device surface and forms a secondary avalanche region with the p-type composite layer. The electric field strength of the secondary avalanche region can be adjusted by a bias voltage applied to the first cathode contact region to improve the avalanche triggering probability of short-wavelength fluorescent photons.
[0016] Furthermore, a neutral absorption region is formed between the primary avalanche region and the secondary avalanche region described in this invention. Photogenerated carriers generated by incident photons within this neutral absorption region can drift towards the primary or secondary avalanche region under the influence of a reverse electric field, triggering avalanche multiplication within the corresponding avalanche region.
[0017] Furthermore, the p-type composite layer of the present invention has a heavily doped p+ region on its surface, serving as the device anode. The low-voltage n-well has a heavily doped n+ region on its surface, serving as the first cathode. The n-well has a heavily doped n+ region on its surface, serving as the second cathode.
[0018] Furthermore, the present invention provides a shallow trench isolation structure between the anode contact area and the cathode contact area to isolate the anode and cathode and prevent the electric field from accumulating on the device surface.
[0019] Furthermore, the region within the second cathode of the device of the present invention does not have a metal silicide layer, so as to form or expand the incident light photosensitive window and reduce the blocking and absorption of incident light by the metal silicide.
[0020] Furthermore, the main avalanche region and the secondary avalanche region of the present invention are flanked by virtual guard rings formed by low-doped p-type epitaxial layers. The electric field intensity of the virtual guard ring region is lower than that of the main avalanche region and the secondary avalanche region, which is used to reduce the edge electric field of the device, suppress premature edge breakdown, and reduce the probability of dark carriers entering the avalanche multiplication region.
[0021] Furthermore, the present invention provides a deep trench isolation structure between adjacent SPAD devices to reduce electrical and optical crosstalk between adjacent devices and improve array integration density.
[0022] Beneficial effects: 1. This invention employs a dual avalanche region structure. The primary avalanche region, formed by a p-type composite layer and a deep n-well, is located relatively deep from the device surface, thereby improving the detection probability of fluorescence and near-infrared photons in the 500 nm to 900 nm wavelength range. The secondary avalanche region, formed by a low-pressure n-well and a p-type composite layer, is located near the device surface, thereby improving the avalanche triggering probability of short-wavelength fluorescence photons in the 400 nm to 500 nm range. Therefore, this invention can improve the photon detection probability in the visible to near-infrared fluorescence band from 400 nm to 900 nm.
[0023] 2. This invention places the main avalanche region at a relatively deep distance from the device surface, which reduces the impact of surface defects, interface states, and shallow trench isolation defects on the avalanche multiplication process. Simultaneously, this invention employs a lightly doped p-type epitaxial layer as a virtual guard ring. This virtual guard ring region has a weaker electric field, effectively reducing the electric field intensity at the edge of the avalanche region, suppressing premature edge breakdown and defect-assisted tunneling effects, and reducing the probability of dark carriers entering the avalanche multiplication region, thereby lowering the dark count rate.
[0024] 3. The present invention can set a deep trench isolation structure between adjacent SPAD devices. The deep trench isolation structure can suppress electrical coupling and optical crosstalk between adjacent devices, and is especially suitable for high-density fluorescent SPAD arrays. Attached Figure Description
[0025] Figure 1 This is a top view schematic diagram of the dual avalanche region structure single-photon avalanche diode proposed in this invention; Figure 2 A schematic diagram of the cross-section of the dual avalanche region structure single-photon avalanche diode proposed in this invention along the AA′ direction; Figure 3This is a flowchart illustrating the fabrication process of the dual avalanche region structure single-photon avalanche diode proposed in this invention. Figure 4 This is a schematic diagram illustrating the working principle of the dual avalanche region structure single-photon avalanche diode proposed in this invention. Figure 5 for Figure 2 Electric field distribution diagram obtained from two-dimensional electric field simulation of the structure; Figure 6 for Figure 2 Current-voltage characteristic curves in the main avalanche region; Figure 7 for Figure 2 Current-voltage characteristic curves in the intermediate avalanche zone; In all the accompanying drawings, the same reference numerals are used to denote the same elements or structures, wherein: 1-p-type substrate; 2-n-type buried layer; 3-deep n-well; 4-n-well; 5-p-type composite layer; 6-low-voltage n-well; 7-shallow trench isolation; 8-p+ implantation; 9-n+; 10-p-type epitaxial layer; 11-cathode 1; 12-cathode 2; 13-anode; 14-photosensitive window; 15-deep trench isolation; It should be noted that the repeated cathode 1 (11), cathode 2 (12), and anode (13) in the figure represent multiple contact ends in the same electrode network, wherein multiple cathode 1 (11) contact ends are electrically connected to each other, multiple cathode 2 (12) contact ends are electrically connected to each other, and multiple anode (13) contact ends are electrically connected to each other. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of protection of this invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.
[0027] Figure 1 This is a schematic diagram of the planar layout of the dual avalanche region silicon-based fluorescent SPAD device proposed in this invention. Figure 2 for Figure 1 A cross-sectional view along the AA′ direction. (See attached image.) Figure 1As shown, in one embodiment, the SPAD device employs a chamfered square or approximately octagonal planar structure to reduce the electric field concentration at the device's corners, lower the risk of premature edge breakdown, and thus improve the device's withstand voltage performance and operational stability. It should be understood that the planar structure is only a preferred embodiment and is not intended to limit the scope of protection of this invention; in other embodiments, the planar layout of the SPAD device can also be circular, elliptical, square, rectangular, polygonal, or other regular or irregular closed geometric structures, as long as they can achieve the relative layout relationship of the primary avalanche zone, secondary avalanche zone, virtual protective ring, and photosensitive window, all of which should fall within the scope of protection of this invention.
[0028] Figure 2 This is a cross-sectional view of a single device structure of the dual avalanche region silicon-based fluorescent SPAD device proposed in this invention. Figure 2 As shown, the SPAD device structure proposed in this invention includes a p-type substrate (1), an n-type buried layer (2), a deep n-well (3), an n-well (4), a p-type composite layer (5), a low-voltage n-well (6), a shallow trench isolation (7), a p+ implantation region (8), an n+ implantation region (9), a p-type epitaxial layer (10), a cathode 1 (11), a cathode 2 (12), an anode (13), and a photosensitive window (14).
[0029] Specifically, a p-type substrate (1) serves as the base substrate of the device, and an n-type buried layer (2) is disposed in or above the p-type substrate (1). The n-type buried layer (2) is used to improve the potential distribution inside the device and helps to improve the isolation capability between the active region of the device and the substrate. A deep n-well (3) is disposed above the n-type buried layer (2), and the deep n-well (3) is located in a deeper region of the device. A p-type composite layer (5) is disposed above or adjacent to the deep n-well (3), and a main avalanche region is formed between the p-type composite layer (5) and the deep n-well (3). The main avalanche region is located relatively deep from the device surface, preferably with its center position about 2.5 μm from the device surface. Since the absorption depth of fluorescence and near-infrared photons in the 500 nm to 900 nm wavelength band is greater than that of short-wavelength photons in silicon, the main avalanche region located at a relatively deep position can improve the detection probability of the device for mid-to-long-wavelength fluorescence photons and near-infrared photons.
[0030] A low-voltage n-well (6) is provided near the device surface. The low-voltage n-well (6) is located above or adjacent to the p-type composite layer (5), and a secondary avalanche region is formed between the low-voltage n-well (6) and the p-type composite layer (5). This secondary avalanche region is close to the device surface and is suitable for improving the avalanche triggering probability of short-wavelength fluorescent photons in the 400 nm to 500 nm band. By adjusting the bias voltage applied to the low-voltage n-well (6), the electric field strength of the secondary avalanche region can be adjusted, thereby improving the detection efficiency of short-wavelength fluorescent photons.
[0031] Therefore, the SPAD device proposed in this invention simultaneously forms two avalanche regions: one is the main avalanche region formed by the p-type composite layer (5) and the deep n-well (3), and the other is the secondary avalanche region formed by the low-pressure n-well (6) and the p-type composite layer (5). The main avalanche region is mainly used to improve the detection probability of photons in the 500 nm to 900 nm band, and the secondary avalanche region is mainly used to improve the avalanche triggering probability of photons in the 400 nm to 500 nm band. The region between the two avalanche regions can be used as a neutral absorption region. Photogenerated carriers generated in this region can drift to the main avalanche region or the secondary avalanche region under the action of the reverse electric field and trigger avalanche multiplication in the corresponding avalanche region.
[0032] In the structure proposed in this invention, the surface of the p-type composite layer (5) is provided with a p+ injection region (8), which serves as the anode contact region of the SPAD device and is electrically connected to the anode (13). The surface of the low-voltage n-well (6) is provided with an n+ injection region (9), which serves as the cathode contact region of the secondary avalanche region and is electrically connected to the cathode 1 (11). The surface of the n-well (4) is also provided with an n+ injection region (9), which serves as the cathode contact region for the primary avalanche region bias and is electrically connected to the cathode 2 (12). When the device is operating normally, the anode (13) is connected to the quenching resistor R. q Grounded, cathode 1 (11) and cathode 2 (12) are respectively subjected to different reverse bias voltages, so that the main avalanche region and the secondary avalanche region both operate in Geiger mode.
[0033] In a preferred embodiment, the anode (13) is quenched by the resistor R. q With the device grounded, a bias voltage of approximately 12 V is applied to cathode 1 (11), and a bias voltage of approximately 25 V is applied to cathode 2 (12). At this time, the secondary avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5), as well as the primary avalanche region formed by the p-type composite layer (5) and the deep n-well (3), are both in a high electric field state. When photogenerated carriers enter the above-mentioned high electric field region, they can undergo collisional ionization under the action of a strong electric field, thereby triggering avalanche multiplication. It should be noted that the above-mentioned bias voltage is only a preferred embodiment. In practical applications, it can be adjusted according to the device breakdown voltage, process conditions, avalanche region size, and application requirements.
[0034] Shallow trench isolation (7) is provided between the p+ injection region (8) and the n+ injection region (9). Shallow trench isolation (7) is used to isolate the anode contact region and the cathode contact region, prevent the formation of an excessively strong electric field between the anode and the cathode on the device surface, thereby suppressing the accumulation of electric field on the device surface, reducing the risk of premature surface breakdown, and reducing dark count noise caused by surface defects.
[0035] A p-type epitaxial layer (10) is provided on both sides of the main avalanche region and the secondary avalanche region. The p-type epitaxial layer (10) is a low-doped p-type epitaxial layer, which is located at the edge region of the avalanche multiplication region and forms a virtual guard ring. Unlike traditional SPAD devices that use an additional high-doped guard ring, this invention uses a low-doped p-type epitaxial layer (10) to form a low electric field region, so that a wider depletion region is formed at the edge of the avalanche region, thereby effectively suppressing the concentration of the electric field at the edge and preventing premature breakdown of the device edge. At the same time, the p-type epitaxial layer (10) as a virtual guard ring can reduce the probability of dark carriers generated near the shallow trench isolation (7) and the edge defect region entering the avalanche multiplication region, thereby reducing the device dark count rate.
[0036] Since the p-type epitaxial layer (10) acts as a virtual guard ring, it does not require a large additional area of highly doped guard ring, thus effectively reducing the size of a single SPAD device and improving the fill factor of the array device. This structure is particularly suitable for high-density fluorescent SPAD array detectors.
[0037] A photosensitive window (14) is provided above the active region of the device. The photosensitive window (14) is used to receive incident fluorescent photons. In a preferred embodiment, no metal silicide layer is formed in the region within the cathode 2 (12), thereby reducing the blocking and absorption of incident photons by the metal silicide, improving the efficiency of incident light entering the silicon material, and thus improving the photon detection probability of the device.
[0038] Figure 2 A cross-sectional structure of a single SPAD device unit is shown. In practical applications, multiple SPAD device units can be arranged in a one-dimensional or two-dimensional array to form a fluorescent single-photon detection array. When multiple SPAD device units form an array, a deep trench isolation (15) structure can be set between adjacent SPAD device units to reduce electrical and optical crosstalk between adjacent devices. By setting an isolation structure between adjacent devices, the isolation performance and detection stability of the array can be improved.
[0039] The device proposed in this invention is preferably fabricated using a 0.18 μm BCD process. The p-type substrate (1) is preferably a silicon substrate, and the p-type epitaxial layer (10) is preferably a silicon-based p-type epitaxial layer. It should be noted that, without affecting the basic working principle of the device, the substrate material of this invention is not limited to silicon (Si) semiconductors, and can also utilize various semiconductor materials such as germanium (Ge), gallium arsenide (GaAs), gallium nitride (GaN), and indium gallium arsenide (InGaAs) as substrates.
[0040] Figure 3 This is a flow chart illustrating the fabrication process of the dual avalanche region silicon-based fluorescent SPAD device proposed in this invention. It should be noted that... Figure 3This diagram illustrates the main process flow of the device fabrication method of the present invention. Each step can be appropriately adjusted, combined, or refined according to specific BCD process platforms, doping conditions, heat treatment conditions, and layout design requirements. It is not intended to limit the specific execution form of each process step in the fabrication method of the present invention. Figure 3 The fabrication process steps for the dual avalanche region silicon-based fluorescent SPAD device structure proposed in this invention may include: 1) An n-type buried layer (2) is formed by implantation in a p-type substrate (1) and annealing is performed to activate the n-type impurities and form a preset doping concentration distribution.
[0041] 2) A low-doped p-type epitaxial layer (10) is epitaxially grown on a p-type substrate (1) on which an n-type buried layer (2) is formed, and some impurities in the n-type buried layer (2) are diffused into the p-type epitaxial layer (10) by heat treatment.
[0042] 3) A deep n-well (3) is formed above the n-type buried layer (2), and an n-well (4) is formed on the side or above the deep n-well (3), the n-well (4) being used to draw out the potential of the deep n-well (3) or the associated n-type region.
[0043] 4) A p-type composite layer (5) is formed above or in the vicinity of the deep n-well (3), so that the main avalanche zone is formed between the p-type composite layer (5) and the deep n-well (3).
[0044] 5) A low-voltage n-well (6) is formed in the region near the device surface, so that an electric field adjustable sub-avalanche region is formed between the low-voltage n-well (6) and the p-type composite layer (5).
[0045] 6) A shallow trench isolation (7) is formed on the surface of the device. The shallow trench isolation (7) is disposed between the anode contact area and the cathode contact area formed subsequently, in order to isolate the anode contact area and the cathode contact area and suppress the accumulation of electric field on the surface of the device.
[0046] 7) A heavily doped p+ implantation region (8) is formed on the surface of the p-type composite layer (5) to serve as the contact region of the anode (13); and a heavily doped n+ implantation region (9) is formed on the surfaces of the low-voltage n-well (6) and n-well (4) to serve as the contact regions of cathode 1 (11) and cathode 2 (12) respectively.
[0047] 8) A metal-free silicide region is formed in the active region within the cathode 2 (12), thereby forming a photosensitive window (14) to reduce the blocking and absorption of incident fluorescent photons.
[0048] 9) Form contact holes, metal interconnects and passivation layers, connect the p+ injection region (8) to the anode (13), connect the n+ injection region (9) on the surface of the low-pressure n-well (6) to the cathode 1 (11), and connect the n+ injection region (9) on the surface of the n-well (4) to the cathode 2 (12), thus completing the fabrication of the dual avalanche region silicon-based fluorescent SPAD device.
[0049] Furthermore, when multiple SPAD devices form an array, deep trench isolation (15) can be formed between adjacent SPAD devices. The deep trench isolation (15) can be formed by etching the semiconductor region between adjacent devices and filling it with insulating dielectric material, which is used to reduce electrical crosstalk and optical crosstalk between adjacent SPAD devices and improve the array detection performance.
[0050] In the structure proposed in this invention, the p-type epitaxial layer (10) forms a virtual guard ring on both sides of the main avalanche region and the secondary avalanche region. Its electric field strength is lower than that of the main avalanche region and the secondary avalanche region. Since the virtual guard ring can form a low electric field region at the edge of the avalanche region, it can effectively suppress the concentration of the edge electric field and prevent the device from prematurely breaking down at the edge. Compared with traditional SPAD devices that use highly doped guard rings, this invention uses the p-type epitaxial layer (10) as a virtual guard ring, which does not require a large additional guard ring area, thereby reducing the device size and improving the array fill factor.
[0051] Figure 4 This is a schematic diagram illustrating the avalanche triggering and signal extraction principle of the dual-avalanche region silicon-based fluorescent SPAD device proposed in this invention. Figure 4 As shown, when the device is working normally, the anode (13) passes through the quenching resistor R q Grounded, cathodes 1 (11) and 2 (12) are respectively subjected to reverse bias voltages. Cathode 1 (11) is used to apply a bias voltage to the secondary avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5), and cathode 2 (12) is used to apply a bias voltage to the primary avalanche region formed by the p-type composite layer (5) and the deep n-well (3). In a preferred embodiment, cathode 1 (11) is subjected to a bias voltage of about 12 V, and cathode 2 (12) is subjected to a bias voltage of about 25 V. At this time, the secondary avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5), and the primary avalanche region formed by the p-type composite layer (5) and the deep n-well (3) are both in a high electric field state and operate in Geiger mode. It should be noted that the above bias voltage is only a preferred embodiment. In actual applications, it can be adjusted according to the device breakdown voltage, process conditions, avalanche region size, and application requirements.
[0052] When the energy of the incident fluorescent photon is greater than the bandgap of the silicon material, the incident photon is absorbed by the device and generates electron-hole pairs. For short-wavelength fluorescent photons in the 400 nm to 500 nm band, they are mainly absorbed in the shallow region near the device surface. The generated photogenerated carriers can enter the secondary avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5) and trigger avalanche multiplication under the action of a high electric field. For medium- and long-wavelength fluorescent photons in the 500 nm to 900 nm band, they have a larger absorption depth in silicon. The generated photogenerated carriers can enter the main avalanche region formed by the p-type composite layer (5) and the deep n-well (3) and trigger avalanche multiplication under the action of a high electric field. When the photogenerated carriers enter the avalanche region, they are accelerated under the action of a strong electric field and collide with the lattice to ionize, generating a large number of secondary electron-hole pairs, thereby forming an avalanche multiplication current. This instantaneously increased current can be detected by the peripheral readout circuit, thereby realizing single-photon detection.
[0053] To verify the feasibility and performance advantages of the dual avalanche region silicon-based fluorescent SPAD device proposed in this invention, this embodiment uses TCAD simulation tool to perform process simulation and device simulation of the SPAD device based on 0.18 μm BCD process conditions. During the simulation, the doping concentration distribution and junction depth of the p-type substrate (1), n-type buried layer (2), deep n-well (3), n-well (4), p-type composite layer (5), low-voltage n-well (6), shallow trench isolation (7), p+ implantation region (8), n+ implantation region (9), and p-type epitaxial layer (10) were set according to the actual process conditions, and the electric field distribution of the device under reverse bias conditions was analyzed.
[0054] Simulation results show that the strong electric field inside the device is mainly concentrated in the secondary avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5), and the main avalanche region formed by the p-type composite layer (5) and the deep n-well (3); the electric field intensity in the virtual guard ring region composed of the low-doped p-type epitaxial layer (10) is relatively low. This electric field distribution indicates that the structure proposed in this invention can enable effective avalanche multiplication to mainly occur in the main avalanche region and the secondary avalanche region, while suppressing the electric field concentration in the edge region of the device and reducing the risk of premature edge breakdown.
[0055] Furthermore, simulation results show that the p-type epitaxial layer (10) as a virtual protection ring can effectively isolate the active region of the device from the high-defect region near the shallow trench isolation (7), reduce the probability of dark carriers generated near the shallow trench isolation (7) drifting into the avalanche multiplication region under the action of the electric field, thereby reducing non-ideal avalanche events and lowering the dark count rate.
[0056] Furthermore, to further verify the operating characteristics of the primary and secondary avalanche regions in the dual-avalanche SPAD device proposed in this invention, simulation analysis was performed on the dark current and photocurrent of the device under different bias voltages. The simulation results are as follows: Figure 6 and Figure 7 As shown.
[0057] Figure 6 Simulated curves showing the changes in dark current and photocurrent of the device with bias voltage under the bias condition corresponding to the main avalanche region. Figure 6 It can be seen that when the bias voltage is low, the dark current of the device remains at a low level; as the bias voltage gradually increases, when the bias voltage approaches the avalanche breakdown voltage of the device, both the dark current and photocurrent show a significant increase, indicating that the main avalanche region formed by the p-type composite layer (5) and the deep n-well (3) has entered the avalanche multiplication state. This result shows that the main avalanche region can form a stable high electric field region under reverse bias and effectively avalanche amplify the photogenerated carriers generated in the deeper regions of the device, thereby improving the device's detection capability for fluorescent photons in the 500 nm to 900 nm wavelength band.
[0058] Figure 7 The simulation curves show the changes in dark current and photocurrent of the device with bias voltage under the bias condition corresponding to the sub-avalanche region. Figure 7 It can be seen that the dark current of the device is at a low level under a low bias voltage; when the bias voltage is increased to the avalanche triggering range of the sub-avalanche region, the photocurrent increases significantly, indicating that the sub-avalanche region formed by the low-voltage n-well (6) and the p-type composite layer (5) can generate avalanche multiplication under a low bias voltage. This result shows that the sub-avalanche region can effectively amplify the photogenerated carriers generated near the device surface, thereby improving the device's detection probability of short-wavelength fluorescent photons in the 400 nm to 500 nm band.
[0059] Combination Figure 5 , Figure 6 and Figure 7 As can be seen, in the dual-avalanche SPAD device proposed in this invention, the strong electric field is mainly concentrated in the primary avalanche region and the secondary avalanche region, while the electric field in the virtual guard ring region is relatively weak. Simultaneously, both the primary and secondary avalanche regions can achieve avalanche multiplication under corresponding bias conditions. The simulation results demonstrate that this invention, through the synergistic effect of the primary and secondary avalanche regions, can improve the avalanche triggering probability of photogenerated carriers at different absorption depths, and reduce the risk of edge breakdown and dark counting while increasing the fluorescence photon detection probability.
[0060] In summary, the dual avalanche region silicon-based fluorescent SPAD device proposed in this invention improves the detection probability of mid-to-long wavelength fluorescent photons through the main avalanche region formed by the p-type composite layer (5) and the deep n-well (3), and improves the avalanche triggering probability of short wavelength fluorescent photons through the secondary avalanche region formed by the low-pressure n-well (6) and the p-type composite layer (5). Furthermore, the p-type epitaxial layer (10) is used as a virtual guard ring to reduce the edge electric field and dark count rate of the device. At the same time, by combining the shallow trench isolation (7), the photosensitive window (14), and the isolation structure between adjacent devices, it can achieve a comprehensive performance of high photon detection probability, low dark count rate, small size, high fill factor, and low crosstalk, making it suitable for high-density fluorescent single-photon detection arrays.
[0061] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device, characterized in that, The device comprises a semiconductor substrate, a p-type epitaxial layer, a p-type composite layer, a deep n-well, a low-voltage n-well, an n-well, an anode contact region, a first cathode contact region, a second cathode contact region, a shallow trench isolation structure, and a deep trench isolation structure. The SPAD device is based on a p-type substrate and a p-type epitaxial layer. An n-type buried layer is provided in the p-type substrate or below the p-type epitaxial layer, and a deep n-well is provided above the n-type buried layer. A p-type composite layer and a low-voltage n-well are provided in the p-type epitaxial layer. The p-type composite layer and the deep n-well form a main avalanche region located in a deeper region of the device, and the low-voltage n-well and the p-type composite layer form a secondary avalanche region near the device surface. The low-doped p-type epitaxial layers on both sides of the main avalanche region and the secondary avalanche region constitute a virtual protective ring.
2. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, The main avalanche region is located below the secondary avalanche region, and the depth of the main avalanche region from the device surface is greater than the depth of the secondary avalanche region from the device surface, so as to improve the device's detection probability of fluorescent photons and near-infrared photons in the 500 nm to 900 nm band.
3. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, The secondary avalanche region is located close to the device surface, and its electric field strength can be adjusted by applying a bias voltage to the low-voltage n-well to improve the avalanche triggering probability of the device for fluorescent photons in the 400 nm to 500 nm band.
4. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, A neutral absorption region is formed between the main avalanche region and the secondary avalanche region. Photogenerated carriers generated in the neutral absorption region can drift towards the main avalanche region and / or the secondary avalanche region under the action of a reverse electric field, and trigger avalanche multiplication in the main avalanche region and / or the secondary avalanche region.
5. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, The virtual guard ring is composed of a lightly doped p-type epitaxial layer. The electric field intensity of the virtual guard ring region is lower than that of the main avalanche region and the secondary avalanche region, which is used to reduce the edge electric field of the device, reduce the defect-assisted tunneling effect, and reduce the dark count rate.
6. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, The surface of the p-type composite layer is provided with a p+ injection region as an anode contact region, the surface of the low-pressure n-well is provided with an n+ injection region as a contact region of cathode 1, and the surface of the n-well is provided with an n+ injection region as a contact region of cathode 2; a shallow trench is provided between the anode contact region and the cathode contact region to suppress the accumulation of electric field on the device surface.
7. The dual-avalanche region silicon-based fluorescent single-photon avalanche diode (SPAD) device according to claim 1, characterized in that, The device has a photosensitive window above the active region, and no metal silicide layer is formed in the area corresponding to the photosensitive window to reduce the blocking and absorption of incident fluorescent photons; when multiple SPAD devices are arranged in an array, a deep trench isolation structure is provided between adjacent SPAD devices to reduce electrical crosstalk and / or optical crosstalk between adjacent devices.
8. A method for fabricating a silicon-based fluorescent SPAD device with dual avalanche regions, characterized in that, The method is applied to the fabrication of the dual avalanche region silicon-based fluorescent SPAD device according to any one of claims 1 to 7, comprising the steps of: forming an n-type buried layer in a p-type substrate; forming a p-type epitaxial layer on the p-type substrate in which the n-type buried layer is formed; forming a deep n-well above the n-type buried layer, and forming a p-type composite layer and a low-voltage n-well in the p-type epitaxial layer, such that the p-type composite layer and the deep n-well form a primary avalanche region, and the low-voltage n-well and the p-type composite layer form a secondary avalanche region; retaining the low-doped p-type epitaxial layer located on both sides of the primary avalanche region and the secondary avalanche region as a virtual protective ring; forming a p+ implantation region, an n+ implantation region, a shallow trench isolation, and a photosensitive window on the device surface, and forming an anode, a cathode 1, and a cathode 2 through metal interconnects.