LED epitaxial structure and preparation method thereof

CN122909947APending Publication Date: 2026-10-13XIAMEN SILAN ADVANCED COMPOUND SEMICON CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202611081326.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-20
Publication Date
2026-10-13

AI Technical Summary

Technical Problem

若电流扩展层的晶体质量较差,会导致电流分布不均、局部电流密度过高以及结温上升,进而引起工作电压显著升高、发光效率及使用寿命大幅下降的问题

Benefits of technology

[0042]在本发明提供的LED外延结构中,第二型限制层与第二型电流扩展层之间插入有应变缓冲层,应变缓冲层包括一个或多个周期性结构,应变缓冲层的每个周期的结构包括从下至上依次堆叠的第一缓冲子层、第二缓冲子层、第三缓冲子层和第四缓冲子层,所述第一缓冲子层、第二缓冲子层、第三缓冲子层和第四缓冲子层均包含Al组分;所述第一缓冲子层和所述第二缓冲子层的接触面之间,所述第二缓冲子层的Al组分大于所述第一缓冲子层的Al组分;所述第三缓冲子层和所述第二缓冲子层的接触面之间,所述第三缓冲子层的Al组分大于所述第二缓冲子层的Al组分;所述第四缓冲子层和所述第三缓冲子层的接触面之间,所述第四缓冲子层的Al组分小于所述第三缓冲子层的Al组分。通过应变缓冲层的应变补偿和晶格平缓过渡,能够降低第二型限制层与第二型电流扩展层之间因晶格失配产生的应变,从而提高第二型限制层与第二型电流扩展层的晶体质量。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122909947A_ABST
    Figure CN122909947A_ABST
Patent Text Reader

Abstract

The application provides an LED epitaxial structure and a preparation method thereof. The LED epitaxial structure comprises a first type semiconductor layer, an active layer and a second type semiconductor layer which are sequentially stacked on a substrate from bottom to top. The second type semiconductor layer comprises a second type space layer, a second type confinement layer, a strain buffer layer, a second type current spreading layer and a second type ohmic contact layer which are sequentially stacked from bottom to top. The strain buffer layer comprises one or more periodic structures. Each periodic structure of the strain buffer layer comprises a first buffer sublayer, a second buffer sublayer, a third buffer sublayer and a fourth buffer sublayer which are sequentially stacked from bottom to top. Through strain compensation and lattice gradual transition of the strain buffer layer, the strain generated between the second type confinement layer and the second type current spreading layer due to lattice mismatch can be reduced, so that the crystal quality of the second type confinement layer and the second type current spreading layer is improved, the current spreading is promoted, the light emitting efficiency of the LED is improved, and the working voltage is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an LED epitaxial structure and its fabrication method. Background Technology

[0002] A light-emitting diode (LED) is a solid-state light-emitting device based on a semiconductor PN junction, capable of directly converting electrical energy into light energy. Due to its outstanding advantages such as low power consumption, long lifespan, small size, and environmental friendliness, LEDs have been widely used in many fields. The crystal quality of the LED epitaxial structure has a decisive influence on its performance. A high-quality epitaxial structure enables LED devices to have lower operating voltages and higher luminous efficiency. Currently, common AlGaInP-based red LEDs typically incorporate a GaP layer as a current spreading layer in their epitaxial structure to enhance the device's current spreading capability during operation. This current spreading effect is particularly significant for large-size LED devices. Poor crystal quality in the current spreading layer can lead to uneven current distribution, excessively high local current density, and increased junction temperature, resulting in a significant increase in operating voltage, a substantial decrease in luminous efficiency, and a drastic reduction in lifespan.

[0003] However, a significant lattice mismatch exists between the current-spreading layer (GaP) and the substrate. This mismatch introduces mismatch stress during epitaxial growth, inducing numerous crystal defects and severely impairing the overall performance of LED devices. Furthermore, when the lattice mismatch between the epitaxial layer and the substrate is large, if the surface free energy of the substrate is lower than the sum of the surface and interface energies of the epitaxial structure, and the bonding energy between the two is low, it is difficult to form a uniform wetting layer, easily leading to three-dimensional island growth. Subsequent epitaxy further forms columnar islands, resulting in a rough epitaxial surface. Simultaneously, if defects such as dislocations caused by lattice mismatch are not effectively suppressed, they will extend to the surface of the epitaxial structure during epitaxial growth, further reducing crystal quality and severely affecting LED performance.

[0004] Therefore, it is necessary to provide a new LED epitaxial structure to alleviate lattice mismatch stress and suppress defect generation, thereby improving the crystal quality and carrier radiative recombination efficiency of the epitaxial structure, and ultimately reducing the operating voltage and increasing the luminous efficiency of the LED device. Summary of the Invention

[0005] The purpose of this invention is to provide an LED epitaxial structure and its preparation method, so as to improve the crystal quality of the epitaxial structure, thereby improving the luminous efficiency of the LED device and reducing the operating voltage of the LED device.

[0006] To achieve the above objective, the present invention provides an LED epitaxial structure, comprising a first-type semiconductor layer, an active layer and a second-type semiconductor layer sequentially stacked on a substrate from bottom to top, wherein the second-type semiconductor layer comprises a second-type spatial layer, a second-type confinement layer, a strain buffer layer, a second-type current spreading layer and a second-type ohmic contact layer sequentially stacked from bottom to top, the strain buffer layer comprises one or more periodic structures, and the structure of each period of the strain buffer layer comprises a first buffer sublayer, a second buffer sublayer, a third buffer sublayer and a fourth buffer sublayer sequentially stacked from bottom to top, wherein each of the first buffer sublayer, the second buffer sublayer, the third buffer sublayer and the fourth buffer sublayer contains an Al component;

[0007] At the contact interface between the first buffer sublayer and the second buffer sublayer, the Al component of the second buffer sublayer is greater than the Al component of the first buffer sublayer; at the contact interface between the third buffer sublayer and the second buffer sublayer, the Al component of the third buffer sublayer is greater than the Al component of the second buffer sublayer; at the contact interface between the fourth buffer sublayer and the third buffer sublayer, the Al component of the fourth buffer sublayer is less than the Al component of the third buffer sublayer

[0008] Optionally, in the LED epitaxial structure, the number of periods of the strain buffer layer is 1 to 4.

[0009] Optionally, in the LED epitaxial structure, the Al component in the first buffer sublayer gradually increases along the growth direction of the first buffer sublayer.

[0010] Optionally, in the LED epitaxial structure, the first buffer sublayer is Al a InP 1-a layer, wherein 0.2≤a<0.45.

[0011] Optionally, in the LED epitaxial structure, the second buffer sublayer further contains a Ga component, and the Ga component in the second buffer sublayer is a fixed component.

[0012] Optionally, in the LED epitaxial structure, the second buffer sublayer further contains a Ga component, and the Ga component in the second buffer sublayer gradually increases along the growth direction of the second buffer sublayer.

[0013] Optionally, in the LED epitaxial structure, the second buffer sublayer is Al x Ga 1-x-y In y P layer, wherein x+y<1, a<x≤0.5, and 0<y<1-a.

[0014] Optionally, in the LED epitaxial structure, the Al composition in the third buffer sublayer gradually increases along the growth direction of the third buffer sublayer.

[0015] Optionally, in the LED epitaxial structure, the third buffer sublayer is Al. b InP 1-b Layer, where 0.5≤b≤0.9.

[0016] Optionally, in the LED epitaxial structure, the Al component in the fourth buffer sublayer gradually decreases along the growth direction of the fourth buffer sublayer.

[0017] Optionally, in the LED epitaxial structure, the fourth buffer sublayer is Al. c Ga 1-c P layers, where 0 ≤ c ≤ 0.5.

[0018] Optionally, in the LED epitaxial structure, the Al component in the first buffer sublayer, the Al component in the third buffer sublayer, and the Al component in the fourth buffer sublayer are all fixed components.

[0019] Optionally, in the LED epitaxial structure, the single-cycle thickness of the strain buffer layer is 12nm~160nm.

[0020] Optionally, in the LED epitaxial structure, the single-cycle thickness of the first buffer sublayer is 3nm~30nm, the single-cycle thickness of the second buffer sublayer is 3nm~40nm, the single-cycle thickness of the third buffer sublayer is 3nm~30nm, and the single-cycle thickness of the fourth buffer sublayer is 3nm~60nm.

[0021] Optionally, in the LED epitaxial structure, the first, second, third, and fourth buffer sublayers are all doped with Mg, and the Mg doping concentration is 5E17cm⁻¹. -3 ~5E19cm -3 .

[0022] Optionally, in the LED epitaxial structure, the second type confinement layer is an AlGaInP layer, and the second type current spreading layer is a GaP layer.

[0023] Optionally, in the LED epitaxial structure, the first type of semiconductor layer includes a first type of ohmic contact layer, a first type of window layer, a first type of confinement layer, and a first type of space layer stacked sequentially from bottom to top.

[0024] Optionally, in the LED epitaxial structure, the first type semiconductor layer is an N-type semiconductor layer, and the second type semiconductor layer is a P-type semiconductor layer.

[0025] Optionally, in the LED epitaxial structure, the LED epitaxial structure further includes a bottom buffer layer and an etching stop layer located between the substrate and the first type semiconductor layer and stacked sequentially from bottom to top.

[0026] Based on the same inventive concept, the present invention also provides a method for preparing an LED epitaxial structure, comprising:

[0027] Provide substrate;

[0028] A first type semiconductor layer, an active layer, and a second type semiconductor layer are sequentially grown on the substrate. The second type semiconductor layer includes a second type space layer, a second type confinement layer, a strain buffer layer, a second type current spreading layer, and a second type ohmic contact layer stacked sequentially from bottom to top. The strain buffer layer includes one or more periodic structures. Each period of the strain buffer layer includes a first buffer sublayer, a second buffer sublayer, a third buffer sublayer, and a fourth buffer sublayer stacked sequentially from bottom to top. The first buffer sublayer, the second buffer sublayer, the third buffer sublayer, and the fourth buffer sublayer all contain Al composition.

[0029] Between the contact surfaces of the first and second buffer sublayers, the Al content of the second buffer sublayer is greater than that of the first buffer sublayer; between the contact surfaces of the third and second buffer sublayers, the Al content of the third buffer sublayer is greater than that of the second buffer sublayer; between the contact surfaces of the fourth and third buffer sublayers, the Al content of the fourth buffer sublayer is less than that of the third buffer sublayer.

[0030] Optionally, in the method for preparing the LED epitaxial structure, the number of cycles of the strain buffer layer is 1 to 4.

[0031] Optionally, in the method for preparing the LED epitaxial structure, the Al content in the first buffer sublayer gradually increases along the growth direction of the first buffer sublayer.

[0032] Optionally, in the method for fabricating the LED epitaxial structure, the first buffer sublayer is Al. a InP 1-a Layer, where 0.2≤a<0.45.

[0033] Optionally, in the method for preparing the LED epitaxial structure, the second buffer sublayer further includes a Ga component, and the Ga component in the second buffer sublayer is a fixed component.

[0034] Optionally, in the preparation method of the LED epitaxial structure, the second buffer sub-layer further contains a Ga component, and the Ga component in the second buffer sub-layer gradually increases along the growth direction of the second buffer sub-layer.

[0035] Optionally, in the preparation method of the LED epitaxial structure, the second buffer sub-layer is Al x Ga 1-x-y In y P layer, where x+y<1, a<x≤0.5, and 0<y<1-a.

[0036] Optionally, in the preparation method of the LED epitaxial structure, the Al component in the third buffer sub-layer gradually increases along the growth direction of the third buffer sub-layer.

[0037] Optionally, in the preparation method of the LED epitaxial structure, the third buffer sub-layer is Al b InP 1-b layer, where 0.5≤b≤0.9.

[0038] Optionally, in the preparation method of the LED epitaxial structure, the Al component in the fourth buffer sub-layer gradually decreases along the growth direction of the fourth buffer sub-layer.

[0039] Optionally, in the preparation method of the LED epitaxial structure, the fourth buffer sub-layer is Al c Ga 1-c P layer, where 0≤c≤0.5.

[0040] Optionally, in the preparation method of the LED epitaxial structure, the Al component in the first buffer sub-layer, the Al component in the third buffer sub-layer, and the Al component in the fourth buffer sub-layer are all fixed components.

[0041] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0042] In the LED epitaxial structure provided by this invention, a strain buffer layer is inserted between the second-type confinement layer and the second-type current spreading layer. The strain buffer layer includes one or more periodic structures. Each periodic structure of the strain buffer layer includes a first buffer sublayer, a second buffer sublayer, a third buffer sublayer, and a fourth buffer sublayer stacked sequentially from bottom to top. The first, second, third, and fourth buffer sublayers all contain Al composition. Between the contact surfaces of the first and second buffer sublayers, the Al composition of the second buffer sublayer is greater than that of the first buffer sublayer. Between the contact surfaces of the third and second buffer sublayers, the Al composition of the third buffer sublayer is greater than that of the second buffer sublayer. Between the contact surfaces of the fourth and third buffer sublayers, the Al composition of the fourth buffer sublayer is less than that of the third buffer sublayer. Through strain compensation and smooth lattice transition of the strain buffer layer, the strain caused by lattice mismatch between the second-type confinement layer and the second-type current spreading layer can be reduced, thereby improving the crystal quality of the second-type confinement layer and the second-type current spreading layer.

[0043] Furthermore, by setting the first, second, third, and fourth buffer sublayers, abrupt changes in band structure or lattice constants can be avoided, thus achieving a balance between band structure and lattice parameters. Further, the band gap of the strain buffer layer can be made similar to that of the type II confinement layer and the type II current spreading layer. Therefore, there are no large abrupt potential barriers between the strain buffer layer and the type II confinement layer and the type II current spreading layer, allowing for better carrier migration, thereby promoting current spreading, improving LED luminous efficiency, and reducing operating voltage. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of the LED epitaxial structure provided in an embodiment of the present invention.

[0045] Figure 2 This is a schematic diagram of the strain buffer layer provided in an embodiment of the present invention.

[0046] Figure 3 This is a schematic diagram of the energy band structure of the LED epitaxial structure provided in this embodiment of the invention when the strain buffer layer has a fixed composition.

[0047] Figure 4 This is a schematic diagram of the energy band structure of the LED epitaxial structure provided in this embodiment of the invention when the strain buffer layer is a graded composition.

[0048] Figure 5 This is a schematic flowchart of the method for preparing an LED epitaxial structure provided in an embodiment of the present invention.

[0049] Figures 1 to 4 middle:

[0050] 100 - Substrate; 101 - Bottom buffer layer; 102 - Etching stop layer; 110 - Type I semiconductor layer; 111 - Type I ohmic contact layer; 112 - Type I window layer; 113 - Type I confinement layer; 114 - Type I space layer; 120 - Active layer; 130 - Type II semiconductor layer; 131 - Type II space layer; 132 - Type II confinement layer; 133 - Strain buffer layer; 1331 - First buffer sublayer; 1332 - Second buffer sublayer; 1333 - Third buffer sublayer; 1334 - Fourth buffer sublayer; 134 - Type II current spreading layer; 135 - Type II ohmic contact layer. Detailed Implementation

[0051] The LED epitaxial structure and its fabrication method proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, only for the purpose of conveniently and clearly illustrating the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different proportions may be used in different drawings to illustrate different aspects.

[0052] Figure 1 This is a schematic diagram of an LED epitaxial structure according to an embodiment of the present invention. Figure 2 This is a schematic diagram of the structure of a strain buffer layer according to an embodiment of the present invention. (Reference) Figure 1 and Figure 2 This invention provides an LED epitaxial structure, comprising a first type semiconductor layer 110, an active layer 120, and a second type semiconductor layer 130 stacked sequentially on a substrate 100 from bottom to top. The second type semiconductor layer 130 includes a second type space layer 131, a second type confinement layer 132, a strain buffer layer 133, a second type current spreading layer 134, and a second type ohmic contact layer 135 stacked sequentially from bottom to top. The strain buffer layer 133 includes one or more periodic structures. Each period of the strain buffer layer 133 includes a first buffer sublayer 1331, a second buffer sublayer 1332, a third buffer sublayer 1333, and a fourth buffer sublayer 1334 stacked sequentially from bottom to top. The first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 all contain Al components.

[0053] Between the contact surfaces of the first buffer sublayer 1331 and the second buffer sublayer 1332, the Al composition of the second buffer sublayer 1332 is greater than that of the first buffer sublayer 1331; between the contact surfaces of the third buffer sublayer 1333 and the second buffer sublayer 1332, the Al composition of the third buffer sublayer 1333 is greater than that of the second buffer sublayer 1332; between the contact surfaces of the fourth buffer sublayer 1334 and the third buffer sublayer 1333, the Al composition of the fourth buffer sublayer 1334 is less than that of the third buffer sublayer 1333.

[0054] In this embodiment, since a strain buffer layer 133 is inserted between the second type confinement layer 132 and the second type current extension layer 134, the strain compensation and smooth lattice transition of the strain buffer layer 133 can reduce the strain caused by lattice mismatch between the second type confinement layer 132 and the second type current extension layer 134, thereby improving the crystal quality of the second type confinement layer 132 and the second type current extension layer 134. Furthermore, by setting the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334, abrupt changes in band structure or lattice constants can be avoided, resulting in a balance between band structure and lattice parameters.

[0055] Furthermore, the band gap of the strain buffer layer 133 can be made similar to that of the second type confinement layer 132 and the second type current spreading layer 134. Therefore, there is no large abrupt potential barrier between the strain buffer layer 133 and the second type confinement layer 132 and the second type current spreading layer 134, which allows the charge carriers to migrate better, thereby promoting current spreading, improving the luminous efficiency of the LED and reducing the operating voltage.

[0056] Optionally, the substrate 100 can be a GaAs substrate. A bottom buffer layer 101 and an etching stop layer 102, stacked sequentially from bottom to top, are disposed between the substrate 100 and the first type semiconductor layer 110. By providing the bottom buffer layer 101, the influence of surface defects of the substrate 100 on the LED epitaxial structure can be eliminated, thereby reducing defects and dislocations in the LED epitaxial structure and providing a smooth interface for subsequently grown film layers. The bottom buffer layer 101 can be a GaAs layer, and it is doped with a first type dopant, which can be an N-type dopant, such as silicon (Si) or tellurium (Te).

[0057] In this embodiment, the etching stop layer 102 is a GaInP layer, and the etching stop layer 102 is doped with an N-type dopant, such as Si or Te.

[0058] like Figure 1As shown, the first type of semiconductor layer 110 is located on the etching stop layer 102. Specifically, as... Figure 1 As shown, the first type semiconductor layer 110 includes a first type ohmic contact layer 111, a first type window layer 112, a first type confinement layer 113 and a first type space layer 114 stacked sequentially from bottom to top, that is, the first type ohmic contact layer 111 is located between the etch stop layer 102 and the first type window layer 112.

[0059] For example, if the first type of semiconductor layer is an N-type semiconductor layer, then the N-type semiconductor layer includes an N-type ohmic contact layer, an N-type window layer, an N-type confinement layer, and a first type space layer stacked sequentially from bottom to top.

[0060] In this embodiment, the first type ohmic contact layer 111 can be an AlGaInP layer or a GaAs layer, preferably a GaAs layer. The first type ohmic contact layer 111 is doped with a first type dopant, which can be an N-type dopant, such as Si or Te. The thickness of the first type ohmic contact layer 111 can be 40 nm to 150 nm, preferably 90 nm.

[0061] like Figure 1 As shown, the first type window layer 112 is located on the first type ohmic contact layer 111 to facilitate the expansion of the first type current, light emission, and surface roughening. The first type window layer 112 can be an AlGaInP layer, and it is doped with a first type dopant, such as Si or Te. The thickness of the first type window layer 112 can be 1 μm to 5 μm, preferably 3 μm.

[0062] like Figure 1 As shown, the first type confinement layer 113 is located on the first type window layer 112. The first type confinement layer 113 can be an AlInP layer, and the first type confinement layer 113 is doped with a first type dopant, such as Si or Te. The thickness of the first type confinement layer 113 can be 100nm~500nm, preferably 300nm.

[0063] Continue to refer to, for example Figure 1 The first type space layer 114 is located on the first type confinement layer 113, and the first type space layer 114 is an undoped AlGaInP layer.

[0064] like Figure 1As shown, the active layer 120 is located on the first type semiconductor layer 110. Specifically, the active layer 120 is preferably a multi-quantum-well structure, that is, the active layer 120 is preferably a periodic structure composed of alternating stacked quantum well layers and quantum barrier layers, and the number of periods of the active layer 120 is preferably 6 to 18. In the active layer 120, a GaInP layer is used as the quantum well layer, and an AlGaInP layer is used as the barrier layer.

[0065] In this embodiment, the thickness of the active layer 120 can be 90nm~500nm, preferably 150nm.

[0066] like Figure 1 As shown, the second type semiconductor layer 130 is located on the active layer 120. The polarity of the second type semiconductor layer 130 is opposite to that of the first type semiconductor layer 110. For example, if the first type semiconductor layer 110 is an N-type semiconductor layer, then the corresponding second type semiconductor layer 130 is a P-type semiconductor layer. Accordingly, the P-type semiconductor layer includes, from bottom to top, a P-type space layer, a P-type confinement layer, a P-type strain buffer layer, a P-type window layer, and a P-type ohmic contact layer.

[0067] Specifically, such as Figure 1 As shown, the second type space layer 131 is located on the active layer 120, and the second type space layer 131 is an undoped AlGaInP layer.

[0068] The second type confinement layer 132 is located on the second type space layer 131. The second type confinement layer 132 can provide holes, and the second type confinement layer 132 is an AlGaInP layer. For example, the material of the second type confinement layer 132 can be Al. m Ga 1-m-n In n P, where 0.6≤m+n≤1, 0.45≤n≤0.55, preferably m=0.5, n=0.5.

[0069] In this embodiment, the second type confinement layer 132 is doped with a second type dopant, which can be a p-type dopant, such as magnesium (Mg) or zinc (Zn). The thickness of the second type confinement layer 132 can be 150 nm to 500 nm, preferably 300 nm.

[0070] like Figure 1 As shown, the strain buffer layer 133 is located on the second type confinement layer 132. The number of periods of the strain buffer layer 133 can be 1 to 4, that is, the strain buffer layer can be a single-period structure or a multi-period structure. When the strain buffer layer 133 is a multi-period structure, its number of periods is 2 to 4, and the structures of each period are stacked sequentially. The thickness of a single period of the strain buffer layer can be 12 nm to 160 nm.

[0071] Specifically, such as Figure 2 As shown, the structure of each cycle of the strain buffer layer 133 includes a first buffer sublayer 1331, a second buffer sublayer 1332, a third buffer sublayer 1333, and a fourth buffer sublayer 1334 stacked sequentially from bottom to top. Between the contact surfaces of the first buffer sublayer 1331 and the second buffer sublayer 1332, the Al composition of the second buffer sublayer 1332 is greater than that of the first buffer sublayer 1331; between the contact surfaces of the third buffer sublayer 1333 and the second buffer sublayer 1332, the Al composition of the third buffer sublayer 1333 is greater than that of the second buffer sublayer 1332; between the contact surfaces of the fourth buffer sublayer 1334 and the third buffer sublayer 1333, the Al composition of the fourth buffer sublayer 1334 is less than that of the third buffer sublayer 1333. Therefore, the lattice constants among the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 can transition smoothly, thereby reducing the net strain caused by the lattice mismatch between the second-type confinement layer 132 and the second-type current spreading layer 134, and improving the crystal quality of the second-type confinement layer and the second-type current spreading layer 134. Furthermore, the band gap of the strain buffer layer 133 is similar to that of the second-type confinement layer 132 and the second-type current spreading layer 134, without a large abrupt potential barrier, allowing for better carrier migration, promoting current spreading, and thus improving the luminous efficiency of the LED and reducing the operating voltage.

[0072] In some embodiments, the strain buffer layer 133 has a fixed component. Specifically, the Al component in the first buffer sublayer 1331 is a fixed component; the second buffer layer 1332 contains a Ga component, and the Ga component in the second buffer layer 1332 is a fixed component; the Al component in the third buffer layer 1333 is a fixed component; and the Al component in the fourth buffer layer 1334 is a fixed component.

[0073] Figure 3 This is a schematic diagram of the energy band structure when the strain buffer layer in the LED epitaxial structure provided in this embodiment of the invention has a fixed composition. Figure 3 As shown, the band gap of the strain buffer layer 133 is similar to that of the second type confinement layer and the second type current spreading layer. Therefore, there is no large abrupt potential barrier between the strain buffer layer and the second type confinement layer and the second type current spreading layer, which enables carriers to migrate better, thereby promoting current spreading, improving the luminous efficiency of the LED and reducing the operating voltage.

[0074] In some embodiments, the strain buffer layer has a gradient composition. Specifically, the Al composition in the first buffer sub-layer 1331 gradually increases along the growth direction of the first buffer sub-layer 1331; the second buffer sub-layer 1332 contains a Ga composition, and the Ga composition in the second buffer sub-layer 1332 gradually increases along the growth direction of the second buffer sub-layer 1332; the Al composition in the third buffer sub-layer 1333 gradually increases along the growth direction of the third buffer sub-layer 1333; and the Al composition in the fourth buffer sub-layer 1334 gradually decreases along the growth direction of the fourth buffer sub-layer 1334. This configuration allows for a smaller lattice size, a larger band gap, and further makes the band gap of the strain buffer layer 133 similar to that of the type II confinement layer and the type II current spreading layer.

[0075] Figure 4 This is a schematic diagram of the energy band structure when the strain buffer layer in the LED epitaxial structure provided in this embodiment of the invention has a graded composition. Figure 4 As shown, the band gap of the strain buffer layer 133 is similar to that of the second type confinement layer 132 and the second type current spread layer 134. Therefore, there is no large abrupt potential barrier between the strain buffer layer 133 and the second type confinement layer 132 and the second type current spread layer 134.

[0076] In this embodiment, the first buffer sublayer is Al. a InP 1-a Layer, the second buffer sublayer is Al x Ga 1-x-y In y P layer, the third buffer sublayer is Al b InP 1-b Layer, the fourth buffer sublayer is A1 c Ga 1-c Layer P, where 0.2 ≤ a < 0.45, x + y < 1, a <x≤0.5,0<y<1-a,0.5≤b≤0.9,0≤c≤0.5。

[0077] In this embodiment, the second-type current spreading layer 134 is a GaP layer with a lattice constant of 5.45; the second-type confinement layer 132 is an AlGaInP layer with a lattice constant of approximately 5.67. This means there is a lattice constant mismatch between the second-type current spreading layer 134 and the second-type confinement layer 132, with a mismatch degree of approximately 3.58%, which is considered a large mismatch. Therefore, if there is no strain buffer layer 133 between the second-type confinement layer 132 and the second-type current spreading layer 134, a large lattice mismatch will exist between them, resulting in significant mismatch stress. This will lead to poor crystal quality in the second-type current spreading layer 134. Furthermore, the stress generated by the mismatch will stretch and tear the epitaxial structure, increasing defects in the epitaxial structure and deteriorating crystal quality, ultimately leading to a decrease in LED device performance, such as reduced high-temperature aging stability. The main reason for the deterioration of high-temperature aging stability of LED devices is the poor crystal quality, which increases epitaxial defects and non-radiative recombination centers, thus increasing the probability of non-radiative recombination. Non-radiative recombination does not produce photons but generates heat. The increase in heat in LED devices leads to an increase in junction temperature, causing the LED devices to operate above their rated temperature and accelerating their aging and light decay. Therefore, the high-temperature aging stability of LED devices is relatively poor.

[0078] In this embodiment, since a strain buffer layer 133 is inserted between the second type confinement layer 132 and the second type current spreading layer 134, the stress generated by the internal interlayer lattice mismatch of the strain buffer layer 133 and the stress generated by the lattice mismatch of the second type current spreading layer 134 can form a strain compensation effect.

[0079] Specifically, since the first buffer sublayer 1331 is Al a In 1-a The first buffer sublayer 1331 of the P layer has a lattice constant of 5.71 to 5.79. The stress caused by its lattice mismatch can form a strain compensation effect with the stress caused by the lattice mismatch of the second type current spreading layer 134. The lattice constant is smoothly transitioned by the second buffer sublayer 1332, the third buffer sublayer 1333 and the fourth buffer sublayer 1334 stacked sequentially on the first buffer sublayer 1331, thereby reducing the net strain caused by the lattice mismatch between the second type confinement layer 132 and the second type current spreading layer 134 and improving the crystal quality of the second type confinement layer 132 and the second type current spreading layer 134.

[0080] More specifically, since the first buffer sublayer 1331 is located on the second type confinement layer 132, and the lattice constant of the first buffer sublayer 1331 is greater than the lattice constant of the second type confinement layer 132, the first buffer sublayer 1331 will be subjected to compressive stress.

[0081] The second buffer sublayer 1332 is located on the first buffer sublayer 1331, and the lattice constant of the second buffer sublayer 1332 is smaller than that of the first buffer sublayer 1331. Therefore, the second buffer sublayer 1332 will be subjected to tensile stress.

[0082] The third buffer sublayer 1333 is located on the second buffer sublayer 1332, and the lattice constant of the third buffer sublayer 1333 is greater than that of the second buffer sublayer 1332. Therefore, the third buffer sublayer 1333 will be subjected to compressive stress.

[0083] The fourth buffer sublayer 1334 is located on the third buffer sublayer 1333, and the lattice constant of the fourth buffer sublayer 1334 is smaller than the lattice constant of the third buffer sublayer 1333.

[0084] Furthermore, the second type current extension layer 134 is located on the strain buffer layer 133, that is, the second type current extension layer 134 is located on the fourth buffer sublayer 1334. The second type current extension layer 134 is a GaP layer, so the lattice constant of the second type current extension layer 134 is smaller than that of the fourth buffer sublayer 1334. In other words, the lattice constants of the fourth buffer sublayer 1334 and the second type current extension layer 134 decrease sequentially, thus generating accumulated tensile stress. During this process, the compressive stress generated by the first buffer sublayer 1331 and the compressive stress generated by the third buffer sublayer 1333 can effectively offset the accumulated tensile stress generated by the second buffer sublayer 1332, the fourth buffer sublayer 1334, and the second type current extension layer 134, thereby achieving stress compensation, reducing the net strain caused by lattice mismatch between the second type confinement layer 132 and the second type current extension layer 134, and improving the crystal quality of the second type confinement layer 132 and the second type current extension layer 134.

[0085] Furthermore, the band gap of the strain buffer layer 133 is similar to that of the second type confinement layer 132 and the second type current spreading layer 134, with no large abrupt potential barrier, which allows charge carriers to migrate better, promotes current spreading, and thus improves the luminous efficiency of the LED and reduces the operating voltage.

[0086] In this embodiment, in a periodic structure of the strain buffer layer 133, the single-period thickness of the first buffer sub-layer can be 3nm~30nm, the single-period thickness of the second buffer sub-layer 1332 can be 3nm~40nm, the single-period thickness of the third buffer sub-layer can be 3nm~30nm, and the single-period thickness of the fourth buffer sub-layer 1334 can be 3nm~60nm.

[0087] Furthermore, the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 are all doped with Mg, and the Mg doping concentration is 5E17cm³. -3~5E19cm -3 .

[0088] Figure 5 This is a schematic flowchart of the method for fabricating an LED epitaxial structure provided in an embodiment of the present invention. Figure 5 As shown in the figure, this embodiment provides a method for fabricating an LED epitaxial structure, which includes the following steps:

[0089] Step S1: Provide substrate 100;

[0090] Step S2: A first type semiconductor layer 110, an active layer 120, and a second type semiconductor layer 130 are sequentially grown on the substrate 100. The second type semiconductor layer 130 includes a second type space layer 131, a second type confinement layer 132, a strain buffer layer 133, a second type current spreading layer 134, and a second type ohmic contact layer 135 stacked sequentially from bottom to top. The strain buffer layer 133 includes one or more periodic structures. Each period of the strain buffer layer 133 includes a first buffer sublayer 1331, a second buffer sublayer 1332, a third buffer sublayer 1333, and a fourth buffer sublayer 1334 stacked sequentially from bottom to top. The first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 all contain Al components.

[0091] Between the contact surfaces of the first buffer sublayer 1331 and the second buffer sublayer 1332, the Al composition of the second buffer sublayer 1332 is greater than that of the first buffer sublayer 1331; between the contact surfaces of the third buffer sublayer 1333 and the second buffer sublayer 1332, the Al composition of the third buffer sublayer 1333 is greater than that of the second buffer sublayer 1332; between the contact surfaces of the fourth buffer sublayer 1334 and the third buffer sublayer 1333, the Al composition of the fourth buffer sublayer 1334 is less than that of the third buffer sublayer 1333.

[0092] In this embodiment, the strain compensation and smooth lattice transition of the strain buffer layer 133 can reduce the strain caused by lattice mismatch between the second type confinement layer 132 and the second type current spreading layer 134, thereby improving the crystal quality of the second type confinement layer 132 and the second type current spreading layer 134.

[0093] Specifically, such as Figure 1 As shown, in step S1, a substrate 100 is provided, which may be a GaAs substrate.

[0094] Then, as Figure 1As shown, a bottom buffer layer 101 is grown on the substrate 100. The bottom buffer layer 101 can eliminate the influence of defects on the surface of the substrate 100 on the LED epitaxial structure, reduce the occurrence of defects and dislocations in the LED epitaxial structure, and provide a smooth interface for the next layer of film growth. The bottom buffer layer 101 is preferably made of GaAs. The bottom buffer layer 101 is doped with a type I dopant, which can be an N-type dopant, such as silicon (Si) or tellurium (Te). Further, the type I dopant is preferably Si.

[0095] The bottom buffer layer 101 is preferably grown using MOCVD (metal-organic chemical vapor deposition) technology, i.e., the bottom buffer layer 101 is grown in the reaction chamber of an MOCVD growth furnace. The thickness of the bottom buffer layer 101 can be 100 nm to 400 nm, preferably 200 nm.

[0096] like Figure 1 As shown, after growing the bottom buffer layer 101, an etching stop layer 102 is grown on the bottom buffer layer 101. The material of the etching stop layer is preferably GaInP. The etching stop layer 102 is doped with a type I dopant, such as Si or Te. Further, the type I dopant is preferably Si. The etching stop layer 102 is preferably grown using MOCVD (metal-organic chemical vapor deposition) technology. The thickness of the etching stop layer 102 can be 150 nm to 300 nm, preferably 200 nm.

[0097] like Figure 1 As shown, in step S2, a first type semiconductor layer 110 and an active layer 120 are sequentially grown on the substrate 100. The first type semiconductor layer 110 includes a first type ohmic contact layer 111, a first type window layer 112, a first type confinement layer 113, and a first type space layer 114 stacked sequentially from bottom to top. Both the active layer 120 and the first type space layer 114 are unintentionally doped layers.

[0098] Specifically, the method for sequentially growing a first type semiconductor layer 110 on the substrate 100 includes: firstly, growing a first type ohmic contact layer 111 on the etching stop layer 102. The first type ohmic contact layer 111 can be made of AlGaInP or GaAs, preferably GaAs. The first type ohmic contact layer 111 is doped with a first type dopant, such as Si or Te. Further, the first type dopant is preferably Si. The first type ohmic contact layer 111 is preferably grown using an MOCVD process, and the thickness of the first type ohmic contact layer 111 is 40 nm to 150 nm, preferably 90 nm.

[0099] like Figure 1 As shown, after growing the first type ohmic contact layer 111, a first type window layer 112 is grown on the first type ohmic contact layer 111. The first type window layer 112 is used for first type current spreading, light emission, and surface roughening. The material of the first type window layer 112 is preferably AlGaInP, and the first type window layer 112 is doped with a first type dopant, such as Si or Te. Further, the first type dopant is preferably Si. The first type ohmic contact layer 111 is preferably grown using an MOCVD process, and the thickness of the first type ohmic contact layer 111 can be 1 μm to 5 μm. Preferably, the thickness of the first type ohmic contact layer 111 is 3 μm.

[0100] After growing the first type window layer 112, the first type confinement layer 113 is grown on the first type window layer 112. The material of the first type confinement layer 113 is preferably AlInP. The first type confinement layer 113 is doped with a type I dopant, such as Si or Te. Further, the first type dopant is preferably Si. The first type confinement layer 113 is preferably grown using an MOCVD process, and the thickness of the first type confinement layer 113 can be 100 nm to 500 nm. Preferably, the thickness of the first type confinement layer is 300 nm.

[0101] After growing the first type confinement layer 113, the first type space layer 114 is grown on the first type confinement layer 113. The first type space layer 114 is preferably made of AlGaInP and is undoped.

[0102] After growing the first type of space layer 114, the active layer 120 is grown on the first type of space layer 114. The active layer 120 is preferably a multi-quantum-well structure, that is, the active layer 120 is preferably a periodic structure composed of quantum well layers and quantum barrier layers, and the number of periods of the active layer 120 is preferably 6 to 18. The quantum well layer is preferably made of GaInP, and the quantum barrier layer is preferably made of AlGaInP. The thickness of the active layer 120 can be 90 nm to 500 nm, preferably 150 nm.

[0103] In step S3, as Figure 1 As shown, a second type semiconductor layer 130 is formed on the active layer 120. The second type semiconductor layer 130 includes a second type space layer 131, a second type confinement layer 132, a strain buffer layer 133, a second type current spreading layer 134, and a second type ohmic contact layer 135 stacked sequentially from bottom to top.

[0104] Specifically, the method for forming the second type semiconductor layer 130 includes: firstly, growing the second type space layer 131 on the active layer 120. Preferably, the second type space layer 131 is made of AlGaInP and is undoped.

[0105] Then, a second-type confinement layer 132 is grown on the second-type space layer 131. The second-type confinement layer 132 is an AlGaInP layer. For example, the material of the second-type confinement layer 132 is preferably Al. m Ga 1-m-n In n P, where 0.6≤m+n≤1, 0.45≤n≤0.55, preferably m=0.5, n=0.5.

[0106] Furthermore, the second type confinement layer 132 is doped with a second type dopant, which can be a p-type dopant, such as magnesium (Mg) or zinc (Zn), preferably Mg.

[0107] The growth process of the second type confinement layer 132 is preferably MOCVD, and the thickness of the second type confinement layer 132 can be 150nm~500nm. Preferably, the thickness of the second type confinement layer 132 is 300nm.

[0108] refer to Figure 1 and combined Figure 2 As shown, after growing the second type confinement layer 132, the strain buffer layer 133 is grown on the second type confinement layer 132. The strain buffer layer 133 includes one or more periodic structures, each periodic structure including a first buffer sublayer 1331, a second buffer sublayer 1332, a third buffer sublayer 1333, and a fourth buffer sublayer 1334 stacked sequentially from bottom to top. The first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 in the strain buffer layer 133 can be grown with fixed components or with gradient components.

[0109] In this embodiment, the strain buffer layer 133 can have 1 to 4 periods, meaning it can be a single-period structure or a multi-period structure, with the multi-period structure having 2 to 4 periods. The thickness of each period of the strain buffer layer 133 can be 12 nm to 160 nm.

[0110] In this embodiment, the first buffer sublayer 1331 is Al. a In 1-a The P layer has a thickness of 0.2 ≤ a < 0.45, preferably a = 0.35. The thickness of the first buffer sublayer 1331 can be 3 nm to 30 nm, preferably 15 nm.

[0111] The second buffer sublayer further contains a Ga component, and the second buffer sublayer 1332 is Al x Ga 1-x-y In y P layer, where x+y<1, a<x≤0.5, and 0<y<1-a, preferably, x=0.4, y=0.4. The thickness of the second buffer sublayer 1332 may be 3 nm to 40 nm, preferably 10 nm.

[0112] The third buffer sublayer 1333 is Al b In 1-b P layer, where 0.5≤b≤0.9, preferably b=0.7. The thickness of the third buffer sublayer 1333 may be 3 nm to 30 nm, preferably 8 nm.

[0113] The fourth buffer sublayer 1334 is Al c Ga 1-c P, where 0≤c≤0.5, preferably c=0.2. The thickness of the fourth buffer sublayer 1334 is 3 nm to 60 nm, preferably 12 nm.

[0114] In some embodiments, the strain buffer layer 133 has a fixed component. Specifically, the Al component in the first buffer sublayer 1331 is a fixed component; the second buffer sublayer 1332 contains a Ga component, and the Ga component in the second buffer sublayer 1332 is a fixed component; the Al component in the third buffer sublayer 1333 is a fixed component; the Al component in the fourth buffer sublayer 1334 is a fixed component.

[0115] In some embodiments, the strain buffer layer has a graded component. Specifically, the Al component in the first buffer sublayer 1331 gradually increases along the growth direction of the first buffer sublayer 1331; the second buffer sublayer 1332 contains a Ga component, and the Ga component in the second buffer sublayer 1332 gradually increases along the growth direction of the second buffer sublayer 1332; the Al component in the third buffer sublayer 1333 gradually increases along the growth direction of the third buffer sublayer 1333; the Al component in the fourth buffer sublayer 1334 gradually decreases along the growth direction of the fourth buffer sublayer 1334. Such arrangement can make the crystal lattice smaller, the energy band larger, and further make the energy band gap of the strain buffer layer 133 close to the band gaps of the second confinement layer and the second current spreading layer.

[0116] In this embodiment, the strain buffer layer 133 is doped with a type II dopant, such as Mg or Zn. That is, the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 are all doped with a type II dopant, and the concentration of the type II dopant in the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 is preferably the same. Further, the type II dopant is preferably Mg; for example, the first buffer sublayer 1331, the second buffer sublayer 1332, the third buffer sublayer 1333, and the fourth buffer sublayer 1334 are all doped with Mg, and the Mg doping concentration is 5E17cm⁻¹. -3 ~5E19cm -3 .

[0117] After growing the strain buffer layer 133, a second type current spreading layer 134 is grown on the strain buffer layer 133. The second type current spreading layer 134 is used for current spreading to prevent uneven current distribution on the device. The material of the second type current spreading layer 134 is preferably GaP. The doping source of the second type current spreading layer 134 is preferably Mg, but not limited thereto. The growth method of the second type current spreading layer 134 is preferably MOCVD. The thickness of the second type current spreading layer 134 can be 300 nm to 900 nm, preferably 600 nm.

[0118] After growing the second type current spreading layer 134, a second type ohmic contact layer 135 is grown on the second type current spreading layer 134. The second type ohmic contact layer 135 is used to form an ohmic contact with a metal electrode. The material of the second type ohmic contact layer 135 is preferably GaP, but not limited to it. The second type ohmic contact layer 135 may be doped with carbon (C). The growth method of the second type ohmic contact layer 135 is preferably MOCVD process. The thickness of the second type ohmic contact layer 135 can be 100 nm to 250 nm, preferably 200 nm.

[0119] In summary, in the LED epitaxial structure and its fabrication method provided by this invention, a strain buffer layer is inserted between the second-type confinement layer and the second-type current spreading layer. The strain buffer layer has a periodic structure, and each period of the strain buffer layer includes a first buffer sublayer, a second buffer sublayer, a third buffer sublayer, and a fourth buffer sublayer stacked sequentially from bottom to top. The first, second, third, and fourth buffer sublayers all contain Al components. At the contact surface between the second and first layers, the Al component of the second buffer sublayer is greater than that of the first buffer sublayer; at the contact surface between the third and second buffer sublayers, the Al component of the third buffer sublayer is greater than that of the second buffer sublayer; and at the contact surface between the fourth and third buffer sublayers, the Al component of the fourth buffer sublayer is less than that of the third buffer sublayer. Through strain compensation and smooth lattice transition provided by the strain buffer layer, the strain caused by lattice mismatch between the second-type confinement layer and the second-type current spreading layer can be reduced, thereby improving the crystal quality of the second-type confinement layer and the second-type current spreading layer. Furthermore, there are no large abrupt potential barriers between the strain buffer layer and the type II confinement layer and the type II current spreading layer, which allows carriers to migrate better, thereby promoting current spreading, improving the luminous efficiency of the LED and reducing the operating voltage.

[0120] It should be noted that the above description is only a description of the preferred embodiment of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

[0121] Furthermore, it is understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.

Claims

1. An LED epitaxial structure, characterized in that, The device includes a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially on a substrate from bottom to top. The second type semiconductor layer includes a second type space layer, a second type confinement layer, a strain buffer layer, a second type current spreading layer, and a second type ohmic contact layer stacked sequentially from bottom to top. The strain buffer layer includes one or more periodic structures. Each period of the strain buffer layer includes a first buffer sublayer, a second buffer sublayer, a third buffer sublayer, and a fourth buffer sublayer stacked sequentially from bottom to top. The first buffer sublayer, the second buffer sublayer, the third buffer sublayer, and the fourth buffer sublayer all contain Al composition. Between the contact surfaces of the first and second buffer sublayers, the Al content of the second buffer sublayer is greater than that of the first buffer sublayer; between the contact surfaces of the third and second buffer sublayers, the Al content of the third buffer sublayer is greater than that of the second buffer sublayer; between the contact surfaces of the fourth and third buffer sublayers, the Al content of the fourth buffer sublayer is less than that of the third buffer sublayer.

2. The LED epitaxial structure as described in claim 1, characterized in that, The strain buffer layer has 1 to 4 cycles.

3. The LED epitaxial structure as described in claim 1, characterized in that, The Al content in the first buffer sublayer gradually increases along the growth direction of the first buffer sublayer.

4. The LED epitaxial structure as described in claim 1 or 3, characterized in that, The first buffer sublayer is Al a InP 1-a Layer, where 0.2≤a<0.

45.

5. The LED epitaxial structure as described in claim 1, characterized in that, The second buffer sublayer also contains a Ga component, and the Ga component in the second buffer sublayer is a fixed component.

6. The LED epitaxial structure as described in claim 1, characterized in that, The second buffer sublayer also contains a Ga component, and the Ga component in the second buffer sublayer gradually increases along the growth direction of the second buffer sublayer.

7. The LED epitaxial structure as described in claim 5 or 6, characterized in that, The second buffer sublayer is Al x Ga 1-x- y In y P layer, where x+y<1, a<x≤0.5, and 0<y<1-a.

8. The LED epitaxial structure as described in claim 1, characterized in that, The Al component in the third buffer sublayer gradually increases along the growth direction of the third buffer sublayer.

9. The LED epitaxial structure as described in claim 1 or 8, characterized in that, The third buffer sublayer is Al b InP 1-b Layer, where 0.5≤b≤0.

9.

10. The LED epitaxial structure as described in claim 1, characterized in that, The Al component in the fourth buffer sublayer gradually decreases along the growth direction of the fourth buffer sublayer.

11. The LED epitaxial structure as described in claim 1 or 10, characterized in that, The fourth buffer sublayer is Al c Ga 1-c P layers, where 0 ≤ c ≤ 0.

5.

12. The LED epitaxial structure as described in claim 1, characterized in that, The Al components in the first buffer sublayer, the third buffer sublayer, and the fourth buffer sublayer are all fixed components.

13. The LED epitaxial structure as described in claim 1, characterized in that, The thickness of the strain buffer layer per cycle is 12nm~160nm.

14. The LED epitaxial structure as described in claim 1, characterized in that, The single-cycle thickness of the first buffer sublayer is 3nm~30nm, the single-cycle thickness of the second buffer sublayer is 3nm~40nm, the single-cycle thickness of the third buffer sublayer is 3nm~30nm, and the single-cycle thickness of the fourth buffer sublayer is 3nm~60nm.

15. The LED epitaxial structure as described in claim 1, characterized in that, The first, second, third, and fourth buffer sublayers are all doped with Mg, and the Mg doping concentration is 5E17cm³. -3 ~5E19cm -3 .

16. The LED epitaxial structure as described in claim 1, characterized in that, The second type of confinement layer is an AlGaInP layer, and the second type of current spreading layer is a GaP layer.

17. The LED epitaxial structure as described in claim 1, characterized in that, The first type of semiconductor layer includes a first type of ohmic contact layer, a first type of window layer, a first type of confinement layer and a first type of space layer stacked from bottom to top.

18. The LED epitaxial structure as described in claim 1, characterized in that, The first type of semiconductor layer is an N-type semiconductor layer, and the second type of semiconductor layer is a P-type semiconductor layer.

19. The LED epitaxial structure as described in claim 1, characterized in that, The LED epitaxial structure further includes a bottom buffer layer and an etching stop layer, which are located between the substrate and the first type of semiconductor layer and stacked sequentially from bottom to top.

20. A method for fabricating an LED epitaxial structure, characterized in that, include: Provide substrate; A first type semiconductor layer, an active layer, and a second type semiconductor layer are sequentially grown on the substrate. The second type semiconductor layer includes a second type space layer, a second type confinement layer, a strain buffer layer, a second type current spreading layer, and a second type ohmic contact layer stacked sequentially from bottom to top. The strain buffer layer includes one or more periodic structures. Each period of the strain buffer layer includes a first buffer sublayer, a second buffer sublayer, a third buffer sublayer, and a fourth buffer sublayer stacked sequentially from bottom to top. The first buffer sublayer, the second buffer sublayer, the third buffer sublayer, and the fourth buffer sublayer all contain Al composition. Between the contact surfaces of the first and second buffer sublayers, the Al content of the second buffer sublayer is greater than that of the first buffer sublayer; between the contact surfaces of the third and second buffer sublayers, the Al content of the third buffer sublayer is greater than that of the second buffer sublayer; between the contact surfaces of the fourth and third buffer sublayers, the Al content of the fourth buffer sublayer is less than that of the third buffer sublayer.

21. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The strain buffer layer has 1 to 4 cycles.

22. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The Al content in the first buffer sublayer gradually increases along the growth direction of the first buffer sublayer.

23. The method for preparing an LED epitaxial structure as described in claim 20 or 22, characterized in that, The first buffer sublayer is Al a InP 1-a Layer, where 0.2≤a<0.

45.

24. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The second buffer sublayer also contains a Ga component, and the Ga component in the second buffer sublayer is a fixed component.

25. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The second buffer sublayer also contains a Ga component, and the Ga component in the second buffer sublayer gradually increases along the growth direction of the second buffer sublayer.

26. The method for preparing an LED epitaxial structure as described in claim 24 or 25, characterized in that, The second buffer sublayer is Al x Ga 1-x-y In y P layer, where x+y<1, a<x≤0.5, and 0<y<1-a.

27. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The Al component in the third buffer sublayer gradually increases along the growth direction of the third buffer sublayer.

28. The method for preparing an LED epitaxial structure as described in claim 20 or 27, characterized in that, The third buffer sublayer is Al b InP 1-b Layer, where 0.5≤b≤0.

9.

29. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The Al component in the fourth buffer sublayer gradually decreases along the growth direction of the fourth buffer sublayer.

30. The method for preparing an LED epitaxial structure as described in claim 20 or 29, characterized in that, The fourth buffer sublayer is Al c Ga 1-c P layers, where 0 ≤ c ≤ 0.

5.

31. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The Al components in the first buffer sublayer, the third buffer sublayer, and the fourth buffer sublayer are all fixed components.