A MIP display device integrated wafer and a preparation method thereof, a MIP display device and an RGB full-color display screen

Abstract

The application provides a MIP display device integrated wafer, a preparation method thereof, a MIP display device and an RGB full-color display screen. The MIP display device integrated wafer comprises: a blue light LED chip array, the blue light LED chip array comprises a plurality of array-arranged blue light LED chip units; an electrical isolation groove is arranged between adjacent blue light LED chip units, and the electrical isolation groove is filled with an insulating layer; an independent P electrode and an N electrode are arranged on the blue light LED chip unit; a silicon-based isolation reflection layer comprises a plurality of array-arranged reflection isolation walls, and a projection of the reflection isolation wall on the blue light LED chip unit is located in the region of the electrical isolation groove; a reflection cavity is formed between adjacent reflection isolation walls, and a luminescent material or a transparent material is arranged on the cavity wall of the reflection cavity, so as to form an RGB pixel unit with the corresponding blue light LED chip unit; and a lead connection layer is arranged on the electrode side of the blue light LED chip array.

Description

Technical Field

[0001] This invention belongs to the technical field of semiconductor light-emitting devices, specifically relating to a MIP display device integrated wafer and its fabrication method, an MIP display device, and an RGB full-color display screen. Background Technology

[0002] Existing LED COB (Chip on Board) displays typically employ a method of transferring red, green, and blue LED chips separately onto a substrate to achieve full-color display. This approach requires the simultaneous use of three different colored LED chips. Red LED chips are usually based on AlGaInP or GaAs material systems, and their manufacturing cost is significantly higher than that of blue and green chips based on InGaN materials. Furthermore, the sequential transfer and repair of the three different colored chips on the substrate surface involves multiple independent transfer and repair processes, resulting in numerous process steps and high alignment accuracy requirements. This makes it difficult to improve process yield and keeps the overall manufacturing cost high.

[0003] Therefore, how to reduce the manufacturing cost and process complexity of displays is a technical problem that urgently needs to be solved. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a MIP display device integrated wafer and its fabrication method, a MIP display device, and an RGB full-color display screen. In the MIP display device integrated wafer provided by the present invention, full-color display is achieved by placing luminescent materials or phosphors on the cavity walls of the reflective cavity, thereby utilizing a single blue LED chip array in conjunction with color conversion materials. Simultaneously, this structure eliminates the need for strict wavelength grading and screening, allowing the use of chips from the entire integrated wafer, reducing material screening losses. The blue LED chip unit has independent P and N electrodes, combined with a silicon-based isolation reflective layer, structurally adaptable to flip-chip structures, possessing excellent heat dissipation paths, and compatible with Mini LED and Micro LED displays. The LED-level chip size design enables high brightness and wide color gamut display. The reflective isolation wall and the electrical isolation groove correspond in the projection, achieving both electrical and optical isolation between adjacent pixel units. The reflective cavity formed by the reflective isolation wall can effectively limit the light emission angle of each pixel unit, avoiding light crosstalk between adjacent pixels. At the same time, it has a reflection enhancement effect on excitation light and conversion light, improving light extraction efficiency and display contrast. In addition, the integrated wafer adopts a one-piece integrated form, and can be obtained as an independent MIP display device by subsequent dicing and separation. There is no need to perform massive transfer operations on the three RGB chips separately, reducing the number of transfers and alignment accuracy requirements, reducing the difficulty of the packaging process and the risk of fragmentation, thereby reducing packaging costs and improving packaging efficiency.

[0005] To achieve this objective, the present invention adopts the following technical solution: In a first aspect, the present invention provides a MIP display device integrated wafer, the MIP display device integrated wafer comprising: A blue LED chip array, comprising a plurality of blue LED chip units arranged in an array; an electrical isolation groove is provided between adjacent blue LED chip units, the electrical isolation groove being filled with an insulating layer; each blue LED chip unit is provided with an independent P electrode and an N electrode.

[0006] A silicon-based isolation reflective layer is disposed on the non-electrode side of the blue LED chip array, including a plurality of arrayed reflective isolation walls. The projection of the reflective isolation walls on the blue LED chip unit is located in the area where the electrical isolation groove is located. Adjacent reflective isolation walls enclose a reflective cavity, and the cavity wall of the reflective cavity is provided with a light-emitting material or a transparent material, which is used to form an RGB pixel unit with the corresponding blue LED chip unit.

[0007] A lead connection layer is disposed on the electrode side of the blue LED chip array, used to lead out the P electrode and N electrode of the blue LED chip unit to a preset pad position.

[0008] The MIP display device integrated wafer provided by this invention achieves full-color display by placing luminescent materials or phosphors on the cavity walls of the reflective cavity, thereby utilizing a single blue LED chip array in conjunction with color conversion materials. Simultaneously, this structure eliminates the need for strict wavelength grading and screening, allowing the use of chips from the entire integrated wafer, reducing material screening losses. The blue LED chip unit has independent P and N electrodes, coupled with a silicon-based isolation reflective layer, structurally adaptable to flip-chip structures, possessing excellent heat dissipation paths, and compatible with Mini LED and Micro LED. The LED-level chip size design enables high brightness and wide color gamut display. The reflective isolation wall and the electrical isolation groove correspond in the projection, achieving both electrical and optical isolation between adjacent pixel units. The reflective cavity formed by the reflective isolation wall can effectively limit the light emission angle of each pixel unit, avoiding light crosstalk between adjacent pixels. At the same time, it has a reflection enhancement effect on excitation light and conversion light, improving light extraction efficiency and display contrast. In addition, the integrated wafer adopts a one-piece integrated form, and can be obtained as an independent MIP display device by subsequent dicing and separation. There is no need to perform massive transfer operations on the three RGB chips separately, reducing the number of transfers and alignment accuracy requirements, reducing the difficulty of the packaging process and the risk of fragmentation, thereby reducing packaging costs and improving packaging efficiency.

[0009] Preferably, the light-emitting material of the blue LED chip unit is InGaN multiple quantum well.

[0010] Preferably, the thickness of the blue LED chip array is 8~10μm, for example, it can be 8μm, 9μm or 10μm.

[0011] Preferably, the insulating layer is made of polyimide.

[0012] Preferably, the width of the electrical isolation groove in the first direction is 80~100μm, for example, it can be 80μm, 85μm, 90μm, 95μm or 100μm, etc., and the first direction is perpendicular to the thickness direction of the blue LED chip array.

[0013] Preferably, the silicon-based reflective insulating layer is made of silicon single crystal. Preferably, the width of the reflective insulating wall in the first direction is smaller than the width of the corresponding insulating layer in the first direction, and the first direction is perpendicular to the thickness direction of the blue LED chip array.

[0014] In this invention, the reflective isolation wall designed above can increase the light emission effect, reduce the crosstalk problem between adjacent chips, and make it easy to set light-emitting materials or transparent materials by enclosing the adjacent reflective isolation walls.

[0015] Preferably, the height of the reflective isolation wall is 15~20μm, for example, it can be 15μm, 16μm, 17μm, 18μm, 19μm or 20μm, etc., and the height of the reflective isolation wall is parallel to the thickness direction of the blue LED chip array.

[0016] In this invention, a reflective isolation wall of suitable height can increase the light emission effect, reduce the crosstalk problem between adjacent chips, and allow adjacent reflective isolation walls to enclose and form a reflective cavity, which facilitates the placement of light-emitting materials or transparent materials.

[0017] Preferably, the luminescent material includes quantum dot luminescent material or phosphor.

[0018] Preferably, the quantum dot luminescent material includes red quantum dot material or green quantum dot material. Red quantum dot material may be, for example, InP / ZnSe / ZnS luminescent material, and green quantum dot material may be, for example, InP / ZnSe / ZnS luminescent material.

[0019] Preferably, the phosphor includes red phosphor or green phosphor.

[0020] Preferably, the transparent material includes transparent silicone and / or epoxy adhesive.

[0021] Preferably, in the blue LED chip array, three adjacent blue LED chip units in any column form a group, and together with the corresponding reflective isolation wall, they constitute an RGB pixel unit, denoted as a type I RGB pixel unit.

[0022] Alternatively, in the blue LED chip array, four blue LED chip units arranged in two rows and two columns form a group, which together with the corresponding reflective isolation wall constitute an RGBG pixel unit, denoted as a Type II RGBG pixel unit.

[0023] The present invention can construct RGB pixel units in the two ways described above: one is to prepare a MIP device with real pixel RGB arrangement, and the other is to prepare a MIP device with virtual pixel RGBG arrangement.

[0024] Preferably, in the type I RGB pixel unit, in the order of the blue LED chip units arranged sequentially, the cavity walls of each reflective cavity are respectively provided with red light-emitting material, green light-emitting material and transparent material.

[0025] In the type I RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad.

[0026] Alternatively, in the type II RGB pixel unit, the walls of the reflective cavities of the blue LED chip units in the first row from left to right are respectively provided with red light-emitting material and green light-emitting material, and the walls of the reflective cavities of the blue LED chip units in the second row from left to right are respectively provided with green light-emitting material and transparent material.

[0027] In the type II RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad.

[0028] In this invention, RGB pixel units can be constructed by using blue LED chip units in conjunction with red / green luminescent / transparent materials provided on the cavity wall of the reflective cavity. This method uses color conversion materials to convert blue LED chips into red and green light, reducing costs and improving process efficiency.

[0029] In a second aspect, the present invention provides a method for fabricating an integrated wafer for a MIP display device as described in the first aspect, the method comprising the following steps: Provide silicon substrates.

[0030] A blue light-emitting layer is epitaxially grown on the silicon substrate.

[0031] The blue light-emitting layer is patterned and etched to form several blue LED chip units arranged in an array. Then, P electrodes and N electrodes are deposited on the surface of each blue LED chip unit to obtain a semi-finished product.

[0032] An insulating layer is prepared on the electrode side surface of the semi-finished product, the insulating layer covering the blue LED chip unit and filling the electrical isolation groove between adjacent blue LED chip units.

[0033] The insulating layer is patterned to expose the P and N electrodes of the blue LED chip unit, and the P and N electrodes of the blue LED chip unit are led out to preset pad positions through the lead connection layer.

[0034] The silicon substrate is post-processed to form a silicon-based isolation reflective layer; the silicon-based isolation reflective layer includes a plurality of reflective isolation walls arranged in an array, and the projection of the reflective isolation walls on the blue LED chip unit array is located in the region where the electrical isolation trench is located.

[0035] A luminescent or transparent material is coated on the cavity wall of the reflective cavity formed by the adjacent reflective isolation walls to form an RGB pixel unit with the corresponding blue LED chip unit.

[0036] This invention sequentially completes the epitaxial growth of a blue emitting layer, patterning etching, electrode fabrication, insulating layer fabrication, and the formation of a silicon-based isolation and reflective layer on a silicon substrate. The process is highly concentrated, significantly simplified, and greatly improves packaging efficiency. Furthermore, this fabrication method only requires the epitaxial growth of a single blue emitting layer, eliminating the need to grow three different colored epitaxial layers separately. Because the subsequent color conversion of the emitting material has a wide adaptation range to blue light wavelengths, fine wavelength grading is unnecessary, reducing chip screening losses and improving material utilization. This fabrication method eliminates the need for high-precision mass transfer of the three different RGB color chips, avoiding losses in the mass transfer process and significantly reducing maintenance difficulty and cost. In this fabrication method, the array arrangement of the blue LED chip units and the coating method of the emitting material can be flexibly adjusted according to pixel design requirements, compatible with both real-pixel and virtual-pixel display architectures, providing high flexibility. The projection position of the reflective isolation wall corresponds to the area where the electrical isolation trench is located, achieving the synergistic formation of electrical and optical isolation under the same process, simplifying the process, reducing the risk of accumulated process deviations, and effectively controlling optical crosstalk between adjacent pixels.

[0037] Preferably, the epitaxial growth method of the blue luminescent layer includes MOCVD. It should be noted that "MOCVD" refers to metal-organic chemical vapor deposition.

[0038] Preferably, the patterning etching method includes dry etching. For example, the following steps may be employed: 1) Pretreatment and hard mask deposition Clean, and then deposit a mask layer.

[0039] 2) Photolithographic pattern transfer Photoresist is spin-coated, then exposed and developed. The mask layer exposed in a specific area is then removed to expose the blue light-emitting layer to be etched.

[0040] The blue light-emitting layer to be etched is removed from the target area by etching, forming several blue LED chip units arranged in an array.

[0041] Preferably, the method for preparing the insulating layer includes any one or a combination of at least two of the following: spraying, spin coating, dispensing, or inkjet printing.

[0042] Preferably, the patterning process includes sequential photolithography and etching processes.

[0043] Preferably, the post-processing includes a thinning process and an etching process performed sequentially.

[0044] Preferably, the etching step includes: A mask layer is prepared on the thinned surface of a silicon substrate, and a protective layer is prepared on the side of the silicon substrate opposite to the thinned surface. The mask layer is patterned to expose a specific area of ​​the silicon substrate, and then etched to form several arrayed reflective isolation walls. Remove the remaining mask and protective layers.

[0045] Thirdly, the present invention provides a MIP display device, wherein the MIP display device is obtained by green laser cutting and separating the MIP display device integrated wafer described in the first aspect.

[0046] Fourthly, the present invention provides an RGB full-color display screen, the RGB full-color display screen including the MIP display device as described in the third aspect.

[0047] The numerical range described in this invention includes not only the point values ​​listed above, but also any point values ​​within the numerical ranges not listed above. Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values ​​included in the range.

[0048] Compared with the prior art, the present invention has the following beneficial effects: The MIP display device integrated wafer provided by this invention achieves full-color display by placing luminescent materials or phosphors on the cavity walls of the reflective cavity, thereby utilizing a single blue LED chip array in conjunction with color conversion materials. Simultaneously, this structure eliminates the need for strict wavelength grading and screening, allowing the use of chips from the entire integrated wafer, reducing material screening losses. The blue LED chip unit has independent P and N electrodes, coupled with a silicon-based isolation reflective layer, structurally adaptable to flip-chip structures, possessing excellent heat dissipation paths, and compatible with Mini LED and Micro LED. The LED-level chip size design enables high brightness and wide color gamut display. The reflective isolation wall and the electrical isolation groove correspond in the projection, achieving both electrical and optical isolation between adjacent pixel units. The reflective cavity formed by the reflective isolation wall can effectively limit the light emission angle of each pixel unit, avoiding light crosstalk between adjacent pixels. At the same time, it has a reflection enhancement effect on excitation light and conversion light, improving light extraction efficiency and display contrast. In addition, the integrated wafer adopts a one-piece integrated form, and can be obtained as an independent MIP display device by subsequent dicing and separation. There is no need to perform massive transfer operations on the three RGB chips separately, reducing the number of transfers and alignment accuracy requirements, reducing the difficulty of the packaging process and the risk of fragmentation, thereby reducing packaging costs and improving packaging efficiency. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of the structure obtained by step (1) in Embodiments 1 and 2 of the present invention.

[0050] Figure 2 This is a schematic diagram of the structure obtained in step (2) of Embodiments 1 and 2 of the present invention.

[0051] Figure 3 This is a schematic diagram of the structure obtained by step (3) in Embodiments 1 and 2 of the present invention.

[0052] Figure 4 This is a schematic diagram of the electrode obtained in step (4) of Embodiment 1 of the present invention.

[0053] Figure 5 This is a schematic diagram of the structure obtained in step (5) of Embodiment 1 of the present invention.

[0054] Figure 6 This is a schematic diagram of the electrode obtained in step (4) of Embodiment 2 of the present invention.

[0055] Among them, 1-silicon substrate; 2-blue light-emitting layer; 3-blue LED chip unit; 4-P electrode; 5-N electrode; 6-insulating layer; 7-lead connection layer; 8-independent pad; 9-common pad; 10-silicon-based isolation and reflection layer; 11-reflective isolation wall. Detailed Implementation

[0056] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments described are merely illustrative of the present invention and should not be construed as limiting the invention in any way.

[0057] The scope of this invention can be defined by lower and upper limits. The selected lower and upper limits define the boundaries of a specific range. The range defined in this way can be defined by the inclusion or exclusion of endpoints. Any endpoint can be independently selected for inclusion or exclusion, and all lower and upper limits can be arbitrarily combined to form new ranges. That is, any lower limit can be combined with any upper limit to form an effective range. For example, if the ranges of 60~120 and 80~110 are listed for specific parameters, it should be understood that the ranges of 60~110 and 80~120 also fall within the scope of this invention. In addition, if the minimum range values ​​1 and 2 are listed, and the maximum range values ​​3, 4 and 5 are also listed, then all ranges of 1~3, 1~4, 1~5, 2~3, 2~4 and 2~5 fall within the scope of this invention. In this invention, the numerical range "a~b" represents a shortened representation of any combination of real numbers between a and b, where a and b are both real numbers. For example, the numerical range "0~5" means that all real numbers between 0 and 5 have been fully listed in this document, and "0~5" is only a shortened representation of this set of numerical combinations. When a parameter is expressed as an integer ≥2, it is equivalent to listing positive integers that meet the requirements, such as 2, 3, 4, 5, 6, 7, 8, 9, 10, etc. When a parameter is expressed as an integer selected from "2~10", it is equivalent to listing any integer among 2, 3, 4, 5, 6, 7, 8, 9, and 10.

[0058] In this invention, "a combination of at least two" refers to a quantity greater than or equal to 2 unless otherwise specified. For example, "any one or a combination of at least two" means that any one of the listed items can be selected, or a combination of at least two of the listed items formed in a manner that does not conflict and enables the implementation of this invention. In this invention, unless otherwise specified, the features or solutions corresponding to "and / or" cover any one of two or more related listed items, as well as any and all combinations of the related listed items. The arbitrary and all combinations include any two related listed items, any more related listed items, or a combination of all related listed items. For example, "A and / or B" means a set consisting of A, B, and combinations of A and B, where "containing A and / or B" can be understood, depending on the context of the statement, as containing A, containing B, or simultaneously containing both A and B. In this invention, "optional" means that the corresponding feature, component, step or solution is not necessary, that is, it is selected from either "with" or "without". If there are multiple "optional" limitations in a technical solution, unless otherwise specified and there is no technical conflict or mutual constraint, each "optional" limitation is independent and does not affect the others.

[0059] In this invention, technical features or solutions described using open-ended terms such as "comprising" or "including" do not exclude additional non-conflicting elements beyond the listed elements unless otherwise specified. They are considered to disclose both closed-ended features or solutions consisting solely of the listed elements and open-ended features or solutions that may include additional non-conflicting elements beyond the listed elements. For example, if A includes a1, a2, and a3, unless otherwise specified, this means that A can consist only of a1, a2, and a3, or it can include other non-conflicting elements based on a1, a2, and a3. This corresponds to the disclosure of technical solutions such as "A consists of a1, a2, and a3," "A is selected from a1, a2, and a3," and "A not only includes a1, a2, and a3, but may also include other non-conflicting elements." All embodiments and optional embodiments of this invention, unless otherwise specified and without technical conflict, can be combined to form new technical solutions, and such combinations fall within the scope of this invention. The term "embodiment" as used in this invention means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment or implementation of the invention. The appearance of this phrase in various locations throughout the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand, explicitly and implicitly, that the embodiments described in this invention can be combined with other embodiments that do not conflict with the technology. The ordinal numbers "first," "second," "third," and "fourth," etc., used in the expressions "first aspect," "second aspect," "third aspect," and "fourth aspect" in this invention are for descriptive purposes only and should not be construed as indicating or implying relative importance or quantity, nor should they be construed as implicitly specifying the importance or quantity of the indicated technical features. They serve only as a non-exhaustive enumeration and do not constitute a closed limitation on quantity.

[0060] In this invention, the order in which the steps are written in the methods described in each embodiment does not imply a strict execution order. The actual execution order of each step should be determined based on its function and possible internal logic. Unless otherwise specified, all steps of this invention can be executed in the order they are written, or in any order without technical conflict. For example, if the method includes steps (a) and (b), it means that the method may include steps (a) and (b) executed sequentially, or it may include steps (b) and (a) executed sequentially. If the method also includes step (c), then step (c) can be added to the method in any order without conflict, including but not limited to the execution order of steps (a), (b), and (c), steps (a), (c), and (b), steps (c), (a), and (b), etc.

[0061] Example 1 This embodiment provides a MIP display device integrated wafer, the MIP display device integrated wafer comprising: A blue LED chip array, comprising a plurality of blue LED chip units arranged in an array; an electrical isolation groove is provided between adjacent blue LED chip units, the electrical isolation groove being filled with an insulating layer; each blue LED chip unit is provided with an independent P electrode and an N electrode.

[0062] A silicon-based isolation reflective layer is disposed on the non-electrode side of the blue LED chip array, including a plurality of arrayed reflective isolation walls. The projection of the reflective isolation walls on the blue LED chip unit is located in the area where the electrical isolation groove is located. Adjacent reflective isolation walls enclose a reflective cavity, and the cavity wall of the reflective cavity is provided with a light-emitting material or a transparent material, which is used to form an RGB pixel unit with the corresponding blue LED chip unit.

[0063] A lead connection layer is disposed on the electrode side of the blue LED chip array, used to lead out the P electrode and N electrode of the blue LED chip unit to a preset pad position.

[0064] The blue LED chip unit is made of InGaN; the blue LED chip array has a thickness of 9 μm; the insulating layer is made of polyimide; the electrical isolation trench has a width of 90 μm in a first direction, which is perpendicular to the thickness direction of the blue LED chip array; the silicon-based isolation reflective layer is made of monocrystalline silicon; the reflective isolation wall has a width in a first direction that is smaller than the width of the corresponding insulating layer in the first direction, which is perpendicular to the thickness direction of the blue LED chip array; the reflective isolation wall has a height of 17 μm, which is parallel to the thickness direction of the blue LED chip array.

[0065] In the blue LED chip array, three adjacent blue LED chip units in any column form a group, and together with the corresponding reflective isolation wall, they constitute an RGB pixel unit, denoted as a type I RGB pixel unit. In the type I RGB pixel unit, according to the order in which the blue LED chip units are arranged, the grooves formed by each reflective cavity are respectively provided with red quantum dot luminescent material (i.e., InP / ZnSe / ZnS luminescent material), green quantum dot luminescent material (i.e., InP / ZnSe / ZnS luminescent material), and transparent material (i.e., transparent silicone). In the type I RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad.

[0066] This embodiment also provides a method for fabricating the above-mentioned MIP display device integrated wafer, the fabrication method comprising the following steps: (1) Provide a silicon substrate 1.

[0067] A blue light-emitting layer 2 (i.e., an InGaN-based LED epitaxial film) with a thickness of 9 μm was epitaxially grown on the silicon substrate 1 using the MOCVD method. Figure 1 As shown.

[0068] (2) The blue light-emitting layer 2 is patterned by dry etching to form several arrayed blue LED chip units 3. Then, P electrodes 4 and N electrodes 5 are deposited on the surface of each blue LED chip unit 3 to obtain a semi-finished product, such as... Figure 2 As shown.

[0069] (3) Polyimide adhesive is sprayed onto the electrode side surface of the semi-finished product to form an insulating layer 6. The insulating layer 6 covers the blue LED chip unit 3 and fills the electrical isolation groove between adjacent blue LED chip units 3, such as... Figure 3 As shown.

[0070] (4) The insulating layer 6 is subjected to photolithography and etching to expose the P electrode 4 and N electrode 5 of the blue LED chip unit 3, and the P electrode 4 and N electrode 5 of the blue LED chip unit 3 are led out to preset pad positions through the lead connection layer 7 (made of copper). (Each P electrode 4 is independently connected to its corresponding independent pad 8, and each N electrode 5 is connected to the same common pad 9.) Figure 4 As shown.

[0071] (5) The silicon substrate 1 is sequentially thinned and etched to form a silicon-based isolation reflective layer 10; the silicon-based isolation reflective layer 10 includes a plurality of arrayed reflective isolation walls 11, the projection of the reflective isolation walls 11 on the blue LED chip unit 3 array being located in the region where the electrical isolation trench is located, such as Figure 5 As shown; wherein the specific etching steps include: preparing a mask layer on the thinned surface of the silicon substrate, and preparing a protective layer on the side surface of the silicon substrate opposite to the thinned surface; patterning the mask layer to expose a specific area of ​​the silicon substrate, and then performing etching to form several arrayed reflective isolation walls; and removing the remaining mask layer and protective layer.

[0072] (6) Spray a quantum dot luminescent material or a transparent material on the cavity wall of the reflective cavity enclosed by the adjacent reflective isolation walls 11, so as to form an RGB pixel unit with the corresponding blue LED chip unit 3, that is, spray red quantum dot material glue on the cavity wall of the reflective cavity corresponding to the first row of blue LED chip units, spray green quantum dot material glue on the cavity wall of the reflective cavity corresponding to the second row of blue LED chip units, and spray transparent glue on the cavity wall of the reflective cavity corresponding to the third row of blue LED chip units; for each subsequent group of three rows, spray red quantum dot material glue, green quantum dot material glue and transparent glue in sequence to obtain the MIP display device integrated wafer.

[0073] This embodiment further provides an MIP display device, which is obtained by cutting and separating the above MIP display device integrated wafer with a green laser.

[0074] A photoelectric test is performed on the MIP display device provided in this embodiment, with test conditions as follows: the driving current is 0.5mA to 5mA; the wavelength ranges of red, green and blue monochromatic light are 620nm to 630nm, 522nm to 528nm and 450nm to 458nm respectively; the reverse bias voltage is 5V, which is used for testing leakage current. The test criteria are: within the driving current range, if all three RGB pixel units emit light normally, it is judged as qualified (OK); if any one pixel unit does not light up, it is judged as unqualified (NG); for the leakage current, under 5V reverse bias, if the leakage current does not exceed the preset threshold, it is judged as qualified. Test results: all three pixel units of the MIP display device provided in this embodiment are lit, and the reverse leakage current meets the requirements, so the overall judgment is qualified (OK).

[0075] This embodiment further provides an RGB full-color display screen, which includes a substrate and the MIP display device as described above disposed on the substrate.

[0076] Example 2 This embodiment provides an MIP display device integrated wafer, which includes: A blue LED chip array, the blue LED chip array comprises a plurality of blue LED chip units arranged in an array; an electrical isolation trench is provided between adjacent blue LED chip units, and the electrical isolation trench is filled with an insulating layer; each blue LED chip unit is provided with an independent P-electrode and an independent N-electrode.

[0077] A silicon-based isolation reflective layer is disposed on the non-electrode side of the blue LED chip array, including a plurality of arrayed reflective isolation walls. The projection of the reflective isolation walls on the blue LED chip unit is located in the area where the electrical isolation groove is located. Adjacent reflective isolation walls enclose a reflective cavity, and the cavity wall of the reflective cavity is provided with a light-emitting material or a transparent material, which is used to form an RGB pixel unit with the corresponding blue LED chip unit.

[0078] A lead connection layer is disposed on the electrode side of the blue LED chip array, used to lead out the P electrode and N electrode of the blue LED chip unit to a preset pad position.

[0079] The blue LED chip unit is made of InGaN; the blue LED chip array has a thickness of 8 μm; the insulating layer is made of polyimide; the electrical isolation trench has a width of 80 μm in a first direction, which is perpendicular to the thickness direction of the blue LED chip array; the silicon-based isolation reflective layer is made of monocrystalline silicon; the reflective isolation wall has a width in a first direction that is smaller than the width of the corresponding insulating layer in the first direction, which is perpendicular to the thickness direction of the blue LED chip array; the reflective isolation wall has a height of 15 μm, which is parallel to the thickness direction of the blue LED chip array.

[0080] In the blue LED chip array, four blue LED chip units arranged in two rows and two columns form a group, which together with the corresponding reflective isolation wall constitutes an RGB pixel unit, denoted as a Type II RGB pixel unit. In the Type II RGB pixel unit, the walls of the reflective cavities of the blue LED chip units in the first row from left to right are respectively provided with red quantum dot luminescent material (i.e., InP / ZnSe / ZnS luminescent material) and green quantum dot luminescent material (i.e., InP / ZnSe / ZnS luminescent material). The walls of the reflective cavities of the blue LED chip units in the second row from left to right are respectively provided with green quantum dot luminescent material (i.e., InP / ZnSe / ZnS luminescent material) and transparent material (i.e., transparent silicone). In the Type II RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad.

[0081] This embodiment also provides a method for fabricating the above-mentioned MIP display device integrated wafer, the fabrication method comprising the following steps: (1) Provide a silicon substrate 1.

[0082] A blue light-emitting layer 2 (i.e., an InGaN-based LED epitaxial film) with a thickness of 8 μm was epitaxially grown on the silicon substrate 1 using the MOCVD method. Figure 1 As shown.

[0083] (2) The blue light-emitting layer 2 is patterned by dry etching to form several arrayed blue LED chip units 3. Then, P electrodes 4 and N electrodes 5 are deposited on the surface of each blue LED chip unit 3 to obtain a semi-finished product, such as... Figure 2 As shown.

[0084] (3) Polyimide adhesive is sprayed onto the electrode side surface of the semi-finished product to form an insulating layer 6. The insulating layer 6 covers the blue LED chip unit 3 and fills the electrical isolation groove between adjacent blue LED chip units 3, such as... Figure 3 As shown.

[0085] (4) The insulating layer 6 is subjected to photolithography and etching to expose the P electrode 4 and N electrode 5 of the blue LED chip unit 3, and the P electrode 4 and N electrode 5 of the blue LED chip unit 3 are led out to preset pad positions through the lead connection layer 7 (made of copper). (Each P electrode 4 is independently connected to its corresponding independent pad 8, and each N electrode 5 is connected to the same common pad 9.) Figure 6 As shown.

[0086] (5) The silicon substrate 1 is thinned and etched sequentially to form a silicon-based isolation reflective layer 10; the silicon-based isolation reflective layer 10 includes a plurality of arrayed reflective isolation walls 11, the projection of the reflective isolation walls 11 on the blue LED chip unit 3 array is located in the area where the electrical isolation trench is located; wherein, the specific steps of the etching include: preparing a mask layer on the thinned surface of the silicon substrate, preparing a protective layer on one side surface of the silicon substrate opposite to the thinned surface; patterning the mask layer to expose a specific area of ​​the silicon substrate, and then performing etching to form a plurality of arrayed reflective isolation walls; removing the remaining mask layer and protective layer.

[0087] (6) Coating a quantum dot luminescent material or a transparent material on the cavity wall of the reflection cavity enclosed by the adjacent reflective isolation walls 11, so as to form an RGB pixel unit with the corresponding blue LED chip unit 3, that is, spraying red quantum dot material glue on the cavity walls of the reflection cavities corresponding to the odd-numbered blue LED chip units in the first row, and spraying green quantum dot material glue on the cavity walls of the reflection cavities corresponding to the even-numbered blue LED chip units in the first row; spraying green quantum dot material glue on the cavity walls of the reflection cavities corresponding to the odd-numbered blue LED chip units in the second row, and spraying transparent glue on the cavity walls of the reflection cavities corresponding to the even-numbered blue LED chip units in the second row; taking every subsequent two rows and two columns as a group, repeating the above process to obtain the MIP display device integrated wafer.

[0088] This embodiment further provides an MIP display device, which is obtained by performing green laser dicing and separation on the above-mentioned MIP display device integrated wafer.

[0089] A photoelectric test is performed on the MIP display device provided in this embodiment, with a driving current of 0.5mA to 5mA; the wavelength ranges of red, green and blue monochromatic light are 620nm to 630nm, 522nm to 528nm and 450nm to 458nm respectively; the reverse bias voltage is 5V, which is used for testing the leakage current. The test criteria are: within the driving current range, if all three RGB pixel units emit light normally, it is judged as qualified (OK); if any pixel unit does not light up, it is judged as unqualified (NG); for the leakage current: under 5V reverse bias, if the leakage current does not exceed the preset threshold, it is judged as qualified. Test results: All three pixel units of the MIP display device provided in this embodiment are lit, and the reverse leakage current meets the requirements, so the whole is judged as qualified (OK).

[0090] This embodiment further provides an RGB full-color display screen, which includes a substrate and the above-mentioned MIP display device disposed on the substrate.

[0091] In summary, the MIP display device integrated wafer provided by this invention achieves full-color display by placing luminescent materials or phosphors on the cavity walls of the reflective cavity, thereby utilizing a single blue LED chip array in conjunction with color conversion materials. Simultaneously, this structure eliminates the need for strict wavelength grading and screening, allowing the use of chips from the entire integrated wafer, thus reducing material screening losses. The blue LED chip unit has independent P and N electrodes, and with the silicon-based isolation reflective layer, the structure is structurally compatible with flip-chip structures, possesses excellent heat dissipation paths, and is compatible with Mini LED and Micro LED. The LED-level chip size design enables high brightness and wide color gamut display. The reflective isolation wall and the electrical isolation groove correspond in the projection, achieving both electrical and optical isolation between adjacent pixel units. The reflective cavity formed by the reflective isolation wall can effectively limit the light emission angle of each pixel unit, avoiding light crosstalk between adjacent pixels. At the same time, it has a reflection enhancement effect on excitation light and conversion light, improving light extraction efficiency and display contrast. In addition, the integrated wafer adopts a one-piece integrated form, and can be obtained as an independent MIP display device by subsequent dicing and separation. There is no need to perform massive transfer operations on the three RGB chips separately, reducing the number of transfers and alignment accuracy requirements, reducing the difficulty of the packaging process and the risk of fragmentation, thereby reducing packaging costs and improving packaging efficiency.

[0092] It should be noted that the present invention is illustrated through the above embodiments, but the present invention is not limited to the above process steps, that is, it does not mean that the present invention must rely on the above process steps to be implemented. Those skilled in the art should understand that any improvements to the present invention, equivalent substitutions of the raw materials used in the present invention, additions of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

Claims

1. A MIP display device integrated wafer, characterized in that, The MIP display device integrated wafer includes: A blue LED chip array, comprising a plurality of blue LED chip units arranged in an array; an electrical isolation trench is provided between adjacent blue LED chip units, the electrical isolation trench being filled with an insulating layer; each blue LED chip unit is provided with an independent P electrode and an N electrode; A silicon-based isolation reflective layer is disposed on the non-electrode side of the blue LED chip array, including a plurality of arrayed reflective isolation walls. The projection of the reflective isolation walls on the blue LED chip unit is located in the area where the electrical isolation groove is located. Adjacent reflective isolation walls enclose a reflective cavity, and the cavity wall of the reflective cavity is provided with a light-emitting material or a transparent material, which is used to form an RGB pixel unit with the corresponding blue LED chip unit. A lead connection layer is disposed on the electrode side of the blue LED chip array, and is used to lead out the P electrode and N electrode of the blue LED chip unit to a preset pad position.

2. The MIP display device integrated wafer according to claim 1, characterized in that, The light-emitting material of the blue LED chip unit is InGaN multiple quantum well; And / or, the thickness of the blue LED chip array is 8~10μm; And / or, the insulating layer is made of polyimide; And / or, the width of the electrical isolation groove in the first direction is 80~100μm, and the first direction is perpendicular to the thickness direction of the blue LED chip array.

3. The MIP display device integrated wafer according to claim 1 or 2, characterized in that, The silicon-based insulating reflective layer is made of monocrystalline silicon; And / or, the width of the reflective barrier in the first direction is less than the width of the corresponding insulating layer in the first direction, and the first direction is perpendicular to the thickness direction of the blue LED chip array; And / or, the height of the reflective barrier is 15~20μm, and the height of the reflective barrier is parallel to the thickness direction of the blue LED chip array; And / or, the luminescent material includes quantum dot luminescent materials or phosphors; And / or, the transparent material includes transparent silicone and / or epoxy adhesive.

4. The MIP display device integrated wafer according to any one of claims 1-3, characterized in that, In the blue LED chip array, three adjacent blue LED chip units in any column form a group, and together with the corresponding reflective isolation wall, they form an RGB pixel unit, denoted as a type I RGB pixel unit. Alternatively, in the blue LED chip array, four blue LED chip units arranged in two rows and two columns form a group, which together with the corresponding reflective isolation wall constitute an RGB pixel unit, denoted as a Type II RGB pixel unit.

5. The MIP display device integrated wafer according to claim 4, characterized in that, In the type I RGB pixel unit, according to the order of the blue LED chip units, the cavity walls of each reflective cavity are respectively provided with red light-emitting material, green light-emitting material and transparent material; In the type I RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad. Alternatively, in the type II RGB pixel unit, the walls of the reflective cavities of the blue LED chip units in the first row from left to right are respectively provided with red light-emitting material and green light-emitting material, and the walls of the reflective cavities of the blue LED chip units in the second row from left to right are respectively provided with green light-emitting material and transparent material. In the type II RGB pixel unit, the P electrode of each blue LED chip unit is independently connected to its corresponding independent pad, and the N electrode of each blue LED chip unit is connected to the same common pad.

6. A method for fabricating an integrated wafer for a MIP display device as described in any one of claims 1-5, characterized in that, The preparation method includes the following steps: Provide silicon substrates; A blue light-emitting layer is epitaxially grown on the silicon substrate; The blue light-emitting layer is patterned and etched to form several blue LED chip units arranged in an array. Then, P electrodes and N electrodes are deposited on the surface of each blue LED chip unit to obtain a semi-finished product. An insulating layer is prepared on the electrode side surface of the semi-finished product, the insulating layer covering the blue LED chip unit and filling the electrical isolation groove between adjacent blue LED chip units; The insulating layer is patterned to expose the P and N electrodes of the blue LED chip unit, and the P and N electrodes of the blue LED chip unit are led out to preset pad positions through the lead connection layer. The silicon substrate is post-processed to form a silicon-based isolation reflective layer; the silicon-based isolation reflective layer includes a plurality of reflective isolation walls arranged in an array, and the projection of the reflective isolation walls on the blue LED chip unit array is located in the region where the electrical isolation trench is located; A luminescent or transparent material is coated on the cavity wall of the reflective cavity formed by the adjacent reflective isolation walls to form an RGB pixel unit with the corresponding blue LED chip unit.

7. The preparation method according to claim 6, characterized in that, The epitaxial growth method of the blue luminescent layer includes MOCVD; And / or, the patterning etching method includes dry etching; And / or, the method for preparing the insulating layer includes any one or a combination of at least two of the following: spraying, spin coating, dispensing, or inkjet printing; And / or, the patterning process includes sequential photolithography and etching processes; And / or, the post-processing includes a thinning process and etching performed sequentially.

8. The preparation method according to claim 7, characterized in that, The etching step includes: A mask layer is prepared on the thinned surface of a silicon substrate, and a protective layer is prepared on the side of the silicon substrate opposite to the thinned surface. The mask layer is patterned to expose a specific area of ​​the silicon substrate, and then etched to form several arrayed reflective isolation walls. Remove the remaining mask and protective layers.

9. A MIP display device, characterized in that, The MIP display device is obtained by green laser cutting and separating the MIP display device integrated wafer according to any one of claims 1-5.

10. An RGB full-color display screen, characterized in that, The RGB full-color display screen includes the MIP display device as described in claim 9.

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