Heat dissipation structure and semiconductor package structure

CN122910044APending Publication Date: 2026-10-13NINGBO S J ELECTRONICS CO LTD
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Patent Information

Application Number
CN202610829989.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-09
Publication Date
2026-10-13

AI Technical Summary

Technical Problem

[0004]但是,导热层与散热盖的界面稳定性差,易导致散热盖与导热层分离,降低了半导体封装结构的散热性能

Benefits of technology

[0021]本申请实施例的第二方面提供一种半导体封装结构,其包括:

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Abstract

The application provides a heat dissipation structure and a semiconductor packaging structure, the heat dissipation structure comprising a heat dissipation base body, a heat conduction structure arranged on at least one side of the heat dissipation base body in the thickness direction, the heat conduction structure comprising an interface modification layer and a heat conduction material layer, the interface modification layer comprising at least a metal oxide layer with a nano-pore structure; the heat conduction material layer is arranged on the side of the interface modification layer away from the heat dissipation base body, and at least part of the heat conduction material layer is filled in the nano-pore structure. The application can improve the interface wetting, adhesion and mechanical locking capacity through the interface modification layer, thereby improving the interface stability of the heat dissipation base body and the heat conduction material layer.
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Description

Technical Field

[0001] This application relates to the field of heat dissipation technology, and in particular to a heat dissipation structure and a semiconductor packaging structure. Background Technology

[0002] As semiconductor packaging structures develop towards higher integration and higher power, the heat dissipation of semiconductor packaging structures during operation increases dramatically. High heat flux density heat dissipation has become a constraint on the performance release, operational stability and service life of high-end semiconductor packaging structures.

[0003] In related technologies, heat dissipation structures are typically used to dissipate heat from semiconductor packaging structures. These heat dissipation structures usually include a heat sink and a thermally conductive layer disposed on one side of the heat sink. The thermally conductive layer is used to quickly conduct the heat generated by the semiconductor packaging structure to the peripheral cooling structure.

[0004] However, the poor interface stability between the thermal conductive layer and the heat sink can easily lead to separation between the heat sink and the thermal conductive layer, reducing the heat dissipation performance of the semiconductor packaging structure. Summary of the Invention

[0005] In view of the above problems, embodiments of this application provide a heat dissipation structure and a semiconductor packaging structure that can improve the interface stability of the thermally conductive material layer and the heat dissipation substrate.

[0006] To achieve the above objectives, the embodiments of this application provide the following technical solutions:

[0007] A first aspect of this application provides a heat dissipation structure, which includes:

[0008] Heat dissipation substrate;

[0009] A heat-conducting structure is disposed on at least one side of the heat dissipation substrate in the thickness direction; the heat-conducting structure includes:

[0010] An interface modification layer, wherein the interface modification layer comprises at least a metal oxide layer having a nanoporous structure;

[0011] A thermally conductive material layer is disposed on the side of the interface modification layer away from the heat dissipation substrate, and at least a portion of the thermally conductive material layer is filled within the nanoporous structure.

[0012] In one possible implementation, the nanoporous structure comprises a plurality of nanounits, the plurality of nanounits comprising at least one of tubular structures and microporous structures.

[0013] In one possible implementation, the plurality of nanounits includes a plurality of tubular structures and a plurality of microporous structures;

[0014] On a surface parallel to the interface modification layer, the plurality of tubular structures are located on at least one side of the plurality of microporous structures.

[0015] In one possible implementation, the plurality of tubular structures are arranged in a honeycomb array; and / or, the plurality of microporous structures are arranged in a honeycomb array.

[0016] In one possible implementation, the pore size of the tubular structure decreases along the direction from the interface modification layer toward the heat dissipation substrate.

[0017] In one possible implementation, the depth of the tubular structure is greater than or equal to 100 nm and less than or equal to 2000 nm in the direction perpendicular to the interface modification layer; and / or the pore size of the tubular structure is greater than or equal to 20 nm and less than or equal to 100 nm.

[0018] In one possible implementation, the interface modification layer further includes a metal layer disposed between the heat dissipation substrate and the metal oxide layer, wherein the metal layer and the metal oxide layer have the same metal element.

[0019] In one possible implementation, the thickness of the metal layer is greater than or equal to 0.1 μm and less than or equal to 5 μm.

[0020] In one possible implementation, there are two thermally conductive structures, which are placed on opposite sides of the thickness direction of the heat dissipation substrate; one of the thermally conductive structures is used to connect to the peripheral cooling structure, and the other thermally conductive structure is used to connect to the semiconductor device.

[0021] A second aspect of this application provides a semiconductor packaging structure, comprising:

[0022] Semiconductor devices;

[0023] The heat dissipation structure described in the first aspect is connected to the semiconductor device.

[0024] In the heat dissipation structure and semiconductor packaging structure provided in this application embodiment, by introducing a metal oxide layer with a nanoporous structure between the heat dissipation substrate and the thermally conductive material layer, the thermally conductive interface material forms a more complete filling and interlocking relationship at the contact interface, thereby improving the interface contact state, enhancing interface continuity and stability, reducing interface thermal resistance, and improving the heat dissipation structure's anti-delamination, anti-pumping, and long-term service reliability under thermal cycling conditions.

[0025] In addition to the technical problems solved by the embodiments of this application, the technical features constituting the technical solutions, and the beneficial effects brought about by the technical features of these technical solutions described above, other technical problems that can be solved by the heat dissipation structure and semiconductor packaging structure provided by the embodiments of this application, other technical features included in the technical solutions, and the beneficial effects brought about by these technical features will be further explained in detail in the specific implementation. Attached Figure Description

[0026] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0027] Figure 1 This is a schematic diagram of the heat dissipation structure provided in the embodiments of this application;

[0028] Figure 2 For along Figure 1 A cross-sectional view along the AA direction;

[0029] Figure 3 This is a schematic diagram of the semiconductor packaging structure according to an embodiment of this application.

[0030] Figure label:

[0031] 1000: Semiconductor packaging structure;

[0032] 100: Heat dissipation structure;

[0033] 110: Heat dissipation substrate; 111: Heat dissipation cavity; 120: Thermally conductive structure; 121: Interface modification layer; 1211: Metal oxide layer; 1212: Metal layer; 122: Thermally conductive material layer;

[0034] 200: Semiconductor device; 210: Packaging substrate; 220: Chip; 230: Solder ball;

[0035] 300: External cooling structure.

[0036] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0037] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0038] As described in the background art, the inventors have discovered that the poor interfacial stability between the thermally conductive layer and the heat sink in related technologies is due to the fact that the thermally conductive layer is typically made of polymeric thermal interface materials, including silicone-based thermal greases, gels, gaskets, and phase change materials. However, insufficient wettability between the heat sink and the polymer-based thermal interface material can lead to incomplete spreading, void formation, and uneven bonding layer thickness. These problems can further cause a decline in thermal performance and long-term reliability issues such as thermal material pumping out, delamination, or interface separation during thermal cycling.

[0039] To improve the wettability between the heat sink and the thermally conductive layer, related technologies employ surface roughening, plasma treatment, or the use of primers. However, these methods offer only limited and inconsistent improvements and fail to effectively address the interfacial interactions between the integrated heat sink surface and the polymer-based thermally conductive interface material.

[0040] To address the aforementioned technical problems, this application provides a heat dissipation structure and a semiconductor packaging structure. The heat dissipation structure includes a heat dissipation substrate and a thermally conductive structure disposed on at least one side of the heat dissipation substrate along its thickness direction. The thermally conductive structure includes an interface modification layer disposed on at least one side of the heat dissipation substrate and a thermally conductive material layer disposed on the side of the interface modification layer facing away from the heat dissipation substrate. The interface modification layer includes at least a metal oxide layer with a nanoporous structure, and the thermally conductive material layer is at least partially filled within the nanoporous structure. By introducing a metal oxide layer with a nanoporous structure between the heat dissipation substrate and the thermally conductive material layer, the thermally conductive interface material forms a more complete filling and interlocking relationship at the contact interface, thereby improving the interface contact state, enhancing interface continuity and stability, reducing interface thermal resistance, and improving the heat dissipation structure's resistance to delamination, pump-out, and long-term service reliability under thermal cycling conditions.

[0041] To make the above-mentioned objectives, features, and advantages of the embodiments of this application more apparent and understandable, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0042] like Figure 1 and Figure 2 As shown in the illustration, this application provides a heat dissipation structure 100, which is used to dissipate heat from a device to be cooled, thereby reducing the temperature of the device and improving its performance. The device to be cooled may include a semiconductor device (such as a chip) or other structures.

[0043] The heat dissipation structure 100 includes a heat dissipation substrate 110 and a heat-conducting structure 120. The heat dissipation substrate 110 is a main heat-conducting component used to bear heat input and diffuse and transfer heat outward. The heat dissipation substrate 110 is typically in contact with the device to be cooled and transfers the absorbed heat to the cooling structure of the peripheral device. The heat dissipation substrate 110 may include a plate-shaped substrate or a shell-shaped substrate. In some embodiments, the heat dissipation substrate 110 has a heat dissipation cavity 111 and an opening communicating with the heat dissipation cavity 111. The heat dissipation cavity 111 is used to accommodate the device to be cooled, while the opening facilitates the assembly of the device to be cooled into the heat dissipation cavity 111 and allows air circulation inside the heat dissipation cavity 111, preventing heat accumulation in a sealed cavity and ensuring ventilation of the working environment of the device to be cooled.

[0044] The heat dissipation substrate 110 is typically made of a metal material with high heat dissipation performance, such as copper, copper alloy, aluminum, aluminum alloy or other high thermal conductivity metal materials.

[0045] A thermally conductive structure 120 is disposed on at least one side of the heat dissipation substrate 110 along its thickness direction. The thermally conductive structure 120 includes an interface modification layer 121 and a thermally conductive material layer 122. The interface modification layer 121 includes at least a metal oxide layer 1211 with a nanoporous structure, and the thermally conductive material layer 122 is at least partially filled within the nanoporous structure. The interface modification layer 121 is disposed between the heat dissipation substrate 110 and the thermally conductive material layer 122 to adjust the surface energy of the heat dissipation substrate 110, improve wettability, and provide a micro / nano-scale mechanical interlocking interface. For example, the surface of the nanoporous structure can exhibit hydrophilic properties, thereby helping to improve the wettability of the thermally conductive material layer. These properties, combined with the nanoscale morphology of the nanoporous structure surface, can promote capillary-driven spreading and penetration of the thermally conductive material layer, enabling the thermally conductive material layer 122 to form capillary adsorption and anchoring constraints. This allows the subsequent thermally conductive material layer 122 to spread, penetrate, and adhere more stably, thereby inhibiting interfacial migration and peeling under thermal cycling conditions, improving interfacial contact, and enhancing long-term stability.

[0046] It should be noted that the nanoporous structure of the metal oxide layer 1211 can be formed by anodic oxidation, electrochemical oxidation, or other suitable surface modification processes. The metal oxide layer can be a titanium oxide layer (TiO2), an aluminum oxide layer (Al2O3), a tantalum oxide layer (Ta2O5), or other metal oxide layers capable of forming nanoporous structures.

[0047] At least a portion of the thermally conductive material layer 122 is filled within the nanoporous structure. In other words, the thermally conductive material layer 122 can be completely filled within the nanoporous structure, or it can be partially filled within the nanoporous structure, with the remainder covering the top surface of the interface modification layer 121. During the fabrication of the heat dissipation structure 100, the material is brought into contact with the interface modification layer 121 by coating, attaching, pressing, or injection, and enters the interior of the nanoporous structure under the influence of pressure, temperature, or the material's own rheological properties, thereby forming a composite interface where pore filling and surface coverage coexist.

[0048] The thermally conductive material layer 122 includes any one of silicon-based thermal grease, gel, gasket, or phase change material. Furthermore, the thermally conductive material layer 122 may be filled with particulate thermally conductive fillers, which may include, but are not limited to, alumina, boron nitride, or metal-coated particles.

[0049] This embodiment of the application provides an interface modification layer 121 between the thermally conductive material layer 122 and the heat dissipation substrate 110. Utilizing the nanoporous structure of the interface modification layer 121, capillary adsorption and mechanical anchoring can be formed on the thermally conductive material layer 122, making it less prone to lateral migration, pumping out, or edge accumulation under thermal cycling, vibration, or long-term compression conditions, thereby maintaining a relatively stable interface thickness distribution. This ensures that the heat dissipation structure 100 maintains relatively stable heat transfer performance and mitigates the risk of hotspot heating and thermal runaway caused by interface degradation, making it suitable for long-term heat dissipation applications in high-power-density semiconductor devices.

[0050] It should be noted that the number of heat-conducting structures 120 can be one or two. In some embodiments, the number of heat-conducting structures 120 is one, which can be disposed on one side of the heat dissipation substrate 110. In other embodiments, the number of heat-conducting structures 120 is two, one heat-conducting structure 120 is disposed on one side of the heat dissipation substrate 110, and the other heat-conducting structure 120 is disposed on the other side of the heat dissipation substrate 110. In this way, one heat-conducting structure 120 is connected to the component to be cooled (such as a semiconductor device), and the other heat-conducting structure 120 is connected to the peripheral cooling structure 300. Thus, the side facing the component to be cooled constitutes the heat input end, and the side facing the peripheral cooling structure constitutes the heat output end, thereby forming a through-type heat conduction path in the thickness direction of the heat dissipation substrate. It should be noted that the peripheral cooling structure may include a heat sink or a liquid cooling plate.

[0051] When there are two heat-conducting structures 120, the heat generated by the component to be cooled (such as a semiconductor device) during operation first enters the heat dissipation substrate through the adjacent heat-conducting structure. Because a continuous and low-thermal-resistance contact interface is formed between this heat-conducting structure and the component to be cooled (such as the semiconductor device), the heat can diffuse relatively evenly into the interior of the heat dissipation substrate. Subsequently, the heat is conducted along the thickness and planar directions within the heat dissipation substrate to the other heat-conducting structure, and then rapidly diffuses to the external cooling structure through this structure. Since the two heat-conducting structures 120 respectively serve as interfaces for heat input and heat output, the heat dissipation substrate can form a double-ended heat flow channel in the thickness direction, preventing heat from remaining long distances at a single interface, thereby reducing the possibility of localized heat accumulation and improving heat transfer efficiency.

[0052] In one possible implementation, the nanoporous structure comprises multiple nanounits, which include at least one of tubular structures and microporous structures. Tubular structures can refer to nanopores or blind pores formed approximately along the thickness direction of the interface-modified layer, and these pores or blind pores can be straight pores, oblique pores, or stepped pores. Microporous structures refer to nanopores, point-like open pores, sponge-like pores, or interconnected pore networks distributed on the surface of the metal oxide layer.

[0053] The nanoporous structure of the modified layer can provide the thermally conductive material layer with a penetration path, liquid storage space and capillary adsorption channel, so that the thermally conductive material layer can enter the interior of the metal oxide layer more fully and form mechanical interlocking during assembly and pressing, thereby reducing interface voids, improving contact continuity and suppressing pumping out and delamination in subsequent thermal cycles.

[0054] In this embodiment, all of the multiple nanounits can be either tubular or microporous structures. Some of the multiple nanounits are tubular structures, and some are microporous structures. In one possible implementation, the multiple nanounits include multiple tubular structures and multiple microporous structures; on the surface parallel to the interface modification layer, the multiple tubular structures are located on at least one side of the multiple microporous structures. In other words, along the direction perpendicular to the thickness of the interface modification layer, the multiple tubular structures are located on at least one side of the multiple microporous structures.

[0055] Alternatively, the interface modification layer includes a first region and a second region arranged adjacent to each other. The multiple nanounits located in the first region can be tubular structures, and the multiple nanounits located in the second region can be microporous structures. In this way, the tubular structure facilitates the early entry of the thermally conductive material layer and the formation of continuous thermal conductive channels, while the microporous structure further improves the interface anchoring ability and further enhances the interface stability between the thermally conductive material layer and the heat dissipation substrate.

[0056] It should be noted that whether the metal oxide layer 1211 is in direct or indirect contact with the heat dissipation substrate 110 can be freely set according to its material and the material of the heat dissipation substrate 110.

[0057] In one possible implementation, the interface modification layer 121 further includes a metal layer 1212, which is disposed between the heat dissipation substrate 110 and the metal oxide layer 211. The metal layer 1212 and the metal oxide layer 1211 have the same metal element. The metal layer 1212 can create a continuous metal source and bonding base between the heat dissipation substrate 110 and the upper metal oxide layer 1211, thereby enhancing the adhesion strength between the metal oxide layer 1211 and the heat dissipation substrate 110. This allows the metal oxide layer 1211 to bond more stably to the substrate surface. At the same time, the same elemental metal system reduces the stress concentration caused by chemical incompatibility and thermal expansion mismatch at the interface, thereby reducing the risk of cracking, warping, or peeling of the metal oxide layer 1211 under thermal cycling or mechanical loading.

[0058] The thickness of the metal layer 1212 is greater than or equal to 0.1 μm and less than or equal to 5 μm. This allows for continuous coverage on the surface of the heat dissipation substrate 110, reducing localized exposure, island-like growth, or film fracture, thus providing a uniform reaction substrate for the subsequent formation of the metal oxide layer and enhancing the interfacial bonding strength with the heat dissipation substrate 110. It also prevents excessive residual stress accumulation during thermal cycling due to an excessively thick metal layer 1212, while reducing the additional obstruction of the metal layer 1212 to the overall heat flow path, avoiding weakening the low thermal resistance characteristics of the modified layer 121 due to an excessively thick metal layer 1212.

[0059] The following embodiments will take titanium as an example to describe in detail the preparation process of the interface modification layer 121, which includes the following stages.

[0060] First stage: A metal layer 1212 (such as a titanium layer) of a certain thickness can be formed on the top surface of the heat dissipation substrate 110 by deposition or sputtering processes.

[0061] Second stage: Formation of metal oxide layer 1211.

[0062] A 1212 metal layer (such as a titanium layer) serves as the anode; a platinum / graphite / stainless steel sheet is placed in parallel, and an oxidation process is performed for less than or equal to 10 seconds. Upon application of voltage, the surface of the titanium layer immediately oxidizes: Ti → Ti 4+ +4e - Ti 4+ +2H₂O→TiO₂+4H + This allows for the rapid formation of dense, amorphous TiO₂ layers (10nm–50nm) on the titanium surface. 2The passivation film increases resistance and decreases current, preventing further rapid corrosion of titanium.

[0063] The third stage: the emergence of microporous structures and the nucleation of nanotubular structures (10–60 s).

[0064] F⁻ in the electrolyte diffuses to the TiO₂ surface and reacts with Ti 4+ Formation of soluble [TiF6] 2- Local dissolution of passivation film, TiO2 + 6F - +4H + →[TiF6] 2- +2H2O concentrates the electric field at surface defects (scratches, grain boundaries), preferentially dissolving to form nanoscale micropores (10nm–30nm).

[0065] Titanium continues to oxidize at the bottom of the micropores, F - With continuous etching, the microporous structure extends deeper, forming the prototype of a nanotube structure.

[0066] Fourth stage: Directional growth and formation of ordered array (5–60 min).

[0067] Driven by an electric field, TiO2 is continuously generated at the bottom of the tube, while the tube wall is coated with F. - Uniform etching is used to grow nanotubes perpendicular to the titanium surface in a directional manner to form a nanotube-like structure. The nanotube-like structure has a uniform pore size (20nm–100nm) and a controllable depth (100nm–2000nm).

[0068] Among these, precise control of voltage, time, and F can be achieved. - The concentration parameter is adjusted to achieve tunable pore size and depth of the nanotube structure. For example, the pore size and depth of the nanotube structure increase with increasing voltage. The depth of the nanotube structure increases with time, and the pore size of the nanotube structure increases with increasing voltage. - It increases with increasing concentration.

[0069] The arrangement of multiple nanotube structures can be achieved by adjusting the magnitude of the current; for example, the current is stabilized at 10–50 mA / cm. 2 The nanotube structures form an ordered honeycomb array.

[0070] It should be noted that when multiple nanounits include multiple tubular structures and multiple microporous structures, after performing the first stage, a first mask layer can be formed on the metal layer 1212. The first mask layer can expose the first region and shield the second region. Subsequently, the second, third, and fourth stages are performed to form nanotubular structures within the first region.

[0071] Next, the first mask layer is removed, and a second mask layer is reformed. The second mask layer exposes the second region and blocks the first region. Then, the second and third stages are performed, forming only nanoscale micropores (10nm–30nm).

[0072] In one possible implementation, multiple tubular structures are arranged in a honeycomb array; and / or, multiple microporous structures are arranged in a honeycomb array.

[0073] In this embodiment, the honeycomb array arrangement refers to a structural form in which multiple tubular structures or multiple microporous structures are regularly arranged in hexagonal, quasi-hexagonal, or equivalent periodic units in the interface modification layer. This regularized distribution improves the effective specific surface area and pore connectivity per unit area, allowing the thermally conductive material layer to enter and fill along the uniformly distributed pores during laying or pressing, thereby reducing interfacial thermal resistance fluctuations caused by localized accumulation, residual voids, and uneven thickness. Furthermore, the honeycomb array is typically formed on the surface or near-surface region of the interface modification layer and is adjacent to the surface of the heat dissipation substrate. Under pressure, the thermally conductive material layer contacts the array and partially embeds itself within each nanounit, forming an interface state where mechanical interlocking and thermal contact coexist.

[0074] It should be noted that when the nanounit is a tubular structure, the tubular structure can be a hexagonal columnar pore, a honeycomb-like interconnected pore, or an open tubular cavity. Among them, along the direction from the interface modification layer 121 to the heat dissipation substrate 110, the pore size of the tubular structure can be equal everywhere, or it can have other forms.

[0075] In one possible implementation, the pore size of the tubular structure decreases along the direction from the interface modification layer toward the heat dissipation substrate.

[0076] Alternatively, along the thickness direction, the tubular structure gradually contracts from the side closer to the thermally conductive material layer towards the side closer to the heat dissipation substrate, making its inlet diameter larger than its inner or bottom diameter, thus forming a capillary channel with a gradient diameter characteristic. It should be noted that the decreasing trend can be understood as a gradual decrease, or it can be understood as decreasing first, then increasing, and then decreasing again.

[0077] In this way, the larger inlet provides a permeable and retainable micro-nano space for the thermally conductive material layer 122. At the same time, the gradually decreasing pore size geometry can generate an outside-in capillary attraction on the fluid or semi-fluid phase thermally conductive material during the coating, pressing, or melt-bonding process of the thermally conductive material layer. This causes the thermally conductive material to preferentially enter the larger pore size region and continue to fill inward along the contraction channel. As a result, the thermally conductive material layer 122 and the pores of the tubular structure form a more stable interlocking and anchoring relationship, thereby improving the connection strength between the thermally conductive material layer 122 and the modified layer 121.

[0078] In one possible implementation, the depth of the tubular structure is greater than or equal to 100 nm and less than or equal to 2000 nm in the direction perpendicular to the interface modification layer; and / or, the pore size of the tubular structure is greater than or equal to 20 nm and less than or equal to 100 nm.

[0079] In the embodiments of this application, the depth of the tubular structure is 100nm, 200nm, 500nm, 1000nm, 1500mm, 2000nm, and the range enclosed by two values. Since the depth of the tubular structure is limited to between 100nm and 2000nm, the thermally conductive material layer can obtain sufficient embedding length to form a stable anchor, without causing difficulties in effective filling or instability of the hole wall due to excessively deep channels.

[0080] Furthermore, the pore size of the tubular structure is greater than or equal to 20 nm and less than or equal to 100 nm. For example, the pore size of the tubular structure is 20 nm, 40 nm, 50 nm, 60 nm, 80 nm, 100 nm, or a range encompassed by both values. This configuration matches the tube diameter to the flow scale of the filler particles and resin segments in the thermally conductive material layer, which facilitates material penetration to form a continuous interface and inhibits material migration and pumping out along the interface during thermal expansion and contraction cycles.

[0081] When the aperture and depth of the tubular structure are controlled simultaneously, a larger actual contact area and a more stable interface bonding state can be formed between the thermally conductive material layer and the interface modification layer. When the heat flow is transferred from the heat dissipation substrate to the thermally conductive material layer, the gap thermal resistance and the risk of interface debonding can be reduced, thereby improving the thermal conductivity stability and service reliability of the heat dissipation structure under long-term thermal cycling and mechanical disturbance conditions.

[0082] like Figure 3 As shown, this application provides a semiconductor packaging structure 1000, including:

[0083] Semiconductor device 200. Semiconductor device 200 includes a packaging substrate 210 and a chip 220 disposed on the packaging substrate 210. The chip 220 is electrically connected to the wiring layer of the packaging substrate 210 through solder balls 230.

[0084] The heat dissipation structure 100 provided in any of the above embodiments is connected to the semiconductor device 200. The heat dissipation structure 100 is connected to the packaging substrate 210, and the chip 220 is located inside the heat dissipation cavity 111 of the heat dissipation structure 100. An insulating material is disposed between the chip 220 and the inner wall of the heat dissipation cavity 111, such as a molding compound.

[0085] In this embodiment, the heat dissipation structure 100 includes two heat-conducting structures 120, which are respectively disposed on both sides of the heat dissipation substrate 110. One heat-conducting structure 120 of the heat dissipation structure 100 is in contact with the chip 220, and the other heat-conducting structure 120 of the heat dissipation structure 100 is in contact with the peripheral cooling structure 300.

[0086] In this way, the heat generated by the semiconductor device 200 during operation can be transferred to the heat dissipation substrate through one of the thermally conductive structures 120, and then dissipated to the external cooling structure 300 through the other thermally conductive structure 120. Since the interface modification layer 121 of the thermally conductive structure 120 includes at least a metal oxide layer with a nanoporous structure, and the thermally conductive material layer 122 is at least partially filled within the nanoporous structure, a more thorough wetting, filling, and mechanical interlocking relationship is formed between the heat dissipation substrate and the thermally conductive material layer. This increases the actual contact area and improves contact continuity, thereby reducing the interfacial thermal resistance between the semiconductor device 200 and the heat dissipation structure 100, and between the heat dissipation structure 100 and the external cooling structure 300. Simultaneously, under high heat flux density, long-term full load, and thermal cycling conditions, this packaging structure can suppress pumping out, delamination, and localized failure of the thermally conductive material layer, thereby improving the packaging heat dissipation stability, reliability, and semiconductor device operating performance.

[0087] The various embodiments or implementation methods described in this specification are presented in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0088] It should be noted that the terms "one embodiment," "embodiment," "exemplary embodiment," "some embodiments," etc., mentioned in the specification indicate that the described embodiments may include specific features, structures, or characteristics, but not every embodiment necessarily includes that specific feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not, is within the knowledge scope of those skilled in the art.

[0089] Generally speaking, terms should be understood at least in part by their use in context. For example, at least in part by context, the term "one or more" as used in the text can be used to describe any feature, structure, or characteristic of the singular meaning, or a combination of features, structures, or characteristics of the plural meaning. Similarly, at least in part by context, terms such as "one" or "describe" can also be understood to convey either singular or plural usage.

[0090] It should be readily understood that the terms “on,” “above,” and “on top of” in this application should be interpreted in the broadest possible sense, such that “on” means not only “directly on something” but also “on something” with an intermediate feature or layer therebetween, and that “above” or “on top of” means not only “on something” but also “on something” without an intermediate feature or layer therebetween (i.e., directly on something).

[0091] Furthermore, for ease of explanation, spatially relative terms such as "below," "below," "under," "above," and "above" may be used to describe the relationship of one element or feature relative to other elements or features as shown in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation other than those shown in the figures. The device may have other orientations (rotated 90° or in other orientations), and the spatially relative descriptive terms used herein may be interpreted accordingly.

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A heat dissipation structure, characterized in that, include: Heat dissipation substrate; A thermally conductive structure is disposed on at least one side of the heat dissipation substrate in the thickness direction; The thermally conductive structure includes: An interface modification layer, wherein the interface modification layer comprises at least a metal oxide layer having a nanoporous structure; A thermally conductive material layer is disposed on the side of the interface modification layer away from the heat dissipation substrate, and at least a portion of the thermally conductive material layer is filled within the nanoporous structure.

2. The heat dissipation structure according to claim 1, characterized in that, The nanoporous structure comprises multiple nanounits, and the multiple nanounits include at least one of tubular structure and microporous structure.

3. The heat dissipation structure according to claim 2, characterized in that, The plurality of nanounits includes a plurality of tubular structures and a plurality of microporous structures; On a surface parallel to the interface modification layer, the plurality of tubular structures are located on at least one side of the plurality of microporous structures.

4. The heat dissipation structure according to claim 3, characterized in that, The plurality of tubular structures are arranged in a honeycomb array; and / or, the plurality of microporous structures are arranged in a honeycomb array.

5. The heat dissipation structure according to claim 3 or 4, characterized in that, Along the direction from the interface modification layer toward the heat dissipation substrate, the pore size of the tubular structure tends to decrease.

6. The heat dissipation structure according to claim 5, characterized in that, In the direction perpendicular to the interface modification layer, the depth of the tubular structure is greater than or equal to 100 nm and less than or equal to 2000 nm; and / or, the pore size of the tubular structure is greater than or equal to 20 nm and less than or equal to 100 nm.

7. The heat dissipation structure according to any one of claims 1-4, characterized in that, The interface modification layer further includes a metal layer, which is disposed between the heat dissipation substrate and the metal oxide layer, and the metal elements of the metal layer and the metal oxide layer are the same.

8. The heat dissipation structure according to claim 7, characterized in that, The thickness of the metal layer is greater than or equal to 0.1 μm and less than or equal to 5 μm.

9. The heat dissipation structure according to any one of claims 1-4, characterized in that, The number of thermal conductive structures is two, and the two thermal conductive structures are placed on both sides of the thickness direction of the heat dissipation substrate; one of the thermal conductive structures is used to connect with the peripheral cooling structure, and the other thermal conductive structure is used to connect with the semiconductor device.

10. A semiconductor packaging structure, characterized in that, include: Semiconductor devices; The heat dissipation structure according to any one of claims 1-9, wherein the heat dissipation structure is connected to the semiconductor device.