A lead frame, a packaging structure and a power module
Patent Information
- Application Number
- CN202610988156.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-03
- Publication Date
- 2026-10-13
AI Technical Summary
然而,智能功率模块的布线较为复杂,通常PFC开关管的驱动电阻因布局原因与栅极距离较远,致使栅极回路寄生电感增大,进而易引发栅极电压振荡、误导通风险,并加剧电磁干扰
本发明提供了一种引线框架,将功率因数校正PFC功能与智能功率模块IPM逆变功能集成于同一封装载体,通过分区布局设计有效减小了PFC电流采样环路、IPM直流母线环路与电机三相输出线路间的交叉布线。该结构可压缩电流环路面积,削弱高噪声功率线路对敏感信号线路的容性耦合与感性耦合干扰,进而提升电流采样结果的稳定性,优化PFC控制精度;同时,通过匹配引脚与基岛的对应关系优化功率回路走线,可降低电磁辐射强度,改善产品的电磁兼容性能;此外,该集成结构还提升了系统集成度,为智能功率模块的小型化与高可靠性设计提供了支撑。
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Figure CN122910053A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of packaging technology, and in particular to a lead frame, packaging structure, and power module. Background Technology
[0002] Intelligent power modules integrate power switching devices with high-voltage drive circuits, and also incorporate fault detection circuits for overvoltage, overcurrent, and overheating. Currently, most variable frequency home appliances require intelligent power modules to have PFC functionality, and some even require multiple motor outputs. However, the wiring of intelligent power modules is relatively complex. Typically, the drive resistor of the PFC switching transistor is far from the gate due to layout considerations, leading to increased parasitic inductance in the gate circuit. This can easily cause gate voltage oscillations, false triggering risks, and exacerbate electromagnetic interference. Furthermore, the PFC current sampling loop, IPM DC bus loop, and the three-phase output power lines of the motor often have spatially intersecting wiring. This causes power switching noise with high dv / dt and di / dt characteristics to severely pollute the sensitive current sampling signal through capacitive and inductive coupling, resulting in inaccurate or even failed PFC control and reduced system reliability. Moreover, if the current loop area is too large, it is not only susceptible to external interference but also acts as a high-efficiency antenna, exacerbating electromagnetic radiation and making it difficult for the product to pass EMC certification. It is evident that existing technologies still need improvement and enhancement. Summary of the Invention
[0003] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a lead frame that effectively reduces the cross wiring between the PFC current sampling loop, the IPM DC bus loop and the motor three-phase output line by utilizing a partitioned layout.
[0004] To achieve the above objectives, the present invention adopts the following technical solution: A lead frame includes a frame body, which is divided into a first layout area, a second layout area, and a third layout area from right to left along its length. The first layout area contains a first base island unit for mounting a PFC power component. The frame body has a first pin unit located below the first base island unit and connected to it. The second layout area contains a second base island unit for mounting an IPM upper-bridge power component and a third base island unit for mounting an IPM lower-bridge power component. The second base island unit is located between the first and third base island units. The frame body has a second pin unit located below the second base island unit and connected to it. The frame body also has a third pin unit located below the third base island unit and connected to it. The third layout area is used for mounting an HVIC component, and the frame body has a fourth pin unit located below the third layout area.
[0005] In the lead frame, the first base island unit includes a first base island block and a second base island block; the second base island unit includes a third base island block; the first pin unit includes a PFC input pin and a negative voltage power supply pin; the second pin unit includes a positive voltage power supply pin; the second base island block is located below the first base island block, the negative voltage power supply pin is located below the first base island block and is connected to the first base island block, the third base island block is located between the first base island block and the third base island unit, the positive voltage power supply pin is located below the third base island block and is connected to the third base island block; the PFC input pin is located below the first base island block and is connected to the first base island block, and the negative voltage power supply pin is located to the left or right of the PFC input pin.
[0006] In the lead frame, the top of the third base island block extends towards the side closer to the third base island unit to form a first extension block, the first extension block being located above the third base island unit, and the bottom of the third base island block extends towards the positive voltage power supply pin to form a second extension block, the second extension block being connected to the positive voltage power supply pin.
[0007] In the lead frame, the third base island unit includes a fourth base island block, a fifth base island block, and a sixth base island block distributed from right to left along the length direction of the second layout area; the third pin unit includes a W-phase output pin, a V-phase output pin, and a U-phase output pin; the fourth base island block, the fifth base island block, and the sixth base island block are all located below the first extension block, the W-phase output pin is located below the fourth base island block and is connected to the fourth base island block, the V-phase output pin is located below the fifth base island block and is connected to the fifth base island block, and the U-phase output pin is located below the sixth base island block and is connected to the sixth base island block.
[0008] In the lead frame, the third base island unit further includes a seventh base island block; the third pin unit further includes a common emitter pin; the seventh base island block is located on the side of the sixth base island block away from the fifth base island block, the common emitter pin is located below the seventh base island block, and the common emitter pin is connected to the seventh base island block.
[0009] In the lead frame, the PFC power component includes a first PFC power section and a second PFC power section. The first extension block extends into the first layout area to form a third extension block. The first PFC power section is disposed on the third extension block, and the second PFC power section is disposed on the first base island block. The first PFC power section is connected to the second PFC power section through a first bonding line, and the second PFC power section is connected to the second base island block through a second bonding line.
[0010] In the lead frame, a first driving resistor R1 is provided on the side of the first base island block away from the third base island block in the first layout area, and the second PFC power unit is connected to the first driving resistor R1 through a third bonding wire.
[0011] In the aforementioned lead frame, the IPM upper bridge power assembly includes a W-phase upper bridge power unit, a V-phase upper bridge power unit, and a U-phase upper bridge power unit, which are distributed sequentially from right to left along the length direction of the first extension block.
[0012] In the aforementioned lead frame, the IPM downbridge power assembly includes a W-phase downbridge power unit, a V-phase downbridge power unit, and a U-phase downbridge power unit. The W-phase downbridge power unit is disposed on the fourth base island block, the V-phase downbridge power unit is disposed on the fifth base island block, and the U-phase downbridge power unit is disposed on the sixth base island block. The W-phase downbridge power unit, the V-phase downbridge power unit, and the U-phase downbridge power unit are respectively connected to the seventh base island block via a fourth binding wire.
[0013] In the lead frame, a second driving resistor R2 is provided in the second layout area on the side of the first extension block near the U-phase upper bridge power unit, and the U-phase upper bridge power unit is connected to the second driving resistor R2 through a fifth bonding wire.
[0014] In the lead frame, a third driving resistor R3 is provided in the second layout area on the side of the first extension block near the V-phase upper bridge power unit, and the V-phase upper bridge power unit is connected to the third driving resistor R3 through a sixth bonding wire.
[0015] In the lead frame, a fourth driving resistor R4 is provided in the second layout area on the side of the first extension block near the W-phase upper bridge power unit, and the W-phase upper bridge power unit is connected to the fourth driving resistor R4 through a seventh bonding wire.
[0016] In the lead frame, a fifth driving resistor R5 is provided next to the fourth base island block in the second layout area, and the U-phase lower bridge power unit is connected to the fifth driving resistor R5 through an eighth bonding wire.
[0017] In the lead frame, a sixth driving resistor R6 is provided next to the fifth base island block in the second layout area, and the V-phase lower bridge power unit is connected to the sixth driving resistor R6 through the ninth bonding wire.
[0018] In the lead frame, a seventh driving resistor R7 is provided next to the sixth base island block in the second layout area, and the W-phase lower bridge power unit is connected to the seventh driving resistor R7 through a tenth bonding wire.
[0019] In the aforementioned lead frame, the fourth pin unit includes HIN1, HIN2, HIN3, LIN1, LIN2, LIN3, PFCIN, FLT / EN, ITRIP, PFCTRIP, VDD, and VSS pins, which are distributed sequentially from right to left along the length of the third layout area and connected to the HVIC component. The third pin unit also includes VB1, VB2, and VB3 pins located beside the U-phase output pin, V-phase output pin, and W-phase output pin, respectively. The pins of the frame body, from right to left, are: PFC input pin, negative voltage supply pin, positive voltage supply pin, VDD pin, and VSS pin. The following pins are connected: B3, W-phase output, VB2, V-phase output, VB1, U-phase output, common emitter, HIN1, HIN2, HIN3, LIN1, LIN2, LIN3, PFCIN, FLT / EN, ITRIP, PFCTRIP, VDD, and VSS. The PFC input pins are used to connect the collector of the IGBT device in the PFC power component and the anode of the diode device. The negative voltage supply pin is used to connect the emitter of the IGBT device in the PFC power component. The positive voltage supply pin is used to input the bus voltage. The VB3 pin is used to connect the W-phase high voltage... The system includes a floating power supply for the high-side of phase V; the W-phase output pin is used to connect to the W-phase high-side floating power supply ground and output a drive signal to phase V; the VB2 pin is used to connect to the V-phase high-side floating power supply ground; the V-phase output pin is used to connect to the V-phase high-side floating power supply ground and output a drive signal to phase V; the VB1 pin is used to connect to the U-phase high-side floating power supply; the U-phase output pin is used to connect to the U-phase high-side floating power supply ground and output a drive signal to phase U; the common emitter pin is used to connect to the emitters of the IGBT devices in each phase of the IPM lower bridge power component; the HIN1 pin is used to connect to the U-phase upper bridge drive signal input; the HIN2 pin is used to connect to the V-phase upper bridge drive signal input; and the HIN3 pin is used for... The following pins are connected: LIN1 (for the upper bridge drive signal input of phase W); LIN2 (for the lower bridge drive signal input of phase U); LIN3 (for the lower bridge drive signal input of phase V); PFCIN (for the PFC drive signal input); FLT / EN (for outputting the FAULT signal and receiving the enable signal); ITRIP (for sampling the overcurrent protection voltage of the inverter section); PFCTRIP (for sampling the overcurrent protection voltage of the PFC circuit); VDD (for connecting the power supply of the HVIC component); and VSS (for connecting the power ground of the HVIC component).
[0020] This application also provides a packaging structure that includes the lead frame as described above.
[0021] This application also provides a power module that includes the lead frame described above.
[0022] Beneficial effects: This invention provides a lead frame that integrates power factor correction (PFC) functionality and intelligent power module (IPM) inverter functionality into a single package. Through a partitioned layout design, it effectively reduces cross-wiring between the PFC current sampling loop, the IPM DC bus loop, and the motor's three-phase output lines. This structure compresses the current loop area, weakens capacitive and inductive coupling interference from high-noise power lines to sensitive signal lines, thereby improving the stability of current sampling results and optimizing PFC control accuracy. Simultaneously, by optimizing the power loop routing through matching the pin-to-base island correspondence, it reduces electromagnetic radiation intensity and improves the product's electromagnetic compatibility performance. Furthermore, this integrated structure enhances system integration, providing support for the miniaturization and high-reliability design of intelligent power modules. Attached Figure Description
[0023] Figure 1 A schematic diagram of the overall structure of the lead frame provided by the present invention; Figure 2 A schematic diagram of the working state of the lead frame provided by the present invention; Figure 3 The circuit diagram of the lead frame provided by the present invention.
[0024] Key component symbols: 1-Frame body, 11-First layout area, 12-Second layout area, 13-Third layout area, 2-First base island unit, 21-First base island block, 22-Second base island block, 3-Second base island unit, 31-Third base island block, 4-Third base island unit, 41-Fourth base island block, 42-Fifth base island block, 43-Sixth base island block, 44-Seventh base island block, 5-PFC power component, 6-IPM upper bridge power component, 61-W phase upper bridge power unit, 62-V phase upper bridge power unit, 63-U phase upper bridge power unit, 7-IPM lower bridge power component, 71-W phase lower bridge power unit, 72-V phase lower bridge power unit, 73-U phase lower bridge power unit, 8-HVIC component, 9-PFC current sampling loop, 10-IPM DC bus loop. Detailed Implementation
[0025] This invention provides a lead frame, a packaging structure, and a power module. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only for explaining the invention and are not intended to limit the invention.
[0026] In the description of this invention, it should be understood that the terms "middle," "inner side," "outer side," etc., indicate the orientation or positional relationship of this invention based on the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.
[0027] Please see Figures 1 to 3 This invention provides a lead frame, comprising a frame body 1. The frame body 1 is divided into a first layout area 11, a second layout area 12, and a third layout area 13 along its length from right to left. The modular layout of the circuit functions is achieved through the physical location division of each area. The first layout area 11 mainly supports the PFC power component 5. A first base island unit 2 is disposed within this area. The first base island unit 2 serves as the carrier of the PFC power switching device and has a large surface area to facilitate heat dissipation. Below the first base island unit 2, the frame body 1 extends to form a first pin unit, which is directly connected to the first base island unit 2 for connecting to an external power supply and transmitting power current to subsequent circuits. By concentrating the PFC-related circuits on the far right of the frame, the path to the high-voltage input terminal can be effectively shortened, reducing line impedance.
[0028] The second layout area 12 is located to the left of the first layout area 11, and its interior is further divided into power mounting areas for the upper and lower bridge arms. The second base island unit 3 is located within the second layout area 12 and is used to mount the IPM upper bridge power component 6. Its position is between the first base island unit 2 and the third base island unit 4, serving to connect the high-voltage bus and the three-phase output. A second pin unit is correspondingly located below the second base island unit 3, connected to it, for providing high-voltage DC power supply. The third base island unit 4 is located to the left of the second layout area 12 and is used to mount the IPM lower bridge power component 7. A third pin unit is correspondingly located below it, connected to it, for drawing out the three-phase motor current. This method of separating the upper and lower bridge base islands spatially isolates the high-voltage area from the low-voltage output area, helping to optimize insulation withstand voltage performance.
[0029] The third layout area 13, located on the far left of the frame, is primarily used to mount the HVIC component 8. The HVIC component 8, as the control unit of the intelligent power module, is responsible for generating drive signals and handling protection functions. Below the third layout area 13 is a fourth pin unit, which provides the HVIC component 8 with operating power, logic control signal input, and fault feedback output. Placing the HVIC component 8 away from high-power switching noise sources can, to some extent, reduce the direct interference of high dv / dt and di / dt noise on sensitive control circuits.
[0030] In terms of operating principle, the externally input current first flows into the PFC power component 5 on the first base island unit 2 through the first pin unit for power factor correction. Then, the current is transmitted to the IPM upper bridge power component 6 on the second base island unit 3. Through the coordinated operation of the IPM upper bridge power component 6 and the IPM lower bridge power component 7 on the third base island unit 4, the current is converted into a three-phase AC output and finally delivered to the motor load through the third pin unit. The HVIC component 8 receives external commands through the fourth pin unit and sends drive signals to the upper and lower bridge power components respectively, realizing precise control of motor speed and torque.
[0031] Through the aforementioned layout design, this lead frame integrates PFC and IPM inverter functions onto a single platform. The partitioned layout effectively reduces cross-wiring between the PFC current sampling loop 9, the IPM DC bus loop 10, and the motor's three-phase output lines. This structure helps reduce the current loop area and decreases capacitive and inductive coupling between high-noise power lines and sensitive signal lines, thereby making current sampling results more reliable and improving the accuracy of PFC control. Simultaneously, the optimized pin-to-base island correspondence improves power loop routing, helps reduce electromagnetic radiation intensity, and improves the product's electromagnetic compatibility. Furthermore, this structure enhances system integration, providing a fundamental support for the miniaturization and high reliability of intelligent power modules.
[0032] like Figure 2 As shown, the PFC current sampling loop 9 is formed in the first layout area 11 on the right side of the lead frame, while the IPM DC bus loop 10 is formed in the second layout area 12 on the left side. It can be seen that there is no problem of cross wiring between the two loops, and the overall loop area is small, which reduces the capacitive and inductive coupling of high-noise power lines to sensitive signal lines, thereby making the current sampling results more reliable and improving the accuracy of PFC control.
[0033] Further, in one embodiment of the first base island unit 2 and the second base island unit 3, the first base island unit 2 includes a first base island block 21 and a second base island block 22, and the second base island unit 3 includes a third base island block 31. The first pin unit correspondingly includes a PFC input pin and a negative voltage supply pin; the second pin unit correspondingly includes a positive voltage supply pin. The second base island block 22 is located below the first base island block 21, and the negative voltage supply pin is located below and connected to the second base island block 22, thereby providing a reference potential for the PFC and subsequent upper-bridge power components. The third base island block 31 is located between the first base island block 21 and the third base island unit 4, and the positive voltage supply pin is located below and connected to the third base island block 31, used to provide high-voltage DC bus power. The PFC input pin is located below and connected to the first base island block 21, used to provide a PFC signal. The negative voltage supply pin is located to the left or right of the PFC input pin; regardless of the left-right order of the two pins, the current loop path of the PFC power component 5 will not be changed, and it will not intersect with the current loop paths of other components. This grouping design of the base island and pins optimizes the current path, reduces unnecessary winding, and helps to reduce line impedance and power loss.
[0034] In one embodiment, to reduce parasitic parameters in the gate circuit, a first driving resistor R1 is also provided in the first layout region 11. The first driving resistor R1 is arranged close to the PFC power component 5 and connected to the control terminal of the PFC power component 5 through a third bonding line, so as to shorten the gate driving path and reduce the equivalent inductance of the gate circuit, thereby mitigating the risk of gate voltage oscillation and false triggering to a certain extent. The PFC power component 5 is also connected to the first base island block 21 in the second layout region 12 through a second bonding line to realize the connection of the power return path.
[0035] Furthermore, in one embodiment of the third base island block 31, the top of the third base island block 31 extends towards the side closer to the third base island unit 4 to form a first extension block. The first extension block is suspended above the third base island unit 4, serving as a bridging and support function. Simultaneously, the bottom of the third base island block 31 extends towards the positive voltage power supply pin to form a second extension block, which is connected to the positive voltage power supply pin. This bidirectional extension design not only increases the structural strength of the base island but also effectively shortens the current path from the power supply pin to the power device, thus playing a positive role in improving power supply stability.
[0036] Furthermore, in one embodiment of the third base island unit 4, the third base island unit 4 includes a fourth base island block 41, a fifth base island block 42, and a sixth base island block 43 distributed from right to left along the length direction of the second layout area 12. Correspondingly, the third pin unit includes a W-phase output pin, a V-phase output pin, and a U-phase output pin. The fourth base island block 41, the fifth base island block 42, and the sixth base island block 43 are all located below the first extension block, and the W-phase output pin, V-phase output pin, and U-phase output pin are respectively located below and connected to the corresponding base island block. This one-to-one correspondence layout makes the power output paths of the W-phase, V-phase, and U-phase clear and independent, facilitating wiring control and reducing the possibility of inter-phase interference.
[0037] In another embodiment, the third base island unit 4 further includes a seventh base island block 44, and the third pin unit also correspondingly adds a common emitter pin. The seventh base island block 44 is located on the side of the sixth base island block 43 away from the fifth base island block 42, and the common emitter pin is located below and connected to the seventh base island block 44. This common emitter pin is used to bring out the emitter signal of the lower bridge power component, which facilitates current detection and feedback by the external control circuit, and helps to improve the response speed and accuracy of system control; and this pin configuration can effectively reduce the number of pins occupied. In the traditional pin configuration, each phase lower bridge power unit usually needs to be configured with an independent emitter input pin, and then short-circuited by an external circuit during the application stage. It can be seen that this traditional pin configuration method is not only cumbersome in wiring process, but also requires additional short-circuiting operation; this solution can effectively reduce the difficulty of wiring operation by directly integrating the three pins into a common pin.
[0038] For the installation and connection of the PFC power component 5, the PFC power component 5 includes a first PFC power section and a second PFC power section. A first extension block extends into the first layout area 11 to form a third extension block. The first PFC power section is disposed on the third extension block, and the second PFC power section is disposed on the first base island block 21. The first PFC power section is connected to the second PFC power section through a first bonding wire, and the second PFC power section is connected to the second base island block 22 through a second bonding wire. This connection method ensures that the PFC power current can flow smoothly into the next stage power circuit. At the same time, the large surface area of the third base island block 31 and the first base island block 21 assists in heat dissipation, which plays a certain role in maintaining the stable operating temperature of the device.
[0039] In one embodiment, a first driving resistor R1 is disposed within the first layout area 11 on the side of the first base island block 21 away from the third base island block 31. The second PFC power unit is connected to the first driving resistor R1 via a third bonding wire. Placing the first driving resistor R1 on the side away from the high-current main circuit can, to a certain extent, avoid interference of the magnetic field generated by the high current on the driving signal, and also facilitates adjustment of the resistance parameters to adapt to different driving requirements.
[0040] Specifically, the IPM upper bridge power assembly 6 includes a W-phase upper bridge power unit 61, a V-phase upper bridge power unit 62, and a U-phase upper bridge power unit 63. These three power units are distributed sequentially from right to left along the length of the first extension block. This linear arrangement makes full use of the space of the first extension block, ensuring that the upper bridge arms of each phase maintain a uniform spacing in their physical positions, which is beneficial for balancing the heat distribution and electrical characteristics of each phase. Furthermore, the upper bridge power units of each phase also correspond vertically to the positions of the fourth base island block 41, the fifth base island block 42, and the sixth base island block 43, that is, to the positions of the lower bridge power units of each phase. This reduces the overall wiring difficulty of the circuit and also helps to reduce the current loop area, thereby reducing the capacitive and inductive coupling of high-noise power lines to sensitive signal lines.
[0041] More specifically, the IPM downbridge power assembly 7 includes a W-phase downbridge power unit 71, a V-phase downbridge power unit 72, and a U-phase downbridge power unit 73. The W-phase downbridge power unit 71 is located on the fourth base island block 41, the V-phase downbridge power unit 72 is located on the fifth base island block 42, and the U-phase downbridge power unit 73 is located on the sixth base island block 43. These three downbridge power units are connected to the seventh base island block 44 via a fourth bonding wire. By converging the emitters of the downbridge units to the seventh base island block 44, a low-impedance common node is formed, which helps to reduce voltage spikes during switching.
[0042] It should be noted that the W-phase upper bridge power unit 61, V-phase upper bridge power unit 62, U-phase upper bridge power unit 63, W-phase lower bridge power unit 71, V-phase lower bridge power unit 72, U-phase lower bridge power unit 73, and PFC power component 5 are mainly composed of IGBT devices and diodes. For specific electrical connection structures, please refer to [reference needed]. Figure 3 .
[0043] For the drive connection of the U-phase upper bridge power unit 63, a second drive resistor R2 is provided in the second layout area 12 on the side of the first extension block near the U-phase upper bridge power unit 63. The U-phase upper bridge power unit 63 is connected to the second drive resistor R2 through a fifth bonding wire. Arranging the drive resistor close to the power unit can shorten the drive circuit length, reduce parasitic inductance, thereby improving the switching waveform of the U-phase upper bridge and reducing switching losses.
[0044] For the drive connection of the V-phase upper bridge power unit 62, a third drive resistor R3 is provided in the second layout area 12 on the side of the first extension block near the V-phase upper bridge power unit 62. The V-phase upper bridge power unit 62 is connected to the third drive resistor R3 through a sixth bonding line. A similar layout is also applied to the V phase to ensure that the drive signal can be transmitted to the gate of the power device quickly and accurately, thereby improving the reliability of the drive.
[0045] For the drive connection of the W-phase upper bridge power unit 61, a fourth drive resistor R4 is provided in the second layout area 12 on the side of the first extension block closest to the W-phase upper bridge power unit 61. The W-phase upper bridge power unit 61 is connected to the fourth drive resistor R4 through a seventh bonding wire. By setting the drive resistor in such a close proximity, the W-phase upper bridge power unit 61 can obtain a more ideal drive signal quality, which helps to suppress the false conduction phenomenon caused by the Miller effect.
[0046] For the drive connection of the U-phase lower bridge power unit 73, a fifth drive resistor R5 is provided next to the fourth base island block 41 within the second layout area 12. The U-phase lower bridge power unit 73 is connected to the fifth drive resistor R5 through an eighth bonding line. Placing the drive resistor next to the base island makes the bonding line as short and straight as possible, which is especially important for the noise-sensitive low-voltage lower bridge drive circuit and can effectively improve the anti-interference capability.
[0047] For the drive connection of the V-phase lower bridge power unit 72, a sixth drive resistor R6 is located next to the fifth base island block 42 within the second layout area 12. The V-phase lower bridge power unit 72 is connected to the sixth drive resistor R6 via a ninth bonding wire. This layout makes the drive loop area of the V-phase lower bridge relatively small, which helps to reduce loop radiation and improve the electromagnetic compatibility performance of the module.
[0048] For the drive connection of the W-phase lower bridge power unit 71, a seventh drive resistor R7 is provided next to the sixth base island block 43 within the second layout area 12. The W-phase lower bridge power unit 71 is connected to the seventh drive resistor R7 via a tenth bonding wire. Through this compact connection structure, the drive stability of the W-phase lower bridge power unit 71 in high-speed switching mode is enhanced, which is beneficial to improving the working efficiency of the entire inverter bridge arm.
[0049] In one embodiment, the fourth pin unit may include HIN1, HIN2, HIN3, LIN1, LIN2, LIN3, PFCIN, FLT / EN, ITRIP, PFCTRIP, VDD, and VSS pins, which are distributed sequentially from right to left along the length of the third layout area 13. Each pin is connected to the HVIC component 8.
[0050] The third pin unit also includes the VB1 pin located next to the U-phase output pin, the VB2 pin located next to the V-phase output pin, and the VB3 pin located next to the W-phase output pin. The first pin unit includes the PFC input pin. The pins of the lead frame are arranged from right to left as follows: PFC input pin, negative voltage supply (-VCC) pin, positive voltage supply (VCC) pin, VB3 pin, W-phase output (VS3) pin, VB2 pin, V-phase output (VS2) pin, VB1 pin, U-phase output (VS1) pin, common emitter (UVW-) pin, HIN1 pin, HIN2 pin, HIN3 pin, LIN1 pin, LIN2 pin, LIN3 pin, PFCIN pin, FLT / EN pin, ITRIP pin, PFCTRIP pin, VDD pin, and VSS pin. The PFC input pin is used to connect the collector of the IGBT device in the PFC power component 5 and the anode of the diode assembly; the negative voltage supply pin is used to connect the emitter of the IGBT device in the PFC power component 5; the positive voltage supply pin is used to input the bus voltage; the VB3 pin is used to connect the W-phase high-side floating power supply; the W-phase output pin is used to connect the W-phase high-side floating power supply ground and output a drive signal to the W-phase; the VB2 pin is used to connect the V-phase high-side floating power supply; the V-phase output pin is used to connect the V-phase high-side floating power supply ground and output a drive signal to the V-phase; the VB1 pin is used to connect the U-phase high-side floating power supply; the U-phase output pin is used to connect the U-phase high-side floating power supply ground and output a drive signal to the U-phase; the common emitter pin is used to connect the emitters of the IGBT devices in each phase of the IPM lower bridge power component 7; the HI... The N1 pin is used to connect to the U-phase upper bridge drive signal input; the HIN2 pin is used to connect to the V-phase upper bridge drive signal input; the HIN3 pin is used to connect to the W-phase upper bridge drive signal input; the LIN1 pin is used to connect to the U-phase lower bridge drive signal input; the LIN2 pin is used to connect to the V-phase lower bridge drive signal input; the LIN3 pin is used to connect to the W-phase lower bridge drive signal input; the PFCIN pin is used to connect to the PFC drive signal input; the FLT / EN pin is used to output the FAULT signal and receive the enable signal; the ITRIP pin is used to sample the overcurrent protection voltage of the inverter section; the PFCTRIP pin is used to sample the overcurrent protection voltage of the PFC circuit; the VDD pin is used to connect to the power supply of HVIC component 8; the VSS pin is used to connect to the power supply ground of HVIC component 8.
[0051] In summary, the third layout area 13 primarily houses the HVIC component 8, which centrally handles the drive control and protection functions of the PFC and the upper and lower bridge power components. The fourth pin unit, located below the third layout area 13, provides the power supply, signal input / output, and grounding interface required by the HVIC. By placing the HVIC away from high-power traces and forming relatively independent power and control loops in physical space, the current loop area is reduced, electromagnetic radiation intensity is decreased, and the product exhibits better electromagnetic compatibility. In the actual packaging process, each power component is fixed to its corresponding base island unit using conductive adhesive material and electrically interconnected via metal bonding wires, thus achieving a compact and stable intelligent power module lead frame structure.
[0052] This application also provides a packaging structure that includes the lead frame as described above.
[0053] This application also provides a power module that includes the lead frame described above.
[0054] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.
Claims
1. A lead frame, characterized in that, The system includes a frame body, which is divided into a first layout area, a second layout area, and a third layout area from right to left along its length. The first layout area contains a first base island unit for mounting PFC power components. Below the first base island unit, the frame body has a first pin unit connected to it. The second layout area contains a second base island unit for mounting IPM upper-bridge power components and a third base island unit for mounting IPM lower-bridge power components. The second base island unit is located between the first and third base island units. Below the second base island unit, the frame body has a second pin unit connected to it. Below the third base island unit, the frame body has a third pin unit connected to it. The third layout area is used for mounting HVIC components, and below the third layout area, the frame body has a fourth pin unit.
2. A lead frame according to claim 1, characterized in that, The first base island unit includes a first base island block and a second base island block; the second base island unit includes a third base island block; the first pin unit includes a PFC input pin and a negative voltage power supply pin; the second pin unit includes a positive voltage power supply pin; the second base island block is located below the first base island block, the negative voltage power supply pin is located below the first base island block and is connected to the first base island block, the third base island block is located between the first base island block and the third base island unit, the positive voltage power supply pin is located below the third base island block and is connected to the third base island block; the PFC input pin is located below the first base island block and is connected to the first base island block, and the negative voltage power supply pin is located to the left or right of the PFC input pin.
3. A lead frame according to claim 2, characterized in that, The top of the third base island block extends toward the side closer to the third base island unit to form a first extension block, which is located above the third base island unit. The bottom of the third base island block extends toward the positive voltage power supply pin to form a second extension block, which is connected to the positive voltage power supply pin.
4. A lead frame according to claim 3, characterized in that, The third base island unit includes a fourth base island block, a fifth base island block, and a sixth base island block distributed from right to left along the length direction of the second layout area; the third pin unit includes a W-phase output pin, a V-phase output pin, and a U-phase output pin; the fourth base island block, the fifth base island block, and the sixth base island block are all located below the first extension block, the W-phase output pin is located below the fourth base island block and is connected to the fourth base island block, the V-phase output pin is located below the fifth base island block and is connected to the fifth base island block, and the U-phase output pin is located below the sixth base island block and is connected to the sixth base island block.
5. A lead frame according to claim 4, characterized in that, The third base island unit further includes a seventh base island block; the third pin unit further includes a common emitter pin; the seventh base island block is located on the side of the sixth base island block away from the fifth base island block, the common emitter pin is located below the seventh base island block, and the common emitter pin is connected to the seventh base island block.
6. A lead frame according to claim 3, characterized in that, The PFC power assembly includes a first PFC power unit and a second PFC power unit. The first extension block extends into the first layout area to form a third extension block. The first PFC power unit is disposed on the third extension block, and the second PFC power unit is disposed on the first base island block. The first PFC power unit is connected to the second PFC power unit through a first bonding line, and the second PFC power unit is connected to the second base island block through a second bonding line.
7. A lead frame according to claim 6, characterized in that, A first driving resistor R1 is provided on the side of the first base island block away from the third base island block within the first layout area, and the second PFC power unit is connected to the first driving resistor R1 through a third bonding line.
8. A lead frame according to claim 3, characterized in that, The IPM on-bridge power assembly includes a W-phase on-bridge power unit, a V-phase on-bridge power unit, and a U-phase on-bridge power unit, which are distributed sequentially from right to left along the length of the first extension block.
9. A lead frame according to claim 5, characterized in that, The IPM downbridge power assembly includes a W-phase downbridge power unit, a V-phase downbridge power unit, and a U-phase downbridge power unit. The W-phase downbridge power unit is disposed on the fourth base island block, the V-phase downbridge power unit is disposed on the fifth base island block, and the U-phase downbridge power unit is disposed on the sixth base island block. The W-phase downbridge power unit, the V-phase downbridge power unit, and the U-phase downbridge power unit are respectively connected to the seventh base island block through a fourth binding line.
10. A lead frame according to claim 8, characterized in that, A second driving resistor R2 is provided in the second layout area on the side of the first extension block near the U-phase upper bridge power unit. The U-phase upper bridge power unit is connected to the second driving resistor R2 through a fifth bonding line.
11. A lead frame according to claim 8, characterized in that, A third driving resistor R3 is provided in the second layout area on the side of the first extension block near the V-phase upper bridge power unit. The V-phase upper bridge power unit is connected to the third driving resistor R3 through a sixth bonding line.
12. A lead frame according to claim 8, characterized in that, A fourth driving resistor R4 is provided in the second layout area on the side of the first extension block near the W-phase upper bridge power unit. The W-phase upper bridge power unit is connected to the fourth driving resistor R4 through a seventh bonding wire.
13. A lead frame according to claim 9, characterized in that, A fifth driving resistor R5 is provided next to the fourth base island block in the second layout area, and the U-phase lower bridge power unit is connected to the fifth driving resistor R5 through the eighth bonding line.
14. A lead frame according to claim 9, characterized in that, A sixth driving resistor R6 is provided next to the fifth base island block in the second layout area, and the V-phase lower bridge power unit is connected to the sixth driving resistor R6 through the ninth bonding line.
15. A lead frame according to claim 9, characterized in that, A seventh driving resistor R7 is provided next to the sixth base island block in the second layout area, and the W-phase lower bridge power unit is connected to the seventh driving resistor R7 through the tenth bonding line.
16. A lead frame according to claim 5, characterized in that, The fourth pin unit includes HIN1, HIN2, HIN3, LIN1, LIN2, LIN3, PFCIN, FLT / EN, ITRIP, PFCTRIP, VDD, and VSS pins, which are distributed sequentially from right to left along the length of the third layout area and connected to the HVIC component. The third pin unit also includes VB1, VB2, and VB3 pins located next to the U-phase output pin, V-phase output pin, and W-phase output pin, respectively. The pins of the frame body, from right to left, are PFC input pin, negative voltage power supply pin, positive voltage power supply pin, VB3 pin, and W-phase output pin. The IGBT pins are: VB2 pin, V-phase output pin, VB1 pin, U-phase output pin, common emitter pin, HIN1 pin, HIN2 pin, HIN3 pin, LIN1 pin, LIN2 pin, LIN3 pin, PFCIN pin, FLT / EN pin, ITRIP pin, PFCTRIP pin, VDD pin, and VSS pin. The PFC input pins are used to connect the collector of the IGBT device in the PFC power component and the anode of the diode device. The negative voltage supply pin is used to connect the emitter of the IGBT device in the PFC power component. The positive voltage supply pin is used to input the bus voltage. The VB3 pin is used to connect the W-phase high voltage... The system includes a floating power supply for the high-side of phase V; the W-phase output pin is used to connect to the W-phase high-side floating power supply ground and output a drive signal to phase V; the VB2 pin is used to connect to the V-phase high-side floating power supply ground; the V-phase output pin is used to connect to the V-phase high-side floating power supply ground and output a drive signal to phase V; the VB1 pin is used to connect to the U-phase high-side floating power supply; the U-phase output pin is used to connect to the U-phase high-side floating power supply ground and output a drive signal to phase U; the common emitter pin is used to connect to the emitters of the IGBT devices in each phase of the IPM lower bridge power component; the HIN1 pin is used to connect to the U-phase upper bridge drive signal input; the HIN2 pin is used to connect to the V-phase upper bridge drive signal input; and the HIN3 pin is used for... The following pins are connected: LIN1 (for the upper bridge drive signal input of phase W); LIN2 (for the lower bridge drive signal input of phase U); LIN3 (for the lower bridge drive signal input of phase V); PFCIN (for the PFC drive signal input); FLT / EN (for outputting the FAULT signal and receiving the enable signal); ITRIP (for sampling the overcurrent protection voltage of the inverter section); PFCTRIP (for sampling the overcurrent protection voltage of the PFC circuit); VDD (for connecting the power supply of the HVIC component); and VSS (for connecting the power ground of the HVIC component).
17. A packaging structure, characterized in that, Includes the lead frame as described in any one of claims 1-16.
18. A power module, characterized in that, Includes the lead frame as described in any one of claims 1-16.