Htcc substrate interconnection ultra-wideband package structure based on hetero-shaped coaxial

Abstract

The application discloses an HTCC substrate interconnection ultra-wideband packaging structure based on a special coaxial structure, and belongs to the technical field of radio frequency interconnection. The structure comprises a special coaxial metal column between two adjacent vertically stacked HTCC substrates, which is composed of a first thin metal column, a thick metal column and a second thin metal column connected in sequence. The first thin metal column and the second thin metal column are equivalent to inductive impedance characteristics, the thick metal column is equivalent to capacitive impedance characteristics, a multi-stage alternating complementary matching network of 'inductive-capacitive-inductive' is formed, and multi-stage complex conjugate broadband impedance matching vertical interconnection is realized. In addition, the application also cooperates with a defect groove structure, designs the dielectric thickness of a first ground coplanar waveguide transmission structure and a multi-stage high-low impedance line structure, builds a nine-stage ultra-wideband matching structure, realizes 0.1-40 GHz ultra-wideband full-band low-loss and high-stability radio frequency vertical interconnection, and greatly improves the bandwidth adaptation capability and engineering application value of the HTCC radio frequency packaging structure.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency interconnect technology, specifically relating to an ultra-wideband packaging structure for interconnecting HTCC substrates based on irregularly shaped coaxial cables. Background Technology

[0002] System-in-Package (SiP) is a standard package that integrates multiple active chips and / or passive components into a single package to achieve a specific function. SiP typically consists of a substrate, a metal frame, a solder mask, and the internal integrated circuit chip. High-temperature co-fired ceramics (HTCC) are widely used as substrate materials for SiP due to their high hermeticity, high temperature resistance, good thermal conductivity, and good high-frequency dielectric properties.

[0003] In HTCC-based RF SiP packaging, some RF chips require a cavity height of about 1~1.2mm between substrates when they are working (usually 10 times the chip thickness). However, the maximum diameter of the solder balls in conventional RF applications BGA (Ball Grid Array) is only 0.5mm. Due to the limitations of solder ball forming and reflow processes, it is difficult to stably support the 1~1.2mm substrate gap. Therefore, BGA solder balls cannot be used to achieve vertical interconnection between two HTCC substrates.

[0004] Existing SiP (System-in-Package) systems employ a coaxial structure with metal signal pillars and a grounding frame to achieve vertical interconnection between two HTCC (High-Temperature Ceramic) substrates, representing a novel vertical interconnection solution with engineering value. However, this type of interconnection structure, which typically uses cylindrical metal pillars of equal diameter as inner conductors, still suffers from significant RF transmission defects: the dielectric constant of the HTCC ceramic substrate is approximately 9, while the coaxial region between the metal pillar and the grounding frame uses air as the dielectric (εᵣ≈1), resulting in a sharp dielectric abrupt change between the interconnection region and the substrate planar transmission lines. Furthermore, under the constraint of a fixed vertical interconnection height of 1~1.2 mm, adjusting the characteristic impedance solely based on the ratio of the inner diameter of the cylindrical metal pillar to the grounding frame limits the degree of adjustment freedom, making it difficult to achieve continuous impedance matching with the HTCC planar transmission lines on both sides over the ultra-wideband range. This impedance discontinuity leads to strong RF signal reflections, causing unstable signal transmission within the module and deteriorating insertion loss, thus limiting its application in ultra-wideband RF SiP. Summary of the Invention

[0005] To address the technical problems existing in the prior art, the present invention provides an ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection, which improves the transmission stability of radio frequency signals in SiP and reduces transmission loss, realizing low-loss and highly stable radio frequency vertical interconnection across the entire ultra-wideband from 0.1 to 40 GHz.

[0006] The technical solution adopted in this invention is as follows:

[0007] The ultra-wideband packaging structure based on the irregularly shaped coaxial HTCC substrate interconnect includes multiple vertically stacked HTCC substrates, a top layer of sealing cover plate, a metal frame fixed around the multi-layer HTCC substrates, and an RF chip disposed above the HTCC substrates; the sealing cover plate, the bottom layer of HTCC substrates, and the metal frame form a sealed structure, and the inside of the sealed cavity is an air medium.

[0008] It also includes irregularly shaped coaxial metal pillars located between two adjacent HTCC substrates, which are composed of a first thin metal pillar, a thick metal pillar, and a second thin metal pillar connected coaxially in sequence; wherein, the diameter of the thick metal pillar is larger than the diameter of the first thin metal pillar and the second thin metal pillar; the first thin metal pillar is connected to the upper HTCC substrate, and the second thin metal pillar is connected to the lower HTCC substrate, realizing the vertical interconnection of the two adjacent HTCC substrates; the first thin metal pillar and the second thin metal pillar are equivalent to inductive impedance characteristics, and the thick metal pillar is equivalent to capacitive impedance characteristics, thus the irregularly shaped coaxial metal pillars form a multi-level alternating complementary matching network of "inductive-capacitive-inductive", realizing multi-level complex conjugate broadband impedance matching vertical interconnection.

[0009] Furthermore, the cavity height formed between two adjacent HTCC substrates ranges from 0.9 to 1.5 mm to ensure compatibility with integrated circuit chip mounting processes and reduce insertion loss of RF signals in ultra-wideband scenarios. If the cavity height exceeds 1.5 mm, it will cause misalignment in the assembly of irregularly shaped coaxial metal pillars. If it is less than 0.9 mm, it will affect the performance of integrated circuit chips.

[0010] Furthermore, the diameters of the first thin metal pillar, the thick metal pillar, and the second thin metal pillar can be different from each other, while the diameters of the first thin metal pillar and the second thin metal pillar can be the same; the heights of the first thin metal pillar, the thick metal pillar, and the second thin metal pillar can be different from each other or the same; specifically, the diameters and heights of the first thin metal pillar, the thick metal pillar, and the second thin metal pillar are matched according to the inherent parasitic capacitance and impedance distribution characteristics of the interconnection ports between the irregularly shaped coaxial metal pillar and the upper and lower HTCC substrates.

[0011] Furthermore, the diameter of the first and second thin metal pillars is 0.3 mm, which is the minimum limit pillar diameter to adapt to the precision processing technology of HTCC substrates and to achieve reliable welding of HTCC substrates.

[0012] Furthermore, a semi-enclosed shielding structure is provided around the irregularly shaped coaxial metal pillar to position the irregularly shaped coaxial metal pillar during assembly, and to shorten the flow time of the plating solution during coating, avoiding residual waste liquid from corroding the structure, thereby improving the packaging process yield and the long-term reliability of the device.

[0013] Furthermore, the HTCC substrate includes multiple 0.1 mm thick dielectric layers stacked together, and metal ground layers located on the lower surface of each dielectric layer.

[0014] Furthermore, the upper surface of the HTCC substrate is provided with a first interconnect pad connected to the second fine metal pillar, and the lower surface is provided with a second interconnect pad connected to the first fine metal pillar.

[0015] Furthermore, the diameter of the first interconnect pad is at least 0.15 mm larger than the diameter of the second thin metal pillar, and the diameter of the second interconnect pad is at least 0.15 mm larger than the diameter of the first thin metal pillar.

[0016] Furthermore, a first grounded coplanar waveguide transmission structure is provided above the HTCC substrate for connecting the radio frequency chip. Its signal line conductor is connected to the first interconnect pad. By controlling the spacing between the signal line conductor and the coplanar ground conductor, the standard characteristic impedance matching with the 50 Ω coplanar waveguide transmission line is achieved, and higher-order modes are suppressed.

[0017] Furthermore, the dielectric layer thickness of the first grounded coplanar waveguide transmission structure is 0.3 mm, which suppresses higher-order modes while ensuring 50 Ω impedance matching, thereby effectively alleviating the impedance mismatch problem caused by the large-size first interconnect pad.

[0018] Furthermore, the signal line conductor of the first grounded coplanar waveguide transmission structure adopts a multi-level high and low impedance line structure to improve the ultra-wideband impedance matching performance.

[0019] Furthermore, the multi-level high and low impedance line structure has a two-level structure, including an inductive impedance line connected to the first interconnect pad and a capacitive impedance line connected to the 50 Ω coplanar waveguide transmission line.

[0020] Furthermore, a defect ground slot structure (DGS) is provided in the HTCC substrate area below the first interconnect pad. The metal ground layer where it is located is located below the bottom ground layer of the first ground coplanar waveguide transmission structure, forming a first capacitive matching unit with the first interconnect pad, so as to reduce the inherent parasitic capacitance of the first interconnect pad and improve the transmission performance of radio frequency signals between the upper and lower HTCC substrates.

[0021] Furthermore, the second interconnect pad and the metal ground plane of the same layer form a second capacitive matching unit.

[0022] Furthermore, a coaxial inductive matching structure is set above the second interconnect pad, and the standard characteristic impedance matching with the 50 Ω coplanar waveguide transmission line is achieved through the second grounded coplanar waveguide transmission structure; wherein, the center conductor of the coaxial inductive matching structure passes through to the signal line conductor of the second grounded coplanar waveguide transmission structure; a capacitive matching structure is formed between the signal line conductor of the second grounded coplanar waveguide transmission structure and the bottom ground layer; the second grounded coplanar waveguide transmission structure is connected to the RF chip.

[0023] The working principle of the ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection described in this invention is as follows:

[0024] For actual simulation and engineering applications with a cavity height range of 0.9~1.5 mm, unlike the existing technology that uses cylindrical metal pillars of equal diameter, this invention adopts a three-segment coaxial structure of "first thin metal pillar - thick metal pillar - second thin metal pillar". The diameter and height of the first thin metal pillar and the second thin metal pillar can be set differently, so that the irregularly shaped coaxial metal pillar can adapt to the asymmetric parasitic parameters of the interconnection ports of the upper and lower HTCC substrates, realize high-precision impedance compensation in the ultra-wideband frequency band, and thus form a multi-level complex conjugate broadband impedance matching vertical interconnection path.

[0025] Since the dielectric constant of the HTCC substrate is approximately 9, the first interconnect pad and the second interconnect pad exhibit capacitive parasitic parameters. Therefore, the first and second thin metal pillars of the irregularly shaped coaxial metal pillars need to exhibit equivalent inductive impedance characteristics, while the thick metal pillars need to exhibit equivalent capacitive impedance characteristics.

[0026] To reduce the capacitive parasitic parameters of the first interconnect pad and the second interconnect pad, the first and second thin metal pillars with the smallest possible diameters must be used. At the same time, in order to adapt to the precision processing technology of HTCC substrates, the first and second thin metal pillars adopt the minimum limit pillar diameter for reliable soldering of HTCC substrates. Therefore, the diameter of the first interconnect pad is designed to be at least 0.15 mm larger than the diameter of the second thin metal pillar, and the diameter of the second interconnect pad is designed to be at least 0.15 mm larger than the diameter of the first thin metal pillar.

[0027] Because the diameter of the first interconnect pad is relatively large, it will cause impedance mismatch at the interconnect port. To address this issue, this invention employs a dual-structure optimization scheme to suppress parasitic parameter interference. On one hand, the dielectric layer thickness of the first ground coplanar waveguide transmission structure is set to 0.3 mm to increase the width of the signal line conductor and reduce its dimensional difference with the first interconnect pad. This effectively alleviates the impedance mismatch problem and reduces the difficulty of integration with multi-level high and low impedance line structures, further improving ultra-wideband impedance matching performance. On the other hand, a defective ground slot structure is provided in the HTCC substrate area below the first interconnect pad to reduce the capacitive parasitic parameters of the first interconnect pad and improve the transmission performance of RF signals between the upper and lower HTCC substrates.

[0028] Because the multi-level high and low impedance line structure adopts a two-level structure of inductive and capacitive impedance lines, and a coaxial inductive matching structure and a capacitive matching structure are set above the second interconnect pad, together with the first interconnect pad, the first thin metal pillar-coarse metal pillar-second thin metal pillar and the second interconnect pad, a ninth-order ultra-wideband matching structure is formed, namely "the 50 Ω coplanar waveguide transmission line of the lower HTCC substrate, capacitive impedance line, inductive impedance line, first capacitive matching unit, a multi-level alternating complementary matching network of "inductive-capacitive-inductive", second capacitive matching unit, coaxial inductive matching structure, capacitive matching structure, and the 50 Ω coplanar waveguide transmission line of the upper HTCC substrate". Based on the above ninth-order ultra-wideband matching structure, through structural parameter simulation optimization, a low-loss, high-stability RF vertical interconnect between substrates is achieved in the 0.1-40 GHz ultra-wideband full frequency band, greatly improving the bandwidth adaptability and engineering application value of the HTCC RF packaging structure.

[0029] HTCC ceramic substrates possess advantages such as high temperature resistance, excellent thermal conductivity, and high structural reliability, making them suitable for high-reliability RF packaging applications. However, existing conventional HTCC stacked interconnect structures all use a single fixed-diameter metal pillar for vertical interconnection, lacking graded impedance compensation capabilities. Due to the significant dielectric difference between the high dielectric dielectric of HTCC and air, the impedance discontinuity at the interconnect ports is prominent, resulting in high RF signal reflection and insertion losses. This only achieves narrowband impedance matching and cannot meet the transmission requirements of ultra-wideband RF signals from 0.1 to 40 GHz.

[0030] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0031] 1. This invention proposes an ultra-wideband packaging structure for HTCC substrate interconnection based on irregularly shaped coaxial metal pillars. It innovatively employs asymmetric, unequal-length, three-segment irregularly shaped coaxial metal pillars to construct multi-level complex conjugate broadband impedance-matched vertical interconnection paths. Combined with a defective ground slot structure, dielectric thickness design of the first ground coplanar waveguide transmission structure, and multi-level high and low impedance line structure design, a complete ninth-order ultra-wideband matching structure is built. This effectively mitigates impedance mismatch problems caused by parasitic capacitive parameters, dielectric abrupt changes, and structural (size and signal transmission direction) abrupt changes. Simultaneously, the irregularly shaped coaxial metal pillars can precisely adapt to the asymmetric electrical characteristics of the upper and lower HTCC substrate ports. While ensuring structural assembly accuracy and welding process reliability, it achieves low-loss, highly stable RF vertical interconnection across the entire ultra-wideband frequency range of 0.1–40 GHz, significantly improving the bandwidth adaptability and engineering application value of the HTCC RF packaging structure.

[0032] 2. This invention improves the traditional fully enclosed shielding structure into a semi-enclosed shielding structure, which has the dual functions of mechanical positioning and process optimization: on the one hand, it can accurately limit the variable diameter metal pillars, constrain the coaxiality of the metal pillar assembly, and improve the stacking assembly accuracy and overall structural stability of multilayer HTCC substrates; on the other hand, it can form a through-flow fluid channel, shorten the processing time of plating solution in electroplating, coating and cleaning processes, ensure smooth flow of plating solution and cleaning solution, avoid waste liquid residue corroding the structure, and effectively improve the packaging process yield and long-term operational reliability of devices. Attached Figure Description

[0033] Figure 1 This is a schematic cross-sectional view of the ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection proposed in Example 1.

[0034] Figure 2 This is a top view of the irregularly shaped coaxial metal column, the semi-enclosed shielding structure, and the first grounded coplanar waveguide transmission structure in Example 1.

[0035] Figure 3 This is a partial layered schematic diagram of the lower HTCC substrate in Example 1;

[0036] Figure 4 This is a partial layered schematic diagram of the upper HTCC substrate in Example 1;

[0037] Figure 5 This is a schematic diagram illustrating the application scenario of the ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection proposed in Example 1.

[0038] Figure 6 The figure shows the electromagnetic simulation results of the ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection proposed in Example 1.

[0039] The meanings of the markings in the attached diagram are as follows:

[0040] 1a. Lower HTCC substrate; 1b. Upper HTCC substrate; 2. Irregularly shaped coaxial metal pillars; 21. First thin metal pillar; 22. Coarse metal pillar; 23. Second thin metal pillar; 3. Semi-enclosed shielding structure; 4. Sealing cover plate; 5. RF chip; 6. First interconnect pad; 7. Second interconnect pad; 8. First ground coplanar waveguide transmission structure; 81. Signal line conductor of the first ground coplanar waveguide transmission structure; 82. Coplanar ground conductor of the first ground coplanar waveguide transmission structure; 83. Bottom ground layer of the first ground coplanar waveguide transmission structure; 84. Inductive impedance line; 85. Capacitive impedance line; 9. Defective ground slot structure; 10. Second ground coplanar waveguide transmission structure; 101. Signal line conductor of the second ground coplanar waveguide transmission structure; 102. Bottom ground layer of the second ground coplanar waveguide transmission structure; 11. Coaxial inductive matching structure; 111. Center conductor of the coaxial inductive matching structure; 12. Solder ball array. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of this invention are only for explaining this invention and are not intended to limit this invention.

[0042] Example 1

[0043] This embodiment proposes an ultra-wideband packaging structure for HTCC substrate interconnect based on irregularly shaped coaxial cable, suitable for 0.1~40GHz ultra-wideband RF vertical interconnect scenarios. The structure is as follows: Figures 1-5 As shown, it includes two vertically stacked HTCC substrates, a sealing cover plate 4 on the top layer, a metal frame fixed around the multilayer HTCC substrates, and an RF chip 5 disposed on the top of the HTCC substrates.

[0044] The two HTCC substrates are designated as the lower HTCC substrate 1a and the upper HTCC substrate 1b. A sealing cover plate 4, together with the lower HTCC substrate 1a and the metal frame, forms a sealed structure, with air as the internal medium. A solder ball array 12 is provided on the lower surface of the lower HTCC substrate 1a for practical use. The height of the cavity formed between the two HTCC substrates ranges from 0.9 to 1.5 mm to ensure compatibility with integrated circuit chip mounting processes and reduce insertion loss of RF signals in ultra-wideband scenarios. If the cavity height exceeds 1.5 mm, assembly deviations of irregularly shaped coaxial metal pillars may occur; if it is less than 0.9 mm, the performance of the integrated circuit chip will be affected. This embodiment uses a cavity height of 1.2 mm, adapted for actual simulation and engineering applications.

[0045] Both the lower HTCC substrate 1a and the upper HTCC substrate 1b include 10 stacked dielectric layers, each 0.1 mm thick, and metal ground layers located on the lower surface of each dielectric layer and on the upper surface of the top dielectric layer, respectively. Schematic diagrams of the layering of the lower HTCC substrate 1a and the upper HTCC substrate 1b are shown below. Figure 3 and 4 As shown, L1~L10_B are schematic diagrams of the 11 layers of metal grounding layers stacked from top to bottom, corresponding to... Figure 1 The structure of each metal grounding layer of the lower and middle HTCC substrate 1a and the upper HTCC substrate 1b.

[0046] The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection also includes irregularly shaped coaxial metal pillars 2 located between two HTCC substrates. For a cavity height of 1.2 mm suitable for actual simulation and engineering applications, this embodiment designs the irregularly shaped coaxial metal pillars 2 as consisting of a first thin metal pillar 21, a thick metal pillar 22, and a second thin metal pillar 23 connected coaxially in sequence. This effectively replaces the traditional BGA interconnection scheme and solves the technical defects of traditional HTCC stacked packaging structures, such as impedance mismatch, high transmission loss, prominent high-order mode interference, and limited operating bandwidth.

[0047] The first thin metal column 21, the thick metal column 22, and the second thin metal column 23 can be cylindrical metal columns, regular hexagonal metal columns, or other metal columns with coaxial connectivity. In this embodiment, cylindrical metal columns are used.

[0048] The upper surface of the lower HTCC substrate 1a is provided with a first interconnect pad 6 connected to the second thin metal pillar 23, and the lower surface of the upper HTCC substrate 1b is provided with a second interconnect pad 7 connected to the first thin metal pillar 21, thereby realizing the vertical interconnection between the lower HTCC substrate 1a and the upper HTCC substrate 1b.

[0049] The diameter and height of the first thin metal pillar 21 and the second thin metal pillar 23 can be set differently, so that the irregular coaxial metal pillar 2 can adapt to the asymmetric parasitic parameters of the interconnection port of the upper and lower HTCC substrates, realize high-precision impedance compensation in the ultra-wideband frequency band, and thus form a multi-level complex conjugate broadband impedance matching vertical interconnection path.

[0050] Considering that low-dielectric-constant ceramic dielectric materials, such as low-temperature co-fired ceramic (LCTT) substrates (dielectric constant of 5~6.9), have a relatively small difference in dielectric constant from air, are easily achieved using existing technologies, and LTCC substrates suffer from poor high-temperature resistance, thermal conductivity, and reliability, this embodiment selects an HTCC substrate with a relative dielectric constant of approximately 9. This substrate exhibits good high-temperature resistance, thermal conductivity, and reliability, making it suitable for simulation experiments.

[0051] Since the dielectric constant of the HTCC substrate is approximately 9, the first interconnect pad 6 and the second interconnect pad 7 exhibit capacitive characteristics with large parasitic parameters. Therefore, the first thin metal pillar 21 and the second thin metal pillar 23 of the irregularly shaped coaxial metal pillar 2 need to effectively exhibit inductive impedance characteristics, while the thick metal pillar 22 needs to effectively exhibit capacitive impedance characteristics. This results in the irregularly shaped coaxial metal pillar 2 forming a multi-level alternating complementary matching network of "inductive-capacitive-inductive," achieving multi-level complex conjugate broadband impedance matching vertical interconnection. Existing technologies often use single-diameter metal pillars to construct vertical interconnect structures, which can only achieve single-order narrowband impedance matching. This embodiment uses a multi-order matching structure to perform segmented conjugate compensation for impedance deviations across the entire ultra-wideband frequency range, effectively suppressing impedance step problems caused by abrupt changes in dielectric constant and structural dimensions between the HTCC high-dielectric substrate and the air dielectric. This significantly broadens the effective matching bandwidth of RF signals and improves the problems of severe reflection and degraded transmission performance during ultra-wideband signal transmission.

[0052] The diameter of the thick metal pillar 22 is larger than the diameter of the first thin metal pillar 21 and the second thin metal pillar 23. The diameters of the first thin metal pillar 21 and the second thin metal pillar 23 can be the same or different. To reduce the capacitive parasitic parameters of the first interconnect pad 6 and the second interconnect pad 7, the diameters of the first thin metal pillar 21 and the second thin metal pillar 23 should be as small as possible. At the same time, in order to adapt to the precision processing technology of HTCC substrate, the first thin metal pillar 21 and the second thin metal pillar 23 both adopt the minimum limit pillar diameter of 0.3 mm for reliable soldering of HTCC substrate. Therefore, the diameters of the first interconnect pad 6 and the second interconnect pad 7 are both designed to be 0.45 mm, taking into account both structural processing feasibility and packaging soldering reliability.

[0053] Based on the inherent parasitic capacitance and impedance distribution characteristics of the interconnection ports between the irregular coaxial metal pillar 2 and the upper and lower HTCC substrates, the heights of the first thin metal pillar 21, the thick metal pillar 22, and the second thin metal pillar 23 are designed to match the heights. This accurately compensates for the differential impedance offset of the interconnection ports of the two HTCC substrates, overcomes the problem that the traditional single equal-diameter metal pillar structure cannot adapt to asymmetrical ports and has poor broadband impedance matching effect, and effectively improves the impedance matching accuracy and operating condition adaptability across the entire frequency band.

[0054] A first grounded coplanar waveguide transmission structure 8 is provided above the lower HTCC substrate 1a for connecting the radio frequency chip 5. The signal line conductor 81 of the first grounded coplanar waveguide transmission structure is connected to the first interconnect pad 6. By controlling the spacing between the signal line conductor 81 and the coplanar ground conductor 82 of the first grounded coplanar waveguide transmission structure, the standard characteristic impedance matching with the 50 Ω coplanar waveguide transmission line is achieved, and higher-order modes are suppressed.

[0055] Traditional packaging structures suitable for ultra-wideband signals from 0.3 to 40 GHz typically use microstrip lines for signal transmission. In this case, the thickness of the ceramic dielectric layer on the HTCC substrate is usually set to 0.2 mm to reduce high-order mode excitation. If the dielectric layer thickness of the HTCC substrate is increased, the influence of high-order modes is aggravated, the difficulty of matching the 50 Ω standard characteristic impedance increases, and signal transmission loss increases.

[0056] Unlike traditional methods, the packaging structure in this embodiment uses a first grounded coplanar waveguide transmission structure 8 for signal front-end feeding. On this basis, the dielectric layer thickness is increased to 0.3 mm, which can suppress higher-order modes while ensuring 50 Ω impedance matching. This makes the transmission line size closer to the first interconnect pad 6, thereby effectively alleviating the impedance mismatch problem caused by the large-size first interconnect pad 6. This reduces the impedance abrupt changes during RF signal transmission and reduces the difficulty of multi-level broadband stepped impedance matching.

[0057] In addition, the first grounded coplanar waveguide transmission structure 8 used in this embodiment can concentrate electromagnetic field energy mainly in the dielectric region between the signal line conductor 81 and the coplanar grounding conductor 82 of the first grounded coplanar waveguide transmission structure, resulting in a smaller proportion of lateral gap edge field energy. Simultaneously, the coplanar grounding conductors 82 of the two sides of the first grounded coplanar waveguide transmission structure can form strong electromagnetic boundary constraints, effectively suppressing higher-order modes such as slotted line modes and surface waves across the entire frequency band. Compared with traditional microstrip lines, it exhibits stronger broadband stability, higher mode purity, and less return loss.

[0058] The signal line conductor 81 of the first grounded coplanar waveguide transmission structure adopts a multi-level high and low impedance line structure with two levels, including an inductive impedance line 84 connected to the first interconnect pad 6 and a capacitive impedance line 85 connected to the 50 Ω coplanar waveguide transmission line, so as to improve the ultra-wideband impedance matching performance.

[0059] A defective ground slot structure 9 is provided in the HTCC substrate area below the first interconnect pad 6. The metal ground layer where it is located is two layers below the bottom ground layer 83 of the first ground coplanar waveguide transmission structure (i.e., at a depth of 0.5 mm), forming a first capacitive matching unit with the first interconnect pad 6, so as to reduce the inherent parasitic capacitance of the first interconnect pad 6 and improve the transmission performance of radio frequency signals between the upper and lower HTCC substrates.

[0060] Because the diameter of the first interconnect pad 6 is relatively large, it will cause impedance mismatch at the interconnect port. To address this issue, this embodiment employs a dual-structure optimization scheme to suppress parasitic parameter interference. On one hand, the dielectric layer thickness of the first ground coplanar waveguide transmission structure 8 is set to 0.3 mm to increase the width of the signal line conductor 81 of the first ground coplanar waveguide transmission structure, reducing its size difference with the first interconnect pad 6. This effectively alleviates the impedance mismatch problem and reduces the difficulty of integration with multi-level high and low impedance line structures, further improving the ultra-wideband impedance matching performance. On the other hand, a defect ground slot structure 9 is provided in the HTCC substrate area below the first interconnect pad 6 to reduce the capacitive parasitic parameters of the first interconnect pad 6 and improve the transmission performance of RF signals between the upper and lower HTCC substrates.

[0061] The second interconnect pad 7 and the same-layer metal ground plane form a second capacitive matching unit. A quasi-coaxial inductive matching structure 11 is provided above the second interconnect pad 7, achieving standard characteristic impedance matching with a 50 Ω coplanar waveguide transmission line through the second grounded coplanar waveguide transmission structure 10. The center conductor 111 of the quasi-coaxial inductive matching structure extends to the signal line conductor 101 of the second grounded coplanar waveguide transmission structure; a capacitive matching structure is formed between the signal line conductor 101 of the second grounded coplanar waveguide transmission structure and the bottom ground plane 102 of the second grounded coplanar waveguide transmission structure.

[0062] Because the multi-level high and low impedance line structure adopts a two-level structure of inductive impedance line 84 and capacitive impedance line 85, and a coaxial inductive matching structure 11 and a capacitive matching structure are set above the second interconnect pad 7, together with the first interconnect pad 6, the first thin metal pillar 21-thick metal pillar 22-second thin metal pillar 23 and the second interconnect pad 7, a ninth-order ultra-wideband matching structure is formed, namely "the 50 Ω coplanar waveguide transmission line of the lower HTCC substrate 1a, the capacitive impedance line 85, the inductive impedance line 84, the first capacitive matching unit, the multi-level alternating complementary matching network of "inductive-capacitive-inductive", the second capacitive matching unit, the coaxial inductive matching structure 11, the capacitive matching structure, and the 50 Ω coplanar waveguide transmission line of the upper HTCC substrate".

[0063] As can be seen, to further achieve a smooth impedance transition across the entire ultra-wideband frequency range, this embodiment does not rely solely on the irregularly shaped coaxial metal pillar 2 for impedance matching. Instead, it constructs a ninth-order ultra-wideband matching structure covering the entire vertical interconnect link between the upper and lower layers. The irregularly shaped coaxial metal pillar 2 is the core mid-section matching unit of the ninth-order ultra-wideband matching structure. This embodiment achieves a step-by-step impedance compensation system by sequentially deploying multi-order capacitive and inductive units in the horizontal signal transmission section, substrate port transition section, vertical interconnect mid-section, and upper-layer port output section, forming a fully alternating and complementary system. This completely overcomes the shortcomings of traditional single-stage matching structures, such as limited bandwidth and severe mismatch at high and low frequency edges. The impedance change throughout the entire transmission path is continuous and smooth, without any concentrated impedance abrupt changes. By using a multi-order complex conjugate cancellation method to compensate for parasitic parameters, dispersion effects, and dielectric differences across the entire frequency range in segments, the impedance matching robustness of the ultra-wideband frequency range is significantly improved.

[0064] Furthermore, this embodiment employs differentiated welding processes to ensure the overall reliability of the double-layer BTCC substrate interconnection structure. A silver-copper welding process is used between the irregularly shaped coaxial metal pillar 2, the grounding frame surrounding the irregularly shaped coaxial metal pillar 2, and the lower HTCC substrate 1a. A gold-tin welding process is used between the irregularly shaped coaxial metal pillar 2, the grounding frame, and the upper HTCC substrate 1b. Since the welding area of ​​the irregularly shaped coaxial metal pillar 2, the grounding frame, and the lower HTCC substrate 1a needs to be coated after the silver-copper welding process, this embodiment sets the grounding frame as a semi-enclosed shielding structure 3, which has both mechanical positioning and process optimization functions: on the one hand, it can accurately limit the variable-diameter irregularly shaped coaxial metal pillar 2, constrain the coaxiality of the metal pillar assembly, and improve the stacking accuracy and overall structural stability of the double-layer HTCC substrate; on the other hand, it can form a through-flow fluid channel, shortening the plating solution flow time in the electroplating, coating, and cleaning processes, ensuring smooth flow of plating solution and cleaning solution, avoiding waste liquid residue corrosion of the structure, and effectively improving the packaging process yield and long-term device reliability.

[0065] Furthermore, the dimensions of each structure are designed, such as... Figure 2As shown, the diameter A of the second thin metal pillar 23 is designed to be 0.3 mm, the distance B between the edge of the second thin metal pillar 23 and the edge of the first interconnect pad 6 is designed to be 0.075 mm, the diameter of the first thin metal pillar 21 is also designed to be 0.3 mm, and the distance between the edge of the first thin metal pillar 21 and the edge of the second interconnect pad 7 is also designed to be 0.075 mm. Based on the above ninth-order ultra-wideband matching structure, after structural parameter simulation optimization, the distance C between the edge of the first interconnect pad 6 and the pad's outer ground is designed to be 0.175, the distance D between the edge of the pad's outer ground and the semi-enclosed shielding structure 3 is designed to be 0.1, the diameter of the semi-enclosed shielding structure 3 is designed to be 1 mm, the diameter of the thick metal pillar 22 is designed to be 0.5 mm, the heights of the first thin metal pillar 21, the thick metal pillar 22, and the second thin metal pillar 23 are designed to be 0.25 mm, 0.2 mm, and 0.75 mm, respectively, and the linewidths of the inductive impedance line 84 and the capacitive impedance line 85 are 0.1 mm and 0.5 mm, respectively.

[0066] Under the above structural parameters, the electromagnetic simulation results of the proposed ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection in this embodiment are as follows: Figure 6 As shown, the structure of this embodiment has a return loss S11 better than -30 dB across the entire frequency band and an insertion loss S21 better than -29 dB across the entire frequency band within the range of 0.1~40 GHz. There is no high-frequency resonance or mode splitting throughout the entire range, thereby achieving low-loss and highly stable RF vertical interconnect between substrates in the 0.1~40 GHz ultra-wideband full frequency band, which greatly improves the bandwidth adaptability and engineering application value of the HTCC RF packaging structure.

[0067] It should be noted that this is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. An ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection, including multi-layer vertically stacked HTCC substrates, a sealing cover plate located on the top layer, a metal frame fixed around the multi-layer HTCC substrates, and an RF chip disposed on the HTCC substrates. Its features are, It also includes irregularly shaped coaxial metal pillars located between two adjacent HTCC substrates, which are composed of a first thin metal pillar, a thick metal pillar, and a second thin metal pillar connected in sequence. The first thin metal pillar is connected to the upper HTCC substrate, and the second thin metal pillar is connected to the lower HTCC substrate, realizing the vertical interconnection of the two adjacent HTCC substrates. The first and second thin metal pillars are equivalent to inductive impedance characteristics, and the thick metal pillar is equivalent to capacitive impedance characteristics. Thus, the irregularly shaped coaxial metal pillars form a multi-level alternating complementary matching network of "inductive-capacitive-inductive", realizing multi-level complex conjugate broadband impedance matching vertical interconnection.

2. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 1, characterized in that, Based on the inherent parasitic capacitance and impedance distribution characteristics of the interconnection ports between the irregularly shaped coaxial metal pillars and the upper and lower HTCC substrates, the diameters and heights of the first thin metal pillar, the thick metal pillar, and the second thin metal pillar are designed to match.

3. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 1, characterized in that, The diameters of the first and second thin metal pillars are 0.3 mm.

4. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 3, characterized in that, The HTCC substrate has a first interconnect pad connected to a second fine metal pillar on its upper surface and a second interconnect pad connected to the first fine metal pillar on its lower surface. The diameter of the first interconnect pad is at least 0.15 mm larger than the diameter of the second fine metal pillar, and the diameter of the second interconnect pad is at least 0.15 mm larger than the diameter of the first fine metal pillar.

5. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 4, characterized in that, A first grounded coplanar waveguide transmission structure is provided above the HTCC substrate, with its signal line conductor connected to the first interconnect pad, and the dielectric layer thickness is 0.3 mm, which suppresses higher-order modes while ensuring 50 Ω impedance matching.

6. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 5, characterized in that, The signal line conductor of the first grounded coplanar waveguide transmission structure adopts a multi-level high and low impedance line structure, which has a two-level structure, including an inductive impedance line connected to the first interconnect pad and a capacitive impedance line connected to the 50 Ω coplanar waveguide transmission line.

7. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 6, characterized in that, A defective ground slot structure is provided in the HTCC substrate area below the first interconnect pad. The metal ground layer where it is located is located below the bottom ground layer of the first ground coplanar waveguide transmission structure, forming a first capacitive matching unit with the first interconnect pad.

8. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 7, characterized in that, The second interconnect pad and the metal ground plane of the same layer form a second capacitive matching unit.

9. The ultra-wideband packaging structure based on irregularly shaped coaxial HTCC substrate interconnection according to claim 8, characterized in that, A coaxial inductive matching structure is set above the second interconnect pad, and the standard characteristic impedance matching with the 50 Ω coplanar waveguide transmission line is achieved through the second grounded coplanar waveguide transmission structure; wherein, the center conductor of the coaxial inductive matching structure passes through to the signal line conductor of the second grounded coplanar waveguide transmission structure; a capacitive matching structure is formed between the signal line conductor of the second grounded coplanar waveguide transmission structure and the bottom ground layer.

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