Bypass dual duty cycle voltage regulator with ac regulation

Abstract

A DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals having different duty cycles. In an under-voltage condition, a PWM signal having a larger duty cycle can be selected for use. The DC-DC converter can include gain circuitry coupled as feedback from an output to the PWM signal generators to provide alternating current (AC) regulation.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 623,761, filed January 22, 2024, entitled “BypassDual Duty Cycle Voltage Regulator Having AC Regulation,” pursuant to 35 USC 119(e). The disclosure of U.S. Provisional Patent Application Serial No. 63 / 623,761 is incorporated herein by reference in its entirety. Background Technology

[0003] This invention relates generally to power regulation, and more specifically, to power regulation via a DC-DC switching converter.

[0004] DC-DC switching converters typically provide regulated power to operating circuit systems, such as integrated circuits in semiconductor devices. These integrated circuits often require power to be supplied within specific parameters during operation. Providing this power can present many complexities. For example, the semiconductor chip including the integrated circuit may have different sections that require power at the same or different times, different sections may require power within different parameter ranges, and some sections may utilize different amounts of power at different times. Complicating matters further, some devices may be powered by relatively small-capacity batteries, while the device itself, at least at various times, may require a large amount of power.

[0005] In many cases, the power requirements of the operating circuitry can vary significantly, and even dramatically over short periods. Properly controlling converter operation can be challenging when the desired output power changes abruptly. Summary of the Invention

[0006] This invention relates to the control of a DC-DC converter. One embodiment provides a digitally controlled DC-DC converter comprising: a series-coupled high-side switch and a low-side switch, a first terminal of an output inductor coupled to a node between the high-side switch and the low-side switch and a second terminal of the output inductor providing a regulated output to a load, and an output capacitor coupled to the second terminal of the output inductor; a first pulse width modulation (PWM) signal generator configured to generate a first PWM signal having a first duty cycle; a second PWM signal generator configured to generate a second PWM signal having a second duty cycle greater than the first duty cycle; a logic circuit system for selecting either the first PWM signal or the second PWM signal for controlling the high-side switch and the low-side switch; and a gain circuit system coupled as feedback from the second terminal of the output inductor to the first PWM signal generator and the second PWM signal generator.

[0007] Another embodiment provides a method for controlling a switching DC-DC converter, comprising: generating a first pulse width modulation (PWM) signal having a first duty cycle; generating a second PWM signal having a second duty cycle having a duration different from the first duty cycle; controlling the operation of at least some switches of the switching DC-DC converter based on the first PWM signal if the output voltage of the DC-DC converter is lower than a first predefined voltage level; and controlling the operation of at least some switches of the switching DC-DC converter based on the second PWM signal if the output voltage of the DC-DC converter is higher than the first predefined voltage level.

[0008] Another embodiment provides a digitally controlled DC-DC converter, comprising: A series-coupled high-side switch and low-side switch, a first terminal of an output inductor coupled to a node between the high-side switch and the low-side switch, and a second terminal of the output inductor providing a regulated output to the load, an output capacitor coupled to the second terminal of the output inductor; multiple pulse width modulation (PWM) signal generators, each configured to generate PWM signals with different duration duty cycles; and circuitry for selecting one of the PWM signals for controlling the high-side switch and low-side switch based on measurements of the regulated output.

[0009] These and other aspects of the invention will be more fully understood upon reading this disclosure. Attached Figure Description

[0010] Figure 1 This is a half-schematic and half-block diagram of a voltage-regulated DC-DC converter according to aspects of the present invention.

[0011] Figure 2 This is a half-schematic and half-block diagram of another regulated DC-DC converter including a logic block circuit system according to aspects of the present invention.

[0012] Figure 3 This is a half-schematic and half-block diagram of a PWM generator according to aspects of the present invention.

[0013] Figure 4 yes Figure 3 Block diagram of a PWM generator.

[0014] Figure 5 This is a half-schematic and half-block diagram of another regulated DC-DC converter according to aspects of the present invention.

[0015] Figure 6 A series of graphs are provided illustrating the effects of using bias voltage to modify converter operation according to aspects of the present invention.

[0016] Figure 7The illustration shows a small-signal model of AC modulation via feedback gain across an LC filter according to an embodiment of the present invention.

[0017] Figure 8 This is a graph illustrating the slope of an open-loop filter according to an embodiment of the present invention.

[0018] Figure 9 This is a graph illustrating the Barkhausen criterion for AC regulation according to an embodiment of the present invention.

[0019] Figure 10 This is a half-schematic and half-block diagram of a DC-DC converter with AC regulation according to some embodiments of the present invention.

[0020] Figure 11 This is a half-schematic and half-block diagram of a DC-DC converter with AC regulation according to some embodiments of the present invention.

[0021] Figure 12 This is a half-schematic and half-block diagram of a DC-DC converter with AC regulation according to some embodiments of the present invention.

[0022] Figure 13 This is a graph showing the power spectral density according to an embodiment of the present invention.

[0023] Figure 14 This is a graph illustrating an example response of a DC-DC converter with AC regulation to a sudden load transient according to an embodiment of the present invention.

[0024] Figure 15 This is a semi-schematic and semi-block diagram of the implementation method of AC adjustment blanking according to an embodiment of the present invention.

[0025] Figure 16 This is a graph illustrating an example of the response caused by AC adjustment blanking according to an embodiment of the present invention. Detailed Implementation

[0026] Turning now to the accompanying drawings, a DC-DC converter with AC regulation according to an embodiment of the present invention is disclosed. AC regulation can be implemented in those DC-DC converters such as those described in U.S. Patent Publication No. 2016 / 035,9411, the relevant portions of which are incorporated herein by reference in their entirety. Figure 1 This is a half-schematic and half-block diagram of a voltage-regulated DC-DC converter according to aspects of the present invention. Figure 1The DC-DC converter operates switch 111 to regulate the voltage applied to load 119. For this purpose, the converter operates the switch according to a pulse width modulation (PWM) signal generated by either a first PWM generator 125a or a second PWM generator 125b. The selection of which PWM signals to use is based on whether the converter's output voltage is below a predetermined amplitude, for example, indicated by comparator 123. In various embodiments, the first PWM generator generates a signal with a smaller duty cycle than the signal generated by the second PWM generator; if the DC-DC converter's output voltage is below the predetermined voltage, the signal from the second PWM generator is used.

[0027] In most embodiments, the PWM generator generates a PWM signal based on the supply voltage provided to the DC-DC converter and one or more reference voltages. In some embodiments, a second PWM generator is effectively provided with a higher reference voltage than the first PWM generator for signal generation, the higher reference voltage effectively increasing the duty cycle. In some embodiments, the first and second PWM generators determine the duty cycle of their respective output signals based on the first and second reference voltage signals provided to them and the supply voltage provided to the DC-DC converter, respectively. In some embodiments, the second reference voltage signal provided to the second PWM generator is greater than the first reference voltage signal provided to the first PWM generator. In some embodiments, the second reference voltage signal is larger than the first reference voltage signal by a voltage reference adjustment amount. In some embodiments, the magnitude of the voltage reference adjustment amount is on the order of ten percent of the first reference voltage signal. In some embodiments, the first reference voltage signal is the desired output voltage of the DC-DC converter. In some embodiments, the first reference voltage signal is the desired output voltage of the DC-DC converter plus a bias voltage. In some embodiments, the bias voltage is on the order of ten percent of the desired output voltage of the DC-DC converter.

[0028] Therefore, refer to Figure 1 The converter includes a high-side switch 113a and a low-side switch 113b that provide a switch 111, an output inductor 115, an output capacitor 117, a logic block 121 for controlling the high-side switch 113a and the low-side switch 113b, a comparator 123, a first PWM generator 125a and a second PWM generator 125b.

[0029] The first terminal (e.g., the source terminal) of high-side switch 113a is connected to a high-voltage source that provides the input voltage. The second terminal (e.g., the drain terminal) of high-side switch 113a is connected to the first terminal (e.g., the drain terminal) of low-side switch 113b. The second terminal (e.g., the source terminal) of low-side switch 113b is connected to a low-voltage source (e.g., ground). Therefore, high-side switch 113a and low-side switch 113b are connected in series between the high-voltage source and the low-voltage source. High-side switch 113a and low-side switch 113b can be formed, for example, using metal-oxide-semiconductor field-effect transistors (MOSFETs), wherein a p-channel MOSFET forms high-side switch 113a and an n-channel MOSFET forms low-side switch 113b. In operation, either the high-side switch is on, or the low-side switch is on, or neither switch is on.

[0030] The first terminal of the output inductor 115 is connected to the node between the high-side switch 113a and the low-side switch 113b. The second terminal (output terminal) of the output inductor 115 is connected to the first terminal of the output capacitor 117, which is grounded. The output capacitor 117 typically supplies the output voltage to the terminal of the load 119, the other terminal of which is shown as grounded.

[0031] Comparator 123 receives the output of the output inductor / output capacitor and a reference voltage as inputs. The magnitude of the reference voltage is equal to the desired output voltage of the DC-DC converter minus a tolerance. Typically, it is preferred that the DC-DC converter provides an output voltage equal to the reference voltage, but not lower than the reference voltage minus the tolerance. The comparator is configured to generate a signal indicating whether the output voltage of the DC-DC converter is greater than or less than the reference voltage minus the tolerance. In some embodiments, comparator 123 may output a high signal when the output voltage is lower than the reference voltage minus the tolerance, and a low signal otherwise.

[0032] The first PWM generator 125a and the second PWM generator 125b are typically used to generate PWM signals for operating the high-side and low-side switches. The first and second PWM generators typically generate a series of pulses based on the frequency and duty cycle of the PWM generator, for example, based on a reference voltage and the output voltage of the DC-DC converter. Therefore, Figure 1 The first PWM generator receives the reference voltage V. ref_A And the second PWM generator receives the reference voltage V ref_B In some embodiments, V ref_A It is the desired output voltage of the DC-DC converter plus a bias offset, which can be, for example, about ten percent of the desired output voltage of the DC-DC converter. In some embodiments, V ref_B It is V ref_AIn addition, an adjustment amount, similar to the bias offset, can be added, for example, approximately ten percent of the desired output voltage. Furthermore, although... Figure 1 Not illustrated, but in most embodiments, the first and second PWM generators also receive signals indicating the voltage supplied to the DC-DC converter.

[0033] consider Figure 6 The chart provides a useful example of how to adjust the reference voltage to include bias offset. Figure 6 The graphs illustrate the variation of the inductor current with respect to time. The first graph, 611, shows the pulse-frequency modulated inductor current of an ideal buck converter. For an ideal buck converter, the inductor current remains positive throughout operation, returning to zero between pulses. However, the second graph, 613, shows that for a practical buck converter with resistive losses associated with the inductor, the inductor current reverses and becomes negative near the end of each pulse. Negative inductor current can be reduced or avoided by compensating the reference voltage with a bias offset, as shown in the third graph, 615.

[0034] Logic block 121 can receive signals generated by comparator 123 and pulses generated by the first and second PWM generators to control the states of high-side switch 113a and low-side switch 113b. Logic block 121 typically controls the states of those switches by forming control signals for controlling high-side switch 113a and low-side switch 113b. In various embodiments, if the DC-DC converter output voltage is greater than a reference voltage minus a tolerance, the logic block effectively passes a signal from the first PWM generator to the high-side and low-side switches, and if the DC-DC converter output voltage is less than a reference voltage minus a tolerance, it effectively passes a signal from the second PWM generator to the high-side and low-side switches. Because the signal from the second PWM generator has an increased duty cycle time compared to the signal from the first PWM generator, the high-side switch is on for a longer period, allowing the DC-DC converter to provide increased power.

[0035] Figure 2 This is a half-schematic and half-block diagram of another regulated DC-DC converter including a logic block circuit system according to aspects of the present invention. Figure 2 DC-DC converters are similar to Figure 1 DC-DC converter.

[0036] like Figure 2As shown, the converter 211 includes a high-side switch 213a, a low-side switch 213b, a bypass switch 220, an output inductor 215, an output capacitor 217, a power load 219, a logic circuit system 221 for controlling the high-side, low-side and bypass switches, a first comparator 223, a second comparator 224, a first pulse width modulation (PWM) generator 225a and a second PWM generator 225b.

[0037] High-side switch 213a and low-side switch 213b are coupled in series between a first voltage source and a second voltage source. The voltage of the first voltage source is higher than that of the second voltage source. The high-side switch couples the first voltage source to the low-side switch, and the low-side switch couples the second voltage source to the high-side switch. For illustrative purposes, the high-side and low-side switches are also shown to have a resistance (R) provided by the switches. DSON ).

[0038] One end of the output inductor 215 is coupled to the node between the high-side switch 213a and the low-side switch 213b, and also to the first terminal of the bypass switch 220. The other end of the output inductor is coupled to the output capacitor 217, the second terminal of the bypass switch 220, and the power load 219, with a load current I. Load The power load flows through it. The node connecting the other end of the output inductor, the output capacitor, and the load can generally be considered as the output of the DC-DC converter. For illustrative purposes, the other end of the output inductor 215 is also shown with resistance (R) provided by the output inductor and associated circuit paths (e.g., parasitic effects). DCR ).

[0039] First comparator 223 and second comparator 224 typically have a first input coupled to the output node, and their second inputs coupled to a reference voltage. The comparators are configured to determine which input is larger. For the first comparator 223, the reference voltage may, for example, be the desired output voltage of the DC-DC converter minus a tolerance voltage. Therefore, the first comparator determines whether the output voltage of the DC-DC converter is less than or greater than the desired output voltage minus the tolerance voltage. For the second comparator 224, the reference voltage may be the desired output voltage of the DC-DC converter plus a tolerance voltage. Therefore, the second comparator determines whether the output voltage of the DC-DC converter is greater than or less than the desired output voltage plus the tolerance voltage.

[0040] The first PWM generator 225a and the second PWM generator 225b are typically based on a reference input signal and a signal indicating the voltage supplied to the DC-DC converter. Figure 2(Not shown) to generate signals for controlling the operation of the high-side and low-side switches. In various embodiments, the PWM generator generates a signal with a duty cycle that depends on a reference input signal and a signal indicating the voltage supplied to the DC-DC converter. In some embodiments, the reference input signal of the first PWM generator 225a may be the sum of the desired output voltage and the bias voltage of the DC-DC converter. In some embodiments, the reference input voltage signal of the second PWM generator 225b may be the sum of the desired output voltage, the bias voltage, and the voltage offset of the DC-DC converter. In some embodiments, the voltage offset is 10% of the reference voltage. Figure 2 As shown, in some embodiments, the signal generated by the second PWM generator 225b (which may be referred to as PWM) adj The signal has a larger duty cycle (which may be referred to as PWM) than the signal generated by the first PWM generator 225a. Therefore, since the signal indicates the relative duration of the high-side switch conduction, when using PWM... adj When using a signal, the high-side switch is on for a longer time than when using a PWM signal.

[0041] The logic circuit system 221 can receive output signals from the first and second comparators, as well as signals generated by the first and second PWM generators, to control the states of the high-side, low-side, and bypass switches. In some embodiments, the logic circuit system 221 may be... Figure 1 The logic circuit system 221 implements logic block 121. Logic circuit system 221 typically controls the states of those switches by generating control signals for controlling the high-side, low-side, and bypass switches. (See reference...) Figure 2 The logic circuit system 221 includes a multiplexer 227 that receives PWM and PWMadj signals and bases them on the output CMP of the first comparator 223. ADJ To select one of these signals for use.

[0042] like Figure 2 As shown, latch 229 stores the signal generated by second comparator 224. The latch stores the signal when the output of the multiplexer, which indicates the end of the duty cycle of the converter switch, transitions to a high state. The output of the latch is provided to the gate of the bypass switch, OR gate 231, and then to AND gate 233 after passing through inverter 235. The OR gate also receives the output of the multiplexer and provides an output to the gate of the high-side switch. The high-side switch is turned on when its gate input is low, so the high-side switch is turned on when both the output of the multiplexer and the output of the latch are low. The AND gate also receives the output of the multiplexer and provides an output to the gate of the low-side switch. The low-side switch is turned on when its gate input is high, so the low-side switch is turned on when the output of the inverted latch is high and the output of the multiplexer is high.

[0043] Figure 3 This is a half-schematic and half-block diagram of a PWM generator according to aspects of the present invention. The PWM generator typically provides a first-order unconditionally stable loop. The loop provides an output PWM duty cycle that tracks changes in the input supply voltage, such that applying the PWM duty cycle will produce the desired output voltage. In some embodiments, Figure 3 PWM generator used as Figure 1 , Figure 2 as well as Figure 5 The PWM generator in the embodiment (discussed below).

[0044] Figure 3 The PWM generator includes an integrator section 311 and a gain section 313. The integrator section integrates the error between the reference voltage and the output signal of the PWM generator. Figure 3 In one embodiment, the integrator section includes an operational amplifier circuit having a capacitor 321 coupled between the output of operational amplifier 315 and its inverting input. Also coupled to the inverting input is a reference voltage coupled through a first resistor 317 having a resistance of R, and the output of a PWM generator coupled through a second resistor 319 also having a resistance of R. The reference voltage can be, as discussed with respect to other figures, for example, the desired output voltage of the DC-DC converter plus a voltage tolerance, or the desired output voltage plus a voltage adjustment.

[0045] The output of the integrator is provided to the gain section. The gain section includes a comparator 325, which also receives a value with a height V. t The input is a triangular wave. Because the integrator and comparator use the power supply voltage V... dd Operation, while expecting the PWM duty cycle to track the DC-DC converter power supply voltage V. in The change in V causes the comparator's output to be shifted relative to V by level shifter 327. in A level shift is performed, and the level-shifted output is provided to inverter 323. The inverter provides a PWM output signal, which, as mentioned above, is also scaled and fed back to the operational amplifier via resistor 319.

[0046] Figure 4 China provides Figure 3 The block diagram of the PWM generator and its associated transfer function are shown. A reference voltage and feedback from the PWM generator output are provided to a subtractor, which subtracts the feedback from the reference voltage. The result is provided to an integrator 413, whose output is amplified by a gain block 415, which provides the output of the PWM generator.

[0047] Figure 5This is a half-schematic and half-block diagram of another regulated DC-DC converter according to aspects of the present invention. Figure 5 As shown, the converter 511 includes a high-side switch 513a, a low-side switch 513b, a bypass switch 520, an output inductor 515, an output capacitor 517, a power load 519, a controller circuit system 521 for controlling the high-side, low-side, and bypass switches, a voltage overshoot detector 524, multiple voltage undershoot detectors, a pulse width modulation (PWM) generator 525a, and multiple scaling PWM generators. Typically, Figure 5 Implementation examples and Figure 2 The embodiments are largely the same. However, Figure 5 The embodiment includes a PWM generator and multiple scaled PWM generators. Depending on which of several voltage ranges the converter's output voltage falls into, the output of the secondary PWM generator is selected to control the regulator's switching.

[0048] and Figure 2 Similar to a DC-DC converter, a high-side switch 513a and a low-side switch 513b are coupled in series between a first voltage source and a second voltage source. The voltage of the first voltage source is higher than that of the second voltage source. The high-side switch couples the first voltage source to the low-side switch, and the low-side switch couples the second voltage source to the high-side switch. For illustrative purposes, a resistor (R) provided by the high-side switch is also shown. DSON ).

[0049] One end of the output inductor 515 is coupled to the node between the high-side switch 513a and the low-side switch 513b, and also to the first terminal of the bypass switch 520. The other end of the output inductor is coupled to the output capacitor 517, the second terminal of the bypass switch 520, and the power load 519, with a load current I. Load The power load flows through the output inductor. The node connecting the other end of the output inductor, the output capacitor, and the power load can generally be considered as the output of the DC-DC converter. For illustrative purposes, the other end of the output inductor 515 also shows the resistance (R) provided by the output inductor and associated circuit paths (e.g., parasitic effects). DCR ).

[0050] Each of a plurality of voltage undershoot detectors (e.g., a first voltage undershoot detector 523 and a second voltage undershoot detector 526) and a voltage overshoot detector 524 typically has a first input coupled to an output node, a second input coupled to a reference voltage, and the detectors are configured to determine which input is larger. For example, multiple voltage undershoot detectors can allow a DC-DC converter to determine whether a reference voltage of different magnitudes is greater than or less than the voltage at the output node. For the voltage overshoot detector 524, the reference voltage may, for example, be the sum of the desired output voltage of the DC-DC converter and a tolerance voltage. Therefore, the voltage overshoot detector determines whether the output voltage of the DC-DC converter is less than or greater than the desired output voltage plus the tolerance voltage. For each of the plurality of voltage undershoot detectors, the reference voltage may be the desired output voltage of the DC-DC converter minus the product of the tolerance voltage and a predetermined value. The predetermined value typically ranges from 1 to n, where n represents the number of voltage undershoot detectors in the DC-DC converter. Figure 5 As shown in the embodiment, the converter 511 has two voltage undershoot detectors, a first voltage undershoot detector 523 and a second voltage undershoot detector 526. Therefore, in such an embodiment, n will be equal to 2, and the predetermined value range is from 1 to 2.

[0051] Each of the multiple scaling PWM generators and the PWM generator 525a is typically based on a reference input signal and a signal indicating the output voltage of the DC-DC converter. Figure 5 (Not shown) to generate signals for controlling the operation of the high-side and low-side switches. In various embodiments, the PWM generator generates a signal with a duty cycle that depends on a reference input signal and a signal indicating the voltage supplied to the DC-DC converter. In some embodiments, the reference input signal of the PWM generator 525a may be the sum of the desired output voltage and the bias voltage of the DC-DC converter. In some embodiments, the reference input voltage signal of each of a plurality of scaling PWM generators (e.g., a first scaling PWM generator 525b and a second scaling PWM generator 525c) may be the sum of the desired output voltage, the bias voltage, and the voltage offset of the DC-DC converter multiplied by a predetermined value (as discussed above with respect to voltage undershoot detectors). In many embodiments, the number of scaling PWM generators is equal to the number of voltage undershoot detectors in the DC-DC converter, and there is a one-to-one correspondence between the plurality of scaling PWM generators and the plurality of voltage undershoot detectors based on predetermined values. Therefore, in many embodiments, the predetermined value is also equal to the number of scaling PWM generators in the DC-DC converter. In some embodiments, the voltage offset is equal to or approximately ten percent of the reference voltage. Figure 5As shown, in some embodiments, the signal generated by each of the plurality of scaling PWM generators (which may be referred to as PWMadj1…PWMadjn) has a larger duty cycle than the signal generated by PWM generator 525a (which may be referred to as PWM). Therefore, since the signals indicate the relative duration of the high-side switch conduction, the high-side switch conduction time is longer when using the PWMadj1…PWMadjn signals than when using the PWM signals. In some embodiments, depending on a predetermined value associated with each scaling PWM generator, the signal generated by one scaling PWM generator has a larger duty cycle than the signal generated by another scaling PWM generator. For example, in… Figure 5 In one embodiment, the signal generated by the second scaling PWM generator 525c will have a larger duty cycle than the signal generated by the first scaling PWM generator 525b.

[0052] In some embodiments, the controller circuit system 521 and Figure 2 The logic circuit system 221 is similar to or the same as that of the controller circuit system 521. The controller circuit system 521 can receive output signals from the voltage overshoot detector 524 and multiple voltage undershoot detectors, as well as signals generated by the PWM generator 525a and multiple scaled PWM generators, to control the states of the high-side, low-side, and bypass switches. The controller circuit system 521 typically controls the states of those switches by generating control signals for controlling the high-side, low-side, and bypass switches. (Reference) Figure 5 The controller circuit system 521 includes a selector 527 that receives PWM and PWMadj1…PWMadjn signals and is based on the output CMP of multiple voltage undershoot detectors. ADJ1 …CMP ADJn To select one of these signals for use.

[0053] like Figure 5 As shown, latch 529 stores a signal generated by voltage overshoot detector 524. The latch stores this signal when the output of the selector, which indicates the end of the duty cycle of the converter switch, transitions to a high state. The latch's output is provided to the gate of the bypass switch, OR gate 531, and then to AND gate 533 after passing through inverter 535. The OR gate also receives the selector's output and provides an output to the gate of the high-side switch. The high-side switch is turned on when its gate input is low, so it is turned on when both the selector's output and the latch's output are low. The AND gate also receives the selector's output and provides an output to the gate of the low-side switch. The low-side switch is turned on when its gate input is high, so it is turned on when both the inverted latch output and the selector output are high.

[0054] AC adjustment

[0055] In a further embodiment of the invention, the digitally controlled DC-DC converter can implement alternating current (AC) regulation (ACR). In some embodiments of the invention, the DC-DC converter with ACR has a gain fed back from the load output across an LC filter provided by an output inductor and an output capacitor. This gain can be fed back to provide more power, improving the duty cycle response to abrupt load transients (e.g., AC events). As a feedback loop, AC regulation can be implemented without causing instability. Without ACR capability, a conventional DC-DC converter would operate at maximum duty cycle DC... ADJ To respond to sudden changes in load current.

[0056] Figure 7 The figure illustrates a small-signal model of AC modulation via feedback gain across an LC filter according to an embodiment of the present invention.

[0057] In some embodiments, the gain is provided by a gain function. In some embodiments, the gain function operates as a DC blocking high-pass filter. In some embodiments, the transformation of the gain function s-function G(s) is:

[0058] in It is the unity gain frequency of the integrator.

[0059] The open-loop transfer function is given by the following equation:

[0060] In some embodiments, It is at least twice 1 / sqrt(LC). This results in a stable open-loop (OL) filter with a bandwidth of -20dB / decibels. Figure 8 It is a graph showing the slope and 73° phase margin.

[0061] Because the oscillator uses a comparator as its clock, it exhibits chaotic behavior similar to Σ-Δ (sigma delta) modulation. The oscillation frequency becomes random, and the total power is distributed between DC and F. CLK Between / 2. Some limiting loops (tones) may occur, although the second-order nature of the loop filter reduces their amplitude. The feedback filter G(s) can have an attenuation effect of up to -40 dB. For a 4A buck converter, the quantization step size at the DAC is Δv = 60mV. When attenuated by 40dB, V out The power at that point is 0.6mV. rms At a bandwidth of 20MHz (40MHz switching), 15nV / sqrt(Hz) is 1.2V. rms .

[0062] Figure 9 This is a graph illustrating the Barkhausen criterion for AC adjustment on a 2π total phase according to an embodiment of the present invention. CLK The higher the value, the higher the oscillation frequency, V DAC The higher the decay, the more V OUT The lower the ripple level.

[0063] Figure 10 The figure illustrates a DC-DC converter with AC regulation according to some embodiments of the present invention. The DC-DC converter shown is similar to the one described above. Figure 1 , Figure 2 and Figure 5 A further described embodiment utilizes a free-running sawtooth wave PWM generator to generate signals for controlling the switches. The transfer function G(s) for AC regulation is obtained using the gain G. ACR Implemented by 1002, this gain is fed back to the input of the sawtooth wave PWM generator, which provides V. ref and V ref + V adj Duty cycle.

[0064] The converter 1011 includes a high-side switch 1013a, a low-side switch 1013b, a bypass switch 1020, an output inductor 1015, an output capacitor 1017, a power load 1019, a logic circuit system 1021 for controlling the high-side, low-side and bypass switches, a first comparator 1023, a second comparator 1024, a first pulse width modulation (PWM) generator 1025a and a second PWM generator 1025b.

[0065] A high-side switch 1013a and a low-side switch 1013b are coupled in series between a first voltage source and a second voltage source. The voltage of the first voltage source is higher than that of the second voltage source. The high-side switch couples the first voltage source to the low-side switch, and the low-side switch couples the second voltage source to the high-side switch. For illustrative purposes, the high-side and low-side switches are also shown to have a resistance (R) provided by the switches. DSON ).

[0066] One end of the output inductor 1015 is coupled to the node between the high-side switch 1013a and the low-side switch 1013b, and also to the first terminal of the bypass switch 1020. The other end of the output inductor is coupled to the output capacitor 1017, the second terminal of the bypass switch, and the power load 1019, with a load current I. LoadThe power load flows through it. The node connecting the other end of the output inductor, the output capacitor, and the load can generally be considered as the output of the DC-DC converter. For illustrative purposes, the other end of the output inductor 1015 is also shown with resistance (R) provided by the output inductor and associated circuit paths (e.g., parasitic effects). DCR ).

[0067] First comparator 1023 and second comparator 1024 typically have a first input coupled to the output node, and their second inputs coupled to a reference voltage. The comparators are configured to determine which input is larger. For the first comparator 1023, the reference voltage may, for example, be the desired output voltage of the DC-DC converter minus a tolerance voltage. Therefore, the first comparator determines whether the output voltage of the DC-DC converter is less than or greater than the desired output voltage minus the tolerance voltage. For the second comparator 1024, the reference voltage may be the desired output voltage of the DC-DC converter plus a tolerance voltage. Therefore, the second comparator determines whether the output voltage of the DC-DC converter is greater than or less than the desired output voltage plus the tolerance voltage.

[0068] The first PWM generator 1025a and the second PWM generator 1025b are typically based on a reference input signal and a signal indicating the voltage supplied to the DC-DC converter. Figure 10 (Not shown) to generate signals for controlling the high-side and low-side switching operation. In various embodiments, the PWM generator generates a signal with a duty cycle that depends on a reference input signal and a signal indicating the voltage supplied to the DC-DC converter. In some embodiments, the reference input signal of the first PWM generator 1025a may be the sum of the desired output voltage and the bias voltage of the DC-DC converter. In some embodiments, the reference input voltage signal of the second PWM generator 1025b may be the sum of the desired output voltage, the bias voltage, and the voltage offset of the DC-DC converter. In some embodiments, the voltage offset is 10% of the reference voltage. Figure 10 As shown, in some embodiments, the signal generated by the second PWM generator 1025b (which may be referred to as PWM) adj The signal has a larger duty cycle than the signal (which can be referred to as PWM) generated by the first PWM generator 1025a. Therefore, since the signal indicates the relative duration of the high-side switch conduction, when using PWM... adj When using a signal, the high-side switch is on for a longer time than when using a PWM signal.

[0069] The logic circuit system 1021 can receive output signals from the first and second comparators, as well as signals generated by the first and second PWM generators, to control the states of the high-side, low-side, and bypass switches. In some embodiments, the logic circuit system 1021 can be... Figure 1 The logic circuit system 1021 implements logic block 121. Logic circuit system 1021 typically controls the states of those switches by generating control signals for controlling the high-side, low-side, and bypass switches. (See reference...) Figure 10 The logic circuit system 1021 receives PWM and PWM. adj The signal, and based on the output CMP of the first comparator 1023. ADJ To select one of these signals for use. The logic circuit system 1021 can receive the signal generated by the second comparator 1024, and as described above regarding... Figure 2 The high-side switch 1013a and the low-side switch 1013b are operated as discussed further.

[0070] Figure 11 The figure illustrates a DC-DC converter with AC regulation according to an additional embodiment of the present invention. Gain G ACR This is achieved using the capacitor ratio C3 / C1 of a transintegrator operational amplifier, which provides the input to the sawtooth wave generator. At high G... ACR In this case, the operational amplifier preferably achieves a high unity bandwidth. The remaining components and configurations can be similar to those described above, such as those related to... Figure 10 The embodiments described further.

[0071] Figure 12 The figure illustrates a DC-DC converter with AC regulation according to a further embodiment of the present invention. Gain G ACR It is implemented using a feedback signal as the second input to the sawtooth wave generator. In high G... ACR Below, the bandwidth requirement for operational amplifiers is relaxed. The remaining components and configurations can be similar to those described above, such as those related to... Figure 10 The embodiments described further.

[0072] Figure 13 This is a graph illustrating the power spectral density according to an embodiment of the present invention. The graph shows the power spectral density of a DC-DC converter with AC regulation according to an embodiment of the present invention, under the condition of a step-down voltage of 4A and V. in 3.3, V out 1.0V, F SW =20MHz, noise density is 50nV / sqrt(Hz) DC-DC converter from DC to F SW / It exhibits the lowest quantization noise within the range of 2.

[0073] Figure 14This is a graph illustrating an example response of a DC-DC converter with AC regulation according to an embodiment of the present invention to a rapid load transient. The feedback gain G(s) increases the duty cycle in AC to respond to the rapid load transient. The load current is shown as a step from 1 to 4. The inductor current is shown as a sawtooth waveform following the load current transition.

[0074] Figure 15 The implementation of AC adjustment blanking according to an embodiment of the present invention is shown. When V in As the ramp rises or falls, capacitor Ca is reconnected to ground. In this way, dynamic voltage control (DVC), which adjusts the voltage level based on changing load conditions, becomes faster. Figure 16 The diagram illustrates a graph showing an example of a faster response. The first line represents V with AC adjustment blanking. out As time changes, the second line is V without AC adjustment blanking. out Changes over time. The remaining components and configurations can be similar to those described above, such as those related to... Figure 10 The embodiments described further.

[0075] Although the invention has been discussed with respect to various embodiments, it should be recognized that the invention includes novel and non-obvious claims supported by this disclosure.

Claims

1. A digitally controlled DC-DC converter, comprising: A series-coupled high-side switch and low-side switch, a first end of an output inductor coupled to a node between the high-side switch and the low-side switch, and a second end of the output inductor providing a regulated output to the load, with an output capacitor coupled to the second end of the output inductor; A first pulse width modulation (PWM) signal generator is configured to generate a first PWM signal with a first duty cycle. A second PWM signal generator is configured to generate a second PWM signal with a second duty cycle greater than the first duty cycle; A logic circuit system is used to select either the first PWM signal or the second PWM signal to control the high-side switch and the low-side switch. as well as The gain circuit system is coupled as feedback from the second terminal of the output inductor to the first PWM signal generator and the second PWM signal generator.

2. The digitally controlled DC-DC converter of claim 1, further comprising a first comparator coupled to the regulated output, the first comparator being configured to compare the voltage of the regulated output with a first predefined voltage, the output of the first comparator being coupled to the logic circuitry for selecting either the first PWM signal or the second PWM signal for controlling the high-side switch and the low-side switch.

3. The digitally controlled DC-DC converter according to claim 2, wherein, The first predefined voltage is the desired output voltage of the DC-DC converter minus the first tolerance voltage.

4. The digitally controlled DC-DC converter according to claim 1, wherein, The first PWM generator and the second PWM generator are each first-order unconditionally stable.

5. The digitally controlled DC-DC converter according to claim 4, wherein, Each of the first PWM generator and the second PWM generator includes a circuit system for making the first duty cycle and the second duty cycle track the changes in the voltage supplied to the high-side switch, respectively.

6. The digitally controlled DC-DC converter according to claim 1, wherein, The first PWM generator is configured to generate the first PWM signal based on a first reference signal input, the first reference signal input having a voltage equal to the desired output voltage of the DC-DC converter plus a bias voltage.

7. The digitally controlled DC-DC converter according to claim 6, wherein, The bias voltage is approximately 10 percent of the desired output voltage.

8. The digitally controlled DC-DC converter according to claim 7, wherein, The second PWM generator is configured to generate the second PWM signal based on a second reference signal input, the second reference signal input having a voltage equal to the desired output voltage of the DC-DC converter plus the bias voltage plus the adjustment voltage.

9. The digitally controlled DC-DC converter according to claim 1, further comprising a bypass switch coupling the first and second terminals of the output inductor.

10. The digitally controlled DC-DC converter of claim 9, further comprising a second comparator coupled to the regulated output, the second comparator being configured to compare the voltage of the regulated output with a second predefined voltage, and wherein the state of the bypass switch is based on the output of the second comparator.

11. The digitally controlled DC-DC converter according to claim 10, wherein, The second predefined voltage is the desired output voltage of the DC-DC converter plus the second tolerance voltage.

12. The digitally controlled DC-DC converter according to claim 1, wherein, The gain circuit system is a DC blocking high-pass filter.

13. The digitally controlled DC-DC converter according to claim 12, wherein, The high-pass filter has a transfer function .

14. The digitally controlled DC-DC converter according to claim 12, wherein, The high-pass filter has an attenuation of up to -40 dB.

15. The digitally controlled DC-DC converter according to claim 1, wherein, The open-loop transfer function is .

16. The digitally controlled DC-DC converter according to claim 14, wherein, It is the unity-gain frequency of the integrator, and It is at least twice 1 / sqrt(LC).

17. The digitally controlled DC-DC converter according to claim 1, wherein, The gain circuit system includes two capacitors across the integrator operational amplifier.

18. The digitally controlled DC-DC converter according to claim 1, wherein, The gain circuit system provides input to the sawtooth wave generator in the first PWM signal generator and the second PWM signal generator.

19. A method for controlling a switching DC-DC converter, comprising: Generate a first pulse width modulation (PWM) signal with a first duty cycle; A second PWM signal with a second duty cycle is generated, the second duty cycle having a duration different from the first duty cycle; If the output voltage of the DC-DC converter is lower than a first predefined voltage level, then the operation of at least some switches of the switching DC-DC converter is controlled based on the first PWM signal; If the output voltage of the DC-DC converter is higher than the first predefined voltage level, then the operation of at least some of the switches of the switching DC-DC converter is controlled based on the second PWM signal; as well as The high-pass filter gain function is fed back from the output voltage to the first PWM signal and the second PWM signal.

20. The method according to claim 19, wherein, The at least some switches of the switching DC-DC converter are high-side switches and low-side switches, and the node between the high-side switches and the low-side switches provides a node for coupling to the output inductor of the switching DC-DC converter.

21. The method of claim 20, further comprising: If the output voltage of the DC-DC converter is higher than the second predefined voltage level, then the two ends of the output inductor of the switching DC-DC converter are coupled.

22. The method of claim 21, further comprising: If the output voltage of the DC-DC converter is higher than the second predefined voltage level, then the high-side switch and the low-side switch are disconnected.

23. The method according to claim 22, wherein, The first predefined voltage level is the desired DC-DC converter output voltage minus the first voltage tolerance.

24. The method according to claim 22, wherein, The second predefined voltage level is the desired DC-DC converter output voltage plus a second voltage tolerance.

25. A digitally controlled DC-DC converter, comprising: A series-coupled high-side switch and low-side switch, a first end of an output inductor coupled to a node between the high-side switch and the low-side switch, and a second end of the output inductor providing a regulated output to the load, with an output capacitor coupled to the second end of the output inductor; Multiple pulse width modulation (PWM) signal generators are each configured to generate PWM signals with duty cycles of different durations; A circuit system for selecting one of the PWM signals based on measurements of the regulated output to control the high-side switch and the low-side switch; as well as The gain circuit system is coupled as feedback from the second terminal of the output inductor to the first PWM signal generator and the second PWM signal generator.

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