Method for manufacturing optoelectronic devices

Abstract

The invention relates to a method for manufacturing a plurality of optoelectronic devices, comprising the steps of: providing a semiconductor layer stack on a growth substrate, comprising a first layer of a first conductivity type, a second layer of a second conductivity type, and an active region between the first layer and the second layer; structuring the semiconductor layer stack to retain first portions and to remove at least one adjacent second portion, the first portions each comprising a bottom surface and a first sidewall portion extending from the bottom surface in a direction towards the growth substrate, through at least the second layer and the active region; providing a first contact element on each bottom surface, which electrically contacts the second layer; providing a material layer, which covers at least a portion of the first sidewall portions; providing a first sacrificial layer, which at least partially covers the first contact elements and the material layer; providing a first bonding layer, which covers the first sacrificial layer; backside processing the semiconductor layer stack such that a plurality of separated optoelectronic devices is formed, each optoelectronic device having a light emitting surface; providing a holding structure, which contacts the light emitting surfaces of the optoelectronic devices; and removing the first sacrificial layer such that the optoelectronic devices are substantially only connected to the holding structure.

Description

Technical Field

[0001] This application claims priority to German patent application DE 10 2024 106 953.8, filed on March 12, 2024, the disclosure of which is incorporated herein by reference in its entirety.

[0002] The present invention relates to a method for manufacturing optoelectronic devices, particularly µLEDs, and an array of optoelectronic devices manufactured by such a method. Background Technology

[0003] µLEDs are optoelectronic devices with lateral dimensions ranging from a few µm to approximately 40 µm. Such devices provide a wide variety of applications, including but not limited to displays.

[0004] These devices are typically processed in arrays of thousands and subsequently transferred from their growth substrate or intermediate carrier to a target substrate (e.g., a display backplane). To date, optoelectronic devices, and particularly µ-LEDs, have been manufactured such that finished devices can be transferred to a driver substrate (e.g., a display backplane) via their respective transfer processes (e.g., stamping, LIFT, ...). However, known methods are generally time-consuming, error-prone, result in high defect levels, or are unnecessarily costly due to the large number of steps.

[0005] The purpose of this application is to provide an enhancement method for manufacturing optoelectronic devices, particularly µLEDs. Summary of the Invention

[0006] This and other objectives are addressed by the subject matter of the independent claim. Features and other aspects of the proposed principle are outlined in the dependent claims.

[0007] The core of this invention lies in providing a method for manufacturing optoelectronic devices, particularly µLEDs, wherein a holding structure for the optoelectronic device is provided on the light-emitting surface / top surface of the optoelectronic device, in contrast to known processes that provide a holding structure on the opposite side. This allows for easier transfer of the optoelectronic device to, for example, a backplane, and enables a less error-prone process with a lower defect level.

[0008] The key aspect lies in the interaction of several processing and design features, such as:

[0009] - A holding structure for the optoelectronic device is provided on the light-emitting surface / top surface of the optoelectronic device (to reduce the risk of partial flight of the holding structure after the optoelectronic device is transferred).

[0010] - The flipped orientation of the contact pads allows optoelectronic devices to be transferred directly using processes such as LIFT (without any tape application steps).

[0011] - A mirror surrounding the remaining semiconductor layer stack structure (optical cavity); and

[0012] - A specially tailored combination of materials used to maintain the structural materials, sacrificial layer materials, and contact layer materials.

[0013] According to a first aspect, a method for manufacturing a plurality of optoelectronic devices is provided. The method for manufacturing a plurality of optoelectronic devices includes the following steps:

[0014] A semiconductor layer stack is disposed on a growth substrate, which includes at least a first layer of a first conductivity type, a second layer of a second conductivity type, and an active region between the first layer and the second layer;

[0015] The semiconductor layer stack is structured to retain a first portion of the semiconductor layer stack and to remove at least one adjacent second portion of the semiconductor layer stack. Each of the first portions includes a bottom surface and a first sidewall portion extending from the bottom surface toward the growth substrate and passing through at least the second layer and the active region.

[0016] A first contact element of the second layer of electrical contact is provided on each bottom surface;

[0017] A material layer is provided that covers at least a portion of the first sidewall portion and, in particular, covers at least a portion of the first contact element;

[0018] A first sacrificial layer is provided, which at least partially covers the first contact element and the material layer;

[0019] A first bonding layer is provided, which covers the first sacrificial layer;

[0020] Attach the first temporary carrier to the first bonding layer;

[0021] The semiconductor layer stack opposite the bottom surface is back-side processed to form multiple separate optoelectronic devices, each of which has a light-emitting surface opposite the bottom surface;

[0022] A retaining structure is provided, which contacts the light-emitting surface of the optoelectronic device; and

[0023] The first sacrificial layer is removed, so that the optoelectronic device is essentially connected only to the retaining structure.

[0024] Optoelectronic devices can be, in particular, small light-emitting components / elements, such as miniature LEDs or µLEDs. µLEDs can be, in particular, very small LEDs with edge lengths as small as 30 µm, 10 µm, 5 µm, or even smaller. Such small LEDs may not require a growth substrate and require special processing and fabrication to improve their IQE and light output coupling efficiency. One method to improve the IQE of a µLED is to cover the first sidewall portion with a regenerated layer. Possible methods to improve the output coupling efficiency and light directionality of light emitted by a µLED are to provide output coupling structures and / or reflective structures on / within the µLED.

[0025] According to some aspects, the semiconductor layer stack includes semiconductor materials such as, for example, indium gallium aluminum phosphide (InGaAlP) or gallium nitride (GaN). The semiconductor layer stack includes at least a first layer of a first conductivity type, a second layer of a second conductivity type, and an active region between the first and second layers. The first layer may be, for example, an n-doped semiconductor layer, and the second layer may be, for example, a p-doped semiconductor layer. Therefore, these two layers can form a pn junction, with the active region disposed therebetween. The active region may, for example, include a quantum well or a multiple quantum well structure, or may, for example, include a quantum dot.

[0026] The first sidewall portion can be produced by an etching step, particularly a mesa etching step. Specifically, the first sidewall portion can be produced by a mesa etching step of the semiconductor layer stack from the bottom surface of the semiconductor layer stack. The etching step used to produce the first sidewall portion can be either a dry etching step or a combination of dry and wet etching. A particularly advantageous structure can be achieved by combining etching with a corresponding arrangement of contact layers / components.

[0027] In this regard, the term "sidewall portion" should be understood as at least a portion of the sidewall of the corresponding structure that has been etched. The etching is such that the corresponding structure forming the first sidewall portion can be, in particular, a stack of semiconductor layers.

[0028] According to some aspects, the material layer includes a regrown layer covering the first sidewall portion. Alternatively, the material layer includes a dielectric layer disposed between the first contact element and the second contact element, and / or between the bottom surface and the first contact element, and / or between the first sidewall portion and the first contact element, and / or between the first sidewall portion and the second contact element. Besides quantum well mixing, the material layer can be regrown with a semiconductor material and / or contain SiO2, Al2O3, and any other suitable material. In some cases, the material layer forms part of the outer surface of a subsequent optoelectronic device and / or forms between the first contact element and the second contact element, and / or between the bottom surface and the first contact element, and / or between the first sidewall portion and the first contact element, and / or between the first sidewall portion and the second contact element. The material layer may be specifically configured to include or comprise a dielectric layer that electrically isolates layers / components within the subsequent optoelectronic device to prevent short circuits.

[0029] The material layer may, for example, comprise or consist of a stack of SiO2, silicon nitride, Nb2O5, HfO2, Al2O3, or combinations thereof. The material layer or portions thereof may be deposited, in particular, using physical vapor deposition (PVD), plasma-enhanced chemical vapor deposition (PECVD), or atomic layer deposition (ALD).

[0030] According to some aspects, a first sacrificial layer is deposited. This first sacrificial layer at least partially covers the first contact element and / or material layer. In other words, the first sacrificial layer covers all surfaces of the exposed optoelectronic device, including any contact material on top. The first sacrificial layer may follow the shape of the underlying layer with a substantially continuous thickness, or it may fill gaps and voids in the underlying structure and may then be planarized to form a smooth surface. The first sacrificial layer may include one of Si, SiO2, metal oxides, and organic materials.

[0031] Depending on some aspects, a first bonding layer is then deposited onto the first sacrificial layer. This first bonding layer may comprise an organic material or a metal alloy, particularly containing gold. For example, the first bonding layer may comprise benzocyclobutene (BCB). The composition of the first bonding layer differs from that of the first sacrificial layer, but is selected such that any etchant used to remove the first sacrificial layer will not affect the material of the first bonding layer or the surface of subsequent optoelectronic devices.

[0032] Depending on several factors, a first temporary carrier is then attached to the first bonding layer. After attaching the first temporary carrier, the growth substrate and any underlying buffer layer can be removed to allow the light-emitting surface of the optoelectronic device to be formed / exposed. If necessary, the material of the semiconductor layer stack is also removed until a portion of the first sacrificial layer is exposed. This provides contact with the first sacrificial layer for removal / etching.

[0033] The first bonding layer does not hinder subsequent transfer processing in any way because no bonding material is located in undesirable locations, such as between optoelectronic devices. This enables the processing of very high-density optoelectronic devices on the growth substrate, thereby reducing overall costs. The retaining structure, the number of each optoelectronic device, its shape, form, and the selected materials provide flexible and precise control over the adhesion between the device and the retaining structure.

[0034] According to some aspects, the first sacrificial layer can be exposed at a relatively large size, thus shortening the etching process for removing the first sacrificial layer. This not only increases the processing speed but also reduces the potential impact of the etchant on the remaining portion (i.e., the semiconductor layer stack).

[0035] Several aspects relate to the selection of materials for the first sacrificial layer. Such selection should be based on a combination of the desired bonding material and the outer surface material of the optoelectronic device. The material for the first sacrificial layer can be selected based on all layers in direct contact with the etchant used to remove it.

[0036] In some respects, if the material layer comprises SiO2 or Si3N4, and / or the first and / or second contact elements at the outer surface of the optoelectronic device comprise Au or Ag, and particularly solderable layers such as, for example, AuSn, InSn, AuInSn, NiInSn, are selected, then the material of the first sacrificial layer is ZnO. Dissolving ZnO would be an inorganic implementation. However, ZnO is readily removed with diluted HCl, leaving SiO2, Si3N4, or noble metals such as Au, Pd, Pt, and Ag unaffected.

[0037] As an alternative, organic materials and compounds can be used for the first sacrificial layer. Polystyrene, particularly a solute in ethyl acetate or toluene, is suitable if the material layer comprises SiO2 or Si3N4 and / or the first and / or second contact elements at the outer surface of the optoelectronic device comprise Au or Ag and are particularly solderable layers such as, for example, AuSn, InSn, AuInSn, NiInSn. Polystyrene has the advantage of being soluble in organic solvents, which facilitates subsequent removal of the first sacrificial layer.

[0038] If the material layer includes SiO2, polyvinyl alcohol (PVA) is also a suitable material. It also has the advantage of being soluble in H2O. If the material layer includes SiO2 or Si3N4, a similar material is polyvinyl acetate (PVAc), which is soluble in ethyl acetate. Finally, if the first and / or second contact elements on the outer surface of the optoelectronic device include Au and Ag, Au-containing alloys, or solderable layers such as, for example, AuSn, InSn, AuInSn, and NiInSn, a soft-baking photoresist can be used. If the first and / or second contact elements on the outer surface of the optoelectronic device include Au, Au-containing alloys, or solderable layers such as, for example, AuSn, InSn, AuInSn, and NiInSn, all organic materials serving as the first sacrificial layer material can also be removed by oxygen-based plasma etching.

[0039] Some or all of the material in the first sacrificial layer can be deposited in various ways, further increasing flexibility and optimizing processing. For example, deposition techniques include spin-coating, sputtering, or spraying the first sacrificial layer material onto the surface of the first contact element and / or the second contact element and / or the material layer on the outer surface of the optoelectronic device. In some aspects, viscosity is adjusted by adding a suitable solvent. Therefore, some techniques can also be used to planarize the first sacrificial layer.

[0040] For example, one of the techniques mentioned above can be used to deposit the first sacrificial layer material and solvent. The solvent is evaporated, leaving a substantially flat and smooth surface of the first sacrificial layer material. Other deposition techniques, including melting the first sacrificial layer material or pressing molten and low-viscosity first sacrificial layer material, are also possible.

[0041] Depositing a bonding material on the first sacrificial layer can include vapor deposition of the first bonding layer material. In some aspects, thin-film solder materials based on gold alloys such as AuSn, AuInSn, and InSn or NiInSn solder materials are suitable. Alternatively, the first bonding layer material can be spin-coated, sputtered, or evaporated onto the first sacrificial layer. In some aspects, the bonding material includes an organic compound. Therefore, the bonding material may include a solvent to adjust its viscosity. This will provide a smooth surface after the solvent evaporates.

[0042] Depending on the material, other deposition techniques may be used. For example, a molten first bonding layer material may be used on the surface, or a molten or low-viscosity first bonding layer material may be pressed onto the surface of the first sacrificial layer.

[0043] Different first bonding layer materials are suitable, particularly those with different etching properties than the first sacrificial layer material. In some aspects, particularly if the first sacrificial layer comprises an organic compound and / or if the first contact element and / or the second contact element comprises a stack of solderable materials, the first bonding layer material comprises one of BCB or epoxy resin, which is at least partially cured at room temperature or slightly above. In other aspects, if the first sacrificial layer comprises PVA, the first bonding layer material comprises polystyrene, or if the first sacrificial layer comprises polystyrene, the first bonding layer material comprises epoxy resin or BCB.

[0044] In some respects, the first bonding layer is cured after the temporary carrier is attached to it. For curing purposes, thermal or optical measures may be used.

[0045] After attaching a temporary carrier, the semiconductor layer stack can be detached from the growth substrate. The temporary carrier serves as a new substrate for such processing steps. Various methods for removing the growth substrate are known in the art. This exposes the semiconductor layer stack from the back side. Possibly continuous portions of the semiconductor layer stack can also be removed to separate individual optoelectronic devices embedded within the first sacrificial layer. Removal of continuous portions of the semiconductor layer stack includes, but is not limited to, mechanical polishing, chemical mechanical polishing, CMP, wet etching, or dry etching, or combinations thereof. According to some aspects, the back-side processing step of the semiconductor layer stack therefore includes removing the growth substrate and / or chemically and / or mechanically polishing at least one of the semiconductor layer stack, particularly exposing portions of the first sacrificial layer and / or the second contact elements and / or the semiconductor layer stack.

[0046] Then, the back side of the optoelectronic device, i.e., the top surface of the semiconductor layer stack opposite the bottom surface, is exposed and can be processed / structured to form each light-emitting surface of the subsequent optoelectronic device. The light-emitting surface can thus be formed, for example, from the top surface of the semiconductor layer stack itself, or from a passivation layer or contact layer disposed on the top surface of the semiconductor layer stack.

[0047] Then, a retaining structure is provided that contacts the light-emitting surface of the optoelectronic device. This retaining structure may, for example, include individual pillars that contact the light-emitting surfaces of one or more optoelectronic devices, or it may be configured as a continuous layer that contacts the light-emitting surfaces of one or more optoelectronic devices.

[0048] Finally, the proposed method may include removing the first sacrificial layer, specifically by dry etching, wet etching, plasma etching, or dissolution in a solvent (particularly in water). Again, the chosen removal process depends on the combination of the semiconductor surface material, the first sacrificial layer material, and the bonding material. The optoelectronic device is then separated and held essentially solely by a holding structure, defining specific adhesion forces at the interface. This allows for easy transfer to a target substrate or a carrier for subsequent LIFT processing, such as using stamping.

[0049] According to some aspects, the method further includes the step of structuring the semiconductor layer stack such that a first portion includes a second sidewall portion that is different from a first sidewall portion, the second sidewall portion extending from a layer between the active region and the growth substrate toward the growth substrate and passing through at least a portion of the first layer.

[0050] In some aspects, a second structuring of the semiconductor layer stack is also performed to a depth in the remainder of the semiconductor layer stack that is greater than the depth of the previous structuring step that formed the first sidewall portion of the semiconductor layer stack. The second structuring step may, for example, stop before reaching the growth substrate, but may continue until the growth substrate is reached. Typically, some cleaning or protection may be performed on the exposed surfaces after each structuring step.

[0051] In some aspects, the second structuring of the semiconductor layer stack is performed prior to the step of setting the material layer. In this case, the material layer covers at least a portion of the first sidewall portion and the second sidewall portion.

[0052] In some aspects, the first sidewall portion extends to the same layer as the layer from which the second sidewall portion extends in the direction of the growth substrate. Specifically, the first sidewall portion may be adjacent to the second sidewall portion and may be continuous except for, for example, lateral offset from each other. However, it is also conceivable that another sidewall portion may be formed between the first and second sidewall portions due to another intermediate etching step. It is also conceivable that, due to the selected parameters of the first and second etching steps, the first and second sidewall portions are substantially continuous, and therefore there is no or substantially no lateral offset between the first and second sidewall portions.

[0053] In some aspects, the first sidewall portion includes a first layer, a second layer, and a portion of the active region. Specifically, the first sidewall portion includes the entire side surface of the second layer and the active region, as well as a portion of the first layer's side surface between the active region and the growth substrate. On the other hand, the second sidewall portion may include a portion of the first layer. Specifically, the second sidewall portion includes a portion of the first layer's side surface between the active region and the growth substrate.

[0054] In some aspects, adjacent first and second sidewall portions are laterally spaced apart from each other. The sidewall portions are created by etching from the same side of the semiconductor layer stack, and can, for example, form a pyramidal shape, where several trapezoids are stacked on top of each other in cross-section, their side surfaces forming the sidewall portions, with the largest trapezoid forming the second sidewall portion and the smallest trapezoid forming the first sidewall portion. Specifically, adjacent first and second sidewall portions are laterally displaced and discontinuous towards each other. This lateral displacement can be achieved by different etching steps having etched surfaces and cross-sections of different sizes produced by the etching.

[0055] Depending on some aspects, the first sidewall portion and / or the second sidewall portion is inclined. Due to mesa etching, the resulting sidewall portion can be inclined relative to the perpendicular of the luminescent surface or the bottom surface. In particular, the resulting sidewall portion can be inclined such that the surface facing the bottom surface is smaller in area than the surface facing the luminescent surface. Mesa etching can, in particular, leave a truncated pyramid or truncated cone in each case, whose outer surface forms the first and second sidewall portions at least in certain places. In particular, mesa etching can leave truncated pyramids or truncated cones of different sizes stacked on top of each other, whose outer surfaces form inclined and laterally spaced first and second sidewall portions at least in certain places.

[0056] According to some aspects, the method further includes the step of providing second contact elements of the first layer that electrically contact each first portion on the material layer, and particularly on the second sidewall portion. However, the method may also include the step of providing second contact elements of the first layer that electrically contact each first portion on the exposed top surface of the semiconductor layer stack.

[0057] According to some aspects, the second contact element can be disposed on the same side of the optoelectronic device as the first contact element, extending along the first sidewall portion and the second sidewall portion to the first layer, thereby forming a flip-chip configured optoelectronic device. However, the second contact element can also be disposed on the side of the optoelectronic device opposite to the first contact element, particularly on the top surface of the semiconductor layer stack, thereby forming a vertically accessible optoelectronic device.

[0058] In some aspects, the light-emitting surface does not contain metallic and / or conductive oxide materials. For example, the optoelectronic device may have a flip-chip configuration, and the two electrical contacts for powering the optoelectronic device are arranged on the same side of the optoelectronic device, i.e., the same side as the bottom surface of the semiconductor layer stack. In other aspects, however, the light-emitting surface may be formed of or at least comprise a transparent conductive oxide, and the two electrical contacts for powering the optoelectronic device are arranged on opposite sides of the optoelectronic device, i.e., the bottom surface side and the top surface side of the semiconductor layer stack.

[0059] In some aspects, the step of setting the first contact element includes: setting a first contact layer disposed on a bottom surface; and / or setting a first reflective layer disposed on the first contact layer and / or the bottom surface. Alternatively, the step of setting the first contact element includes: setting a first contact pad disposed on the first contact layer, the first reflective layer, or the bottom surface. The first contact element may particularly include a first contact layer, which is also reflectively disposed on the bottom surface, forming a mirror at the bottom surface of the semiconductor layer stack. However, the first contact layer may also be a transparent conductive material, and the first reflective layer may be disposed on or below the first contact layer, together forming a mirror at the bottom surface of the semiconductor layer stack. The first contact pad may, for example, be a contact pad disposed only in the region opposite to the bottom surface on the first contact layer, or it may be in the form of a layer covering the entire first contact layer.

[0060] The first contact element may, for example, comprise a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or be composed of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as the first contact layer. The first contact element may also comprise a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or be composed of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as the first contact layer, which is combined with layers of silver (Ag), aluminum (Al), gold (Au), platinum (Pt), and / or titanium (Ti) or stacked thereon as a first reflective layer. The first contact element may also comprise a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or be composed of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as the first contact layer, which is combined with layers of silver (Ag), platinum (Pt), nickel (Ni), and / or titanium tungsten nitride (TiW:N). Additionally, the first contact element may include a gold (Au), platinum (Pt) and / or titanium (Ti) layer, as well as titanium (Ti), platinum (Pt), gold-indium-tin (AuInSn), NiInSn, AuSn, InSn and / or gold (Au)-based solder material as the first contact pad.

[0061] In some aspects, the step of setting the second contact element includes: setting a second contact layer disposed on the material layer and the second sidewall portion, or may include the step of setting the second contact layer on the exposed top surface of the semiconductor layer stack, wherein the second contact layer electrically contacts the first layer of each first portion of the semiconductor layer stack. Alternatively, the step of setting the second contact element includes: setting a second reflective layer disposed on the second contact layer and / or the material layer. Furthermore, the step of setting the second contact element may include: setting a second contact pad / metal layer disposed on the second contact layer, the second reflective layer, and / or the material layer, the second contact pad electrically contacting the second contact layer and / or the first layer. The second contact element may particularly include a second contact layer, which is also reflectively disposed on the material layer and the second sidewall portion, forming a mirror around the remaining semiconductor layer stack structure (optical cavity). However, the second contact layer may also be a transparent conductive material, and the second reflective layer may be disposed on or below the second contact layer, together forming a mirror around the remaining semiconductor layer stack structure (optical cavity). The second contact pad can be, for example, a contact pad arranged only in the area opposite to the bottom surface on the second contact layer, or it can be in the form of a layer surrounding the second contact layer, which also directly contacts the first layer.

[0062] The second contact element may, for example, comprise a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or be composed of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as the second contact layer. The second contact element may also comprise a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or be composed of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) as the second contact layer, combined with a gold (Au) germanium (Ge) alloy layer. Alternatively, the second contact element may comprise a gold (Au), platinum (Pt), and / or titanium (Ti) layer, as well as titanium (Ti), platinum (Pt), gold-indium-tin (AuInSn), NiInSn, AuSn, InSn, and / or gold (Au)-based solder material as the second contact pad.

[0063] The first and second contact elements may include solder material or a solder material layer on their outer surfaces facing away from the bottom surface, which can facilitate subsequent transfer of the optoelectronic device.

[0064] When viewed in a direction perpendicular to the bottom surface, each of the second contact elements can be in the form of a ring structure, wherein the first contact element is arranged at the center of the ring structure and electrically isolated from the second contact element. In particular, each of the second contact elements can extend along the entire periphery of the optoelectronic device, while when viewed in a direction perpendicular to the bottom surface, the first contact element is arranged at the center of the second contact element, away from the second contact element, and thus electrically isolated from the second contact element.

[0065] According to some aspects, the method also includes the step of roughening or structuring the top surface of the first portion of the semiconductor layer stack, opposite the bottom surface. Roughening or structuring can thus be used to provide a roughened or structured surface to enhance the light-emitting coupling efficiency of the optoelectronic device. The top surface of the first portion of the semiconductor layer stack can thus be roughened or structured over its entire surface area or only at defined regions or points. For example, the area that will subsequently contact the holding structure can be excluded from the structuring or roughening of the top surface to provide a flat surface for setting the holding structure. Furthermore, a passivation layer can be formed on the roughened or structured top surface, thereby forming the light-emitting surface of the optoelectronic device. This passivation layer can be particularly used to enhance the stability of the roughened or structured top surface, and thus enhance the light-emitting coupling efficiency of the optoelectronic device over a long period. The passivation layer can, for example, comprise or consist of SiO2, Al2O3, Si3N4, HfO2, or other suitable dielectric materials.

[0066] According to some aspects, a retaining structure is provided to connect the light-emitting surface of an optoelectronic device to a first bonding layer. Specifically, the retaining structure may be provided on the light-emitting surface and the first bonding layer such that a portion or remaining post of the retaining structure connects the light-emitting surface of the optoelectronic device to the first bonding layer. The retaining structure may, for example, include at least one post or portion that simultaneously contacts the light-emitting surfaces of multiple optoelectronic devices.

[0067] According to some aspects, the method also includes the step of peeling off the optoelectronic device attached to the first bonding layer, specifically by destroying the retaining structure or detaching the retaining structure from the first bonding layer. For example, the optoelectronic device can be peeled off from the first bonding layer by means of stamping, thereby releasing the connection between the optoelectronic device and the first bonding layer. The optoelectronic device can then be transferred, for example, directly to a target substrate, or to a carrier for subsequent LIFT processing.

[0068] According to some aspects, a holding structure is provided including a second temporary carrier and a second bonding layer, wherein the second bonding layer is connected to the light-emitting surface of the optoelectronic device. The second temporary carrier can thus specifically serve as a temporary carrier for transferring the optoelectronic device to a target substrate by means of, for example, a subsequent LIFT process. After the holding structure is provided, the first sacrificial layer, the first bonding layer, and the first temporary carrier substrate can be removed, such that the optoelectronic device is connected to the holding structure but is free on the side opposite to the holding structure. The optoelectronic device can then be directly transferred to the target substrate by means of, for example, a LIFT process, without re-bonding the optoelectronic device to another temporary carrier.

[0069] The second bonding layer can thus be configured to include pillars that are connected to one or more optoelectronic devices at a time, or it can be configured to cover a large area of ​​the light-emitting surface of the optoelectronic devices.

[0070] To establish a post in the holding structure that is connected to one or more optoelectronic devices, the method may further include the step of establishing a second sacrificial layer that at least partially covers the light-emitting surface, exposing the contact area between the light-emitting surface and the holding structure. The second sacrificial layer may then be removed simultaneously with the first sacrificial layer, leaving the post in the holding structure connected to the one or more optoelectronic devices intact.

[0071] According to some aspects, the holding structure includes an intermediate layer disposed between the second temporary carrier and the second bonding layer, wherein the intermediate layer is light-absorbing to light of the first wavelength, and the second bonding layer is light-transmitting to light of the first wavelength. By means of this, a corresponding structure can be provided that allows LIFT processing to detach the optoelectronic device from the holding structure again.

[0072] According to some aspects, the steps for removing the first sacrificial layer and / or the second sacrificial layer include one of dry etching, wet etching, plasma etching, or dissolution in a solvent.

[0073] According to another aspect, an array of optoelectronic devices is provided. This array may be, in particular, a product or intermediate product of a method according to at least some of the foregoing aspects. Therefore, all aspects described with respect to the method can be applied to the array in the same manner, and conversely, the features described with respect to the array can also be applied to the method in the same manner.

[0074] The array of optoelectronic devices includes multiple optoelectronic devices, each optoelectronic device comprising: a first layer of at least a first conductivity type, a second layer of a second conductivity type, and a semiconductor layer stack of an active region between the first and second layers; each optoelectronic device further comprises: a first contact element disposed on a bottom surface of the semiconductor layer stack to electrically contact the second layer; and a material layer covering at least a portion of a first sidewall portion extending from the bottom surface in a direction away from the bottom surface, through at least the second layer and the active region. On the other hand, the array also includes a retaining structure that contacts a light-emitting surface of each optoelectronic device opposite the bottom surface.

[0075] According to some aspects, the retaining structure connects the light-emitting surface of the optoelectronic device to a first bonding layer, which surrounds the optoelectronic device and is spaced apart from it at least in the lateral direction. The first bonding layer may, for example, be attached to a first temporary carrier. The gap between the first bonding layer and the optoelectronic device may be specifically defined by a first sacrificial layer that has been removed.

[0076] According to some aspects, the holding structure includes a second temporary carrier and a second bonding layer, wherein the second bonding layer is connected to the light-emitting surface of the optoelectronic device. The second temporary carrier can thus specifically serve as a temporary carrier for transferring the optoelectronic device to a target substrate by means of, for example, a subsequent LIFT process. Specifically, the optoelectronic device can be connected to the holding structure, with the side opposite the holding structure being free. The optoelectronic device can then be directly transferred to the target substrate by means of, for example, a LIFT process, without re-bonding the optoelectronic device to another temporary carrier.

[0077] According to some aspects, the holding structure includes an intermediate layer disposed between the second temporary carrier and the second bonding layer, wherein the intermediate layer is light-absorbing to light of the first wavelength, and the second bonding layer is light-transmitting to light of the first wavelength. By means of this, a corresponding structure can be provided that allows LIFT processing to detach the optoelectronic device from the holding structure again.

[0078] According to some sources, the contact area between the light-emitting surface of the optoelectronic device and the holding structure is limited to less than 20% of the size of the light-emitting surface, particularly less than 10%, or less than 5%. The size of the contact can be one of the variables that limits the adhesion between the optoelectronic device and the holding structure.

[0079] According to some aspects, each top surface of the semiconductor layer stack of an optoelectronic device, opposite the bottom surface, includes roughening or structuring. Roughening or structuring can thus be used to provide a roughened or structured surface to enhance the light-emitting coupling efficiency of the optoelectronic device. The top surface of the first portion of the semiconductor layer stack can thus be roughened or structured over its entire surface area or only at a defined region or point. For example, the contact area with the holding structure can be excluded from the structuring or roughening of the top surface to provide a flat surface for providing better and easier separation from the holding structure. Furthermore, a passivation layer can be disposed on the roughened or structured top surface, thereby forming the light-emitting surface of the optoelectronic device. This passivation layer can be particularly used to enhance the stability of the roughened or structured top surface and thus enhance the light-emitting coupling efficiency of the optoelectronic device over a long period. The passivation layer can, for example, comprise or consist of SiO2, Al2O3, Si3N4, HfO2, or other suitable dielectric materials.

[0080] According to some aspects, the retaining structure includes at least one pillar that contacts the light-emitting surfaces of multiple optoelectronic devices. The retaining structure may be specifically configured to include pillars connected to one or more optoelectronic devices at a time, or it may be configured to extensively cover the light-emitting surfaces of the optoelectronic devices. The arrangement of the pillars relative to the optoelectronic devices can therefore be varied for optimized fabrication and / or optimized placement for subsequent removal of the optoelectronic devices. Attached Figure Description

[0081] The various embodiments and examples described in detail with reference to the accompanying drawings will make other aspects and embodiments based on the proposed principles apparent, in which:

[0082] Figures 1A to 1D The steps for manufacturing optoelectronic devices based on some aspects of the proposed principles are shown;

[0083] Figures 2A to 2F Each shows a cross-sectional view of an implementation of an array of optoelectronic devices based on some aspects of the proposed principles;

[0084] Figure 3A and Figure 3B Steps for manufacturing an optoelectronic device according to some aspects of the proposed principles are shown;

[0085] Figures 4A to 4E Cross-sectional views of embodiments of an array of optoelectronic devices based on some aspects of the proposed principles are shown; and

[0086] Figures 5A to 5F Each shows a top view of an implementation of an array of optoelectronic devices based on some aspects of the proposed principles. Detailed Implementation

[0087] The following embodiments and examples disclose various aspects and combinations thereof based on the proposed principles. The embodiments and examples are not always drawn to scale. Similarly, different elements may be enlarged or reduced in size to emphasize various aspects. It goes without saying that the various aspects of the embodiments and examples shown in the figures can be combined with each other without contradiction to the principles of the invention. Some aspects illustrate regular structures or forms. It should be noted that in practice, slight differences and deviations from the ideal form may occur; however, this does not contradict the idea of ​​the invention.

[0088] Furthermore, the various figures and aspects are not necessarily shown at the correct dimensions, and the proportions between the elements need not be substantially accurate. Some aspects are highlighted by being shown enlarged. However, terms such as "above," "over," "below," "under," "larger," and "smaller" are correctly used to represent the elements in the figures. Therefore, such relationships between elements can be inferred from the figures.

[0089] Figures 1A to 1D The steps of a method for manufacturing an optoelectronic device 1, based on some aspects of the proposed principles, are illustrated. In the illustrated embodiment, only the manufacture of one optoelectronic device is shown as an example. However, it should be understood that this exemplary illustration can be extended, and multiple optoelectronic devices can be manufactured in the same manner by means of the illustrated steps.

[0090] In the first step, a growth substrate is provided with a semiconductor layer stack 3 epitaxially grown on top. The semiconductor layer stack includes a first layer 4 of a first conductivity type, a second layer 5 of a second conductivity type, and an active region 6 between the first layer 4 and the second layer 5. A structured contact layer, specifically a first portion of a first contact element 7, is deposited on the surface of the semiconductor layer stack 3, particularly the bottom surface 8. The first portion of the first contact element 7 can, for example, form a structured mask suitable as a mask for subsequent etching steps, but can also be deposited / grown on the semiconductor layer stack 3 after mesa etching of the semiconductor layer stack 3 has been performed. The first portion of the first contact element 7 includes a first contact layer 7a. The first contact layer 7a can, for example, have a transparent conductive material, such as TCO. Then, a first mesa etching step, specifically a dry etching step, is performed. The mesa etching step structures the semiconductor layer stack 3 such that the semiconductor layer stack 3, including the bottom surface 8 and the inclined first sidewall portion 9a, is exposed. Etching is performed such that the etching does not penetrate the entire first layer 4, but stops far from reaching the growth substrate. Therefore, the resulting first sidewall portion 9a extends from the bottom surface 8 in a direction away from the bottom surface 8 until it reaches the layer between the active region 6 and the growth substrate. Thus, the exposed portion is arranged in a trapezoidal form on the remaining portion of the first layer 4 as shown in the cross-section.

[0091] Then, following the shape of the mesa etched structure, a first portion of the material layer 10 is formed on the mesa etched structure. The first portion of the material layer 10 may be formed such that it at least covers the first sidewall portion 9a. In the illustrated embodiment, the first portion of the material layer 10 covers a portion of the surface of the first sidewall portion 9a and the first contact layer 7a. The first portion of the material layer 10, or at least a portion thereof, may be generated, for example, by quantum well mixing, and / or the exposed first sidewall portion 9a and other exposed surfaces may be regrown using semiconductor materials, SiO2, Al2O3, and any other suitable materials. In the illustrated embodiment, the first portion of the material layer 10 is a structured regrown layer of Al2O3 formed by means of an ALD, which covers a portion of the surface of the first sidewall portion 9a and the first contact layer 7a.

[0092] In another step, a second mesa etching step is performed. This mesa etching step structures the remaining semiconductor layer stack 3, resulting in an exposed portion of the semiconductor layer stack 3 including the inclined second sidewall portion 9b. Etching is performed such that the etching does not penetrate the entire first layer 4, but stops before reaching the underlying growth substrate. Specifically, the second etching step for generating the second sidewall portion 9b is a wet etching step and / or a dry etching step. The resulting second sidewall portion 9b extends from the layer where the first etching step stopped in a direction away from the bottom surface 8. Therefore, the exposed portion, as shown in the cross-section, is trapezoidal in shape, with another trapezoid arranged at the top.

[0093] In the following steps, following the shape of the mesa etching structure, a first portion of the second contact element 16, specifically the second contact layer 16a, is formed on the mesa etching structure. The second contact layer 16a can be formed such that it at least covers the second sidewall portion 9b and electrically contacts the first layer 4. In the illustrated embodiment, the second contact layer 16a covers a portion of the second wall portion 9b, a portion of the second layer 4, and a portion of the material layer 10. In the illustrated embodiment, the second contact layer 16a is a structured metal layer covering the second wall portion 9b, a portion of the first layer 4, and a portion of the material layer 10. However, the first portion of the second contact element 16 can also be, for example, a combination of the second contact layer 16a of a TCO and a second reflective layer covering the second contact layer 16a.

[0094] Then, a second portion of the material layer 10 is disposed on the first portion of the second contact element 16. The second portion of the material layer 10 is disposed such that it covers at least a portion of the second contact layer 16a that contacts the first portion of the material layer 10. In the illustrated embodiment, the second portion of the material layer 10 covers a large portion of the second contact layer 16a, except for the contact area used to provide the first contact pad 7a and the second contact pad 16c for the first contact element 7 and the second contact element 16.

[0095] The second portion of material layer 10 is also a structured regrown layer of SiO2 provided by means of, for example, ALD, which covers a portion of the second contact layer 16a. Therefore, the second portion of material layer 10 is in particular a dielectric material similar to or at least includes a dielectric material similar to the dielectric material of the first portion of material layer 10.

[0096] Then, second portions of the first contact element 7 and the second contact element 16, specifically the first contact pad 7c and the second contact pad 16c, are formed in the form of solder material on the first contact layer 7a, the second contact layer 16a, and the material layer 10. The first contact pad 7c and the second contact pad 16c may, for example, be metal and may include, for example, solder material or a solder material layer on the surface away from the semiconductor layer stack 3. The solder material may, for example, comprise a metal layer stack composed of AuSn, AuInSn, InSn, NiSn, NiInSn, and SnAgCu.

[0097] Then, a first sacrificial layer 11 is deposited on the material layer 10 and on the first contact element 16 and the second contact element 7. The first sacrificial layer 11 covers the first contact element 7, extends onto the material layer 10, and covers the second contact element 16. The first sacrificial layer 11 specifically covers all exposed surfaces of the optoelectronic device 1 and specifically completely fills all gaps created by mesa etching. Therefore, the first sacrificial layer 11 comprises, for example, Si or SiO2.

[0098] The deposition of the first sacrificial layer 11 may, for example, include spin-coating, sputtering, or spraying the sacrificial layer material onto the exposed surfaces of the optoelectronic device(s).

[0099] Then, a first bonding layer 14 is formed on the first sacrificial layer 11. In the illustrated embodiment, the first bonding layer 14 forms a smooth surface opposite the semiconductor layer stack 3. The first bonding layer 14 may, for example, comprise an organic material, a gold alloy, or may be a (thin film) solder material or a combination thereof. However, the composition of the first bonding layer 14 differs from that of the first sacrificial layer 11 and is selected such that the etchant used to remove the first sacrificial layer 11 does not, or substantially does not, affect the first bonding layer 14, the first contact element 16 and the second contact element 7, the material layer 10, and any other exposed surfaces of the semiconductor layer stack 3. The first bonding layer 14 may be formed, for example, by spin coating or by sputtering the material of the first bonding layer 14 onto the first sacrificial layer 11.

[0100] Planarization of the first bonding layer 14 may include mechanical planarization such as grinding and / or polishing, chemical planarization using, for example, an etchant, chemical mechanical polishing (CMP), or by melting and / or pressing molten or low-viscosity sacrificial layer material on the surfaces(a plurality of) exposed surfaces. However, in the case where molten / liquid first bonding layer material is deposited on the first sacrificial layer, the planarization step may be omitted, allowing planarization to occur spontaneously over time, as the molten first bonding layer material flattens itself over time.

[0101] Then, for example, by means of bonding, the first temporary carrier 15 is attached to the first bonding layer 14. After attaching the first temporary carrier 15, the growth substrate and potential buffer layer can be removed to expose the back side of the semiconductor layer stack 3, particularly the first layer 4. If necessary, the semiconductor layer stack 3, particularly the first layer 4, can be thinned to remove any remaining connections in the first layer 4. By doing so, the semiconductor layer stack portion subsequently forming the optoelectronic device 1 can be monolithized, and contact with the first sacrificial layer 11 is provided. The removal and / or thinning of the growth substrate can include, for example, LLO, polishing, dry etching, wet etching, CMP, or a combination thereof. After the thinning step, portions of the semiconductor layer stack 3 are separated, exposing the top surface 12 of each semiconductor layer stack portion. The resulting structure is as follows Figure 1A As shown. In Figure 1A In the embodiment shown, the top surface 12 is equal to the light-emitting surface 17 of the separate optoelectronic device 1.

[0102] like Figure 1B As shown, a retaining structure 18 is then provided on the light-emitting surface 17. Therefore, a structured second sacrificial layer 24 is provided on the light-emitting surface 17, exposing the contact area 20 between the light-emitting surface 17 and the retaining structure 18. The retaining structure 18 is then provided on the second sacrificial layer 24, contacting the light-emitting surface 17. The retaining structure 18 includes a second bonding layer 22 in contact with the light-emitting surface 17 and a second temporary carrier 19 provided on the second bonding layer 22.

[0103] Then, the first temporary carrier 15, the first bonding layer 14, and the first sacrificial layer 11 and the second sacrificial layer 24 can be removed, for example, by dissolving the first sacrificial layer 11 and the second sacrificial layer 24. Figure 1C and Figure 1D As shown, array 2 is obtained, wherein the optoelectronic device 1 is connected only to the holding structure 18 and is not affected by any other holding material. The removal of sacrificial layers 11 and 24 can be accomplished, for example, by one of dry etching, wet etching, or plasma etching. Therefore, the selected removal process depends on the combination of the materials of material layer 10, the first contact element 7 and the second contact element 16, and the materials of the first bonding layer 14 and the second bonding layer 22. The optoelectronic device 1 is then held by the holding structure 18, which defines a specific adhesion force at the interface between the holding structure 18 and the light-emitting surface 17. This allows for easy subsequent transfer processing to the target substrate. In particular, the optoelectronic device 1 can then be directly transferred to, for example, the target substrate by, for example, a LIFT process, eliminating the need for additional steps of rebonding the optoelectronic device to another temporary carrier. Therefore, the number of transfer steps can be significantly reduced compared to known methods.

[0104] However, the first temporary carrier 15, the first bonding layer 14, and the first sacrificial layer 11 and the second sacrificial layer 24 can also be removed in a different order, for example, by removing the first temporary carrier 15 first, and then removing the first bonding layer 14 before removing the first sacrificial layer 11 and the second sacrificial layer 24. Therefore, for example, other intermediate layers can be arranged between the first temporary carrier 15 and the first bonding layer 14, which allows for easy removal of the first temporary carrier 15. The first bonding layer 14, the first sacrificial layer 11, and the second sacrificial layer 24 can then be removed by means of, for example, etching, melting, or dissolving.

[0105] Figures 2A to 2F Cross-sectional views of embodiments of the array 2 of the optoelectronic device 1 according to other aspects of the proposed principles are shown.

[0106] like Figure 2A As shown, the top surface 12 of the semiconductor layer stack 3 may include roughening 13 to enhance the light-emitting coupling efficiency of the optoelectronic device 1. In this case, roughening 13 forms a light-emitting surface 17, and the holding structure 18 is disposed on this light-emitting surface 17. However, as Figure 2B As shown, roughening 13 can also be covered by a passivation layer 21, in which case the passivation layer 21 forms a light-emitting surface 17, and the holding structure 18 is disposed on the light-emitting surface 17. By means of the passivation layer 21, the top surface 12 of the semiconductor layer stack 3 can be passivated to protect the top surface 12, for example, from aging or from external influences.

[0107] Figure 2C An embodiment is shown in which the contact region 20 between the light-emitting surface 17 and the holding structure 18 is not centered relative to the optoelectronic device 1, but is located in the edge region of the light-emitting surface 17. Furthermore, the contact region 20 is arranged in an unroughened region of the top surface 12, rather than in a substantially flattened region of the top surface. This provides a better and easier-to-separate contact between the light-emitting surface 17 and the holding structure 18. Additionally, the contact region can be moved away from the main light-emitting region to have little or no impact on the emission characteristics of the optoelectronic device 1.

[0108] like Figure 2D As shown, roughening 13 can be of different types. For example, roughening can be in the form of irregular roughening of the top surface 12 or in the form of regular structuring of the top surface 12, to affect the emission characteristics of the optoelectronic device 1 in a desired manner.

[0109] like Figure 2E As shown, compared to the illustrated embodiment, the retaining structure 18 can also be disposed over a large area on the light-emitting surface 17, contacting substantially the entire light-emitting surface 17. In this case, the retaining structure 18 may include an additional intermediate layer 23 disposed between the second bonding layer 22 and the second temporary carrier layer 19, which is, for example, absorbent of light in the ultraviolet range. Thus, the photoelectric device 1 can be released from the retaining structure 18 by irradiating the retaining structure 18 with ultraviolet light, causing the intermediate layer 23 to heat up, and subsequently releasing the second bonding layer 22. Therefore, in this case, the second bonding layer 22 can remain on the photoelectric device 1 as, for example, a passivation layer for the light-emitting surface 17.

[0110] like Figure 2F As shown, compared to the illustrated embodiment, the optoelectronic device 1 can be configured as a vertically accessible optoelectronic device 1. In this case, the light-emitting surface 17 can be formed by the second contact element 16 in the form of a contact layer of, for example, TCO material.

[0111] Figure 3Aand 3B Steps of another embodiment of a method for manufacturing an optoelectronic device based on some aspects of the proposed principles are shown. In the illustrated embodiment, a holding structure 18 is provided to connect the light-emitting surface 17 to the first bonding layer 14. Therefore, the resulting array 2 provides a different holding structure 18 compared to known methods, and the optoelectronic device 1 can be picked up from the array 2, for example by means of stamping, for further processing or transfer.

[0112] Figure 3A The steps for setting a retaining structure 18 in the transition region between the light-emitting surface 17 and the first bonding layer 14 are shown. Figure 3B As shown, after the first sacrificial layer 11 is removed, the photoelectric device 1 is then held by the holding structure 18 and is ready to be picked up, for example, by stamping. During the picking up of the photoelectric device 1, the holding structure may, for example, be broken to release the photoelectric device 1, or the holding structure may be torn off from the first bonding layer 14. However, the picked-up photoelectric device 1 may be characterized by leaving a residue of the holding structure on the light-emitting surface 17.

[0113] Figures 4A to 4E Cross-sectional views of embodiments of the array 2 of the optoelectronic device 1, based on some aspects of the proposed principles, are shown. The embodiments illustrate... Figure 3B Variations of the illustrated implementation, which are related to... Figures 2A to 2E The described variants are quite similar. In particular, the top surface 12 may include a roughening 13 that forms the light-emitting surface 17, such as... Figure 4A As shown; a passivation layer 21 can be disposed on the top surface 12 of the light-emitting surface 17, such as Figure 4B As shown; roughening can be limited to certain areas of the top surface 12 to provide a smooth contact area 20 between the light-emitting surface 17 and the retaining structure 18, such as Figure 4C As shown; the pattern, depth, and regularity of roughness 12 can vary, such as Figure 4D As shown; the optoelectronic device 1 can be formed as a vertically accessible optoelectronic device 1, such as... Figure 4E As shown.

[0114] Figures 5A to 5F Each shows a top view of an embodiment of the array 2 of optoelectronic devices 1 according to some aspects of the proposed principles. The top view shows possible arrangements of the connecting posts of the retaining structure 18 relative to the plurality of optoelectronic devices 1. For example, as... Figure 5A As shown, a circular retaining structure 18 can be provided, which connects the light-emitting surfaces 17 of four adjacent photoelectric devices 1 to the first bonding layer 14. However, the number four and the circular shape of the pillars should be understood as exemplary, and depending on the shape and arrangement of the photoelectric devices 1, more or fewer photoelectric devices 1 can also be retained at one time by pillars of different shapes of retaining structures 18. For example, Figure 5B An embodiment of the strip pillars is shown, each strip pillar connecting the light-emitting surfaces 17 of two adjacent optoelectronic devices 1 to the first bonding layer 14, while Figure 5C An embodiment of the strip pillars is shown, each strip pillar connecting the light-emitting surface 17 of each optoelectronic device 1 to the first bonding layer 14.

[0115] Figures 5D to 5F Each is shown as a large-sized pillar connecting the light-emitting surface 17 of each optoelectronic device 1 to the first bonding layer 14. For example, as Figure 5D As shown, all the light-emitting surfaces 17 of two adjacent rows of optoelectronic devices 1 can be connected to the first bonding layer 14 by means of the pillars of the holding structure 18. This allows the optoelectronic devices 1 to be held by the holding structure 18 along the entire edge of the light-emitting surface 17. On the other hand, as Figure 5E and Figure 5F As shown, the retaining structure 18 is connected to the optoelectronic device 1 along two or all edges of the light-emitting surface 17.

[0116] List of reference numerals

[0117] 1 Optoelectronic devices

[0118] 2 arrays

[0119] 3-layer semiconductor stack

[0120] 4 First layer

[0121] 5. Second layer

[0122] 6 active areas

[0123] 7 contact elements

[0124] 7a contact layer

[0125] 7b reflective layer

[0126] 7c contact pads

[0127] 8 Bottom surface

[0128] 9a and 9b sidewall sections

[0129] 10 material layers

[0130] 11 Sacrificial Layer

[0131] 12 top surfaces

[0132] 13 Roughening

[0133] 14 bonding layers

[0134] 15 Temporary Carriers

[0135] 16 contact elements

[0136] 16a contact layer

[0137] 16b reflective layer

[0138] 16c contact pads

[0139] 17 luminescent surfaces

[0140] 18. Maintaining the structure

[0141] 19 Temporary Carriers

[0142] 20 contact areas

[0143] 21 passivation layer

[0144] 22 bonding layer

[0145] 23 Intermediate Layer

[0146] 24 Sacrificial Layers

Claims

1. A method for manufacturing a plurality of optoelectronic devices (1), comprising the following steps: A semiconductor layer stack (3) is formed on a growth substrate, which includes at least a first layer (4) of a first conductivity type, a second layer (5) of a second conductivity type, and an active region (6) between the first layer (4) and the second layer (5). The semiconductor layer stack (3) is structured to retain a first portion of the semiconductor layer stack (3) and remove at least one adjacent second portion of the semiconductor layer stack (3). Each of the first portions includes a bottom surface (8) and a first sidewall portion (9a) extending from the bottom surface (8) toward the growth substrate and passing through at least the second layer (5) and the active region (6). A first contact element (7) is provided on each of the bottom surfaces (8), and the first contact element (7) makes electrical contact with the second layer (5); A material layer (10) is provided, which covers at least a portion of the first sidewall portion (9a) and, in particular, at least a portion of the first contact element (7); A first sacrificial layer (11) is provided, which at least partially covers the first contact element (7) and the material layer (10). A first bonding layer (14) is provided, which covers the first sacrificial layer (11). The first temporary carrier (15) is attached to the first bonding layer (14). The semiconductor layer stack (3) opposite to the bottom surface (8) is back-side processed to form a plurality of separate optoelectronic devices (1), each optoelectronic device having a light-emitting surface (17) opposite to the bottom surface (8). A retaining structure (18) is provided, the retaining structure (18) contacting the light-emitting surface (17) of the optoelectronic device (1); and Remove the first sacrificial layer (11) so that the optoelectronic device (1) is essentially connected only to the retaining structure (18).

2. The method according to claim 1, further comprising the step of: structuring the semiconductor layer stack (3) such that the first portion includes a second sidewall portion (9b) different from the first sidewall portion (9a), the second sidewall portion (9b) extending from the layer between the active region (6) and the growth substrate toward the growth substrate and passing through at least a portion of the first layer (4).

3. The method according to claim 1 or 2 further comprises the step of providing a second contact element (16) on the material layer (10), and particularly on the second sidewall portion (9b), the second contact element (16) electrically contacting the first layer (4) of each of the first portions.

4. The method according to claim 3, wherein, The steps for setting the second contact element (16) include: A second contact layer (16a) is provided on the material layer (10) and / or the second sidewall portion (9b), the second contact layer (16a) being in electrical contact with the first layer (4); and / or A second reflective layer (16b) is provided on the second contact layer (16a) and / or the material layer (10); and / or A second contact pad (16c) is provided on the second contact layer (16a), the second reflective layer (16b) and / or the material layer (10), and the second contact pad (16c) is electrically in contact with the second contact layer (16a) and / or the first layer (4).

5. The method according to any one of claims 1 to 4, wherein, The steps for setting the first contact element (7) include: A first contact layer (7a) is provided on the bottom surface (8); and / or A first reflective layer (7b) is provided on the first contact layer (7a) or the bottom surface (8); and / or A first contact pad (7c) is provided on the first contact layer (7a), on the first reflective layer (7b), or on the bottom surface (8).

6. The method according to any one of claims 1 to 5, wherein, The step of performing backside processing on the semiconductor layer stack (3) includes at least one of the following: Remove the growth substrate; and The semiconductor layer stack (3) is chemically and / or mechanically polished; Specifically, this exposes a portion of the first sacrificial layer (11).

7. The method according to any one of claims 1 to 6 further includes the steps of roughening or structuring the top surface (12) of the first portion opposite to the bottom surface (8), and in particular the step of providing a passivation layer (21) on the roughened or structured top surface (12), thereby forming the light-emitting surface (17) of the optoelectronic device (1).

8. The method according to any one of claims 1 to 7, wherein, The retaining structure (18) connects the light-emitting surface (17) to the first bonding layer (14).

9. The method of claim 8, further comprising the step of stripping the optoelectronic device (1) attached to the first bonding layer (14) by specifically destroying the retaining structure (18).

10. The method according to any one of claims 1 to 7, wherein, The retaining structure (18) includes a second temporary carrier (19) and a second bonding layer (22), the second bonding layer (22) being connected to the light-emitting surface (17) of the optoelectronic device (1).

11. The method according to claim 10, further comprising the step of providing a second sacrificial layer (24) that at least partially covers the light-emitting surface (17) and exposes the contact area (20) between the light-emitting surface (17) and the retaining structure (18).

12. The method according to claim 11, wherein, The retaining structure (18) includes an intermediate layer (23) disposed between the second temporary carrier (19) and the second bonding layer (22), the intermediate layer (23) being light-absorbing to a first wavelength, and the second bonding layer (22) being light-transmitting to the first wavelength.

13. The method according to any one of claims 1 to 12, wherein, The steps of removing the first sacrificial layer (11) and / or the second sacrificial layer (24) include one of dry etching, wet etching, plasma etching or dissolution in a solvent.

14. An array (2) of an optoelectronic device (1), particularly processed by the method according to any one of claims 1 to 13, the array comprising: Multiple optoelectronic devices (1), each comprising: The semiconductor layer stack (3) includes at least a first layer (4) of a first conductivity type, a second layer (5) of a second conductivity type, and an active region (6) between the first layer (4) and the second layer (5); A first contact element (7) is disposed on the bottom surface (8) of the semiconductor layer stack (3) and electrically contacts the second layer (5); and A material layer (10) covering at least a portion of a first sidewall portion (9a) extending from the bottom surface (8) in a direction away from the bottom surface (8) and passing through at least the second layer (5) and the active region (6); and The structure (18) is maintained, which contacts the light-emitting surface (17) of each of the optoelectronic devices (1) opposite to the bottom surface (8).

15. The array according to claim 14, wherein, The retaining structure (18) connects the light-emitting surface (17) of the optoelectronic device (1) to a first bonding layer (14), the first bonding layer (14) surrounding the optoelectronic device (1) and spaced apart from the optoelectronic device (1) at least in the lateral direction, and wherein, in particular, the first bonding layer (14) is attached to a first temporary carrier (15).

16. The array according to claim 14, wherein, The retaining structure (18) includes a second temporary carrier (19) and a second bonding layer (22), the second bonding layer (22) being connected to the light-emitting surface (17) of the optoelectronic device (1).

17. The array according to claim 16, wherein, The retaining structure (18) includes an intermediate layer (23) disposed between the second temporary carrier (19) and the second bonding layer (22), the intermediate layer (23) being light-absorbing to a first wavelength, and the second bonding layer (22) being light-transmitting to the first wavelength.

18. The array according to any one of claims 14 to 17, wherein, The contact area (20) between the light-emitting surface (17) of the optoelectronic device (1) and the holding structure (18) is limited to a size less than 10% of the size of the light-emitting surface (17).

19. The array according to any one of claims 14 to 18, wherein, The top surface (12) of the semiconductor layer stack (3) of each optoelectronic device (1) opposite the bottom surface (8) includes roughening or structuring (13), and wherein, in particular, a passivation layer (21) is disposed on the roughened or structured top surface (12), thereby forming the light-emitting surface (17) of the optoelectronic device (1).

20. The array according to any one of claims 14 to 19, wherein, The retaining structure (18) includes at least one post that contacts the light-emitting surface (17) of the plurality of optoelectronic devices (1).

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