Crystal growth process for uniformity of carrier concentration within a gallium arsenide substrate wafer

Abstract

The present application belongs to the technical field of semiconductor single crystal growth, and particularly relates to a crystal growth process for carrier concentration uniformity in a gallium arsenide substrate sheet, comprising the following steps: completing raw material charging, seeding and shoulder releasing processes to obtain a gallium arsenide crystal after shoulder releasing; performing crystal opening and pulling growth after the shoulder releasing is completed, gradually reducing the crystal down-pulling opening and pulling speed in the opening and pulling growth process, simultaneously performing collaborative temperature control on the multi-temperature zones of a single crystal furnace, continuously reducing the temperature of the end temperature zone of the crystal, and continuously increasing the temperature of the melt end temperature zone; after the crystal opening and pulling growth is completed, performing a substantial temperature reduction process to obtain a gallium arsenide crystal rod. The length of the gallium arsenide crystal rod prepared by the process is 200 mm, the fluctuation range of the carrier concentration CC value is reduced from the original 0.43.5 to 0.42.3, the whole falls within the 0.43.0 use interval required by the customer, the head and tail scrap sections of the crystal rod are reduced, the effective utilization rate of the long-size gallium arsenide crystal rod is significantly improved, and the production cost of the unit substrate is reduced.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor single crystal growth technology, specifically relating to a crystal growth process that ensures uniform carrier concentration within a gallium arsenide substrate. Background Technology

[0002] Gallium arsenide (GaAs) is a core material of second-generation compound semiconductors, possessing excellent properties such as high electron mobility, direct bandgap, high thermal conductivity, and radiation resistance, and is widely used in optoelectronics and microelectronics. Silicon-doped n-type gallium arsenide substrates are key substrate materials for red and yellow LEDs, VCSELs (vertical-cavity surface-emitting lasers), high-power lasers, and infrared detectors, supporting the development of consumer electronics, displays, autonomous driving, and security monitoring industries. Devices place stringent requirements on the carrier concentration and uniformity of the gallium arsenide substrate. The uniformity of carrier concentration within the substrate and along the crystal rod axis directly determines the luminous efficiency, luminous consistency, and device yield of subsequent epitaxial devices.

[0003] In gallium arsenide (GaAs) single crystal growth, the dopant element exhibits a segregation effect between the two phases of the crystal melt. Influenced by the crystal growth rate, melt convection, and the thickness of the boundary layer at the growth interface, the effective segregation coefficient of the doped silicon shifts, ultimately resulting in gradient differences in carrier concentration distribution along the crystal rod axis and within the substrate. Existing GaAs single crystal growth processes mostly employ a constant pull-down speed and constant melt temperature growth mode. Throughout the entire crystal rod growth cycle, the thickness of the boundary layer at the growth interface varies significantly, making it difficult to continuously control the segregation behavior of silicon doping.

[0004] Existing technologies for fabricating long gallium arsenide (GaAs) ingots typically exhibit carrier concentration (CC) fluctuations along the ingot axis ranging from 0.4 to 3.5, with significant differences in carrier concentration between the ingot's head and tail. Many ingot sections exceed the customer-specified range of 0.4–3.0, resulting in low ingot utilization. Simultaneously, the processed GaAs substrates generally show carrier concentration fluctuations exceeding 10%, with intra-wafer uniformity below 90%. This uneven carrier concentration distribution causes inconsistencies in localized radiative recombination and Auger nonradiative recombination efficiencies. LEDs and VCSELs fabricated using these substrates exhibit inconsistent luminous intensity and large performance dispersion, severely reducing device yield.

[0005] To improve carrier uniformity, existing methods mostly focus on optimizing crucible structure, adjusting the total dopant feed amount, and changing the overall constant pulling speed. These methods can only improve the overall doping level to a certain extent and cannot dynamically control the temperature gradient and boundary layer thickness at the growth interface throughout the crystal growth process. They also struggle to simultaneously achieve narrow-range control of carrier concentration along the crystal rod axially and improve carrier uniformity within the substrate. Some processes rely solely on reducing the crystal pulling speed to improve segregation, which significantly lengthens the crystal growth cycle and reduces production efficiency. Furthermore, excessively low pulling speeds can easily induce abnormal crystal stress, generating dislocation defects and worsening the crystal's EPD (dislocation density) index. Therefore, there is an urgent need to develop a crystal growth process that can achieve high uniformity control of carrier concentration along the gallium arsenide crystal rod axially and within the substrate without significantly sacrificing production efficiency and ensuring crystal quality. Summary of the Invention

[0006] To address the technical problems existing in the current gallium arsenide single crystal growth process, this invention provides a crystal growth process that ensures uniform carrier concentration within a gallium arsenide substrate.

[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: A crystal growth process for achieving uniform carrier concentration on a gallium arsenide substrate includes the following steps: S1. Complete the raw material loading, crystal pulling and shoulder forming processes to obtain gallium arsenide crystal with shoulder forming; S2. After the shoulder formation is completed, crystal pulling growth is carried out. During the pulling growth process, the crystal pulling speed is gradually reduced, and the temperature of multiple temperature zones in the single crystal furnace is controlled in a coordinated manner. The temperature of the crystal end temperature zone is continuously reduced, and the temperature of the melt end temperature zone is continuously increased, so that the melt temperature gradually increases, the temperature gradient at the crystal growth interface is increased, the thickness of the growth interface layer is reduced, and the segregation effect of doped elements is improved. Among them, the crystal pulling speed is 16mm / h, and the melt temperature is controlled at 1245-1270℃. S3. After the crystal pulling growth is completed, a significant cooling process is performed to obtain gallium arsenide crystal rods.

[0008] The single crystal furnace is equipped with six temperature zones, namely Z1, Z2, Z3, Z4, Z5, and Z6; Z1 and Z2 are heater temperature zones near the crystal end, and Z3, Z4, Z5, and Z6 are heater temperature zones near the melt end.

[0009] In step S2, the stretching growth adopts a multi-segment constant stretching speed continuous growth method: first, stretching is carried out at a stretching speed of 3 mm / h for 24 hours; then, it is switched to a stretching speed of 2 mm / h for 24 hours; the stretching speed of 2 mm / h is maintained for another 24 hours; finally, it is switched to a stretching speed of 1.5 mm / h for 24 hours.

[0010] In step S2, temperature control is performed in each temperature zone according to the following timing sequence: Initial temperature settings: Z1=1100℃, Z2=1180℃, Z3=1240℃, Z4=1240℃, Z5=1243℃, Z6=1243℃; The first 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 increases by 3℃, Z5 increases by 2℃, and Z6 increases by 2℃. The second 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 remains unchanged, Z5 increases by 2℃, and Z6 increases by 2℃. The third 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃. The fourth 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃.

[0011] In step S1, the raw materials include gallium arsenide raw material, silicon dopant, and boron oxide. A pBN crucible is used for loading the materials. The pBN crucible containing the raw materials is placed in a single crystal furnace, and the temperature is raised to melt the gallium arsenide raw material into gallium arsenide melt.

[0012] When preparing a 4-inch gallium arsenide crystal rod, 9.86 kg of gallium arsenide raw material, 0.8 g of silicon dopant, and 60 g of boron oxide are used; when preparing a 6-inch gallium arsenide crystal rod, 23.25 kg of gallium arsenide raw material, 2.0 g of silicon dopant, and 94 g of boron oxide are used.

[0013] The carrier concentration fluctuation within the gallium arsenide substrate is ≤6%, and the carrier concentration uniformity is ≥94%; the carrier concentration CC value of the crystal rod is controlled within the range of 0.4~2.3 within a length of 200mm along the crystal rod axis.

[0014] The gallium arsenide substrate is a silicon-doped n-type gallium arsenide substrate.

[0015] Compared with the prior art, the beneficial effects of this invention are: 1. Reduce axial carrier concentration fluctuations in gallium arsenide (GaAs) ingots and improve ingot utilization. The 200mm long GaAs ingots prepared using the process of this invention have their carrier concentration (CC) fluctuation range reduced from the original 0.4-3.5 to 0.4-2.3, falling entirely within the customer-required 0.4-3.0 range. This reduces the number of scrapped sections at the beginning and end of the ingot, significantly improving the effective utilization rate of long GaAs ingots and lowering the production cost per unit substrate.

[0016] 2. Improved uniformity of carrier concentration within gallium arsenide substrates, enhancing device fabrication consistency. This invention reduces carrier concentration fluctuations within the substrate from over 10% to 6% or less, increasing carrier concentration uniformity to over 94%. The more uniform carrier distribution within the substrate avoids differences in localized radiative recombination and Auger nonradiative recombination efficiencies. This results in smaller dispersion in luminous intensity and photoelectric response performance during subsequent epitaxial fabrication of LEDs, VCSELs, and infrared detectors, effectively improving device yield.

[0017] 3. Balancing doping uniformity control with intrinsic crystal quality to avoid derivative crystal defects. This invention employs a synergistic scheme of segmented decreasing pull speed combined with dynamic temperature control. It does not simply rely on infinitely reducing the pull speed to improve the segregation effect. This achieves dynamic control of doping segregation behavior and can reasonably release crystal growth stress, reducing the risk of increased EPD (etch pit density) and single crystallization failure caused by improper pull speed. It maintains the single crystal quality of gallium arsenide ingots while ensuring carrier uniformity. Attached Figure Description

[0018] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are merely exemplary, and those skilled in the art can derive other embodiments based on the provided drawings without creative effort.

[0019] The structures, proportions, sizes, etc. illustrated in this specification are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size, without affecting the effects and objectives that the present invention can produce, should still fall within the scope of the technical content disclosed in the present invention.

[0020] Figure 1 This invention provides a diagram showing the sampling locations for 4-inch crystal rod slices.

[0021] Figure 2 This invention provides a diagram showing the sampling points for 6-inch crystal rod slices. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. These descriptions are only for further illustrating the features and advantages of the present invention, and not for limiting the claims of the present invention. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and are not intended to limit the scope of the invention.

[0024] This invention provides a crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate, the process comprising the following steps: S1. Complete the raw material loading, crystal pulling and shoulder forming processes to obtain gallium arsenide crystal with shoulder forming; S2. After the shoulder formation is completed, crystal pulling growth is carried out. During the pulling growth process, the crystal pulling speed is gradually reduced, and the temperature of multiple temperature zones in the single crystal furnace is controlled in a coordinated manner. The temperature of the crystal end temperature zone is continuously reduced, and the temperature of the melt end temperature zone is continuously increased, so that the melt temperature gradually increases, the temperature gradient at the crystal growth interface is increased, the thickness of the growth interface layer is reduced, and the segregation effect of doped elements is improved. Among them, the crystal pulling speed is 16mm / h, and the melt temperature is controlled at 1245-1270℃. S3. After the crystal pulling growth is completed, a significant cooling process is performed to obtain gallium arsenide crystal rods.

[0025] The single-crystal furnace used in this invention has six temperature zones, namely Z1, Z2, Z3, Z4, Z5, and Z6; Z1 and Z2 are heater temperature zones near the crystal end, and Z3, Z4, Z5, and Z6 are heater temperature zones near the melt end. In step S1, the growth materials include gallium arsenide raw material, silicon dopant, and boron oxide. A pBN crucible is used for loading, and the pBN crucible containing the raw materials is placed in the single-crystal furnace. The temperature is raised to melt the gallium arsenide raw material into gallium arsenide melt, and then the crystal pulling and shoulder formation operations are completed.

[0026] Step S2, the stretching growth process, employs a multi-stage constant stretching speed continuous growth method: first, stretching at a speed of 3 mm / h for 24 hours; then switching to a speed of 2 mm / h for 24 hours; continuing to maintain a speed of 2 mm / h for 24 hours; finally, switching to a speed of 1.5 mm / h for 24 hours. Throughout the stretching process, temperature control is performed sequentially across six temperature zones. After growth is complete, the process proceeds to step S3, the significant cooling process.

[0027] The obtained gallium arsenide crystal rods are sliced ​​and processed to obtain a highly uniform gallium arsenide substrate. The carrier concentration fluctuation within the substrate is ≤6%, and the carrier concentration uniformity is ≥94%. The carrier concentration CC value range of the 200mm long gallium arsenide crystal rod is 0.4-2.3. This substrate is a silicon-doped n-type gallium arsenide substrate, which can be used to fabricate LEDs, VCSEL lasers, or infrared detector devices.

[0028] Example 1: Fabrication of 4-inch silicon-doped gallium arsenide crystal rods A pBN crucible was used for loading, with the following materials: 9.86 kg of gallium arsenide raw material, 0.8 g of silicon dopant, and 60 g of boron oxide. The crucible was placed inside a single-crystal furnace with six temperature zones (Z1Z6), and the temperature was increased to completely melt the raw material into gallium arsenide melt, completing the crystal pulling and shoulder formation.

[0029] After the shoulder release is completed, the opening and growth stage begins. The pulling speed is executed in the following segments: pull at a speed of 3mm / h for 24 hours; switch to a speed of 2mm / h for 24 hours; maintain a speed of 2mm / h for 24 hours; switch to a speed of 1.5mm / h for 24 hours.

[0030] Temperature timing control for each temperature zone: Initial temperature settings: Z1=1100℃, Z2=1180℃, Z3=1240℃, Z4=1240℃, Z5=1243℃, Z6=1243℃; The first 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 increases by 3℃, Z5 increases by 2℃, and Z6 increases by 2℃. The second 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 remains unchanged, Z5 increases by 2℃, and Z6 increases by 2℃. The third 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃. The fourth 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃.

[0031] After the entire stretching growth process is completed, a significant cooling process is performed. The Z1 and Z2 temperature zones continue to cool down, while the Z3 to Z6 temperature zones work together to complete the cooling process, resulting in a 4-inch gallium arsenide crystal rod.

[0032] Slicing a 4-inch crystal rod, such as... Figure 1 As shown, carrier concentration tests were performed on the substrate at the 4-inch sampling points.

[0033] Referring to Table 1, the CC values ​​at various measurement points on the substrate at the head of the crystal rod are distributed between 0.41 and 0.43; the CC values ​​at various measurement points on the substrate at 192mm of the crystal rod (excluding the tail impurity section) are distributed between 2.40 and 2.48. The axial CC value of the crystal rod is in the range of 0.4 to 2.3; the carrier concentration fluctuation within the substrate is less than 6%, and the uniformity within the substrate is greater than 94%.

[0034] Table 1. CC values ​​at various measuring points on a 4-inch crystal rod.

[0035] Example 2: Fabrication of a 6-inch silicon-doped gallium arsenide crystal rod The pBN crucible was used for loading, with the following materials: 23.25 kg of gallium arsenide raw material, 2.0 g of silicon dopant, and 94 g of boron oxide. The crucible was placed inside a single crystal furnace with six temperature zones (Z1Z6), and the temperature was increased to completely melt the raw material into gallium arsenide melt, completing the crystal pulling and shoulder formation.

[0036] After the shoulder formation is completed, growth begins, and the pull-down speed is controlled in segments as in Example 1: pull-down speed of 3 mm / h for 24 hours; switch to pull-down speed of 2 mm / h for 24 hours; maintain pull-down speed of 2 mm / h for 24 hours; switch to pull-down speed of 1.5 mm / h for 24 hours. The temperature timing control parameters for the six temperature zones are exactly the same as in Example 1.

[0037] After the Kelvin growth was completed, a significant cooling process was performed to obtain a 6-inch gallium arsenide crystal rod.

[0038] Slicing a 6-inch crystal ingot, such as... Figure 2 As shown, carrier concentration detection was performed at the 6-inch sampling points: Referring to Table 2, the CC value distribution of the substrate at the head of the crystal rod is 0.71-0.74; the CC value distribution at 187mm of the crystal rod (excluding the tail impurity section) is 2.42-2.49. The axial CC value of the crystal rod is in the range of 0.4-2.3; the carrier concentration fluctuation within the substrate is less than 6%, and the uniformity within the substrate is greater than 94%.

[0039] Table 2. CC values ​​at various measuring points of a 4-inch crystal rod.

[0040] Comparative example (existing constant process) A 200mm gallium arsenide crystal rod was prepared using a traditional constant pulling speed and constant melt temperature process. The axial CC value of the crystal rod ranged from 0.4 to 3.5. The carrier concentration fluctuation within the substrate wafer was greater than 10%, the uniformity within the wafer was less than 90%, and some sections of the crystal rod exceeded the customer's usage range of 0.4 to 3.0, resulting in low crystal rod utilization.

[0041] By comparing Examples 1 and 2 with the comparative examples, it can be seen that the present invention increases the temperature gradient at the growth interface and reduces the thickness of the interface layer by gradually reducing the pull-down speed and coordinating the cooling of the crystal end temperature zone and the heating of the melt end temperature zone. This improves the silicon doping segregation effect, compresses the axial carrier concentration fluctuation range of the crystal rod, reduces the carrier concentration fluctuation within the substrate, improves the crystal rod utilization rate and the consistency of the substrate product, and avoids crystal dislocation and single crystal failure problems caused by unreasonable pull-down speed.

[0042] The above description only illustrates the preferred embodiments of the present invention. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention, and all such changes should be included within the protection scope of the present invention.

Claims

1. A crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate, characterized in that, Includes the following steps: S1. Complete the raw material loading, crystal pulling and shoulder forming processes to obtain gallium arsenide crystal with shoulder forming; S2. After the shoulder formation is completed, crystal pulling growth is carried out. During the pulling growth process, the crystal pulling speed is gradually reduced, and the temperature of multiple temperature zones in the single crystal furnace is controlled in a coordinated manner. The temperature of the crystal end temperature zone is continuously reduced, and the temperature of the melt end temperature zone is continuously increased, so that the melt temperature gradually increases, the temperature gradient at the crystal growth interface is increased, the thickness of the growth interface layer is reduced, and the segregation effect of doped elements is improved. Among them, the crystal pulling speed is 16mm / h, and the melt temperature is controlled at 1245-1270℃. S3. After the crystal pulling growth is completed, a significant cooling process is performed to obtain gallium arsenide crystal rods.

2. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 1, characterized in that: The single crystal furnace is equipped with six temperature zones, namely Z1, Z2, Z3, Z4, Z5, and Z6; Z1 and Z2 are heater temperature zones near the crystal end, and Z3, Z4, Z5, and Z6 are heater temperature zones near the melt end.

3. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 1, characterized in that: In step S2, the stretching growth adopts a multi-segment constant stretching speed continuous growth method: first, stretching is carried out at a stretching speed of 3 mm / h for 24 hours; then, it is switched to a stretching speed of 2 mm / h for 24 hours; the stretching speed of 2 mm / h is maintained for another 24 hours; finally, it is switched to a stretching speed of 1.5 mm / h for 24 hours.

4. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 2, characterized in that, In step S2, temperature control is performed in each temperature zone according to the following timing sequence: Initial temperature settings: Z1=1100℃, Z2=1180℃, Z3=1240℃, Z4=1240℃, Z5=1243℃, Z6=1243℃; The first 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 increases by 3℃, Z5 increases by 2℃, and Z6 increases by 2℃. The second 24-hour growth cycle: Z1 decreases by 10℃, Z2 decreases by 10℃, Z3 increases by 3℃, Z4 remains unchanged, Z5 increases by 2℃, and Z6 increases by 2℃. The third 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃. The fourth 24-hour growth cycle: Z1 continues to decrease by 10℃, Z2 continues to decrease by 10℃, Z3 continues to increase by 3℃, Z4 remains unchanged, Z5 continues to increase by 2℃, and Z6 continues to increase by 2℃.

5. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 1, characterized in that: In step S1, the raw materials include gallium arsenide raw material, silicon dopant, and boron oxide. A pBN crucible is used for loading the materials. The pBN crucible containing the raw materials is placed in a single crystal furnace, and the temperature is raised to melt the gallium arsenide raw material into gallium arsenide melt.

6. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 5, characterized in that: When preparing a 4-inch gallium arsenide crystal rod, 9.86 kg of gallium arsenide raw material, 0.8 g of silicon dopant, and 60 g of boron oxide are used; when preparing a 6-inch gallium arsenide crystal rod, 23.25 kg of gallium arsenide raw material, 2.0 g of silicon dopant, and 94 g of boron oxide are used.

7. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 1, characterized in that: The carrier concentration fluctuation within the gallium arsenide substrate is ≤6%, and the carrier concentration uniformity is ≥94%; the carrier concentration CC value of the crystal rod is controlled within the range of 0.4~2.3 within a length of 200mm along the crystal rod axis.

8. The crystal growth process for achieving uniform carrier concentration within a gallium arsenide substrate according to claim 1, characterized in that: The gallium arsenide substrate is a silicon-doped n-type gallium arsenide substrate.

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