Euler-bend ultra-low-energy polarization-insensitive optical switch

Abstract

The application provides an Euler bending ultra-low-energy consumption polarization-insensitive optical switch, and belongs to the technical field of integrated optics, and comprises a substrate layer, a lower cladding layer, a silicon waveguide layer, an upper cladding layer and an electrode layer; the lower cladding layer is arranged on the substrate layer; the silicon waveguide layer is arranged on the lower cladding layer and comprises a multi-turn coiled waveguide and a phase compensation waveguide; the upper cladding layer is arranged on the silicon waveguide layer; the electrode layer is arranged on the upper cladding layer and comprises a heating electrode; the planar projection of the heating electrode on the silicon waveguide layer at least partially overlaps with the planar projection of the multi-turn coiled waveguide; adjacent loops of the multi-turn coiled waveguide have different waveguide widths; the phase compensation waveguide comprises cascaded first and second compensation sections; the cross-sectional width of the first compensation section is different from the height; and the second compensation section satisfies a polarization degenerate condition, so as to eliminate the phase difference between transverse electric mode and transverse magnetic mode under thermal modulation. The application realizes extremely low switching power consumption and achieves full polarization-independent high-fidelity signal switching.

Description

Technical Field

[0001] This invention belongs to the field of integrated optical technology, and more specifically, relates to an Euler-bending ultra-low-power polarization-insensitive optical switch. Background Technology

[0002] With the ever-increasing demands for photonic integrated circuit density and system energy efficiency from global cloud computing services, hyperscale AI data centers, and photonic networks-on-a-chip, Mach-Zehnder interferometer (MZI) type thermally scalable switches based on silicon-based photonic integration platforms have become core components for realizing large-scale dynamic optical routing switching and optical interconnects due to their high compatibility with mature CMOS processes, high switching speed, and reliable static stability. However, in the process of moving towards ultra-large-scale optical switching matrices of thousands or even higher dimensions, traditional thermally scalable switch solutions exhibit an irreconcilable technical trade-off between energy consumption control, polarization robustness, and signal extinction performance, severely restricting their application in high-performance computing environments.

[0003] First, from an energy efficiency perspective, traditional optical switch phase shift arms mostly employ simple linear waveguides or folded waveguide structures based on large-radius circular arc bends. Limited by the finite thermo-optic coefficient of silicon and the unavoidable spatial thermal diffusion effect, the interaction efficiency between the thermal field and the guided mode field is low, resulting in the electrical power required to maintain the phase interference extremum often reaching tens of milliwatts. In ultra-high-density integration environments, this accumulated heat dissipation not only poses a severe challenge to the chip's heat dissipation packaging but also induces severe inter-cell thermal crosstalk due to the lateral penetration of the thermal field, leading to switching state drift and significantly increasing the burden on the system's control algorithm.

[0004] Furthermore, the inherent strong birefringence of silicon-based waveguides presents optical switches with extreme polarization sensitivity challenges. Due to the intrinsic difference in the effective refractive index change rate between transverse electric (TE) and transverse magnetic (TM) modes under the same thermal field modulation, the switch can often only achieve ideal on / off switching for a single polarization state under a specific driving voltage. The other polarization state will be in a non-ideal coherent state due to phase lag or lead, thus introducing significant polarization dependent loss (PDL) and causing a drastic degradation in the extinction ratio. This forces the system to introduce complex polarization control elements at the front end, greatly increasing the insertion loss and hardware cost of the optical link.

[0005] Furthermore, there is a profound contradiction between pursuing the ultimate in compact integration and maintaining high extinction ratio performance. While attempts have been made to reduce power consumption and device length by introducing helical winding structures to lengthen the thermal interaction path, conventional curved waveguides with ultra-small radii induce severe mode mismatch, accompanied by significant scattering losses from the fundamental mode to higher-order modes. This mode degradation caused by curvature discontinuities disrupts the mode field symmetry between the two arms of the MZI structure, resulting in incomplete interference cancellation and ultimately deteriorating the device's extinction ratio performance, making it difficult to meet the requirements of high-fidelity optical signal transmission.

[0006] Ultimately, the key technological challenge to overcome the performance bottleneck of large-scale photonic exchange matrices lies in achieving ultra-long-range, high-efficiency thermal interactions within a very small physical space, eliminating response phase deviations between different polarization states at the physical level, and suppressing mode interference caused by ultra-compact bending. Summary of the Invention

[0007] In view of the above-mentioned defects or improvement needs of the prior art, the present invention provides an Euler bending ultra-low power consumption polarization-insensitive optical switch, thereby solving the technical problems of strong polarization sensitivity, high thermal modulation power consumption and crosstalk of compact coiled structure in the prior art.

[0008] To achieve the above objectives, according to one aspect of the present invention, an Euler-bending ultra-low power polarization-insensitive optical switch is provided, comprising a substrate layer, a lower cladding layer, a silicon waveguide layer, an upper cladding layer, and an electrode layer; The lower cladding layer is disposed on the substrate layer; The silicon waveguide layer is disposed on the lower cladding layer. The silicon waveguide layer includes a multi-turn coiled waveguide, a phase compensation waveguide, three cascaded multimode interference couplers, and two sets of phase shift arms disposed between adjacent multimode interference couplers. The two sets of phase shift arms constitute a first-stage interference circuit and a second-stage interference circuit. The upper cladding layer is wrapped around the silicon waveguide layer; The electrode layer is disposed on the upper cladding; the electrode layer includes a heating electrode, the planar projection of the heating electrode on the silicon waveguide layer at least partially coincides with the planar projection of the multi-turn coiled waveguide, so as to simultaneously modulate multiple waveguide loops in the multi-turn coiled waveguide through the thermal field; The adjacent loops of the multi-turn coiled waveguide have different waveguide widths; The phase compensation waveguide includes a cascaded first compensation segment and a second compensation segment. The cross-sectional width and height of the first compensation segment are unequal, and the second compensation segment satisfies the polarization degeneracy condition to eliminate the phase difference between the transverse electric mode and the transverse magnetic mode under thermal modulation.

[0009] Preferably, the multi-turn coiled waveguide is a helical delay line, the heating electrode has an arc-shaped topology that matches the helical delay line, and the heating electrode covers multiple helical loops of the helical delay line.

[0010] Preferably, the central transition point of the spiral delay line is integrated with an Euler bending structure, and the radius of curvature of the Euler bending structure varies linearly with the arc length of the waveguide axis.

[0011] Preferably, the cross-sectional width and height of the second compensation segment are equal, so that the second compensation segment is in a polarization degenerate state; the physical length ratio of the first compensation segment and the second compensation segment is configured based on the difference in thermo-optical sensitivity of the silicon waveguide layer to the transverse electric mode and the transverse magnetic mode.

[0012] Preferably, the physical length of the first compensation segment Physical length of the second compensation segment The following mapping relationship is satisfied:

[0013]

[0014] in, This represents the initial polarization phase mismatch. For the operating wavelength, Let be the cross-sectional width of the first compensation segment. The cross-sectional width of the second compensation segment is... and These are the effective refractive indices for the transverse electric mode and the transverse magnetic mode, respectively. The effective refractive index of the transverse electric mode or transverse magnetic mode in the second compensation segment.

[0015] Preferably, the difference in waveguide width between adjacent loops causes a deviation in the propagation constant of the adjacent loops to suppress evanescent wave coupling; the spacing between the adjacent loops satisfies the condition that the coupling length is much greater than the total length of the multi-turn coiled waveguide.

[0016] Preferably, the thickness of the silicon waveguide layer is greater than 400 nm; the electrode layer further includes a connecting electrode connected to the heating electrode, the heating electrode being made of titanium nitride, and the connecting electrode being made of copper.

[0017] Preferably, the silicon waveguide layer further includes three cascaded multimode interference couplers and two sets of phase shift arms disposed between adjacent multimode interference couplers, the two sets of phase shift arms constituting a first-stage interference circuit and a second-stage interference circuit.

[0018] In another aspect, the present invention provides a photonic integrated system comprising an optical input port, an optical output port, and an Euler-bent ultra-low-power polarization-insensitive optical switch, wherein the Euler-bent ultra-low-power polarization-insensitive optical switch is connected between the optical input port and the optical output port.

[0019] Preferably, the photonic integrated system further includes a III-V group active device layer, and the silicon waveguide layer of the Euler-bent ultra-low power polarization-insensitive optical switch is integrated below the III-V group active device layer; The size configuration of the first compensation segment and the second compensation segment of the phase compensation waveguide is used to eliminate the interference of the non-uniform stress field generated by heterobonding on the polarization phase.

[0020] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects: 1. The Euler-bending ultra-low-power polarization-insensitive optical switch proposed in this invention utilizes the spatial penetration characteristics of the thermal field in the vertical direction by designing a heating electrode that coincides with the planar projection of a multi-turn coiled waveguide. This enables synchronous and efficient modulation of multiple waveguide loops by a single heat source, fundamentally improving the phase shift generation efficiency per unit power consumption and solving the problem of excessive energy consumption caused by the low thermal-optical efficiency of traditional structures. By cascading a first compensation segment with unequal cross-sectional width and height and a second compensation segment that satisfies the polarization degeneracy condition, the two waveguide segments achieve precise physical length complementarity by utilizing the differential responses of the transverse electric mode and transverse magnetic mode thermal-optical sensitivity. This eliminates the polarization phase difference caused by silicon-based birefringence at the structural level, enabling synchronous switching of all polarization states without external polarization control. By making adjacent loops of the multi-turn coiled waveguide have different waveguide widths, a propagation constant mismatch mechanism is introduced to disrupt the phase matching condition of evanescent wave coupling. This effectively suppresses crosstalk between loops while maintaining a compact integrated size, ensuring high extinction ratio and signal fidelity.

[0021] 2. The Euler-bent ultra-low power polarization-insensitive optical switch proposed in this invention sets the center transition of the spiral delay line as an Euler-bent structure. The continuous change of the curvature of the Euler bend provides an adiabatic evolution path, which can effectively suppress the excitation of higher-order modes, ensure that the fundamental mode remains pure during the bending process, reduce insertion loss, and allow the spiral line to use a smaller bending radius without significantly increasing loss, thereby further reducing chip area and improving integration density.

[0022] 3. The Euler bending ultra-low power polarization-insensitive optical switch proposed in this invention can achieve comprehensive performance optimization of ultra-low power consumption, full polarization independence and low crosstalk within a very small physical envelope, and is particularly suitable for large-scale photonic integrated systems and III-V heterogeneous integrated platforms. Attached Figure Description

[0023] Figure 1 This is an exploded structural diagram of the Euler-bending ultra-low-power polarization-insensitive optical switch in an embodiment of the present invention.

[0024] Figure 2 This is a top view of the Euler-bent ultra-low-power polarization-insensitive optical switch waveguide layer in an embodiment of the present invention.

[0025] Figure 3 This is a 3D structural schematic diagram of the phase compensation waveguide in the Euler-bent ultra-low power polarization-insensitive optical switch waveguide layer in an embodiment of the present invention.

[0026] Figure 4 This is a graph showing the temperature-dependent thermo-optical response dn / dT of the Euler-bending ultra-low-power polarization-insensitive optical switch as a function of its width, as described in this embodiment of the invention.

[0027] Figure 5 This is a graph showing the degraded filtering curve caused by polarization effects on the optical switch without integrated phase compensation waveguide in this embodiment of the invention.

[0028] Figure 6 This is a filtering curve diagram of an optical switch integrating a phase-compensated waveguide in an embodiment of the present invention.

[0029] Figure 7 This is a schematic diagram of the ultra-high extinction ratio optical switch structure of the cascaded Euler bending ultra-low power polarization-insensitive optical switch in this embodiment of the invention.

[0030] Figure 8 This is a schematic diagram of the cross-section of a III-V group laser in an embodiment of the present invention.

[0031] Wherein, 1-substrate layer; 2-lower cladding layer; 3-silicon waveguide layer; 301-Archimedes spiral delay line; 302-phase compensation waveguide; 31-input multimode interference coupler; 32-first modulation arm; 33-second modulation arm; 34-output multimode interference coupler; 4-upper cladding layer; 41-input coupler; 42-intermediate coupler; 43-output coupler; 44-first phase shift arm group; 45-second phase shift arm group; 5-heating electrode; 51-system substrate layer; 52-silicon oxide layer; 53-thick silicon device layer; 54-n-type InP layer; 55-composite layer; 551-p-type InP layer; 552-InP active region; 553-side metal electrode; 56-top metal electrode; 6-connecting electrode. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0033] This invention proposes an Euler-bending ultra-low-power polarization-insensitive optical switch, aiming to achieve extremely low switching power consumption while realizing high-fidelity signal switching that is completely polarization-independent. To achieve the above objective, this invention adopts a cascaded Mach-Zehnder interferometer (MZI) topology, which is mainly composed of four core components: a polarization-insensitive multimode interference coupler, a multi-loop Archimedean spiral delay line, a two-segment polarization-insensitive phase compensation waveguide, and an arc-shaped thermally modulated electrode. A first direction, a second direction, and a third direction are defined as mutually perpendicular in the spatial coordinate system. Along the third direction, from bottom to top, the switch includes a substrate layer, a lower cladding layer, a thick silicon waveguide layer with a thickness h1 greater than 400 nm, and an upper cladding layer surrounding the thick silicon waveguide layer. At least three polarization-insensitive multimode interference couplers are cascaded along the first direction within the silicon waveguide layer, and are connected by symmetrically distributed spiral phase-shifting units to form two-stage interference loops.

[0034] The Archimedes spiral delay line, as the core gain element of the phase shift arm, follows a polar coordinate equation on its center trajectory on the chip surface: The effective phase shift length is doubled by winding the wave in a loop within a very small physical length. An Euler bend structure with a radius of curvature that linearly varies with arc length is integrated at the center transition of the delay line. Its adiabatic evolution characteristics suppress the excitation of higher-order modes in the compactly wound thick silicon waveguide. Furthermore, to ensure low crosstalk transmission between loops, adjacent loops of the helical path employ different waveguide widths. and The evanescent wave coupling is suppressed by utilizing a phase mismatch mechanism. The phase-compensating waveguide is integrated in series within the modulation arm path, and it consists of a first compensation segment with a rectangular cross-section and a second compensation segment with a strictly square cross-section cascaded together. The width of the second compensation segment is set to be equal to the waveguide height h1, utilizing the spatial symmetry of the square cross-section to achieve polarization degeneracy and satisfy the criteria. This eliminates the phase difference caused by silicon-based birefringence through physical compensation. During the design process, the length ratio of the two compensation waveguides is configured accordingly. This makes the phase increments of the TE mode and TM mode generated by the modulation arm under a specific driving power tend to be consistent, thus achieving synchronous switching of the full polarization state.

[0035] The arc-shaped thermally modulated electrode is positioned above the upper cladding along a third direction and is made of titanium nitride material with high thermal response characteristics. Its geometric trajectory coincides with the projection of the spiral phase-shifting path below. Through the spatial penetration characteristics of the thermal field in the third direction, synchronous modulation of multiple thick silicon waveguide circuits by a single heating source is achieved, resulting in ultra-high electrothermal conversion efficiency of "one heat source, multiple modulations." The electrode is led out through a low-resistivity copper metal layer at both ends, ensuring stable injection of the excitation current. Furthermore, this invention achieves synergistic control through cascaded two-stage interference circuits: the first-stage interference circuit acts as a dynamic power divider to compensate for beam splitting ratio deviations caused by manufacturing errors, ensuring perfect amplitude balance of the coherent optical field when entering the second-stage circuit; the second-stage interference circuit then performs phase switching, thereby achieving excellent interference destructive depth in all polarization states. In summary, the polarization-insensitive optical switch of this invention achieves ultra-low power consumption, high extinction ratio, and full polarization independence performance optimization on a silicon deposition platform through a unique spiral topology design and cascaded phase compensation logic, providing a core technical solution and practical value for large-scale, highly reliable photonic integrated switching networks.

[0036] The technical solution of the present invention will be further illustrated below through specific embodiments.

[0037] Example 1 like Figure 1 As shown, this embodiment provides an Euler-bending ultra-low-power polarization-insensitive optical switch. The switch includes a substrate layer 1, a lower cladding layer 2 disposed on the substrate layer 1, a silicon waveguide layer 3 disposed on the lower cladding layer 2, an upper cladding layer 4 enclosing the silicon waveguide layer 3, and an electrode layer disposed on the upper cladding layer 4. Specifically, this stacked structure constitutes the basic physical carrier of the optical switch. Preferably, the thickness of the silicon waveguide layer 3 is greater than 400 nm. The purpose of using a thick silicon waveguide design is to enhance the lateral and longitudinal confinement of the optical field. Compared to traditional thin silicon waveguides, the thick silicon structure can more tightly confine the guided mode energy within the waveguide core region, significantly reducing the interaction between the mode field and sidewall roughness and the upper and lower interfaces, thereby greatly reducing scattering loss. It should be understood that although this embodiment preferably uses a silicon waveguide with a thickness greater than 400 nm, in other embodiments, any thickness configuration that meets the requirements of mode field confinement and thermal absorption is within the scope of protection of this application.

[0038] Figure 2The diagram shows the Mach-Zehnder interferometer structure used in the optical switch. Within the silicon waveguide layer (3), along a first direction, it sequentially includes an input multimode interference coupler 31, symmetrically distributed first modulation arms 32 and second modulation arms 33, and an output multimode interference coupler 34. The Archimedean spiral delay line 301, serving as the core phase shift path in the first modulation arm 32 and the second modulation arm 33, is fabricated on a silicon deposition platform. Its geometric center trajectory on the chip surface follows a polar coordinate equation:

[0039] in The starting radius, The spacing between adjacent waveguide loops. The width of the thick silicon waveguide helical segment is given. This specific geometric topology based on silicon deposition technology allows the phase shift segment of the thick silicon waveguide with a large cross-sectional size to compress ultra-long paths within a micrometer-scale physical envelope. Utilizing the spatial thermal field penetration characteristics of the arc-shaped titanium nitride thermally modulated electrode in the third direction, simultaneous modulation of the Archimedean spiral delay line 301 is achieved, resulting in ultra-high thermal field coupling efficiency of a single thermally modulated electrode to multiple silicon waveguides. To suppress the excitation and radiation loss of higher-order modes due to the strong localization of the thick silicon waveguide on the silicon deposition platform, a gradually curvature Euler bending structure is integrated at the central transition of the Archimedean spiral delay line 301. The derivative relationship between its radius of curvature and the arc length of the waveguide axis satisfies the physical constraint equation:

[0040] in The length of the curve. This represents the maximum bending radius at the junction of the spirals. This is a constant characterizing the slope of the curvature change. Furthermore, to ensure low crosstalk transmission between thick silicon spiral loops, the loop spacing... The coupling length needs to be precisely configured according to the polarization mode, and it must satisfy the following criterion formula:

[0041] in and These are the odd-symmetric mode and the even-symmetric mode in the coupled mode, respectively. This is the total length of the Archimedes spiral delay line 301. Furthermore, to ensure low crosstalk transmission between thick silicon spiral loops, the present invention can also introduce a phase mismatch mechanism in the spiral path, so that the thick silicon waveguides of adjacent loops have different second-direction widths. and The width difference causes a significant deviation in the propagation constants of adjacent loop waveguides, thus enabling propagation at extremely small loop spacings. This invention effectively suppresses waveguide coupling. By deeply coupling the aforementioned Archimedes spiral structure and mathematical constraint equations within a deposited silicon platform and a thick silicon system, the invention achieves synergistic optimization of ultra-low power consumption and low insertion loss.

[0042] The Archimedes spiral delay line 301 is fabricated on a silicon deposition platform. Utilizing the low thermal budget of silicon deposition, it can be used as a back-end process for non-destructive 3D stacking integration with underlying active devices or front-end optoelectronic integrated chips, significantly improving the system's integration dimensionality and functional scalability. The Archimedes spiral delay line 301 employs a thick silicon waveguide structure, increasing the waveguide's thickness in the third direction... The preferred waveguide thickness is greater than 400 nm, which can effectively confine the guided mode energy to the geometric center region of the waveguide, significantly reduce the interaction between the mode field and the rough sidewall surface and the rough top surface, thereby greatly reducing scattering loss and enhancing the waveguide's absorption efficiency for thermal field penetration.

[0043] Figure 3 The diagram shows a phase-compensated waveguide 302, which serves as the core physical unit for achieving intrinsic polarization-independent characteristics of the optical switch. The design process is based on a deep quantitative characterization of the thermo-optical dispersion characteristics of thick silicon waveguide modes. First, a multi-dimensional scan of guided modes with different polarization states on the deposited silicon platform is performed using a full-vector finite-difference intrinsic frequency solver to obtain the effective refractive index change of the thick silicon waveguide under thermal perturbation temperatures. Due to the geometric anisotropy of the thick silicon waveguide cross-section, the transverse electric (TE) mode and the transverse magnetic (TM) mode exhibit a nonlinear deviation in their sensitivity to temperature fluctuations. To eliminate this intrinsic phase shift, the present invention introduces a compensation architecture consisting of two segments of width, by configuring a specific first width in the second direction. With the second width The second compensation segment employs a strictly square waveguide structure. Utilizing the high spatial geometric symmetry of the square cross-section, this waveguide segment is placed in a polarization degenerate state, satisfying... .

[0044] In the design of a thermally tuned phase shifter, since the ratio of the thermo-optic coefficients of the TE and TM modes has a significant bias difference at different widths, a global phase sensitivity correction coefficient is first defined.

[0045] And derive the initial polarization phase mismatch. In thermo-optical switches To compensate for this deviation at the physical level, the length distribution of the compensation waveguide must satisfy a mapping relationship based on the mode refractive index. The length configuration of its first compensation segment satisfies...

[0046] Then, the length of the second compensation segment is derived from the polarization degeneracy characteristics of the square waveguide segment.

[0047] By iteratively scaling the above parameters, the total phase contribution function is made to satisfy the global convergence criterion. Ultimately, it led to and The phase increments of the modes under the target temperature rise are precisely coincident, simplifying the highly complex polarization phase control into the linear superposition of two discrete width waveguides, thus achieving synchronous switching of the optical switch in all polarization states. Figure 4 The figure shows the thermo-optical response coefficients of waveguides with different widths to temperature changes in two modes. curve. Figure 5 The figure shows the degradation curve of a conventional device under the influence of polarization. Figure 6 The figure shown is a simulation result of the device.

[0048] Further explanation: the heating electrode 5 is an arc-shaped titanium nitride thermally modulated electrode, which is positioned above the upper cladding along a third direction, its geometric trajectory vertically projecting onto the spiral phase-shifting path below. The core heating region of the electrode is made of titanium nitride and processed into an arc-shaped topology to ensure uniform coverage and modulation of multiple waveguide loops when Joule heat penetrates into the silicon waveguide layer, achieving high-efficiency thermal modulation. Simultaneously, the electrodes are led out at both ends through low-resistivity connecting electrodes 6, utilizing their excellent conductivity to reduce interconnect losses and ensure stable injection of excitation current. Through the differentiated distribution of the TiN thermal response layer and the copper connecting layer, this invention significantly improves the electrothermal response efficiency and process reliability of the device while achieving ultra-low power phase modulation. Through the deep synergy of the aforementioned Archimedean spiral structure and dual-segment phase compensation logic, this embodiment achieves performance optimization of ultra-low power consumption and synchronous switching of all polarization states.

[0049] Example 2 As an optional implementation, this embodiment provides an ultra-high extinction ratio polarization-insensitive optical switch based on a two-stage tandem Mach-Zehnder interferometer (MZI) topology. The aim is to eliminate coupler beam splitting ratio mismatch caused by manufacturing process errors through multi-stage phase interference modulation, thereby obtaining excellent interference destructive depth. Figure 7As shown, the specific structure of this embodiment is based on the hierarchical architecture of Embodiment 1, with three polarization-insensitive multimode interference couplers (MMIs) cascaded sequentially along the light propagation direction: input coupler 41, intermediate coupler 42, and output coupler 43. Two sets of phase-shifting arms based on thick silicon deposition technology are symmetrically distributed among the three couplers, forming a two-stage series interference circuit: The input coupler 41 and intermediate coupler 42 are connected by a first phase-shifting arm group 44 (containing two symmetrically distributed spiral phase-shifting units), forming a first-stage tunable interference circuit; the intermediate coupler 42 and output coupler 43 are connected by a second phase-shifting arm group 45 (containing another two symmetrically distributed spiral phase-shifting units), forming a second-stage phase-shifting switching circuit. Both sets of phase-shifting arms employ the Archimedean spiral delay line and dual-segment phase-compensated waveguide structure as described in Embodiment 1 to ensure that each interference path has an intrinsically consistent phase response under dual polarization states.

[0050] At the operational logic level, the first-stage tunable interference loop, acting as a dynamic power divider and adaptive balancing module, functions primarily to induce a precise target temperature rise in the spiral delay line by controlling the excitation power of the internal phase-shift unit through closed-loop regulation, thereby generating a phase shift. This compensates for the beam splitting ratio deviation δ between the input coupler and the intermediate coupler caused by fluctuations in the photolithography precision of the silicon deposition process. The complex amplitudes of the two coherent light fields output from the input coupler are respectively... and ,in Due to process jitter, its actual beam splitting power ratio κ= It often deviates from the ideal 3dB split ratio, i.e., κ The first-stage phase shifter generates a compensated phase.

[0051] This ensures that the coherent wavefront after passing through the intermediate coupler achieves a consistent mapping in the amplitude dimension, and that the complex amplitude distribution at its output satisfies the criterion equation.

[0052] By adjusting the phase difference This ensures that the amplitudes of the two electric fields output from the intermediate coupler 42 to the second-stage circuit reach a global equilibrium condition, i.e.

[0053] Based on this amplitude uniformity mapping, since the spiral phase shift units all adopt a polarization phase compensation structure based on a dual-segment heterogeneous width, the above amplitude balancing process has eigensols for both transverse electric (TE) and transverse magnetic (TM) modes. Before the perfectly balanced wave enters the second-stage phase shift switching circuit, the target switching phase is applied. Subsequently, since the amplitude deviation δ has been dynamically reduced to zero by the first-stage circuit, the destructive interference can achieve ideal zero-point mapping in all polarization states, enabling the global extinction ratio of the overall device to break through the physical limit of single-stage MZI and converge to the order of ultra-high extinction ratio.

[0054] Through this cascaded compensation mechanism, this embodiment not only continues the ultra-low power consumption and dual polarization synchronous switching characteristics brought by the spiral thermal phase shifter in Embodiment 1, but also significantly improves the extinction ratio performance of the device in all polarization states, enabling it to achieve signal isolation far exceeding that of a single-stage MZI structure in actual testing. Through the deep collaboration between the three-stage coupler and the two pairs of phase shifter arms, this embodiment provides a polarization-insensitive technical solution with ultra-high extinction bit performance for a high-performance, highly robust, ultra-large-scale photon switching matrix.

[0055] Example 3 As an optional implementation, this embodiment is based on the application of the ultra-low power polarization-insensitive optical switch provided in Embodiments 1 and 2 above in a III-V heterogeneous integration platform. It aims to solve the core bottlenecks in heterogeneous bonded optoelectronic integrated chips, such as active devices like distributed feedback lasers and semiconductor optical amplifiers, and the underlying silicon waveguide, which suffer from low optical switching efficiency and severe thermal crosstalk due to mode field mismatch, thermal stress distortion, and strong polarization dependence. Figure 7 As shown, the structure, arranged in ascending order from the third direction, includes a system substrate layer 51, a silicon oxide layer 52, a thick silicon device layer 53, an n-type InP layer 54, and a composite layer 55. The composite layer 55 specifically includes: a p-type InP 551 symmetrically arranged along the central axis in a second direction; an InP active region 552, wherein the InP active region 552 is sandwiched between the symmetrical p-type InP 551 on the central axis; and a side metal electrode 553. The composite layer 55 is connected via the n-type InP layer 54. A top metal electrode 56 covers the p-type InP 551 and InP 552. In III-V heterogeneous integration platforms, a thick silicon device layer 53 with a height h1 greater than 400 nm is typically used as the bottom waveguide. This thick silicon structure aims to enhance the mode field overlap factor between the silicon waveguide and the heterobonded III-V material above, thereby improving the gain acquisition efficiency of the active region. However, thick silicon waveguides exhibit extremely high sensitivity to geometrical changes during the high-pressure thermal cycling process of heterobonding, and the non-uniform thermal stress generated at the bonding interface often leads to significant polarization phase shifts and a decrease in extinction performance on the waveguide wavefront.

[0056] In the optical switching system design of this III-V heterogeneous integration platform, the Archimedean spiral delay line and multi-segment width phase compensation structure are integrated into its thermally tuned phase shifter assembly. For deposited silicon layers with a thickness greater than 400 nm, the dual-segment compensation width sequence described in this invention is employed. and Using the aforementioned information regarding the change in effective refractive index A set of homogeneous equations is used to solve the phase response of thick silicon waveguides under complex stress fields. During the design process, the physical length of the waveguide satisfying polarization phase synchronization mapping is determined by introducing first-order derivative constraints for width deviation and thermal stress bias. Simultaneously, the arc-shaped electrode structure described in this invention effectively reduces the optical switching modulation energy consumption in the region adjacent to the active laser, physically suppressing the interference of heat accumulation caused by frequent optical switching on the stability of the laser's lasing wavelength.

[0057] The beneficial effects of the technical solution described in this embodiment are as follows: First, addressing the extreme sensitivity of III-V heterogeneous integration platforms to local thermal disturbances, the spatial coupling of the arc-shaped electrode and the spiral circuit reduces the switching power consumption of the optical switch to the milliwatt level, providing a crucial power margin for achieving high-density, multi-channel active-passive monolithic integration. Second, this embodiment eliminates the strong birefringence phase difference introduced by bonding distortion in thick silicon waveguides through phase consistency constraints and the polarization degeneracy characteristics of the square waveguide segment. This ensures that at the III-V active signal output end, the optical switch has overlapping filter envelopes and synchronous switching depths in different polarization states, solving the stability problem of heterogeneous integrated chips in complex polarization operating environments. Finally, while improving the extinction ratio, this solution reduces the mode conversion loss and end-face reflection caused by increased thickness through Euler bending thermal insulation connections, providing core technical support and optimization solutions for achieving high-performance, high-isolation III-V heterogeneous integrated photonic switching networks.

[0058] Example 4 This embodiment provides a photonic integrated system. The system includes an optical input port, an optical output port, and an Euler-bent ultra-low-power polarization-insensitive optical switch as described in any of the foregoing embodiments 1 to 3, wherein the Euler-bent ultra-low-power polarization-insensitive optical switch is connected between the optical input port and the optical output port.

[0059] Furthermore, the photonic integrated system also includes a III-V group active device layer, and the silicon waveguide layer of the Euler-bent ultra-low power polarization-insensitive optical switch is integrated below the III-V group active device layer. The size configuration of the first compensation segment and the second compensation segment of the phase compensation waveguide is used to eliminate the interference of the non-uniform stress field generated by heterobonding on the polarization phase.

[0060] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An Euler-bending ultra-low-power polarization-insensitive optical switch, characterized in that, It includes a substrate layer, a lower cladding layer, a silicon waveguide layer, an upper cladding layer, and an electrode layer; The lower cladding layer is disposed on the substrate layer; The silicon waveguide layer is disposed on the lower cladding layer. The silicon waveguide layer includes a multi-turn coiled waveguide, a phase compensation waveguide, three cascaded multimode interference couplers, and two sets of phase shift arms disposed between adjacent multimode interference couplers. The two sets of phase shift arms constitute a first-stage interference circuit and a second-stage interference circuit. The upper cladding layer is disposed on the silicon waveguide layer; The electrode layer is disposed on the upper cladding; the electrode layer includes a heating electrode, the planar projection of the heating electrode on the silicon waveguide layer at least partially coincides with the planar projection of the multi-turn coiled waveguide, so as to simultaneously modulate multiple waveguide loops in the multi-turn coiled waveguide through the thermal field; The adjacent loops of the multi-turn coiled waveguide have different waveguide widths; The phase compensation waveguide includes a cascaded first compensation segment and a second compensation segment. The cross-sectional width and height of the first compensation segment are unequal, and the second compensation segment satisfies the polarization degeneracy condition to eliminate the phase difference between the transverse electric mode and the transverse magnetic mode under thermal modulation.

2. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 1, characterized in that, The multi-turn coiled waveguide is a helical delay line, and the heating electrode has an arc-shaped topology that matches the helical delay line. The heating electrode covers multiple helical loops of the helical delay line.

3. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 2, characterized in that, The central transition point of the spiral delay line integrates an Euler bending structure, the radius of curvature of which varies linearly with the arc length of the waveguide axis.

4. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 1, characterized in that, The cross-sectional width and height of the second compensation segment are equal to ensure that the second compensation segment is in a polarization degenerate state; the physical length ratio of the first compensation segment to the second compensation segment is configured based on the difference in thermo-optical sensitivity of the silicon waveguide layer to the transverse electric mode and the transverse magnetic mode.

5. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 4, characterized in that, Physical length of the first compensation segment Physical length of the second compensation segment The following mapping relationship is satisfied: in, This represents the initial polarization phase mismatch. For the operating wavelength, Let be the cross-sectional width of the first compensation segment. The cross-sectional width of the second compensation segment is... and These are the effective refractive indices for the transverse electric mode and the transverse magnetic mode, respectively. The effective refractive index of the transverse electric mode or transverse magnetic mode in the second compensation segment.

6. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 1, characterized in that, The difference in waveguide width between adjacent loops causes a deviation in the propagation constant of the adjacent loops to suppress evanescent wave coupling; the spacing between the adjacent loops satisfies the condition that the coupling length is much greater than the total length of the multi-turn coiled waveguide.

7. The Euler-bending ultra-low-power polarization-insensitive optical switch according to claim 1, characterized in that, The thickness of the silicon waveguide layer is greater than 400 nm; the electrode layer also includes a connecting electrode connected to the heating electrode, the heating electrode being made of titanium nitride and the connecting electrode being made of copper.

8. A photonic integrated system, characterized in that, It includes an optical input port, an optical output port, and an Euler-bending ultra-low-power polarization-insensitive optical switch as described in any one of claims 1 to 7, wherein the Euler-bending ultra-low-power polarization-insensitive optical switch is connected between the optical input port and the optical output port.

9. A photonic integrated system according to claim 8, characterized in that, The photonic integrated system also includes a III-V group active device layer, and the silicon waveguide layer of the Euler-bent ultra-low power polarization-insensitive optical switch is integrated below the III-V group active device layer. The size configuration of the first compensation segment and the second compensation segment of the phase compensation waveguide is used to eliminate the interference of the non-uniform stress field generated by heterobonding on the polarization phase.

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