Photomask set, semiconductor manufacturing method, resonator, filter, and apparatus

Abstract

The embodiments of the present disclosure provide a mask set, a semiconductor manufacturing method, a resonator, a filter and an apparatus. The mask set comprises at least one main mask and at least one multiplexing mask. Each main mask comprises at least one pattern group, and the number of pattern groups in the at least one main mask is greater than or equal to 2. The multiplexing mask comprises a light-transmitting area and a non-light-transmitting area. For any pattern group in any main mask, the light-transmitting area or the non-light-transmitting area in the multiplexing mask covers the pattern group and does not cover other pattern groups in the main mask. The number of masks can be reduced, and the cost can be reduced.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and to, but is not limited to, a photomask assembly, a semiconductor manufacturing method, a resonator, a filter, and an apparatus. Background Technology

[0002] With the development of semiconductor technology, the variety and complexity of device parameters in electronic devices have increased. For example, a single electronic device may contain multiple similar devices of different sizes, such as through-silicon vias (TSVs) of different depths in a semiconductor chip or resonators of different thicknesses in a filter. Due to their different shape parameters, these TSVs and resonators require different masks for fabrication. For filters containing resonators of varying thicknesses, the number of masks required during the manufacturing process is also greater, resulting in higher costs. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide a photomask assembly, a semiconductor manufacturing method, a resonator, a filter, and an apparatus.

[0004] In a first aspect, embodiments of this disclosure provide a photomask set, the photomask set including at least one main photomask and at least one multiplexed photomask; each main photomask includes at least one pattern group, and the number of pattern groups in at least one main photomask is greater than or equal to 2; the multiplexed photomask includes a light-transmitting area and a light-blocking area; for any pattern group in any main photomask, there exists a light-transmitting area or a light-blocking area in the multiplexed photomask that covers the pattern group but does not cover other pattern groups in the corresponding main photomask.

[0005] In some embodiments, for the main photomask, each pattern in the pattern group is used to fabricate a semiconductor unit; the semiconductor units corresponding to patterns in the same pattern group have the same thickness, and the semiconductor units corresponding to patterns in different pattern groups have different thicknesses; or, the semiconductor units corresponding to patterns in the same pattern group have the same depth, and the semiconductor units corresponding to patterns in different pattern groups have different depths.

[0006] In some embodiments, at most two photoresist layers exist simultaneously when the semiconductor unit is fabricated; for the two photoresist layers that exist simultaneously, a main photomask is used to pattern one photoresist layer and a multiplexed photomask is used to pattern the other photoresist layer.

[0007] In some embodiments, the photomask set is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer greater than or equal to 2; each of the main photomasks includes at most 2 of the pattern sets, and the number of multiplexed photomasks is 1; the minimum number of main photomasks is the result of rounding up N / 2.

[0008] In some embodiments, the main photomask is divided into a first region and a second region, each region having at most one of the pattern groups, and at least one region having the pattern groups; the multiplex photomask is also divided into the first region and the second region, and the first region is patterned as the light-transmitting area, and the second region is the non-light-transmitting area.

[0009] In some embodiments, the light-transmitting area in the multiplexed photomask covers only one of the pattern groups in each of the main photomasks; or, the non-light-transmitting area in the multiplexed photomask covers only one of the pattern groups in each of the main photomasks.

[0010] In some embodiments, the photomask set is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer; each master photomask includes at most m pattern sets, and the number of multiplexed photomasks is m; m is an integer greater than 2; the minimum number of master photomasks is the result of N / m rounded up.

[0011] In some embodiments, when m=4, the main photomask is divided into a first region, a second region, a third region, and a fourth region, with at most one pattern group distributed in each region, and at least one region having the pattern group distributed there; the multiplexed photomask is also divided into the first region, the second region, the third region, and the fourth region; for the first multiplexed photomask, the first region is entirely the transparent area, and the remaining regions are the non-transparent areas; or, the first region is entirely the non-transparent area, and the remaining regions are the transparent areas; for the second multiplexed photomask... For the third multiplexed photomask, the entire second region is the light-transmitting area, and the remaining regions are the opaque areas; or the entire second region is the opaque area, and the remaining regions are the light-transmitting areas. For the fourth multiplexed photomask, the entire fourth region is the light-transmitting area, and the remaining regions are the opaque areas; or the entire fourth region is the opaque area, and the remaining regions are the light-transmitting areas.

[0012] In some embodiments, the photomask assembly is used to fabricate resonators of different thicknesses in a filter; the photomask assembly is used to form the bottom electrode layer of different resonators; and / or, the photomask assembly is used to form the piezoelectric layer of different resonators; and / or, the photomask assembly is used to form the top electrode layer of different resonators.

[0013] In some embodiments, where the photomask assembly is used to fabricate resonators of different thicknesses in a filter, the photomask assembly further includes a device photomask for forming the shape and electrical connections of each of the resonators.

[0014] In some embodiments, the photomask assembly is used to fabricate silicon via connection structures of different lengths.

[0015] In a second aspect, embodiments of this disclosure provide a semiconductor manufacturing method applied to the photomask assembly described in the first aspect, the method comprising:

[0016] Provide the material layer to be processed;

[0017] A first photoresist layer is deposited on the material layer and exposed using a master photomask; a second photoresist layer is then deposited and exposed using a multiplex photomask to obtain a first protective layer.

[0018] The material layer is subjected to a first morphology control process based on the first protective layer, and the first photoresist layer and the second photoresist layer are removed after the morphology control process to obtain a semiconductor structure containing a first semiconductor unit.

[0019] A third photoresist layer is deposited on the semiconductor structure, and the third photoresist layer is exposed using the same main photomask; a fourth photoresist layer is then deposited, and the fourth photoresist layer is exposed using a multiplexed photomask to obtain a second protective layer.

[0020] The material layer is subjected to a second morphology control process based on the second protective layer, and the third photoresist layer and the fourth photoresist layer are removed after the morphology control process to obtain a semiconductor structure containing the first semiconductor unit and the second semiconductor unit; the second protective layer covers the first semiconductor unit.

[0021] The first semiconductor unit and the second semiconductor unit have different depths or thicknesses.

[0022] In some implementations, the photoresist layer is a positive photoresist layer or a negative photoresist layer; wherein, the morphology control process includes one or more of the following: etching process, material deposition process, and thinning process.

[0023] Thirdly, embodiments of this disclosure provide an electronic device manufactured using the semiconductor manufacturing method described in the first aspect.

[0024] Fourthly, embodiments of this disclosure provide a filter including a plurality of resonators as described in the third aspect, wherein the plurality of resonators have different thicknesses; the plurality of resonators share a set of photomask assembly, wherein the photomask assembly is as described in the first aspect.

[0025] Fifthly, embodiments of this disclosure provide an electronic device including the filter as described in the fourth aspect.

[0026] This disclosure provides a photomask assembly, a semiconductor manufacturing method, a resonator, a filter, and an apparatus. Since the main photomask in the photomask assembly has at least one pattern group, when a main photomask and a multiplexed photomask are used together, the transparent or non-transparent area of ​​the multiplexed photomask can cover only one pattern group, allowing subsequent fabrication processes to be performed separately for that pattern group. In this way, semiconductor units with different shape parameters can share a single main photomask, eliminating the need for separate photomasks for each type of semiconductor unit, reducing the number of photomasks and lowering costs. Attached Figure Description

[0027] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.

[0028] Figures 1-4 This is a schematic diagram of a photomask assembly provided in an embodiment of this disclosure.

[0029] Figure 5 and Figure 6 This is a schematic diagram of an independent photomask.

[0030] Figure 7 This is a comparative schematic diagram of the photomask assembly and the independent photomask provided in the embodiments of this disclosure.

[0031] Figure 8 A schematic diagram of the resonator provided in the embodiments of this disclosure;

[0032] Figure 9 A schematic flowchart of a semiconductor device formation method provided in an embodiment of this disclosure;

[0033] Figure 10 and Figure 11 This is a schematic diagram of the structure during the semiconductor device formation process provided in the embodiments of this disclosure;

[0034] Figure 12 This is a schematic diagram of the structure of a filter provided in an embodiment of the present disclosure.

[0035] Figure 13 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this disclosure. Detailed Implementation

[0036] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0037] In the following description, numerous details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0038] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are used only to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. When a second element, component, region, layer, or portion is discussed, it does not imply that a first element, component, region, layer, or portion necessarily exists in this disclosure.

[0039] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0040] The semiconductor devices and their formation methods in the embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0041] In one embodiment of this disclosure, see Figure 1 This illustrates a schematic diagram of a photomask assembly provided in an embodiment of this disclosure. Figure 1 As shown, the photomask assembly includes at least one main photomask and at least one multiplex photomask. Each main photomask includes at least one pattern group, and the number of pattern groups in the at least one main photomask is greater than or equal to 2; the multiplex photomask includes a light-transmitting area and a non-light-transmitting area.

[0042] It should be noted that there is no limit to the number of graphics in each graphic group, and different graphic groups are independent of each other. That is, the number, position and size of graphics in each graphic group need to be determined according to the actual application scenario.

[0043] In one example, for any master mask, the specific graphic in the graphic group represents the light-transmitting area that allows light to pass through, and the part outside the graphic represents the non-light-transmitting area that does not allow light to pass through.

[0044] In another example, for any master mask, the specific graphic represents the non-transparent area that does not allow light to pass through, and the part outside the graphic represents the transparent area that allows light to pass through.

[0045] In another example, for one part of the main photomask, the specific graphic in the graphic group represents the non-transparent area that does not allow light to pass through, and the part outside the graphic represents the transparent area that allows light to pass through; for another part of the main photomask, the specific graphic in the graphic group represents the transparent area that allows light to pass through, and the part outside the graphic represents the non-transparent area that does not allow light to pass through.

[0046] At the same time, the positions of the non-transparent and transparent areas in the reusable photomask can be interchanged.

[0047] The transparent areas on the photomask allow light to pass through, forming the exposure area on the photoresist; the non-transparent areas block light from passing through, protecting the unexposed areas of the photoresist.

[0048] In one example, for any pattern group in any master photomask, there exists a light-transmitting area in a multiplex photomask that covers the pattern group but does not cover other pattern groups in the master photomask to which it belongs.

[0049] In another example, for any pattern group in any master photomask, there exists a non-transparent area in a multiplex photomask that covers the pattern group but does not cover other pattern groups in the master photomask to which it belongs.

[0050] In another example, for a portion of the graphic groups, a transparent area in a multiplexed mask covers the graphic group but does not cover other graphic groups in its parent main mask. For another portion of the graphic groups, a non-transparent area in a multiplexed mask covers the graphic group but does not cover other graphic groups in its parent main mask.

[0051] Please see Figure 1 The light-transmitting area of ​​the multiplexed mask d covers pattern group 1 in each master mask but does not cover pattern group 2; the non-light-transmitting area of ​​the multiplexed mask d covers pattern group 2 in each master mask but does not cover pattern group 1.

[0052] Thus, when a master mask and a multiplexer mask are used together in this mask assembly, the transparent or non-transparent areas can cover only one pattern group, allowing subsequent fabrication processes to be performed specifically on that pattern group. For example, as Figure 1 As shown, using the transparent areas of the main photomask a and the multiplexed photomask d, pattern group 1 in the main photomask a can be fabricated to form a semiconductor unit; using the opaque areas of the main photomask a and the multiplexed photomask d, pattern group 2 in the main photomask a can be fabricated; using the transparent areas of the main photomask b and the multiplexed photomask d, pattern group 1 in the main photomask b can be fabricated; using the opaque areas of the main photomask b and the multiplexed photomask d, pattern group 2 in the main photomask b can be fabricated… Different semiconductor units can share a single main photomask, and the corresponding semiconductor units can be precisely fabricated through the combination of the main photomask and the multiplexed photomask. Therefore, semiconductor units with different shape parameters can share a single main photomask, eliminating the need for a separate photomask for each type of semiconductor unit, reducing the number of photomasks and lowering costs.

[0053] As mentioned above, for the main photomask, each specific pattern in the pattern set is used to fabricate a semiconductor cell.

[0054] If the semiconductor unit is a convex structure (e.g., cylindrical), then the semiconductor units corresponding to the patterns in the same pattern group have the same thickness, while the semiconductor units corresponding to the patterns in different pattern groups have different thicknesses.

[0055] If the semiconductor unit is a recessed structure (e.g., a hole), then the semiconductor units corresponding to the patterns in the same pattern group have the same depth, while the semiconductor units corresponding to the patterns in different pattern groups have different depths.

[0056] Thus, for Figure 1 The photomask assembly shown can fabricate six different semiconductor units (total number of pattern sets) with varying thicknesses / depths.

[0057] See one example. Figure 1The photomask set includes three main photomasks (main photomask a, main photomask b, and main photomask c) and one multiplex photomask d. Each main photomask includes two pattern groups.

[0058] In another example, see Figure 2 The photomask assembly includes five master photomasks (master photomask e, master photomask f, master photomask g, master photomask h, and master photomask i) and one multiplex photomask j. Each master photomask includes two pattern groups, and each pattern group includes only one pattern. The non-transparent and transparent areas in the multiplex photomask j are only examples, and their positions can be interchanged. That is, patterns 1-5 can also be transparent areas, and the parts other than patterns 1-5 can be non-transparent areas; that is, the transparent area (or non-transparent area) can include multiple independent parts.

[0059] It should be noted that pattern 1 in the multiplexed mask j is one of the pattern groups in the master mask e. Figure 2 Example: Pattern group 1) completely overlaps, reuse pattern 2 in photomask j with one of the pattern groups in the master photomask f ( Figure 2 Example: Pattern group 1) completely overlaps, reuse pattern 3 in mask j with one of the pattern groups in the master mask g ( Figure 2 The example is that pattern group 1) completely overlaps, and pattern 4 in photomask j is reused with one of the pattern groups in the master photomask h. Figure 2 The example is that pattern group 1) completely overlaps, and pattern 5 in photomask j is reused with one of the pattern groups in the main photomask i. Figure 2 The example is that graphic group 1) completely overlaps.

[0060] At this time, for Figure 2 The photomask assembly shown can fabricate 10 types (total number of pattern sets) of semiconductor cells with different thicknesses / depths.

[0061] In another example, see Figure 3 The photomask set includes three main photomasks (main photomask k, main photomask l, main photomask m) and four multiplex photomasks (multiplex photomask n, multiplex photomask o, multiplex photomask p, multiplex photomask q), and each main photomask includes four pattern groups.

[0062] Thus, as Figure 3 As shown, using the transparent areas of the main photomask k and the multiplexed photomask n, the pattern group 1 in the main photomask k can be fabricated to form a semiconductor unit; using the transparent areas of the main photomask k and the multiplexed photomask o, the pattern group 3 in the main photomask k can be fabricated to form a semiconductor unit; using the transparent areas of the main photomask k and the multiplexed photomask p, the pattern group 2 in the main photomask k can be fabricated to form a semiconductor unit; using the transparent areas of the main photomask k and the multiplexed photomask q, the pattern group 4 in the main photomask k can be fabricated to form a semiconductor unit; and so on.

[0063] As mentioned above, the non-transparent and transparent areas in each multiplexed mask are merely examples. The positions of the non-transparent and transparent areas in each multiplexed mask can be interchanged, and different multiplexed masks are independent of each other. Please see [link to documentation]. Figure 4 It shows that it is aimed at Figure 3 Another set of photomasks for the overall pattern shown. For example... Figure 4 As shown, multiplexed masks n and o are modified, with the positions of the transparent and opaque areas interchanged. Thus, using the opaque areas of the main mask k and multiplexed mask n, pattern group 1 in the main mask k can be fabricated to form a semiconductor unit; using the opaque areas of the main mask k and multiplexed mask o, pattern group 3 in the main mask k can be fabricated to form a semiconductor unit; using the transparent areas of the main mask k and multiplexed mask p, pattern group 2 in the main mask k can be fabricated to form a semiconductor unit; using the transparent areas of the main mask k and multiplexed mask q, pattern group 4 in the main mask k can be fabricated to form a semiconductor unit; and so on.

[0064] At this time, for Figure 3 or Figure 4 The photomask assembly shown can fabricate 12 types (total number of pattern sets) of semiconductor units with different thicknesses / depths.

[0065] In some embodiments, at most two photoresist layers are present simultaneously during the fabrication of a semiconductor cell. For the two photoresist layers, a main photomask is used to pattern one photoresist layer, and a multiplexed photomask (the transparent or non-transparent area of ​​the multiplexed photomask covers one pattern group in the main photomask but does not cover other pattern groups in the main photomask) is used to pattern the other photoresist layer. In short, in the embodiments of this disclosure, the fabrication of each semiconductor cell requires the combined use of a main photomask and a multiplexed photomask.

[0066] It should be noted that photoresist, also known as photoresist, is a special chemical coating that can precisely transfer designed circuit patterns onto a semiconductor substrate through steps such as ultraviolet exposure, development, and etching. It acts as a medium for pattern transfer, ensuring that the tiny patterns and structures on the chip can be manufactured precisely as expected.

[0067] Photoresist can be divided into positive photoresist or negative photoresist. For positive photoresist, the photoresist in the area corresponding to the light-transmitting region of the photomask (exposed area) is dissolved, while the photoresist in the area corresponding to the non-light-transmitting region of the photomask (unexposed area) is retained, and the final semiconductor structure pattern is consistent with the photomask pattern. For negative photoresist, the photoresist in the area corresponding to the light-transmitting region of the photomask (exposed area) is retained, while the photoresist in the area corresponding to the non-light-transmitting region of the photomask (unexposed area) is dissolved, and the final semiconductor structure pattern is opposite to the photomask pattern.

[0068] In particular, Figures 1-4 In this example, the number of pattern groups is the same for different master photomasks, but this is only an example and does not constitute a limitation. The number of pattern groups for different master photomasks is allowed to be different. For example, for a photomask set, which includes 3 master photomasks, the first master photomask includes 3 pattern groups, the second master photomask includes 2 pattern groups, and the third master photomask includes 1 pattern group, a total of 6 types (total number of pattern groups) of semiconductor cells with different thicknesses / depths can be fabricated.

[0069] As mentioned above, in scenarios involving the fabrication of similar semiconductor units with different shape parameters, the photomask assembly provided in this disclosure can reduce the number of photomasks. The following provides a minimum number of photomasks for a specific scenario. Of course, this is merely a preferred option and not a limitation.

[0070] In a specific scenario, each master photomask includes at most two pattern sets, and the number of reused photomasks is 1. Assuming that the photomask set is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer greater than or equal to 2, then the minimum number of master photomasks is the rounded-up result of N / 2.

[0071] Here are some examples when N is even:

[0072] If six different thicknesses and / or depths of semiconductor cells are to be fabricated, and each master photomask includes at most two pattern sets, then the minimum number of master photomasks is three, and the minimum number of reused photomasks is one. Figure 1 The situation is shown below. If a separate photomask is used, please refer to [link / reference]. Figure 5 Six individual photomasks are required.

[0073] If the goal is to fabricate semiconductor cells of 10 different thicknesses and / or depths, and each master photomask includes at most 2 pattern sets, then the minimum number of master photomasks is 5, and the minimum number of reused photomasks is 1. Figure 2 The situation is shown below. If a separate photomask is used, please refer to [link / reference]. Figure 6 Ten individual photomasks are required.

[0074] If you want to fabricate semiconductor cells with 12 different thicknesses and / or depths, and each master photomask includes at most 2 pattern sets, please refer to [link to relevant documentation]. Figure 7 The minimum number of primary masks is 6, and the minimum number of multiplexed masks is 1. Figure 3 or Figure 4 The situation is shown below. If individual photomasks are used, 12 individual photomasks are required.

[0075] In addition, to achieve the minimum number, for an even number of N, all master masks include 2 graphic groups.

[0076] When N is an odd number, for example, if 7 different thicknesses and / or depths of semiconductor cells are fabricated and each master mask includes at most 2 pattern groups, then the minimum number of master masks is 4. A multiplexed mask is 1, in which case 3 master masks each include 2 pattern groups, and the remaining master mask includes 1 pattern group. For independent masks, 7 masks are required.

[0077] In addition, to achieve the minimum number, for N being odd and each master mask including at most 2 pattern groups, there is one and only one master mask including 1 pattern group, and the remaining master masks each including 2 pattern groups.

[0078] As can be seen from the above, compared with using independent photomasks, the photomask kit provided in this embodiment can reduce the number of photomasks and reduce costs.

[0079] In one alternative embodiment, please refer to Figure 1 The main photomask is divided into a first region (e.g., the region above the dashed line) and a second region (e.g., the region below the dashed line), with at most one pattern group distributed in each region, and at least one region having a pattern group distributed in it; the multiplex photomask is also divided into a first region and a second region, with the first region being patterned as a transparent area and the second region being a non-transparent area.

[0080] It should be understood that the size of the multiplex mask is exactly the same as the size of the main mask, and the size of the area it divides out is also exactly the same.

[0081] In this way, the pattern group of the main photomask is placed in two different areas, so that the photomask can be reused to directly use one area as the light-transmitting area and the other area as the non-light-transmitting area. The design is simple and the photomask itself is easy to manufacture, and it can also tolerate a certain degree of error.

[0082] In another alternative embodiment, please refer to Figure 2 The light-transmitting area of ​​the multiplexed photomask covers only one pattern group in each main photomask. That is, each pattern in the light-transmitting area completely overlaps with each pattern in the corresponding pattern group.

[0083] In another alternative embodiment, the non-transparent area in the multiplexed photomask covers, and covers, only one of the pattern groups in each master photomask.

[0084] This is equivalent to copying one of the pattern groups (each pattern in each master mask) to form the light-transmitting area (or non-light-transmitting area) in the multiplex mask, making the etching more precise. However, at the same time, it requires a high degree of accuracy in the pattern of the multiplex mask, and the overlap between the pattern of the multiplex mask and the corresponding pattern edge of the master mask is relatively high.

[0085] In another specific scenario, each master photomask includes at most m pattern sets, and the number of reused photomasks is m; m is an integer greater than 2. Assuming that the photomask set is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer, then the minimum number of master photomasks is the result of N / m rounded up.

[0086] When N is an integer multiple of m:

[0087] (1) Assume N = 12, m = 4, please refer to Figure 2 At this point, the minimum number of primary photomasks is 3, and the number of multiplexed photomasks is 4.

[0088] (2) Assuming N = 16 and m = 4, the minimum number of primary photomasks is 4 and the number of multiplexed photomasks is 4.

[0089] (3) Assuming N = 18 and m = 3, the minimum number of primary photomasks is 6 and the number of multiplexed photomasks is 3.

[0090] (4) Assuming N = 20 and m = 5, the minimum number of primary masks is 4 and the number of multiplexed masks is 5.

[0091] In addition, to achieve the minimum number, when N is an integer multiple of m, all master photomasks include N / m pattern groups.

[0092] When N is not an integer multiple of m:

[0093] (1) Assume N = 12, m = 5, please refer to Figure 2 At this point, the minimum number of primary photomasks is 3, and the number of multiplexed photomasks is 5.

[0094] (2) Assuming N = 16 and m = 6, the minimum number of primary photomasks is 3 and the number of multiplexed photomasks is 6.

[0095] (3) Assuming N = 18 and m = 4, the minimum number of primary photomasks is 5 and the number of multiplexed photomasks is 4.

[0096] (4) Assuming N = 20 and m = 6, the minimum number of primary masks is 4 and the number of multiplexed masks is 6.

[0097] Meanwhile, the number of pattern groups in each master photomask can be designed according to requirements. For example, for the case of N=20 and m=6, 3 master photomasks can each contain 6 pattern groups (rounded down from N / m), and 1 master photomask can contain 2 pattern groups (remainder of N / m); or, 2 master photomasks can each contain 6 pattern groups, and 2 master photomasks can each contain 4 pattern groups.

[0098] In some embodiments, see Figure 3The main photomask is divided into a first region (a rectangular region in the upper left corner defined by two dashed lines), a second region (a rectangular region in the upper right corner defined by two dashed lines), a third region (a rectangular region in the lower left corner defined by two dashed lines), and a fourth region (a rectangular region in the lower right corner defined by two dashed lines). Each region contains at most one graphic group, and at least one region contains a graphic group.

[0099] The multiplexed photomask is also divided into a first region, a second region, a third region, and a fourth region; for the first multiplexed photomask, the first region is entirely a transparent area, and the remaining regions are non-transparent areas; or, the first region is entirely a non-transparent area, and the remaining regions are transparent areas.

[0100] For the second multiplexed photomask, the entire second region is a transparent area, and the remaining regions are non-transparent areas; or the entire second region is a non-transparent area, and the remaining regions are transparent areas.

[0101] For the third multiplexed photomask, the entire third region is a transparent region, and the remaining regions are non-transparent regions; or, the entire third region is a non-transparent region, and the remaining regions are transparent regions.

[0102] For the fourth multiplexed mask, the fourth region as a whole is a transparent region, and the remaining regions are non-transparent regions; or, the fourth region as a whole is a non-transparent region, and the remaining regions are transparent regions.

[0103] It should be understood that the multiplexing mask and the main mask are the same size. Here, the first region of the multiplexing mask is the same size as the first region of the main mask, the second region of the multiplexing mask is the same size as the second region of the main mask, the third region of the multiplexing mask is the same size as the third region of the main mask, and the fourth region of the multiplexing mask is the same size as the fourth region of the main mask.

[0104] In one special case, please see Figure 3 If the main mask is square, the multiplexer can achieve the same effect as other multiplexers by rotating itself sequentially by 90°, 180°, and 270°, requiring only one multiplexer. In other words, if the main mask is symmetrical and the boundary between the transparent and opaque areas is the axis of symmetry, the number of multiplexers can be further reduced. Different effects can be achieved by rotating the multiplexers, revealing different groups of shapes within the main mask.

[0105] In this embodiment, a photomask assembly is provided. The main photomask in the assembly has at least one pattern group. When a main photomask and a multiplexed photomask are used together, the transparent or non-transparent area of ​​the multiplexed photomask can cover only one pattern group, thereby allowing subsequent fabrication processes to be performed separately for that pattern group. Semiconductor units with different shape parameters can share a single main photomask, eliminating the need for separate photomasks for each type of semiconductor unit, thus reducing the number of photomasks and lowering costs.

[0106] In another embodiment of this disclosure, the aforementioned photomask assembly is used to fabricate resonators of different thicknesses in a filter.

[0107] With the development of communication technology, the requirements for filter components are becoming increasingly stringent. Filters allow signals within a specific frequency range to pass through while suppressing signals of other frequencies. The resonators in a filter produce a strong response at a specific frequency (resonant frequency) to select or generate signals of that specific frequency. Currently, for the filtering requirements of electronic devices, filters may include resonators of various thicknesses, each targeting different resonant frequencies, to achieve multi-band filtering. In addition, multi-thickness resonators offer advantages such as bandwidth control and performance optimization. For filters containing resonators of various thicknesses, the number of masks required in the manufacturing process is also larger, resulting in higher costs.

[0108] Please see Figure 8 An exemplary embodiment provides a schematic diagram of the structure of a resonator 10. For example... Figure 8 As shown, the resonator 10 includes a substrate 101, an acoustic mirror 102, a bottom electrode layer 103, a piezoelectric layer 104, a top electrode layer 105, and a protective layer 106. Within the same filter, resonators 10 may exist with varying thicknesses. The thicknesses of the acoustic mirror 102, and / or the bottom electrode 103, and / or the piezoelectric layer 104, and / or the top electrode 105 differ in resonators 10 of different thicknesses, thus requiring more photomasks and resulting in higher costs.

[0109] Based on this, the photomask assembly provided in this embodiment is specifically used to form the bottom electrode layer 103 of different resonators; and / or, the photomask assembly is used to form the piezoelectric layer 104 of different resonators; and / or, the photomask assembly is used to form the top electrode layer 105 of different resonators; and / or, the photomask assembly is used to form the acoustic mirror 102 of different resonators.

[0110] In some embodiments, where the photomask assembly is used to fabricate resonators of different thicknesses in the filter, the photomask assembly further includes a device photomask (e.g., a lower electrode photomask or an upper electrode photomask) for forming the shape and electrical connections of each resonator.

[0111] In one example, if six different thicknesses of resonators need to be fabricated, seven independent photomasks (including one device photomask) would be required if individual photomasks are used. However, if the photomask assembly provided in this disclosure is used, and each main photomask includes two pattern groups, five photomasks (three main photomasks + one multiplexed photomask + one device photomask) are sufficient. (See also...) Figure 1 .

[0112] In one example, if resonators of 10 different thicknesses need to be fabricated, 11 individual photomasks (including one device photomask) would be required if individual photomasks are used; however, if the photomask set provided in this disclosure is used, and each main photomask includes 2 pattern groups, 7 photomasks (5 main photomasks + 1 multiplexed photomask + 1 device photomask) are sufficient. (See also...) Figure 2 .

[0113] In one example, if resonators of 12 different thicknesses need to be fabricated, 13 individual photomasks (including one device photomask) would be required if individual photomasks are used; however, if the photomask set provided in this disclosure is used, and each main photomask includes two pattern groups, 8 photomasks (6 main photomasks + 1 multiplexed photomask + 1 device photomask) are sufficient. (See also...) Figure 7 If the photomask assembly provided in this disclosure is used and each main photomask includes 4 pattern groups, please refer to [link to relevant documentation]. Figure 2 Similarly, 8 photomasks (3 main photomasks + 4 multiplex photomasks + 1 device photomask) are sufficient; see [reference]. Figure 3 and Figure 4 .

[0114] In summary, assuming there are N possible thicknesses for the harmonics within each filter:

[0115] (1) When each main photomask contains a maximum of 2 pattern groups, the number of reused photomasks is 1, the minimum number of main photomasks is the result of rounding up N / 2, and 1 device photomask is required. Therefore, the minimum number of photomasks in the photomask set is: N / 2 (rounded up) + 2.

[0116] (2) When each main photomask contains at most m pattern groups (m is greater than 2), the number of reused photomasks is m, the minimum number of main photomasks is N / m rounded up, and 1 device photomask is required. Therefore, the minimum number of photomasks in the photomask set is: N / m (rounded up) + m + 1.

[0117] When using this photomask assembly for semiconductor fabrication, each semiconductor unit of thickness is formed by a main photomask and a multiplexed photomask, which requires two photoresist layers to exist simultaneously. The main photomask is used to pattern one layer of photoresist, and the multiplexed photomask is used to pattern the other layer of photoresist. For details, please refer to the subsequent process description.

[0118] Thus, by using the photomask assembly provided in this embodiment to fabricate resonators of different thicknesses, the number of photomasks required is reduced, thereby lowering costs.

[0119] In another embodiment of this disclosure, a photomask assembly is used to fabricate through-silicon via (TSV) interconnect structures of different lengths, i.e., the aforementioned semiconductor unit is a TSV hole.

[0120] It should be noted that TSV is a vertical interconnect structure used in three-dimensional integrated circuits (3D ICs) and advanced packaging technologies. It achieves electrical connections between different chip layers by creating through-holes on a silicon wafer, thereby increasing integration density, shortening interconnect length, reducing power consumption, and improving performance. The length of the TSV (or the depth of the TSV hole) varies depending on the chips to be connected. Therefore, TSVs of different lengths can be fabricated using the aforementioned photomask assembly. For specific implementation methods, please refer to the aforementioned examples, which saves on the number of photomasks and reduces costs.

[0121] In yet another embodiment of this disclosure, please refer to Figure 9 This illustration shows a schematic flowchart of a semiconductor manufacturing method provided in an embodiment of this disclosure. Figure 9 As shown, the manufacturing method includes:

[0122] S31: Provide the material layer to be processed.

[0123] It should be noted that the material layer is located on one side of the substrate layer 101. The substrate layer can be a silicon substrate, germanium substrate, silicon germanide substrate, silicon-on-insulator (SOI) substrate, or germanium-on-insulator (GOI) substrate, etc. The specific composition of the material layer is not limited and is determined according to the actual application scenario. Figure 8 The bottom electrode layer 103, the piezoelectric layer 104, the top electrode layer 105, or the protective layer 106 can all be considered as material layers; or, Figure 10 The upper electrode 202 in the middle can also be regarded as a material layer.

[0124] S32: Deposit a first photoresist layer on the material layer and expose the first photoresist layer using a master photomask; continue to deposit a second photoresist layer and expose the second photoresist layer using a multiplex photomask to obtain a first protective layer.

[0125] Figure 10 The first photoresist layer 203, the second photoresist layer 204, and the first protective layer 205 are shown.

[0126] It should be noted that the photoresist layer can be either positive or negative, depending on whether the pattern group in the main photomask is a transparent or opaque area.

[0127] S33: Perform a first morphology control process on the material layer based on the first protective layer, and remove the first photoresist layer and the second photoresist layer after the morphology control process to obtain a semiconductor structure containing the first semiconductor unit.

[0128] The number of first semiconductor units may be multiple, depending on the number of patterns in the corresponding pattern group.

[0129] S34: Deposit a third photoresist layer on the semiconductor structure and expose the third photoresist layer using the same master photomask; continue to deposit a fourth photoresist layer and expose the fourth photoresist layer using a multiplexed photomask to obtain a second protective layer.

[0130] Figure 10 The third photoresist layer 206, the second photoresist layer 207, and the second protective layer 208 are shown.

[0131] S35: Perform a second morphology control process on the material layer based on the second protective layer, and remove the third and fourth photoresist layers after the morphology control process to obtain a semiconductor structure containing a first semiconductor unit and a second semiconductor unit; the second protective layer covers the first semiconductor unit.

[0132] Meanwhile, since the second protective layer covers the first semiconductor unit, the second morphology modulation process will not affect the first semiconductor unit.

[0133] In particular, step S34 is not necessarily a step that immediately follows S33. That is, other fabrication steps, such as fabricating other semiconductor cells, can be performed after step S33 before step S34 occurs.

[0134] Thus, if the first semiconductor unit and the second semiconductor unit are convex structures, then the thickness (or length) of the first semiconductor unit and the second semiconductor unit is different; if the first semiconductor unit and the second semiconductor unit are concave structures, then the depth of the first semiconductor unit and the second semiconductor unit is different.

[0135] It should be noted that there may be multiple second semiconductor units, depending on the number of patterns in the corresponding pattern group.

[0136] As can be seen from the above, at most two photoresist layers can exist simultaneously during the preparation process, that is, the first photoresist layer and the second photoresist layer may exist at the same time; the third and fourth photoresist layers will only be formed after the first and second photoresist layers are removed.

[0137] It should be noted that morphology control treatment includes one or more of the following: etching treatment, material deposition treatment, material growth treatment, and thinning treatment. For example, the first morphology control treatment is etching treatment, and the second morphology control treatment is thinning treatment; or, both the first and second morphology control treatments are thinning treatments; or, both the first and second morphology control treatments are material deposition treatments.

[0138] In some embodiments, the photoresist layer is a positive photoresist layer or a negative photoresist layer. The first and third photoresist layers have the same positive and negative polarity, so that the first and third photoresist layers expose the same location. The second and fourth photoresist layers may have the same or different positive and negative polarity, depending on the design of the multiplexed photomask. Thus, the second photoresist layer exposes a portion of its location to form the first semiconductor unit, and the fourth photoresist layer exposes another portion of its location to form the second semiconductor unit.

[0139] Specifically, if the multiplexed photomask in step S34 is the same as the multiplexed photomask in S32, then the positive and negative properties of the second photoresist layer and the fourth photoresist layer are different; if the multiplexed photomask in step S34 is different from the multiplexed photomask in S32, then the positive and negative properties of the second photoresist layer and the fourth photoresist layer may be the same or different.

[0140] Several specific examples are provided when this semiconductor unit is used to form a resonator.

[0141] In one example, using such Figure 2 The main photomask e and the multiplexed photomask j form a first semiconductor unit and a second semiconductor unit, respectively. The interior of the pattern in the main photomask e is a transparent area, and the exterior is a non-transparent area. Please refer to [link / reference]. Figure 10 The specific steps include:

[0142] S401: The upper electrode 202 is coated with a first photoresist layer 203 (positive photoresist).

[0143] for Figure 10 201 represents the film layer, or can be understood as... Figure 8 The piezoelectric layer in it.

[0144] S402: Expose using the master mask e;

[0145] S403: Deposit a second photoresist layer 204 (positive photoresist);

[0146] S404: Exposure using multiplexed mask j;

[0147] S405: Thinning process is performed on the upper electrode 202 to remove the first photoresist layer 203 and the second photoresist layer 204, thus completing the first semiconductor unit with a thickness of 1.

[0148] S406: Deposited with a third photoresist layer of 206 (positive photoresist);

[0149] S407: Expose using the master mask e;

[0150] S408: Deposited with the fourth photoresist layer 207 (negative photoresist);

[0151] S409: Expose using a multiplexed photomask j; thin the upper electrode 202.

[0152] S410: Remove the third photoresist layer 206 and the fourth photoresist layer 207 to complete the second semiconductor unit with a thickness of 2.

[0153] In another example, using... Figure 1 The main photomask a and the multiplexed photomask d shown form a first semiconductor unit and a second semiconductor unit. The interior of the pattern in the main photomask a is a transparent area, and the exterior is a non-transparent area. Please refer to... Figure 11 The specific steps include:

[0154] S501: The upper electrode 202 is coated with a first photoresist layer 203 (positive photoresist);

[0155] S502: Expose using the master mask a;

[0156] S503: Deposit a second photoresist layer 204 (positive photoresist);

[0157] S504: Exposure using a multiplexed mask d;

[0158] S505: Thinning process is performed on the upper electrode 202 to remove the first photoresist layer 203 and the second photoresist layer 204, thus completing the first semiconductor unit with a thickness of 1.

[0159] S506: Deposited with a third photoresist layer of 206 (positive photoresist);

[0160] S507: Expose using the master mask a;

[0161] S508: Deposited with the fourth photoresist layer 207 (negative photoresist);

[0162] S509: Expose using a multiplexed photomask d; thin the upper electrode 202;

[0163] S510: Remove the third photoresist layer 206 and the fourth photoresist layer 207 to complete the second semiconductor unit with a thickness of 2.

[0164] In both examples above, the same multiplexed mask was used, but this is not a limitation. For another example, please see... Figure 2The fabrication process utilizes a master mask k, a multiplexed mask n, a multiplexed mask o, a multiplexed mask p, and a multiplexed mask q. The pattern within the master mask k is a transparent region, and the outer region is a non-transparent region. Specific steps include:

[0165] S601: Top electrode coating, first photoresist layer (positive photoresist) is deposited;

[0166] S602: Expose using the master mask k;

[0167] S603: Deposit a second photoresist layer (positive photoresist);

[0168] S604: Exposure using a multiplexed mask n;

[0169] S605: Thin the upper electrode to remove the first and second photoresist layers and complete the first semiconductor unit with a thickness of 1.

[0170] S606: Deposited with a third photoresist layer (positive photoresist);

[0171] S607: Expose using the master mask k;

[0172] S608: Deposited with a fourth photoresist layer (positive photoresist);

[0173] S609: Exposure using a multiplexed photomask; thinning of the upper electrode;

[0174] S610: Remove the third and fourth photoresist layers to complete the second semiconductor unit with a thickness of 2.

[0175] S611: Fifth photoresist layer (positive photoresist);

[0176] S612: Expose using the master mask k;

[0177] S613: Plated with the sixth photoresist layer (positive photoresist);

[0178] S614: Expose using a multiplexed photomask p; thin the upper electrode;

[0179] S615: Remove the fifth and sixth photoresist layers to complete the third semiconductor unit with a thickness of 3.

[0180] S616: Deposited with the seventh photoresist layer (positive photoresist);

[0181] S617: Expose using the master mask k;

[0182] S618: Plated with the eighth photoresist layer (positive photoresist);

[0183] S619: Exposure using a multiplexed photomask q; thinning of the upper electrode;

[0184] S620: Remove the seventh and eighth photoresist layers to complete the fourth semiconductor unit with a thickness of 4.

[0185] Thus, it can be seen from the above that the positive and negative properties of the photoresist layer are the same throughout the overall fabrication process. Combining the above examples, it can be seen that the positive and negative properties of the photoresist layer need to be determined according to the actual application scenario and photomask design. Furthermore, each thickness of semiconductor unit requires one main photomask + one multiplexed photomask + two layers of photoresist to be fabricated.

[0186] This disclosure also provides a resonator 70, fabricated using the aforementioned semiconductor manufacturing method. Specifically, the aforementioned semiconductor manufacturing method is only a part of the resonator's manufacturing process, not all of it.

[0187] This disclosure also provides a filter 80, please refer to [link to relevant documentation]. Figure 12 The filter 80 includes multiple resonators 70, and the multiple resonators 70 have different thicknesses; the multiple resonators 70 share a set of the aforementioned photomask assembly.

[0188] This disclosure also provides an electronic device 90, please refer to... Figure 13 The electronic device 90 includes the aforementioned filter 80. The electronic device 90 may be, but is not limited to, one of the following: a duplexer, a multiplexer, or multiple filters integrated on the same chip / substrate (common-die filter), such as an injection common-mode filter, a common-medium filter, etc.

[0189] In the several embodiments provided in this disclosure, it should be understood that the disclosed structures and methods can be implemented in a non-target manner. The structural embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. In addition, the various components shown or discussed are coupled to each other or directly coupled.

[0190] The features disclosed in the several method or structural embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or structural embodiments.

[0191] The above are merely some embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A photomask assembly, characterized in that, The photomask assembly includes at least one main photomask and at least one multiplex photomask; Each of the main photomasks includes at least one pattern group, and the number of pattern groups in at least one of the main photomasks is greater than or equal to 2; The reusable photomask includes a light-transmitting area and a non-light-transmitting area; For any pattern group in any of the main photomasks, there exists a light-transmitting or non-light-transmitting area in a multiplex photomask that covers the pattern group but does not cover other pattern groups in the main photomask to which it belongs.

2. The photomask assembly according to claim 1, characterized in that, For the main photomask, each pattern in the pattern group is used to fabricate a semiconductor unit; The semiconductor units corresponding to the patterns in the same pattern group have the same thickness, while the semiconductor units corresponding to the patterns in different pattern groups have different thicknesses. or, The semiconductor cells corresponding to the patterns in the same pattern group have the same depth, while the semiconductor cells corresponding to the patterns in different pattern groups have different depths.

3. The photomask assembly according to claim 2, characterized in that, During the fabrication of the semiconductor unit, at most two layers of photoresist are present simultaneously; For two photoresist layers that coexist, a primary photomask is used to pattern one photoresist layer, and a multiplexed photomask is used to pattern the other photoresist layer.

4. The photomask assembly according to claim 1, characterized in that, The photomask assembly is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer greater than or equal to 2. Each of the main photomasks includes at most two of the pattern groups, and the number of the multiplexed photomasks is one; The minimum number of main photomasks is the result of rounding up N / 2.

5. The photomask assembly according to claim 4, characterized in that, The main photomask is divided into a first region and a second region, with at most one of the pattern groups distributed in each region, and at least one of the regions having the pattern groups distributed there. The multiplexed photomask is also divided into the first region and the second region, with the first region being graphically represented as the light-transmitting area and the second region being the non-light-transmitting area.

6. The photomask assembly according to claim 4, characterized in that, The light-transmitting area in the multiplexed photomask covers, and only covers, one of the pattern groups in each of the main photomasks; or, The non-transparent area in the multiplexed photomask covers, and covers only, one of the pattern groups in each of the main photomasks.

7. The photomask assembly according to claim 1, characterized in that, The photomask assembly is used to fabricate semiconductor cells of N thicknesses and / or depths, where N is a positive integer; Each of the main photomasks includes at most m types of pattern groups, and the number of multiplexed photomasks is m; m is an integer greater than 2; The minimum number of main photomasks is the result of N / m rounded up.

8. The photomask assembly according to claim 7, characterized in that, When m=4 The main photomask is divided into a first region, a second region, a third region, and a fourth region, with at most one of the graphic groups distributed in each region, and at least one of the graphic groups distributed in one region. The multiplexed photomask is also divided into the first region, the second region, the third region, and the fourth region; For the first multiplexed photomask, the first region as a whole is the light-transmitting area, and the remaining regions are the non-light-transmitting areas; or, the first region as a whole is the non-light-transmitting area, and the remaining regions are the light-transmitting areas. For the second multiplexed photomask, the entire second region is the light-transmitting area, and the remaining regions are the non-light-transmitting areas; or the entire second region is the non-light-transmitting area, and the remaining regions are the light-transmitting areas. For the third multiplexed photomask, the entire third region is the light-transmitting region, and the remaining regions are the non-light-transmitting regions; or, the entire third region is the non-light-transmitting region, and the remaining regions are the light-transmitting regions. For the fourth multiplexed photomask, the fourth region as a whole is the light-transmitting region, and the remaining regions are the non-light-transmitting regions; or, the fourth region as a whole is the non-light-transmitting region, and the remaining regions are the light-transmitting regions.

9. The photomask assembly according to any one of claims 1-8, characterized in that, The photomask assembly is used to fabricate resonators of different thicknesses in the filter; the photomask assembly is used to form the bottom electrode layer of different resonators; and / or, the photomask assembly is used to form the piezoelectric layer of different resonators; and / or, the photomask assembly is used to form the top electrode layer of different resonators.

10. The photomask assembly according to claim 9, characterized in that, When the photomask assembly is used to fabricate resonators of different thicknesses in a filter, The photomask assembly also includes a device photomask, which is used to form the shape and electrical connection of each of the resonators.

11. The photomask assembly according to any one of claims 1-8, characterized in that, The photomask assembly is used to fabricate silicon via connection structures of different lengths.

12. A semiconductor manufacturing method, characterized in that, Applied to the photomask assembly according to any one of claims 1-11, the method comprises: Provide the material layer to be processed; A first photoresist layer is deposited on the material layer and exposed using a master photomask; a second photoresist layer is then deposited and exposed using a multiplex photomask to obtain a first protective layer. The material layer is subjected to a first morphology control process based on the first protective layer, and the first photoresist layer and the second photoresist layer are removed after the morphology control process to obtain a semiconductor structure containing a first semiconductor unit. A third photoresist layer is deposited on the semiconductor structure, and the third photoresist layer is exposed using the same main photomask; a fourth photoresist layer is then deposited, and the fourth photoresist layer is exposed using a multiplexed photomask to obtain a second protective layer. The material layer is subjected to a second morphology control process based on the second protective layer, and the third photoresist layer and the fourth photoresist layer are removed after the morphology control process to obtain a semiconductor structure containing the first semiconductor unit and the second semiconductor unit; the second protective layer covers the first semiconductor unit. The first semiconductor unit and the second semiconductor unit have different depths or thicknesses.

13. The semiconductor manufacturing method according to claim 12, characterized in that, The photoresist layer is either a positive photoresist layer or a negative photoresist layer; The morphology control process includes one or more of the following: etching, material deposition, and thinning.

14. A resonator, characterized in that, Prepared using the semiconductor manufacturing method as described in any one of claims 12-13.

15. A filter, characterized in that, It includes multiple resonators as described in claim 14, and the multiple resonators have different thicknesses; The plurality of resonators share a set of photomask assembly, and the photomask assembly is as described in any one of claims 1-11.

16. An electronic device, characterized in that, Includes the filter as described in claim 15.

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