Pure hardware whole vehicle central computing platform architecture and management and control method

Abstract

The application discloses a pure hardware whole vehicle central computing platform architecture and a control method, and belongs to the technical field of vehicle hardware control. The architecture is composed of pure hardware logic circuits, does not contain a processor and firmware, and comprises a whole vehicle level hardware arbitrator and a plurality of physically isolated function domain control units. The method collects requests through a hardware state machine, makes a hardware solidified priority decision, transmits data through a one-way isolation channel, and realizes low leakage current through hardware locking in a sleep state. The application is different from existing software domain control schemes, is not tamperable in the whole process, has low response time delay and strong isolation, can reduce the influence of single point failure, solves the problems that vehicle domain control is easy to tamper and has high time delay due to dependence on software, and is suitable for various new energy and intelligent network connected vehicles.

Description

Technical Field

[0001] This invention relates to the field of vehicle hardware control technology, specifically to a pure hardware vehicle central computing platform architecture and control method. Background Technology

[0002] Current vehicle domain control systems all employ a processor-based architecture combined with software firmware, relying on operating systems and schedulers for multi-domain collaboration. This architecture suffers from three major drawbacks: first, software rules can be tampered with, posing a security risk to vehicle control; second, software scheduling has high latency, making it difficult to meet the real-time requirements of drive-by-wire chassis; and third, multi-domain electrical coupling means that single-point failures can easily propagate to the entire vehicle. Existing solutions from mainstream automakers and component manufacturers are all software-defined architectures, lacking purely hardware-based, processor-free vehicle domain control products, thus failing to meet the demands for high security, high real-time performance, and tamper-proof vehicle control. Summary of the Invention

[0003] This invention provides a pure hardware-based central computing platform architecture and control method for vehicles, employing copper foil hard-wired logic circuits throughout, without processors, firmware, or software programs. It achieves solidified decision-making for multi-domain requests through a vehicle-level hardware arbitrator, with functional domains physically isolated and independently powered for timing. One-way channels block reverse control, hardware latches reduce sleep leakage current, and the entire link features direct-through without buffering, enabling pure hardware-based collaborative control at the vehicle level.

[0004] Comparison with existing technologies and competing products 1. Existing competing products all use MCU / MPU processors with software firmware, which is a software scheduling architecture; this invention is a pure hardware design throughout, without processor, firmware, or software, and the logic fuses are fixed and physically unmodifiable.

[0005] 2. Existing solutions suffer from drawbacks such as easy software tampering, high scheduling latency, and easy failure of inter-domain coupling; the present invention achieves low-latency response through hardware direct drive, reduces the impact of coupling through physical isolation, and the parameters are fixed and cannot be modified.

[0006] 3. This technical solution is a differentiated technical approach, distinct from existing software scheduling architectures, and possesses clear novelty and creativity. Beneficial effects

[0007] 1. Tamper-proof security: All logic is fixed in hardware fuses, with no programming interface, reducing the risk of external modification of control rules; 2. Low latency response: Direct-through signal with no software scheduling, resulting in low control latency and adaptability to the real-time requirements of drive-by-wire chassis; 3. High reliability and isolation: Multi-domain independent power supply clock and physical electrical isolation reduce the probability of single-point failure propagation; 4. Low power consumption operation: Hardware dual-path latch-up in sleep mode reduces leakage current and decreases vehicle static power consumption; 5. Operational stability: No firmware or operating system required, reducing the probability of operational anomalies and upgrade-related failures. Detailed Implementation

[0008] This invention is applied to the vehicle control system of intelligent connected vehicles. The vehicle is set up with five functional domains: chassis domain, power domain, body domain, intelligent driving domain, and intelligent cockpit domain. Each functional domain is equipped with an independent pure hardware state machine as a control unit. Each domain is independently equipped with a power module and clock crystal oscillator, and there is no electrical coupling between domains.

[0009] The vehicle motherboard integrates a vehicle-level hardware arbiter with a built-in fuse storage module. The access priorities of each domain are fixed at the factory and there is no external modification interface. The arbiter is connected to each functional domain through a unidirectional optocoupler isolation channel, which only allows the arbiter to send instructions to the functional domain and physically blocks the reverse control path.

[0010] Each functional domain has a built-in hardware safety unit with integrated dual-redundant timeout timers. The units are interconnected through hardware signal lines. In case of a fault, the level is directly broadcast to trigger the vehicle's safety response. When a functional domain enters a sleep state, the hardware lockout circuit simultaneously cuts off the power supply and return path to reduce leakage current.

[0011] During vehicle operation, the state machine of each domain collects the status of the sensors and actuators in its domain in real time, and the hardware directly transmits the requests to the arbitrator; the arbitrator adjudicates concurrent requests in parallel according to the fixed priority, and legal instructions are directly sent to the target domain; the arbitrator has a built-in polling circuit, which periodically switches the arbitration order to reduce the blocking of low-priority requests.

[0012] This architecture features full-link hardwired connections, with no data caching or software relay, and is executed entirely in hardware, making it suitable for vehicle control scenarios in passenger cars, commercial vehicles, and special vehicles.

Claims

1. A pure hardware-based vehicle central computing platform architecture, characterized in that, Composed of pure hardware logic circuits, without any CPU, executable software, firmware, or microcode; including: a vehicle-level hardware arbitrator, used to receive request signals from various functional domains, perform hardware arbitration according to hardware-defined priorities, and distribute instructions; at least two functional domain management units, each of which is an independent pure hardware state machine used to independently manage actuators and sensors within its domain; the functional domain management units are physically isolated from each other, connected to the vehicle-level hardware arbitrator via independent buses or channels, and can only receive instructions distributed by the vehicle-level hardware arbitrator and transmit status data back.

2. A pure hardware-based vehicle central computing platform management method, applied to the architecture described in claim 1, characterized in that, Executed by pure hardware logic circuits, without any CPU, executable software, firmware, or microcode; including: each functional domain management unit collects requests for its domain through an independent hardware state machine and reports them to the vehicle-level hardware arbitrator; the vehicle-level hardware arbitrator makes hardware decisions on concurrent requests according to the hardware-defined priorities; after the decision is passed, the vehicle-level hardware arbitrator issues execution instructions to the target functional domain management unit through an independent bus or channel.

3. The architecture according to claim 1 or the method according to claim 2, characterized in that, The functional domain control unit corresponds to the chassis domain, power domain, body domain, intelligent driving domain, and intelligent cockpit domain. Each domain has an independent power supply and clock domain and is electrically isolated. It has a built-in independent hardware safety unit, and the hardware signal lines between the safety units are interconnected to realize fault broadcasting.

4. The architecture or method according to claim 3, characterized in that, The functional domain hardware safety unit integrates a hardware timeout monitoring timer with dual redundant heterogeneous clock sources, and triggers timeout reset via pulse hardwire.

5. The architecture according to claim 1 or the method according to claim 2, characterized in that, The arbitrator and the functional domain are physically isolated by a unidirectional optical coupler, which physically blocks the reverse control path.

6. The architecture according to claim 1 or the method according to claim 2, characterized in that, All parameters and priorities are fixed by a single fuse during chip manufacturing, with no external rewrite interface, and are physically unmodifiable.

7. The architecture according to claim 1 or the method according to claim 2, characterized in that, When the functional domain is in sleep mode, the hardware latching circuit bidirectionally blocks leakage current, the non-wake-up path is physically de-energized, and zero dark current conduction occurs.

8. The architecture according to claim 1 or the method according to claim 2, characterized in that, The arbitrator integrates a hardware anti-starvation polling circuit, and the arbitration order is switched directly by a periodic level, without software scheduling logic.

9. The architecture or method according to any one of claims 1-8, characterized in that, The entire link is triggered by direct-through, with hard-wired electrical connections, and there is no data buffering, no intermediate processing, and no firmware intervention.

10. A vehicle, characterized in that, It can be equipped with the architecture described in any one of claims 1-9, or perform the method described in any one of claims 2-9.