An emergency stop forced locking device and an emergency stop control box
Patent Information
- Application Number
- CN202611345142.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-09-01
- Publication Date
- 2026-10-16
AI Technical Summary
[0003]将急停信号接入MCU采集回路会存在软件失效风险,MCU死机、程序跑飞或时钟异常时会导致MCU无法响应急停信号;同时设备受电磁干扰时易造成信号误判,并且,此种采集方案属于有源采集,设备内发生线路断线、电源故障时可能导致无法识别急停状态,违背失电安全原则
[0014] According to a second aspect of the present invention, an emergency stop control box is provided, comprising a box body; a controller disposed within the box body; and an emergency stop forced interlocking device as described in any one of the first aspects of the present invention; the emergency stop forced interlocking device is connected to the controller and a plurality of controlled functional units.
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Figure CN122923952A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of emergency stop control technology, and in particular to an emergency stop forced interlocking device and an emergency stop control box. Background Technology
[0002] In actual underground use, mine control boxes need to connect to multiple emergency stop signals, including local emergency stop, telephone line emergency stop, and remote emergency stop from the control panel. All emergency stop contacts are normally closed and connected to the internal emergency stop circuit of the control box. Any emergency stop action or disconnection will immediately trigger a safety interlock. The original solution isolated the emergency stop signal and connected it to the microcontroller unit (MCU). The MCU detected the emergency stop signal via a pin, and when the MCU program detected the emergency stop signal, it immediately controlled the relevant circuit modules to enter the emergency stop interlock state.
[0003] Integrating the emergency stop signal into the MCU acquisition circuit poses a risk of software failure. If the MCU crashes, the program malfunctions, or the clock malfunctions, the MCU may fail to respond to the emergency stop signal. Additionally, the device is susceptible to signal misinterpretation when subjected to electromagnetic interference. Furthermore, this acquisition scheme is an active acquisition method, and if there is a circuit break or power failure within the device, it may result in the inability to recognize the emergency stop state, violating the principle of power failure safety. Summary of the Invention
[0004] This invention provides an emergency stop forced interlocking device and an emergency stop control box. By setting multiple emergency stop buttons, it can meet the needs of simultaneously deploying nearby control equipment and remote pull-wire equipment on site. The circuit function can be parallel redundantly controlled with the controller's emergency stop, which can meet the status setting requirements of different equipment during emergency stop and effectively avoid the safety risks caused by the failure of a single software or hardware.
[0005] According to one aspect of the present invention, an emergency stop forced locking device is provided, comprising: an isolation sampling circuit, a signal processing circuit, a signal distribution circuit, and a signal control circuit; The output terminal of the isolation sampling circuit is connected to the input terminal of the signal processing circuit. The isolation sampling circuit is used to generate a corresponding emergency stop sampling signal based on the switching action of the normally closed emergency stop button, and transmit the emergency stop sampling signal to the signal processing circuit. The signal processing circuit is used to determine the emergency stop state based on the emergency stop sampling signal, and to generate a stop signal based on the emergency stop state; The output terminal of the signal processing circuit is connected to the input terminal of the signal distribution circuit, and the signal distribution circuit includes multiple signal distribution switches; the multiple signal distribution switches are respectively connected to multiple controlled functional units to selectively output the stop signal to the corresponding controlled functional unit. The output terminal of the signal distribution circuit is connected to the input terminal of the signal control circuit. The signal control circuit is used to receive the stop signal and the output signal of the controller, and to control the controlled functional unit based on the stop signal and the output signal.
[0006] Optionally, the isolation sampling circuit includes multiple emergency stop links; each emergency stop link is used to generate a corresponding emergency stop sampling signal. Each of the aforementioned emergency stop links includes: multiple normally closed emergency stop buttons and isolation switching units connected in series; the isolation switching unit includes an isolation optocoupler and a switching device; The isolation optocoupler includes an input side and an output side. The input side is connected in series in the emergency stop link, and the output side is connected to the switching device to control the switching device to output a corresponding emergency stop sampling signal according to the conduction state of the emergency stop link.
[0007] Optionally, the isolated sampling circuit further includes an isolated power supply unit; The input terminal of the isolated power supply unit is connected to the power supply, and the output terminal of the isolated power supply unit is connected to the emergency stop link to provide power supply voltage to the emergency stop link.
[0008] Optionally, each of the emergency stop links also includes an enable switch; The enable switch is connected to the emergency stop sampling signal output terminal of the emergency stop link and is used to control whether the emergency stop sampling signal is output to the signal processing circuit.
[0009] Optionally, the signal processing circuit includes: a latching sub-circuit and a voltage comparison unit; Multiple emergency stop sampling signal output terminals are respectively connected to the locking sub-circuit to form a locking signal; The latching sub-circuit is connected to the first input terminal of the voltage comparison unit; the second input terminal of the voltage comparison unit receives the reference voltage. The voltage comparison unit is used to generate the stop signal based on the relationship between the voltage amplitude of the blocking signal and the reference voltage.
[0010] Optionally, the signal control circuit includes an AND gate module, a NOT gate module, a first transistor, a second transistor, and a relay; The first terminal of the AND gate module is connected to the output signal terminal of the controller, the second terminal of the AND gate module is connected to the output terminal of the stop signal, and the output terminal of the AND gate module is connected to the base of the first transistor. The input terminal of the NOT gate module is connected to the output terminal of the stop signal, and the output terminal of the NOT gate module is connected to the base of the second transistor. The collector of the first transistor is connected to the first terminal of the relay, and the emitter of the first transistor is grounded. The collector of the second transistor is connected to the first terminal of the relay, and the emitter of the second transistor is grounded; the second terminal of the relay is connected to the power supply.
[0011] Optionally, the signal control circuit may further include a control switch; The first terminal of the control switch is connected to the first terminal of the relay, and the second terminal of the control switch is connected to the collector of the second transistor.
[0012] Optionally, the signal control circuit further includes a first resistor and a second resistor; The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the base of the first transistor. The first end of the second resistor is connected to the second end of the first resistor, and the second end of the second resistor is grounded.
[0013] Optionally, the signal control circuit may further include a third resistor; The first end of the third resistor is connected to the power supply, and the second end of the third resistor is connected to the base of the second transistor.
[0014] According to a second aspect of the present invention, an emergency stop control box is provided, comprising a box body; a controller disposed within the box body; and an emergency stop forced interlocking device as described in any one of the first aspects of the present invention; the emergency stop forced interlocking device is connected to the controller and a plurality of controlled functional units.
[0015] This invention provides an emergency stop forced interlocking device and an emergency stop control box, comprising: an isolation sampling circuit, a signal processing circuit, a signal distribution circuit, and a signal control circuit; the output terminal of the isolation sampling circuit is connected to the input terminal of the signal processing circuit, and the isolation sampling circuit is used to generate a corresponding emergency stop sampling signal based on the switching action of a normally closed emergency stop button, and transmit the emergency stop sampling signal to the signal processing circuit; the signal processing circuit is used to determine the emergency stop state based on the emergency stop sampling signal, and generate a stop signal based on the emergency stop state; the output terminal of the signal processing circuit is connected to the input terminal of the signal distribution circuit, and the signal distribution circuit includes multiple signal distribution switches; the multiple signal distribution switches are respectively connected to multiple controlled functional units to selectively output the stop signal to the corresponding controlled functional unit; the output terminal of the signal distribution circuit is connected to the input terminal of the signal control circuit, and the signal control circuit is used to receive the stop signal and the output signal of the controller, and control the controlled functional unit based on the stop signal and the output signal. The emergency stop forced interlocking device provided by this invention can meet the needs of simultaneously deploying nearby control equipment and remote pull-wire equipment on site by setting multiple emergency stop buttons. The circuit function can be parallel redundantly controlled with the controller's emergency stop, which can meet the status setting requirements of different equipment during emergency stop and effectively avoid the safety risks caused by the failure of a single software or hardware.
[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a structural block diagram of an emergency stop forced locking device provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the isolation sampling circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the isolated power supply unit of the isolated sampling circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the signal processing circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention; Figure 5This is a schematic diagram of the signal distribution circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the signal control circuit in an emergency stop forced locking device provided in an embodiment of the present invention. Detailed Implementation
[0019] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0020] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0021] Figure 1 This is a structural block diagram of an emergency stop forced locking device provided in an embodiment of the present invention, with reference to... Figure 1 The emergency stop forced interlocking device provided in this embodiment of the invention includes: an isolation sampling circuit 1, a signal processing circuit 2, a signal distribution circuit 3, and a signal control circuit 4; the output terminal of the isolation sampling circuit 1 is connected to the input terminal of the signal processing circuit 2, and the isolation sampling circuit 1 is used to input a normally closed emergency stop button (…). Figure 1 The switching action (not shown) generates a corresponding emergency stop sampling signal SIGX (X can be 1, 2, 3...), and transmits the emergency stop sampling signal to signal processing circuit 2; signal processing circuit 2 is used to determine the emergency stop state based on the emergency stop sampling signal, and generate a stop signal STOP based on the emergency stop state; the output terminal of signal processing circuit 2 is connected to the input terminal of signal distribution circuit 3, which includes multiple signal distribution switches ( Figure 1 (Not shown in the image); multiple signal distribution switches are respectively connected to multiple controlled functional units ( Figure 1(not shown in the diagram) to selectively output the stop signal to the corresponding controlled functional unit; the output terminal of the signal distribution circuit 3 is connected to the input terminal of the signal control circuit 4, which is used to receive the stop signal and the output signal of the controller, and to control the controlled functional unit based on the stop signal and the output signal.
[0022] Specifically, such as Figure 1 As shown, the emergency stop forced interlocking device includes an isolation sampling circuit 1, a signal processing circuit 2, a signal distribution circuit 3, and a signal control circuit 4. The isolation sampling circuit 1 collects the status information of external emergency stop links (which may include multiple links) and generates a corresponding emergency stop sampling signal SIGX based on the on / off state of the emergency stop links (under normal conditions, the circuit is in a conducting state; in the event of an emergency stop, the circuit is in a disconnected state). Here, X can represent different emergency stop link numbers, such as 1, 2, 3…n. In this embodiment, the emergency stop links may include emergency stop buttons on local operating equipment and emergency stop buttons on remote pull-wire equipment. Each emergency stop button is preferably a normally closed emergency stop button, and multiple normally closed emergency stop buttons can be connected in series to form a corresponding emergency stop link. The output terminal of the isolation sampling circuit 1 is connected to the input terminal of the signal processing circuit 2. The isolation sampling circuit 1 can electrically isolate the external emergency stop links from the internal control circuit of the device through isolation devices and outputs the emergency stop sampling signal SIGX according to the status changes of the emergency stop links. For example, when the emergency stop link is in normal condition, the emergency stop sampling signal SIGX remains at the first level (high configuration state); when any emergency stop button in the emergency stop link is triggered, causing the emergency stop link to disconnect, the emergency stop sampling signal SIGX switches to the second level (low level).
[0023] Signal processing circuit 2 receives multiple emergency stop sampling signals SIGX and determines the current emergency stop state based on these signals. When any emergency stop link is detected to be in a triggered state, signal processing circuit 2 generates a stop signal STOPX. The output of signal processing circuit 2 is connected to signal distribution circuit 3. Signal distribution circuit 3 includes multiple signal distribution switches, each corresponding to a controlled functional unit. By controlling the conduction state of different signal distribution switches, the stop signal STOPX can be selectively output to the corresponding controlled functional unit. For example, in equipment with multiple actuators, the controlled functional unit that needs to respond to the emergency stop signal can be selected through the signal distribution switches according to actual safety control requirements, thereby improving the adaptability of the emergency stop interlocking device to different equipment configurations. For example, for motor emergency stop, the circuit corresponding to the motor control circuit; for solenoid valve emergency stop, the control circuit corresponding to the solenoid valve, etc.
[0024] The output of signal distribution circuit 3 is connected to signal control circuit 4. Signal control circuit 4 simultaneously receives the stop signal STOPX and the controller (…). Figure 1 (Not shown in the diagram) Output signal. The controller can be a microcontroller unit (MCU) used to output control signals according to the device's operating status. The signal control circuit 4 generates control signals for controlling the controlled functional unit based on the stop signal STOPX and the controller output signal. When no emergency stop is triggered, the signal control circuit 4 controls the controlled functional unit to operate according to the controller output signal; when an emergency stop is triggered, the stop signal STOPX can limit the controller output signal through hardware logic circuitry, causing the controlled functional unit to enter a preset safe state.
[0025] The emergency stop forced interlocking device provided by this invention can meet the needs of simultaneously deploying nearby control equipment and remote pull-wire equipment on site by setting multiple emergency stop buttons. The circuit function can be parallel redundantly controlled with the controller's emergency stop, which can meet the status setting requirements of different equipment during emergency stop and effectively avoid the safety risks caused by the failure of a single software or hardware.
[0026] Optional, Figure 2 This is a schematic diagram of the isolation sampling circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention, for reference. Figure 2 The isolation sampling circuit 1 in the emergency stop forced interlocking device provided by the present invention includes multiple emergency stop links; each emergency stop link is used to generate a corresponding emergency stop sampling signal SIGX. Each of the multiple emergency stop links includes: multiple normally closed emergency stop buttons 111 and isolation switching units 112 connected in series; the isolation switching unit 112 includes an isolation optocoupler 1121 and a switching device 1122. The isolation optocoupler 1121 includes an input side 1121A and an output side 1121B. The input side 1121A is connected in series in the emergency stop link, and the output side 1121B is connected to the switching device 1122 to control the switching device 1122 to output the corresponding emergency stop sampling signal SIGX according to the conduction state of the emergency stop link.
[0027] Specifically, such as Figure 2 As shown, the isolation sampling circuit 1 includes multiple emergency stop links; each emergency stop link includes: multiple normally closed emergency stop buttons (i.e., closed under normal conditions and open under emergency stop conditions) 111 connected in series and an isolation conversion unit 112. It should be noted that... Figure 2 Only one emergency stop link is shown as an example. In actual applications, there can be multiple links to meet the needs of different scenarios. The isolation conversion unit 112 includes an isolation optocoupler 1121 and a switching device 1122. The isolation optocoupler includes an input side 1121A and an output side 1121B. The input side 1121A is connected in series in the emergency stop link, and the output side 1121B is connected to the switching device 1122 to control the switching device 1122 to output the corresponding emergency stop sampling signal SIGX according to the conduction state of the emergency stop link. Under normal circumstances, i.e., without triggering the emergency stop, signal VO2—normally closed emergency stop button 111—resistor R1—input side 1121A—GND1 is turned on. At this time, the diode of isolation optocoupler 1121 illuminates to indicate that it is turned on. At this time, the output side 1121B outputs current. Between the output side 1121B and the switching device 1122, there is also a NOT gate circuit (…). Figure 2 (not shown in the diagram) When the output current is output from the output side 1121B, after passing through the NOT gate circuit, the switching device 1122 is turned off. At this time, the emergency stop sampling signal SIG1 is in a high impedance state. In an emergency stop situation, due to the activation of the normally closed emergency stop button 111, the signal VO2---normally closed emergency stop button 111---resistor R1---input side 1121A---GND1 is disconnected, and the input side 1121A is disconnected. At this time, there is no current output on the output side 1121B, but after passing through the NOT gate circuit, the switching device 1122 is turned on. At this time, the emergency stop sampling signal SIGX is pulled low to GND1, which is a low level.
[0028] Optional, Figure 3 This is a schematic diagram of the isolated power supply unit of the isolated sampling circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention. (Refer to...) Figure 3 The isolation sampling circuit 1 in the emergency stop forced interlocking device provided by the present invention further includes an isolation power supply unit 113; the input terminal of the isolation power supply unit 113 is connected to the power supply VIN1, and the output terminal of the isolation power supply unit 113 is connected to the emergency stop link to provide power supply voltage to the emergency stop link.
[0029] Specifically, the isolation sampling circuit of the emergency stop forced interlocking device provided in this embodiment of the invention further includes an isolation power supply unit 113. The input terminal of the isolation power supply unit 113 is connected to the power supply VIN1 so as to transmit the power supply voltage to the emergency stop link through the output terminal VO2, so as to provide power supply voltage for the emergency stop link.
[0030] Optional, continue to refer to Figure 2 Each emergency stop link in the isolation sampling circuit of the emergency stop forced interlocking device provided in this embodiment of the invention further includes an enable switch 114; Enable switch 114 is connected to the emergency stop sampling signal output terminal SIG1 of the emergency stop link, and is used to control whether the emergency stop sampling signal is output to the signal processing circuit.
[0031] Specifically, each emergency stop link can be equipped with an enable switch 114. For example, the first emergency stop link is equipped with an enable switch SW1, and the second emergency stop link is equipped with an enable switch SW2. When the enable switch 114 is in the on state, the emergency stop sampling signal SIGX generated by the emergency stop link can be transmitted to the signal processing circuit 2 via the enable switch 114, enabling the emergency stop link to participate in the subsequent emergency stop state detection and stop signal generation process; when the enable switch 114 is in the off state, the signal transmission path between the emergency stop link and the signal processing circuit 2 is cut off, so that the emergency stop link does not participate in the subsequent emergency stop logic processing.
[0032] By setting the enable switch 114, the emergency stop link can be selectively enabled or disabled according to the actual equipment configuration requirements. For example, when the control box is connected to multiple external devices or different types of emergency stop devices, the emergency stop link can be enabled according to the actual application scenario, while unused emergency stop links can be disabled, thereby improving the adaptability of the emergency stop forced interlocking device to different equipment configurations.
[0033] Optional, Figure 4 This is a schematic diagram of the signal processing circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention, for reference. Figure 4 The signal processing circuit in the emergency stop forced locking device provided by the present invention includes: a locking sub-circuit 21 and a voltage comparison unit 22; The outputs of multiple emergency stop sampling signals SIGX (such as SIG1, SIG2, SIG3, SIGX) are respectively connected to the latching sub-circuit 21 to form a latching signal; The latching sub-circuit 21 is connected to the first input terminal of the voltage comparison unit 22; the second input terminal of the voltage comparison unit 22 is connected to the input reference voltage VREF1. The voltage comparison unit 22 is used to generate a stop signal STOP1 based on the relationship between the voltage amplitude of the blocking signal and the reference voltage VREF1.
[0034] Specifically, the outputs of multiple emergency stop sampling signals SIGX are connected in parallel to the locking sub-circuit 21, which is then connected to the first input of the voltage comparison unit 22, and the reference voltage VREF1 is connected to the second input of the voltage comparison unit 22. When the emergency stop link is in normal condition, the first input terminal of the voltage comparison unit 22 is high (i.e., the voltage amplitude of the blocking signal is greater than the reference voltage VREF1). At this time, the stop signal STOP1 output by the voltage comparison unit 22 is high, and its voltage amplitude is VIN2. When a device on any emergency stop link triggers an emergency stop, the emergency stop sampling signal SIGX of that emergency stop link is pulled low to GND1 (as can be seen from the previous embodiment of the invention). At this time, the level of the latching sub-circuit 21 is also pulled low to GND1. At this time, the voltage amplitude of the latching signal is less than VREF1, and the stop signal STOP1 output by the voltage comparison unit 22 is low, with a voltage amplitude of GND1.
[0035] Optional, Figure 5 This is a schematic diagram of the signal distribution circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention. (Refer to...) Figure 5 The signal distribution circuit 3 includes multiple signal distribution switches SW, which are respectively connected to multiple controlled functional units ( Figure 5 (not shown) to selectively output the stop signal SW to the corresponding controlled functional unit, that is, to selectively assign the stop signal STOP to STOPX (X=1, 2, 3, 4, 5, 6, 7...) to meet the needs of different devices, such as STOP1 being the solenoid valve stop signal, STOP2 being the motor stop signal, etc.
[0036] Optional, Figure 6 This is a schematic diagram of the signal control circuit in an emergency stop forced interlocking device provided in an embodiment of the present invention. (Refer to...) Figure 6 The signal control circuit in the emergency stop forced interlocking device provided by the present invention includes an AND gate module 41, a NOT gate module 42, a first transistor Q1, a second transistor Q2, and a relay k; The first terminal of AND gate module 41 is connected to the output signal terminal IO_SIG of the controller, the second terminal of AND gate module 41 is connected to the output terminal of the stop signal STOPX, and the output terminal of AND gate module 41 is connected to the base of the first transistor Q1. The input terminal of NOT gate module 42 is connected to the output terminal of the stop signal STOPX, and the output terminal of NOT gate module 42 is connected to the base of the second transistor Q2; The collector of the first transistor Q1 is connected to the first terminal of the relay k, and the emitter of the first transistor Q1 is grounded to GND1. The collector of the second transistor Q2 is connected to the first terminal of the relay k, and the emitter of the second transistor Q2 is grounded to GND1; the second terminal of the relay k is connected to the power supply VIN1.
[0037] Specifically, under normal circumstances, the stop signal STOPX is high. At this time, the stop signal outputs a low level after passing through the NOT gate module 42. The second transistor is not turned on, and the output signal is determined by the controller MCU. When the MCU's control signal IO_SIG is high, since the stop signal STOPX is also high, the first transistor Q1 is turned on after passing through the AND gate module 41, and the output signal OUT1 is low (because the relay k is pulled low to GND1). When the MCU's control signal IO_SIG is low, since the stop signal STOPX is high, the first transistor Q1 is turned off after passing through the AND gate module 41, and the output signal OUT1 is high (because the relay k is released).
[0038] Optional, continue to refer to Figure 6 The signal control circuit of the emergency stop forced interlocking device provided by the present invention also includes a control switch 43; The first terminal of control switch 43 is connected to the first terminal of relay k, and the second terminal of control switch 43 is connected to the collector of the second transistor Q2.
[0039] Specifically, when an emergency stop is triggered, the output signal status in the emergency stop state is adjusted by controlling switch 43; When the control switch 43 is open, the output signal OUT1 is controlled only by the second transistor Q2. When the emergency stop is triggered, the stop signal STOPX is low. Regardless of whether the control signal IO_SIG output by the MUC is high or low, the first transistor Q1 is cut off after passing through the AND gate module 41. At this time, the output signal OUT1 is in a high impedance state (the relay k is released and does not work). When the control switch 43 is turned on, the stop signal STOPX is at a low level. After passing through the NOT gate module 42, the output is at a high level. At this time, the second transistor Q2 is turned on. However, due to the AND gate module 41, the first transistor Q1 is turned off. Therefore, the output signal is pulled down to a low level, and the relay k is energized.
[0040] Optional, continue to refer to Figure 6 The signal control circuit in the emergency stop forced interlocking device provided by the present invention further includes a first resistor R2 and a second resistor R3. The first end of the first resistor R2 is connected to the power supply VIN1, and the second end of the first resistor R2 is connected to the base of the first transistor Q1. The first end of the second resistor R3 is connected to the second end of the first resistor R2, and the second end of the second resistor R3 is grounded.
[0041] Specifically, the first end of the first resistor R2 is connected to the power supply VIN1, and the second end of the first resistor R2 is connected to the base of the first transistor Q1; the first resistor R2 is used to limit the current flowing into the base of the first transistor Q1, while ensuring that the first transistor Q1 is reliably turned on. The first end of the second resistor R3 is connected to the second end of the first resistor R2, and the second end of the second resistor R3 is grounded. The second resistor R3 is used to ensure the default shutdown of the first transistor Q1 and to speed up the shutdown of the first transistor Q1.
[0042] Optional, continue to refer to Figure 6 The signal control circuit of the emergency stop forced interlocking device provided by the present invention also includes a third resistor R4; The first end of the third resistor R4 is connected to the power supply VIN1, and the second end of the third resistor R4 is connected to the base of the second transistor Q2.
[0043] Specifically, the first end of the third resistor R4 is connected to the power supply VIN1, and the second end of the third resistor R4 is connected to the base of the second transistor Q2. Similarly, the third resistor R4 is used to limit the current flowing into the base of the second transistor Q2, while ensuring that the second transistor Q2 can be reliably turned on.
[0044] According to the same inventive concept, embodiments of the present invention also provide an emergency stop control box, including a box body; a controller disposed within the box body; and an emergency stop forced locking device as described in any of the above embodiments; the emergency stop forced locking device is connected to the controller and a plurality of controlled functional units.
[0045] The emergency stop control box provided in this embodiment of the invention can achieve the same technical effect as the emergency stop forced interlocking device provided in any of the above embodiments of the invention, and will not be described in detail here.
[0046] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0047] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. An emergency stop forced locking device, characterized in that, include: Isolation sampling circuit, signal processing circuit, signal distribution circuit, and signal control circuit; The output terminal of the isolation sampling circuit is connected to the input terminal of the signal processing circuit. The isolation sampling circuit is used to generate a corresponding emergency stop sampling signal based on the switching action of the normally closed emergency stop button, and transmit the emergency stop sampling signal to the signal processing circuit. The signal processing circuit is used to determine the emergency stop state based on the emergency stop sampling signal, and to generate a stop signal based on the emergency stop state; The output terminal of the signal processing circuit is connected to the input terminal of the signal distribution circuit, and the signal distribution circuit includes multiple signal distribution switches; the multiple signal distribution switches are respectively connected to multiple controlled functional units to selectively output the stop signal to the corresponding controlled functional unit. The output terminal of the signal distribution circuit is connected to the input terminal of the signal control circuit. The signal control circuit is used to receive the stop signal and the output signal of the controller, and to control the controlled functional unit based on the stop signal and the output signal.
2. The emergency stop forced interlocking device according to claim 1, characterized in that, The isolation sampling circuit includes multiple emergency stop links; each emergency stop link is used to generate a corresponding emergency stop sampling signal. Each of the aforementioned emergency stop links includes: multiple normally closed emergency stop buttons and isolation switching units connected in series; the isolation switching unit includes an isolation optocoupler and a switching device; The isolation optocoupler includes an input side and an output side. The input side is connected in series in the emergency stop link, and the output side is connected to the switching device to control the switching device to output a corresponding emergency stop sampling signal according to the conduction state of the emergency stop link.
3. The emergency stop forced interlocking device according to claim 2, characterized in that, The isolated sampling circuit also includes an isolated power supply unit; The input terminal of the isolated power supply unit is connected to the power supply, and the output terminal of the isolated power supply unit is connected to the emergency stop link to provide power supply voltage to the emergency stop link.
4. The emergency stop forced interlocking device according to claim 2, characterized in that, Each of the aforementioned emergency stop links also includes an enable switch; The enable switch is connected to the emergency stop sampling signal output terminal of the emergency stop link and is used to control whether the emergency stop sampling signal is output to the signal processing circuit.
5. The emergency stop forced interlocking device according to claim 1, characterized in that, The signal processing circuit includes: a latching sub-circuit and a voltage comparison unit; Multiple emergency stop sampling signal output terminals are respectively connected to the locking sub-circuit to form a locking signal; The latching sub-circuit is connected to the first input terminal of the voltage comparison unit; the second input terminal of the voltage comparison unit receives the reference voltage. The voltage comparison unit is used to generate the stop signal based on the relationship between the voltage amplitude of the blocking signal and the reference voltage.
6. The emergency stop forced interlocking device according to claim 1, characterized in that, The signal control circuit includes an AND gate module, a NOT gate module, a first transistor, a second transistor, and a relay; The first terminal of the AND gate module is connected to the output signal terminal of the controller, the second terminal of the AND gate module is connected to the output terminal of the stop signal, and the output terminal of the AND gate module is connected to the base of the first transistor. The input terminal of the NOT gate module is connected to the output terminal of the stop signal, and the output terminal of the NOT gate module is connected to the base of the second transistor. The collector of the first transistor is connected to the first terminal of the relay, and the emitter of the first transistor is grounded. The collector of the second transistor is connected to the first terminal of the relay, and the emitter of the second transistor is grounded; the second terminal of the relay is connected to the power supply.
7. The emergency stop forced interlocking device according to claim 6, characterized in that, The signal control circuit also includes a control switch; The first terminal of the control switch is connected to the first terminal of the relay, and the second terminal of the control switch is connected to the collector of the second transistor.
8. The emergency stop forced interlocking device according to claim 7, characterized in that, The signal control circuit also includes a first resistor and a second resistor; The first end of the first resistor is connected to the power supply, and the second end of the first resistor is connected to the base of the first transistor. The first end of the second resistor is connected to the second end of the first resistor, and the second end of the second resistor is grounded.
9. The emergency stop forced interlocking device according to claim 8, characterized in that, The signal control circuit also includes a third resistor; The first end of the third resistor is connected to the power supply, and the second end of the third resistor is connected to the base of the second transistor.
10. An emergency stop control box, characterized in that, It includes a housing; a controller disposed within the housing; and an emergency stop forced locking device as described in any one of claims 1 to 9; the emergency stop forced locking device is connected to the controller and a plurality of controlled functional units.