Processing method and device of flight control signal protocol, unmanned aerial vehicle and program product

Abstract

The application relates to a flight control signal protocol processing method and device, a UAV and a program product. The method comprises the following steps: in response to a switching instruction for switching a flight control signal protocol from an initial protocol to a target protocol, disabling an input capture function of a target timer on the flight control signal; in the case that the input capture function is in the disabled state, deinitializing the target timer, and clearing a state variable associated with the initial protocol to unload the initial protocol; in the case that the initial protocol has been unloaded, resetting a control state of a rotor motor to an initial safe state; in the case that the rotor motor is in the initial safe state, configuring the target timer according to the target protocol, and restoring the input capture function of the target timer. The method can improve the efficiency and flexibility of flight control protocol switching.

Description

Technical Field

[0001] This application relates to the field of unmanned aerial vehicle (UAV) communication technology, and in particular to a method, apparatus, UAV, computer-readable storage medium, and computer program product for processing flight control signal protocols. Background Technology

[0002] The ESC (Electronic Speed ​​Controller) of a multi-rotor drone is responsible for receiving flight control signals output from the flight controller board and driving the rotor motors. Different types of flight controller boards may support different flight control signal protocols, such as PWM (Pulse Width Modulation) and DShot (Digital Shot) communication protocols.

[0003] In the research and development and testing of drones, or in application scenarios where the same drone needs to be adapted to different remote control links, there is a common need to switch between different flight control signal protocols.

[0004] One related technology requires disassembling the ESC on the drone arm to reconfigure the flight control signal protocol that needs to be switched, which is time-consuming and labor-intensive. Another related technology supports automatic detection and switching of the flight control signal protocol type when the drone is powered on. However, once the detection is completed, the protocol is locked, making it difficult to dynamically switch during flight or ground debugging, which has significant limitations. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, computer equipment, computer-readable storage medium, and computer program product for processing flight control signal protocols that can improve the efficiency and flexibility of flight control signal protocol switching, in order to address the above-mentioned technical problems.

[0006] In a first aspect, this application provides a method for processing flight control signal protocols, applied to an unmanned aerial vehicle (UAV). The UAV includes a target timer and a rotor motor. The target timer is used to capture flight control signals of different flight control signal protocols, and the flight control signals are used to control the rotor motor. The method includes:

[0007] In response to the switching command to switch the flight control signal protocol from the initial protocol to the target protocol, the target timer's input capture function for flight control signals is disabled;

[0008] With input capture disabled, deinitialize the target timer and clear the state variables associated with the initial protocol to unload the initial protocol;

[0009] With the initial protocol already unloaded, reset the rotor motor's control state to the initial safe state;

[0010] With the rotor motor in an initial safe state, configure the target timer according to the target protocol and restore the input capture function of the target timer.

[0011] This technical solution has the following beneficial effects:

[0012] By disabling input capture, the transmission path of the flight control signals of the initial protocol (i.e., the old signals) is blocked, and the old signals are no longer received or decoded. Based on this, the initial protocol is unloaded, allowing the target protocol to be re-established from an empty state. Subsequently, the rotor motor control state is reset to the initial safe state, ensuring the rotor motor remains safely stopped during the protocol switchover. Then, the target timer is reconfigured for the target protocol, completing the safe switchover. The entire switchover process is executed sequentially according to a safe timing sequence, eliminating the need for disassembling and reconfiguring the ESC, significantly improving the efficiency of flight control signal protocol switching. Switching commands can be remotely issued via wireless channel to dynamically switch flight control signal protocols, adapting to different scenario switching needs and effectively improving the flexibility of flight control signal protocol switching. Furthermore, multiplexing the target timer for capture of different flight control signals reduces the hardware cost of the UAV.

[0013] In some embodiments, disabling the target timer's input capture function for flight control signals includes:

[0014] Disable the target timer's input capture interrupt for flight control signals;

[0015] When the input capture interrupt is disabled, stop the target timer's input capture channel for flight control signals.

[0016] This technical solution has the following beneficial effects:

[0017] By sequentially disabling input capture interrupts and input capture channels, the occurrence of abnormal interruptions and erroneous pulse data caused by the mixing of old and new flight control signals during the switchover phase of the flight control signal protocol can be reduced. This prevents the generation of drive commands through misinterpretation, blocks the input of erroneous flight control signals, and ensures a more stable and secure process for switching from the initial protocol to the target protocol.

[0018] In some embodiments, after the step of disabling the target timer's input capture interruption of the flight control signal, the following is included:

[0019] Set the protocol status corresponding to the initial protocol to an invalid state;

[0020] The interrupt callback exits when the input capture interrupt is triggered and the corresponding interrupt callback is generated, and the protocol state corresponding to the initial protocol is invalid.

[0021] This technical solution has the following beneficial effects:

[0022] By setting the protocol state corresponding to the initial protocol to an invalid state as a fallback measure, even if the flight control signal with the initial protocol is abnormally captured after the input capture interrupt is turned off, the interrupt callback will exit due to the invalidity of the initial protocol. This prevents misjudgment caused by the mixing of old and new protocol parameters in the semi-configured state machine, and improves the fault tolerance and overall security of the protocol switching operation.

[0023] In some embodiments, configuring a target timer according to a target protocol includes:

[0024] Obtain the timer configuration parameters corresponding to the target protocol, and configure the timer configuration parameters for the target timer;

[0025] If the target timer has been configured with timer configuration parameters, configure the input capture channel for the target protocol on the target timer.

[0026] This technical solution has the following beneficial effects:

[0027] By first acquiring and configuring the timer configuration parameters corresponding to the target protocol, and then configuring the target protocol's targeted input acquisition channel based on the completed timer configuration parameters, the acquisition sampling accuracy is guaranteed to match the target protocol timing based on the timer time base reference. This reduces the situation where pulse acquisition is caused by timing parameter disorder, and improves the reliability of the target protocol's flight control signal parsing.

[0028] In some embodiments, resetting the control state of the rotor motor to an initial safe state includes:

[0029] Clear the throttle command associated with the rotor motor, stop the power output of the rotor motor, and reset the motor operating status variables associated with the rotor motor.

[0030] This technical solution has the following beneficial effects:

[0031] By synchronously clearing residual throttle commands, cutting off the power output of the rotor motors, and resetting the motor operating status variables, the risk of erroneous drive caused by old data left over during flight control signal protocol switching can be eliminated, achieving a smooth and safe protocol switching.

[0032] In some embodiments, after the step of restoring the input capture function of the configured target timer, the following is included:

[0033] The target flight control signal is captured by the target timer, and the validity of the target flight control signal is verified according to the target protocol.

[0034] If the validity of the target flight control signal is verified, the target flight control signal is decoded into a target throttle command, and the rotor motor is controlled according to the target throttle command.

[0035] This technical solution has the following beneficial effects:

[0036] By verifying the validity of the target flight control signal according to the target protocol, interference signals with abnormal timing can be filtered out. Only the verified target flight control signal is decoded to generate the target throttle command to drive the rotor motor, reducing the occurrence of invalid noise generating erroneous speed commands and improving the accuracy and stability of rotor motor control after protocol switching.

[0037] In some embodiments, the validity of the target flight control signal is verified according to the target protocol, including:

[0038] When the target protocol is a pulse width modulation protocol, the pulse width and signal period of the target flight control signal are obtained, and it is verified whether the pulse width and signal period are within the corresponding preset valid value range.

[0039] When the target protocol is a digital electronic speed control (ESC) protocol, the target flight control signal is verified according to a preset cyclic redundancy check (CR) algorithm.

[0040] This technical solution has the following beneficial effects:

[0041] By matching corresponding verification rules for pulse width modulation (PWM) protocol and digital electronic speed controller (ESC) protocol respectively, the PWM protocol filters abnormal pulses by verifying pulse width and signal period interval, while the ESC protocol relies on cyclic redundancy check (CRC) algorithm to identify bit transmission errors. This can accurately intercept various distorted target flight control signals, avoid parsing erroneous target throttle commands that may interfere with rotor motor operation, and improve the adaptability of signal verification under different target protocols and the overall control safety of the aircraft.

[0042] In some embodiments, prior to the step of disabling the target timer's input capture function for flight control signals, the following steps are included:

[0043] If the target protocol belongs to the preset valid protocol set and the target protocol is inconsistent with the initial protocol, the step of disabling the target timer's input capture function for flight control signals is executed.

[0044] This technical solution has the following beneficial effects:

[0045] By only disabling the input capture function when the target protocol is legal and valid and different from the initial protocol, meaningless operations when the protocol is unchanged or invalid are reduced, thus balancing the continuity of UAV flight operations and the security of protocol switching.

[0046] Secondly, this application also provides a flight control signal protocol processing device for use in a drone. The drone includes a target timer and a rotor motor. The target timer is used to capture flight control signals of different flight control signal protocols, and the flight control signals are used to control the rotor motor. The device includes:

[0047] The module is disabled in response to a switching command that switches the flight control signal protocol from the initial protocol to the target protocol, thereby disabling the target timer's function of capturing the flight control signal input.

[0048] The unloading module is used to deinitialize the target timer and clear the state variables associated with the initial protocol when the input capture function is disabled, so as to unload the initial protocol.

[0049] The reset module is used to reset the control state of the rotor motor to the initial safe state after the initial protocol has been unloaded.

[0050] The recovery module is used to restore the input capture function of the target timer by configuring the target timer according to the target protocol when the rotor motor is in the initial safe state.

[0051] Thirdly, this application also provides an unmanned aerial vehicle (UAV), including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the above-mentioned flight control signal protocol processing method.

[0052] Fourthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described flight control signal protocol processing method.

[0053] Regarding the beneficial effects of any of the technical solutions in the second to fourth aspects mentioned above, refer to the beneficial effects of the corresponding technical solutions in the first aspect; repeated examples will not be listed here. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0055] Figure 1 A flowchart illustrating the steps of a flight control signal protocol processing method provided in an embodiment of this application.

[0056] Figure 2 A diagram illustrating the input process of a flight control signal protocol according to an embodiment of this application;

[0057] Figure 3 This is a timing diagram of an atomic operation sequence provided in an embodiment of this application.

[0058] Figure 4 This is a flowchart illustrating a flight control signal protocol switching process according to an embodiment of this application.

[0059] Figure 5 This is a structural block diagram of a flight control signal protocol processing device provided in an embodiment of this application.

[0060] Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application.

[0061] Figure 7 This is a schematic diagram of the structure of a drone provided in an embodiment of this application. Detailed Implementation

[0062] In one related technology for switching flight control signal protocols, the UAV's ESC (Electronic Control System) supports a fixed signal protocol at the factory, or can be selected by soldering jumpers. When the pilot replaces the flight controller board (e.g., upgrading from a PWM flight controller to one that supports DShot), the ESC on the arm needs to be removed and reconfigured. For multi-rotor UAVs that have already been installed and wired, this means a lot of disassembly and assembly work.

[0063] Another related technology supports automatically detecting the type of flight control signal protocol when the drone is powered on, but once the detection is complete, the protocol is locked and cannot be dynamically switched during flight or ground debugging. This is very inconvenient for drone R&D engineers who need to frequently switch between different flight control boards for testing, or for application scenarios where the same drone needs to be adapted to different remote control links, as each switch requires a power cycle.

[0064] Moreover, different flight control signals have different requirements for timer configuration. For example, PWM requires microsecond-level resolution (1MHz clock) to measure pulse width, while DShot requires sub-microsecond-level resolution (12MHz clock) to determine bit time. This makes it difficult for related technologies to freely switch flight control protocols during the operation of drones.

[0065] Based on this, this application provides a method, apparatus, unmanned aerial vehicle, computer-readable storage medium, and computer program product for processing flight control signal protocols, in order to overcome or at least partially overcome the defects existing in the above-mentioned related technologies.

[0066] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0067] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0068] In one embodiment, such as Figure 1 As shown, a method for processing flight control signal protocols is provided. This embodiment illustrates the application of this method to a terminal, which may include a drone, such as a multi-rotor drone. It is understood that this method can also be applied to a server, or to a system including a terminal and a server, and implemented through interaction between the terminal and the server. In this embodiment, the method is applied to a drone, which includes a target timer and a rotor motor. The target timer is used to capture flight control signals of different flight control signal protocols, and the flight control signals are used to control the rotor motor. The method includes the following steps:

[0069] Step 101: In response to the switching command to switch the flight control signal protocol from the initial protocol to the target protocol, disable the target timer's input capture function for the flight control signal.

[0070] The target timer can be any timer of the UAV controller. For example, the timer numbered TIM3 in the main control MCU (Microcontroller Unit) of the ESC can be designated as the target timer. Flight control signals of different flight control signal protocols can be captured through the same input capture channel of the target timer (such as the channel numbered CH1 in TIM3, which is mapped to the pin numbered PA5).

[0071] The initial protocol is the flight control signal protocol currently used by the UAV, and the target protocol is the flight control signal protocol that needs to be switched. The flight control signal protocol can be PWM, DShot300 (bit rate 300kbit / s), DShot600 (bit rate 600kbit / s), etc.

[0072] The input capture function refers to the flight control signal acquisition function that uses a timer to identify and record the moment when the flight control signal level changes.

[0073] In the specific implementation, in response to the switching command, the target timer's function of capturing flight control signals is first disabled, thereby stopping the target timer from capturing flight control signals using the initial protocol and blocking the initial protocol's flight control signals from entering the signal parsing process.

[0074] For example, a disable capture configuration value can be written to the control register of the target timer to disable the level transition detection of the corresponding external signal pin, thereby disabling the target timer's input capture function for flight control signals; alternatively, the target timer input capture interrupt enable bit can be disabled to disable the target timer's input capture function for flight control signals.

[0075] In some embodiments, disabling the target timer's input capture function for flight control signals includes:

[0076] Disable the target timer's input capture interrupt for flight control signals;

[0077] When the input capture interrupt is disabled, stop the target timer's input capture channel for flight control signals.

[0078] The input capture interrupt is used to trigger the timing parsing program for the flight control signals; the input capture channel is the signal path on the target timer hardware for receiving flight control signals and the rising and falling timestamps of the flight control signals.

[0079] In practical implementation, global interrupts or the input capture interrupt of the target timer can be disabled in the critical protection area of ​​the program to prevent the signal captured by the target timer from generating an interrupt request; after confirming that the input capture interrupt is completely disabled, the configuration register is used to shut down the input capture hardware channel corresponding to the target timer, thereby terminating the acquisition of the edge timing of flight control signals at the physical hardware level.

[0080] In this embodiment, by sequentially disabling the input capture interrupt and the input capture channel, the occurrence of abnormal interruptions and erroneous pulse data caused by the mixing of old and new flight control signals during the switching phase of the flight control signal protocol can be reduced. This prevents the generation of drive commands through misinterpretation, blocks the input of erroneous flight control signals, and ensures a more stable and secure process for switching from the initial protocol to the target protocol.

[0081] In some embodiments, after the step of disabling the target timer's input capture interrupt for flight control signals, the method includes:

[0082] Set the protocol status corresponding to the initial protocol to an invalid state;

[0083] The interrupt callback exits when the input capture interrupt is triggered and the corresponding interrupt callback is generated, and the protocol state corresponding to the initial protocol is invalid.

[0084] The invalid state indicates that the initial protocol is in a state that cannot be parsed and no longer receives or processes the corresponding signal instructions. For example, the initial protocol can be marked as invalid by modifying the protocol state flag corresponding to the initial protocol (e.g., the flag for the valid state is 1, and the flag for the invalid state is 0).

[0085] Interruption callback refers to the signal parsing subroutine that is automatically executed after an input capture interrupt is triggered, so that the captured flight control signal enters the signal parsing process.

[0086] In the specific implementation, even after disabling the target timer's input capture interrupt for flight control signals, factors such as potential jitter or glitches in the pins mapped to the input capture channel for flight control signals, and incomplete disabling of the input capture interrupt, may still result in the initial protocol's flight control protocol signal being captured by the target timer and generating an interrupt event. After the flight control signal is abnormally captured, generating an input capture interrupt and entering the interrupt callback, the interrupt callback is exited immediately upon identifying the protocol state corresponding to the initial protocol as invalid. This reduces the likelihood of abnormally captured flight control signals being parsed as throttle commands during the signal parsing process, thereby minimizing the possibility of the UAV entering an intermediate abnormal operating state in a semi-configured state machine.

[0087] In this embodiment, by setting the protocol state corresponding to the initial protocol to an invalid state as a fallback measure, even if the flight control signal with the initial protocol is abnormally captured after the input capture interrupt is turned off, the interrupt callback will exit due to the invalidity of the initial protocol. This prevents misjudgment caused by the mixing of old and new protocol parameters under the semi-configured state machine, and improves the fault tolerance and overall security of the protocol switching operation.

[0088] In some embodiments, prior to the step of disabling the target timer's input capture function for flight control signals, the method includes:

[0089] If the target protocol belongs to the preset valid protocol set and the target protocol is inconsistent with the initial protocol, the step of disabling the target timer's input capture function for flight control signals is executed.

[0090] The preset valid protocol set refers to the set of valid flight control signal protocols that the UAV supports switching, which may include multiple flight control signal protocol identifiers that have been tested and verified in advance.

[0091] In the specific implementation, if the target protocol is determined to belong to the preset valid protocol set, the validity check of the target protocol passes, the protocol value of the target protocol carried by the switching instruction is written to the runtime configuration area and a parameter validity process is performed to prevent illegal protocol values ​​from entering the input capture module; if the target protocol does not belong to the preset valid protocol set, an error response is returned for the switching instruction and the initial protocol of the current application remains unchanged, and the subsequent switching process is not entered.

[0092] Subsequently, it is verified whether the target protocol is consistent with the initial protocol. If the target protocol is inconsistent with the initial protocol, the flight control signal protocol can be switched. If the target protocol is consistent with the initial protocol, a confirmation message is returned for the switching command, the current application's initial protocol is maintained, and the subsequent switching process is not entered.

[0093] In this embodiment, the operation of disabling the input capture function is only performed when the target protocol is legal and valid and different from the initial protocol, thereby reducing the situation of meaningless operations when the protocol has not been changed or is invalid, and taking into account both the continuity of UAV flight operations and the security of protocol switching.

[0094] Step 102: With the input capture function disabled, deinitialize the target timer and clear the state variables associated with the initial protocol to unload the initial protocol.

[0095] Among them, the state variables associated with the initial protocol refer to the read and write parameters that are dynamically updated in real time along with the flight control signal protocol. They are used to record the signal acquisition and decoding process and can store the timing of timer capture and intermediate data of digital signal decoding.

[0096] In the specific implementation, once it is determined that the input capture function is disabled, the clock, interrupt, and capture registers of the target timer can be reset through the channel to complete the deinitialization. Subsequently, the rising edge time, falling edge time, period value, pulse width history buffer, DShot shift register, DShot bit counter, CRC and other status variables associated with the initial protocol are cleared, and the input validity flag is set to invalid to complete the initial protocol unloading operation.

[0097] Step 103: With the initial protocol already unloaded, reset the control state of the rotor motor to the initial safe state.

[0098] The initial safe state refers to the risk-free standby control state in which the rotor motor stops responding to the relevant instructions of the initial protocol and waits for the target protocol to be applied.

[0099] In practice, since there may be flight safety risks during the protocol switching moment, residual historical throttle data may cause rotor motors to malfunction, which may lead to loss of control and crash for multi-rotor drones. Therefore, in order to ensure safety during the brief interval of flight control signal protocol switching after the initial protocol has been unloaded, all rotor motors of the drone must be in the initial safe state to prevent residual historical throttle values ​​from causing the rotors to start unexpectedly.

[0100] For example, the ground station or flight control configuration tool sends a switching command to the ESC via a BLE (Bluetooth Low Energy) transparent serial port. The switching command carries an identifier of the target protocol, such as PWM, DShot300, or DShot600. The serial port receiving module first performs frame segmentation, command identification, and parameter extraction on the switching command.

[0101] Subsequently, in response to the switching command, the speed control output channels of each rotor motor can be shut down, unexecuted speed adjustment commands can be cleared, and all rotor motors can be kept stationary to reset the control state of the rotor motors to the initial safe state; alternatively, the drive output of the rotor motors can be cut off, the rotor motor speed can be cleared to zero, the rotor can be locked, and the buffered control commands of the initial protocol can be cleared to keep the motors at zero torque to reset the control state of the rotor motors to the initial safe state.

[0102] In some embodiments, resetting the control state of the rotor motor to the initial safe state includes:

[0103] Clear the throttle command associated with the rotor motor, stop the power output of the rotor motor, and reset the motor operating status variables associated with the rotor motor.

[0104] Among them, the motor operating state variables refer to readable and writable parameters that characterize the working conditions of the rotor motor, such as throttle value, PWM output enable flag, soft start flag, historical throttle records, etc.

[0105] In the specific implementation, the cache register associated with the rotor motor can be read, and all pending throttle control commands can be overwritten and cleared to remove the throttle commands associated with the rotor motor. The PWM waveform generation channel of the rotor motor driver chip is then turned off, preventing the driver chip from outputting modulation pulses and stopping the rotor motor's power output. Simultaneously, the motor operating status variables associated with the rotor motor are reset. For example, the soft-start process flag is restored to its initial state before startup, historical throttle sampling data recorded throughout the process is erased from the storage unit, statistical status variables such as throttle peak and average values ​​are reset, and all past throttle operation records are cleared. This prevents the use of residual throttle signals from the old protocol during the moment of flight control signal protocol switching.

[0106] In this embodiment, by synchronously clearing residual throttle commands, cutting off the power output of the rotor motor, and resetting the motor operating state variables, the risk of mis-driving caused by old data residue during flight control signal protocol switching can be eliminated, thus achieving a smooth and safe protocol switching.

[0107] Step 104: With the rotor motor in an initial safe state, configure the target timer according to the target protocol and restore the input capture function of the target timer.

[0108] In the specific implementation, after determining that the rotor motor is in the initial safe state, the register of the target timer is configured according to the frequency division coefficient and input capture edge mode specified by the target protocol. After the configuration is completed, the input capture channel enable bit is turned on, the input capture interrupt is enabled, the input capture function of the target timer for flight control signals is restored, the currently applied flight control signal protocol is marked as the target protocol, the flight control signal protocol switching is completed, and the switching completion time is recorded.

[0109] In some examples, taking the target protocol as PWM or DShot as an example, the input process of the flight control signal is as follows: Figure 2 As shown, the flight control board's signal source outputs flight control signals and sends them to the input acquisition channel. Switching commands are simultaneously input to the input acquisition channel to achieve protocol switching. After protocol switching is complete, the flight control signal is acquired by the input acquisition channel, triggering the input acquisition interrupt service routine. The input acquisition interrupt service routine, based on the target protocol of the current application, routes the signal to the corresponding PWM decoding or Dshot decoding module for signal parsing. The parsed throttle command is then sent to the rotor motor control module to complete motor speed control.

[0110] The DShot protocol uses a 16-bit frame format: the high 12 bits are the throttle value (range 48-2047, where 48 is the motor idle speed and 2047 is full throttle), and the low 4 bits are CRC checksums. The decoding process of the DShot protocol is completed in the timer capture interrupt: each capture edge interval is determined to be either logic 0 or logic 1 based on a threshold (DShot300: interval < 7 12MHz clock cycles is 0, > 3 is 1; DShot600 has the same threshold but a different frame interval), and 16 bits are accumulated to complete the decoding of one frame.

[0111] During PWM decoding, the prescaler PSC=47, the pulse width is measured to be 1000-2000μs, and it is decoded into a throttle command corresponding to 1000-2000μs.

[0112] In practical applications, if it is necessary to persist the target protocol after switching, the communication module can adopt a delayed merging and saving strategy. After the continuous SET commands are completed, they are written to the flash memory in a concentrated manner to solidify the target protocol type, timing parameters and other configurations into the flash memory. At the same time, it is necessary to avoid erasing and writing to the flash memory for each command, which may cause serial port packet loss or communication blockage.

[0113] In some embodiments, configuring a target timer according to a target protocol includes:

[0114] Obtain the timer configuration parameters corresponding to the target protocol, and configure the timer configuration parameters for the target timer;

[0115] If the target timer has been configured with timer configuration parameters, configure the input capture channel for the target protocol on the target timer.

[0116] The timer configuration parameters may include the prescaler (PSC), the auto-reload register (ARR), and the counting frequency.

[0117] In practice, the signal characteristics of different flight control signal protocols can be adapted by changing the configuration of the timer's PSC and ARR.

[0118] In some examples, for cases where the target protocol is PWM, a new timer clock can be calculated. The clock source is the APB bus clock at 48MHz, the prescaler PSC=47 (i.e., 48MHz / (47+1)=1MHz), the auto-reload value ARR=65535, and the count value between the rising and falling edges is the pulse width (microseconds), corresponding to the standard 1000-2000μs throttle command output by the flight controller board. The input capture filter is set to 4 clock cycles (anti-jitter). Write the above timer configuration into the target timer's register to complete the timer configuration, which is compatible with Pixhawk standard PWM output (50Hz~500Hz) and the Oneshot125 protocol.

[0119] Subsequently, the input capture channel is configured for rising and falling edge capture, and appropriate input filtering is enabled to suppress pulse width glitches, thus completing the input capture channel configuration for PWM.

[0120] In some examples, for the target protocol DShot, the prescaler is set to make the timer clock 12MHz (approximately 83 nanosecond resolution), and the logic value of each bit is determined by the edge time interval; the prescaler PSC=3 (i.e., 48MHz / (3+1)=12MHz), ARR=65535. One bit period of the DShot300 protocol is 3.33 microseconds (approximately 40 counts), and DShot600 is 1.67 microseconds (approximately 20 counts). The above timer configuration is written into the target timer register to complete the timer configuration and meet the standard DShot timing requirements of the flight controller board.

[0121] Subsequently, the input capture channel is configured for dual-edge capture. Instead of using digital filtering that swallows short pulses, it relies on inter-frame detection, 16-bit frame length, and CRC (Cyclic Redundancy Check) to improve anti-interference capability, thus completing the input capture channel configuration for DShot.

[0122] In practical applications, for cases where the target protocol is PWM, a three-stage median filter can be used to eliminate glitches in the flight control signal: the median value of three consecutive samples is taken to effectively filter out pulse noise caused by electromagnetic interference from motors and signal line coupling on multi-rotor UAVs. The filtered pulse width value is used for subsequent unlocking condition judgment and throttle mapping.

[0123] In this embodiment, the timer configuration parameters corresponding to the target protocol are first obtained and configured. Then, the target protocol is configured to specifically input the acquisition channel based on the completed timer configuration parameters. The acquisition sampling accuracy is matched with the timing of the target protocol based on the timer time base reference, which reduces the situation of pulse acquisition caused by timing parameter disorder and improves the resolution reliability of the flight control signal of the target protocol.

[0124] In some embodiments, after the step of restoring the input capture function of the configured target timer, the following is included:

[0125] The target flight control signal is captured by the target timer, and the validity of the target flight control signal is verified according to the target protocol.

[0126] If the validity of the target flight control signal is verified, the target flight control signal is decoded into a target throttle command, and the rotor motor is controlled according to the target throttle command.

[0127] Among them, the target flight control signal refers to the flight control signal captured after the flight control protocol switch is completed, which adopts the target protocol; the target throttle command refers to the control command output after being decoded by the target protocol, which is used to adjust the speed of the rotor motor.

[0128] In practical implementation, the target flight control signal using the target protocol needs to pass validity filtering before entering the rotor motor control loop. If no valid signal is received for an extended period after switching to the target protocol, or if the validity check of the target flight control signal fails, the target flight control signal is marked as invalid and zero throttle is output. Only when the target flight control signal passes the validity check is it decoded into a target throttle command and transmitted to the subsequent motor control loop.

[0129] For example, the rise time, fall time, period, shift register bit data and CRC value of the target flight control signal can be extracted and the validity can be verified by comparing them with the target protocol timing and verification rules. After the verification is passed, the bit data is parsed according to the target protocol bit shift rules, and the target throttle command with the corresponding amplitude is generated. The target throttle command is sent to the drive circuit to adjust the output speed of the quadcopter motor in real time.

[0130] In this embodiment, by verifying the validity of the target flight control signal according to the target protocol, interference signals with abnormal timing can be filtered out. Only the verified target flight control signal is decoded to generate the target throttle command to drive the rotor motor, reducing the occurrence of invalid clutter generating erroneous speed commands and improving the accuracy and stability of rotor motor control after protocol switching.

[0131] In some embodiments, validating the target flight control signal according to the target protocol includes:

[0132] When the target protocol is a pulse width modulation protocol, the pulse width and signal period of the target flight control signal are obtained, and it is verified whether the pulse width and signal period are within the corresponding preset valid value range.

[0133] When the target protocol is a digital electronic speed control (ESC) protocol, the target flight control signal is verified according to a preset cyclic redundancy check (CR) algorithm.

[0134] For example, when the target protocol is the PWM protocol, the period of the target flight control signal is calculated based on the continuous rising edges, the pulse width is calculated based on the interval between the rising and falling edges, three-point median filtering is performed on the continuous sampling, and the pulse width and signal period are checked to see if they are within the corresponding valid value range. If the pulse width and signal period are within the corresponding valid value range, the target flight control signal is verified. If the pulse width or signal period of the PWM exceeds the limit, the target flight control signal is marked as invalid and zero throttle is output.

[0135] When the target protocol is the Dshot protocol, the bit value is determined based on the high-level width, and CRC is calculated after accumulating 16 bits. Specifically, the preset cyclic redundancy check algorithm can be crc=data12XOR(data12>>4)XOR(data12>>8), taking the lower 4 bits and comparing them with the CRC field in the frame. If the preset cyclic redundancy check algorithm passes the check, the 11-bit throttle value of the target flight control signal is extracted; if the throttle value is 0 or located in the special command range of 1-47, it is treated as zero throttle, and 48-2047 is linearly mapped to the standardized command range of 0-1000 for use by subsequent motor control loops; if the preset cyclic redundancy check algorithm fails the check, the target flight control signal is marked as invalid and zero throttle is output.

[0136] In this embodiment, corresponding verification rules are matched for the pulse width modulation protocol and the digital electronic speed control protocol respectively. The pulse width modulation protocol filters abnormal pulses by verifying the pulse width and signal period interval. The digital electronic speed control protocol relies on the cyclic redundancy check algorithm to identify bit transmission errors. It can accurately intercept various distorted target flight control signals, avoid parsing erroneous target throttle commands that interfere with the rotor motor operation, and improve the adaptability of signal verification under different target protocols and the overall control safety of the aircraft.

[0137] In some embodiments, the execution steps of disabling the target timer's input capture function for flight control signals, unloading the initial protocol, resetting the rotor motor's control state to the initial safe state, configuring the target timer according to the target protocol, and restoring the target timer's input capture function can be encapsulated into an atomic operation sequence. The atomic operation sequence includes multiple atomic operations executed sequentially. Each atomic operation is either not executed or all are executed, with no intermediate execution states, further improving the robustness of flight control signal protocol switching.

[0138] For example, the atomic operation sequence may include the following atomic operations executed in sequence: (1) disable or mask the input capture interrupt of the target timer and temporarily mark the current protocol state as invalid to stop the initial protocol from continuing to enter the decoding state machine; (2) stop and deinitialize the current timer capture channel, clear the interrupt flag and all intermediate state variables (such as edge counter, bit buffer, historical pulse width value, etc.); (3) reset the motor control state (throttle command cleared, motor output stopped, soft start flag reset) to the initial safe state to ensure that the rotor will not rotate unexpectedly at the moment of switching; (4) recalculate and set the PSC, ARR values ​​and counting frequency according to the target protocol; (5) reconfigure the edge detection polarity of the target timer for the target protocol (new protocol); (6) re-enable the input capture interrupt of the target timer.

[0139] The execution timing of atomic operation sequences is as follows: Figure 3As shown, at time T0, a switching command to the target protocol is received. From time T1 to time T6, the above atomic operations (1) to (6) are executed sequentially. The time interval from time T3 to time T6 is the interval in which the rotor motor is safely stopped. The zero throttle command is used to safely switch the target protocol.

[0140] The process of switching from the old protocol (initial protocol) to the new protocol (target protocol) via an atomic operation sequence takes only about 1ms in total. This adapts to most scenarios that require switching flight control protocols and supports not only ground debugging but also dynamic switching during the flight of the UAV.

[0141] To facilitate understanding by those skilled in the art, in some embodiments, the target protocol to be switched is PWM protocol or Dshot protocol as an example, such as... Figure 4 As shown, an exemplary workflow diagram for switching flight control signal protocols is provided.

[0142] In this embodiment, the TIM3 timer of the ESC microcontroller of the multi-rotor UAV is designated as the target timer, and the flight control signal input is multiplexed to TIM3_CH2 using the PA5 pin; in PWM mode, CH2 captures the rising edge and CH1 indirectly captures the falling edge, and CH2 is reserved for double-edge capture in DShot mode.

[0143] Timer configuration in PWM mode: Clock source is APB bus clock 48MHz, prescaler PSC=47 (i.e., 48MHz / (47+1)=1MHz), auto-reload value ARR=65535, input capture filter is currently set to 12. The current firmware has an effective period range of approximately 40-500Hz and an effective pulse width range of approximately 700-2300μs. Oneshot125 is not an optional input protocol in the current release configuration.

[0144] The timer configuration in DShot mode is reserved: the prescaler is calculated based on a counting frequency of approximately 12MHz, with an ARR of 65535. One bit period of the DShot300 protocol is 3.33 microseconds (approximately 40 counts), while that of DShot600 is 1.67 microseconds (approximately 20 counts). This branch is reserved in the code for historical compatibility and subsequent verification; the current release of the UART parser and app does not enable DShot selection.

[0145] The protocol switching operation is completed under interrupt-disabled protection. First, the PRIMASK is saved and global interrupts are disabled, setting pwm_last_protocol to 0xFF to disable the sentinel. Then, the TIM3 capture channel is stopped, TIM3 is deinitialized, PSC / ARR is recalculated according to the target protocol, and channel polarity is configured. Finally, the capture interrupt is started, the protocol is recorded, and the interrupt is restored according to the original PRIMASK. The Flash saving after the complete SET command is executed separately by the serial port debouncing saving task and is not within the critical window of this capture reconfiguration.

[0146] The motor drive output uses timers TIM16 and TIM17 to generate complementary PWM signals for phases A and B, respectively. PA6 / PA7 are high-side inputs, and PB6 / PB7 are low-side complementary inputs. These signals drive the four N-channel MOSFETs of the H-bridge via a U3216C half-bridge gate driver. Current sampling uses an INA181A1 operational amplifier (20x gain) with a 0.5mΩ sampling resistor, sampled through ADC channel 1. In the current firmware, TIM1 primarily serves as the ADC synchronous sampling trigger source, phase-locked with TIM16 / TIM17.

[0147] The workflow for switching flight control signal protocols in this embodiment specifically includes:

[0148] The ground station or flight control configuration tool sends protocol setting commands to the ESC via the BLE transparent serial port. In the currently released firmware, command parameters only accept PWM or 0; the DShot300 / DShot600 name and value are not currently writable targets. The serial port receiving module first completes frame segmentation, command identification, and parameter extraction.

[0149] Perform a validity check on the target protocol identifier. Returns a valid response only if the target is PWM / 0; otherwise, returns an error response and maintains the original protocol. Even if a DShot enumeration value exists in the historical Flash memory, the DShot enumeration value will be cleared back to PWM to prevent unenabled protocols from entering the input capture module.

[0150] Determine if the target protocol is consistent with the current protocol. If consistent, there is no need to reconfigure the timer; only parameter cleaning and acknowledgment are performed, and the current capture state is maintained. If inconsistent, enter the atomic operation sequence (safe switching sequence). First, enter the critical section, disable or disable the TIM3 capture interrupt, and temporarily mark the current protocol state as invalid, so that the capture callback within the reconfiguration window can only clear the flag and exit, without entering either the PWM / DShot decoding state machine.

[0151] Stop the TIM3 input capture channel and deinitialize the timer, clearing intermediate state variables such as rising edge time, falling edge time, period value, pulse width history buffer, DShot shift register, DShot bit counter, CRC / frame gap judgment, etc., to ensure that subsequent new protocols are re-established from an empty state.

[0152] The system forces the throttle command to zero during operation, stops the motor PWM output, resets the control states related to operation, soft start, and historical throttle settings, and invalidates the input validity flag. Therefore, before timer reconfiguration and confirmation of the first frame of the new protocol, the downstream motor control loop can only see zero throttle / invalid inputs, avoiding the use of residual throttle from the old protocol.

[0153] The new timer clock is calculated based on the target protocol. The current release path targets PWM, using a counting frequency of approximately 1 MHz to achieve a 1 microsecond pulse width resolution; the reserved DShot extension branch uses a counting frequency of approximately 12 MHz to achieve sub-microsecond edge resolution. PSC, ARR, counting mode, and auto-reload parameters are then written.

[0154] The capture channel is configured according to the target protocol. The current PWM path is configured with CH2 rising edge capture and CH1 indirect falling edge capture, and uses the current filter level 12 to suppress pulse width glitches; the reserved DShot extended path is configured with CH2 double edge capture, input filter is 0, and anti-interference capability is improved by relying on inter-frame detection, 16-bit frame length and CRC check.

[0155] A new capture interrupt is initiated, the current protocol is marked as the target protocol, the switchover completion time is recorded, and the interrupt is resumed. The protocol switchover is now complete, but the input to the target protocol still needs to pass validity filtering before entering the motor control loop.

[0156] When the target protocol is the PWM protocol, the input processing module calculates the period based on the consecutive rising edges, calculates the pulse width based on the interval between the rising and falling edges, performs three-point median filtering on the continuous sampling, and verifies whether the pulse width and period are within the valid range.

[0157] Under the target protocol of the reserved DShot extended mode (i.e., possibly DShot300 or DShot600), the bit value is determined based on the high level width, and after accumulating 16 bits, the CRC is calculated. After passing the CRC, the 11-bit throttle value is extracted and mapped to a unified throttle command of 0~1000.

[0158] If no valid signal is received for an extended period after protocol processing, the PWM pulse width or signal period exceeds the limit, or an abnormal frame gap or CRC check failure occurs in the reserved DShot extension path, the input module will mark the signal as invalid and output zero throttle; only when the input passes the validity check consecutively will the unified throttle command be handed over to the subsequent motor control loop.

[0159] In this embodiment, pilots or debugging engineers can remotely switch between PWM / DShot300 / DShot600 protocols via BLE Bluetooth without disassembling the drone arms or powering off and restarting the ESC, significantly improving protocol switching efficiency. The protocol switching process is completed in approximately 1 millisecond, making it virtually imperceptible to ground debugging procedures. During the switching process, the rotor motors stop safely, preventing accidental rotation and ensuring personnel safety. The three flight control protocols share the same hardware acquisition channel, without increasing the PCB area or hardware cost of the ESC. The CRC check of the DShot protocol ensures the reliability of the digital link from the flight controller to the ESC, eliminating the calibration requirements of traditional PWM signals and simplifying the pre-flight calibration process for multi-rotor drones.

[0160] The embodiments of this application have the following beneficial effects:

[0161] By disabling input capture, the transmission path of the initial protocol's flight control signals (i.e., the old signals) is blocked, and the old signals are no longer received or decoded. Based on this, the initial protocol is unloaded, allowing the target protocol to be re-established from an empty state. Subsequently, the rotor motor control state is reset to the initial safe state, ensuring the rotor motor remains safely stopped during the protocol switchover. Then, the target timer is reconfigured for the target protocol, completing the safe switchover. The entire switchover process is executed sequentially according to a safe timing sequence, eliminating the need for disassembling and reconfiguring the ESC, significantly improving the efficiency of flight control signal protocol switching. Switching commands can be remotely issued via wireless channel to dynamically switch flight control signal protocols, adapting to different scenario switching needs and effectively improving the flexibility of flight control signal protocol switching. Furthermore, different flight control signals can be captured by reusing the target timer, reducing the hardware cost of the UAV.

[0162] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0163] Based on the same inventive concept, this application also provides a flight control signal protocol processing apparatus for implementing the flight control signal protocol processing method described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations of one or more flight control signal protocol processing apparatus embodiments provided below can be found in the limitations of the flight control signal protocol processing method described above, and will not be repeated here.

[0164] In one exemplary embodiment, such as Figure 5 As shown, a flight control signal protocol processing device is provided, comprising:

[0165] The disabled module 501 is used to disable the target timer's input capture function for flight control signals in response to a switching command that switches the flight control signal protocol from the initial protocol to the target protocol.

[0166] The unloading module 502 is used to deinitialize the target timer and clear the state variables associated with the initial protocol when the input capture function is disabled, so as to unload the initial protocol.

[0167] The reset module 503 is used to reset the control state of the rotor motor to the initial safe state after the initial protocol has been unloaded.

[0168] The recovery module 504 is used to configure the target timer according to the target protocol and restore the input capture function of the target timer when the rotor motor is in the initial safe state.

[0169] In some embodiments, the disabling module 501 is also used for:

[0170] Disable the target timer's input capture interrupt for flight control signals;

[0171] When the input capture interrupt is disabled, stop the target timer's input capture channel for flight control signals.

[0172] In some embodiments, the disabling module 501 is also used for:

[0173] Set the protocol status corresponding to the initial protocol to an invalid state;

[0174] The interrupt callback exits when the input capture interrupt is triggered and the corresponding interrupt callback is generated, and the protocol state corresponding to the initial protocol is invalid.

[0175] In some embodiments, the recovery module 504 is further configured to:

[0176] Obtain the timer configuration parameters corresponding to the target protocol, and configure the timer configuration parameters for the target timer;

[0177] If the target timer has been configured with timer configuration parameters, configure the input capture channel for the target protocol on the target timer.

[0178] In some embodiments, the reset module 503 is further configured to:

[0179] Clear the throttle command associated with the rotor motor, stop the power output of the rotor motor, and reset the motor operating status variables associated with the rotor motor.

[0180] In some embodiments, the device is also used for:

[0181] The target flight control signal is captured by the target timer, and the validity of the target flight control signal is verified according to the target protocol.

[0182] If the validity of the target flight control signal is verified, the target flight control signal is decoded into a target throttle command, and the rotor motor is controlled according to the target throttle command.

[0183] In some embodiments, the device is also used for:

[0184] When the target protocol is a pulse width modulation protocol, the pulse width and signal period of the target flight control signal are obtained, and it is verified whether the pulse width and signal period are within the corresponding preset valid value range.

[0185] When the target protocol is a digital electronic speed control (ESC) protocol, the target flight control signal is verified according to a preset cyclic redundancy check (CR) algorithm.

[0186] In some embodiments, the device is also used for:

[0187] If the target protocol belongs to the preset valid protocol set and the target protocol is inconsistent with the initial protocol, the step of disabling the target timer's input capture function for flight control signals is executed.

[0188] Each module in the aforementioned flight control signal protocol processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0189] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 6As shown, this computer device includes a processor, memory, input / output (I / O) interfaces, and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores relevant data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When executed by the processor, the computer program implements a method for processing a flight control signal protocol.

[0190] In one exemplary embodiment, a drone is provided, the internal structure of which can be shown in the diagram below. Figure 7 As shown, the drone includes a processor, memory, input / output interfaces, a communication interface, and input devices. The processor, memory, and input / output interfaces are connected via a system bus, while the communication interface, display unit, and input devices are also connected to the system bus via the input / output interfaces. The drone's processor provides computing and control capabilities. The drone's memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The drone's input / output interfaces are used for exchanging information between the processor and external devices. The drone's communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When the computer program is executed by the processor, it implements a method for processing a flight control signal protocol.

[0191] Those skilled in the art will understand that Figure 6 and 7 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0192] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the processing method of the flight control signal protocol as described above.

[0193] In one exemplary embodiment, a drone is provided, including a memory and a processor, the memory storing a computer program, the processor executing the computer program to implement the processing method of the flight control signal protocol as described above.

[0194] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the processing method of the flight control signal protocol as described above.

[0195] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the processing method of the flight control signal protocol as described above.

[0196] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0197] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0198] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0199] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for processing flight control signal protocols, characterized in that, Applied to a drone, the drone including a target timer and a rotor motor, the target timer being used to capture flight control signals of different flight control signal protocols, the flight control signals being used to control the rotor motor, the method comprising: In response to a switching command to switch the flight control signal protocol from the initial protocol to the target protocol, the target timer's input capture function for the flight control signal is disabled; If the input capture function is disabled, deinitialize the target timer and clear the state variables associated with the initial protocol to unload the initial protocol; If the initial protocol has been unloaded, reset the control state of the rotor motor to the initial safe state; When the rotor motor is in the initial safe state, the target timer is configured according to the target protocol, and the input capture function of the target timer is restored.

2. The method according to claim 1, characterized in that, Disabling the target timer's input capture function for the flight control signal includes: Disable the target timer's input capture interrupt for the flight control signal; When the input capture interrupt is in the off state, stop the target timer's input capture channel for the flight control signal.

3. The method according to claim 2, characterized in that, Following the step of disabling the target timer's input capture interruption of the flight control signal, the following is included: Set the protocol state corresponding to the initial protocol to an invalid state; If the input capture interrupt is triggered and an interrupt callback corresponding to the input capture interrupt is generated, and the protocol state corresponding to the initial protocol is the invalid state, then exit the interrupt callback.

4. The method according to claim 1, characterized in that, The step of configuring the target timer according to the target protocol includes: Obtain the timer configuration parameters corresponding to the target protocol, and configure the timer configuration parameters for the target timer; If the target timer has been configured with the timer configuration parameters, configure the target timer with an input capture channel for the target protocol.

5. The method according to claim 1, characterized in that, The step of resetting the control state of the rotor motor to the initial safe state includes: Clear the throttle command associated with the rotor motor, stop the power output of the rotor motor, and reset the motor operating status variables associated with the rotor motor.

6. The method according to any one of claims 1 to 5, characterized in that, Following the step of restoring the input capture function of the target timer after configuration, the following is included: The target flight control signal is captured by the target timer, and the validity of the target flight control signal is verified according to the target protocol. If the validity verification of the target flight control signal passes, the target flight control signal is decoded into a target throttle command, and the rotor motor is controlled according to the target throttle command.

7. The method according to claim 6, characterized in that, The step of verifying the validity of the target flight control signal according to the target protocol includes: When the target protocol is a pulse width modulation protocol, the pulse width and signal period of the target flight control signal are obtained, and it is verified whether the pulse width and the signal period are within the corresponding preset valid value range. When the target protocol is a digital electronic speed control (ESC) protocol, the target flight control signal is verified according to a preset cyclic redundancy check (CRC) algorithm.

8. The method according to any one of claims 1 to 5, characterized in that, Prior to the step of disabling the target timer's input capture function for the flight control signal, the following steps are included: If the target protocol belongs to a preset set of valid protocols and the target protocol is inconsistent with the initial protocol, the step of disabling the target timer's input capture function for the flight control signal is executed.

9. A processing device for flight control signal protocols, characterized in that, Applied to a drone, the drone includes a target timer and a rotor motor, the target timer is used to capture flight control signals of different flight control signal protocols, the flight control signals are used to control the rotor motor, the device includes: The module is disabled in response to a switching command that switches the flight control signal protocol from the initial protocol to the target protocol, thereby disabling the target timer's input capture function for the flight control signal. The unloading module is used to deinitialize the target timer and clear the state variables associated with the initial protocol when the input capture function is disabled, so as to unload the initial protocol. The reset module is used to reset the control state of the rotor motor to the initial safe state when the initial protocol has been unloaded. A recovery module is used to configure the target timer according to the target protocol and restore the input capture function of the target timer when the rotor motor is in the initial safe state.

10. A drone, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 8.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

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