A low-cost watchdog clock temperature drift suppression circuit and implementation method

CN122924490APending Publication Date: 2026-10-16HUNAN UNIV OF SCI & TECH
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Patent Information

Application Number
CN202510046181.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-13
Publication Date
2026-10-16

AI Technical Summary

Technical Problem

工业电子产品运行的环境比较恶劣,适用温度范围在-40℃到125℃,大范围温度变化会造成时钟源频率漂移大,甚至会使振荡器超出调谐范围,导致电子系统工作异常

Benefits of technology

本发明提供一种低成本看门狗时钟的温漂抑制电路及实现方法,采用长栅型MOS电流镜电路和PTAT温漂抑制电流电路,长栅型MOS电流镜电路用于给环形振荡器提供稳定的工作电源和对环形振荡器进行频率调谐;PTAT温漂抑制电流电路用于生成PTAT温漂抑制电流,并将生成的PTAT温漂抑制电流与长栅型MOS电流镜电路提供的稳定的工作电源进行合成,一起调节环形振荡器中反相器的工作电流。本发明提供一种低成本看门狗时钟的温漂抑制电路及实现方法,致力于设计一个可集成于MCU内的独立“看门狗”时钟产生器的温漂抑制电路。该低成本看门狗时钟的温漂抑制电路由2部分组成:第一部分是长栅型MOS管构建的镜像源电路,为电流饥渴型环形振荡器提供稳定的工作电源;第二部分是宽温度范围的抑制电流电路,生成精确稳定的与绝对温度成正比(proportional to absolutetemperature,PTAT)的抑制电流。在7级反相器构成电流饥渴型环形振荡器中,在-40℃至125℃温度范围内,本发明的温漂抑制环形振荡器的频率变化从-0.88%到+0.297%。

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Abstract

The application discloses a low-cost watchdog clock temperature drift suppression circuit and an implementation method, adopts a long-gate MOS current mirror circuit and a PTAT temperature drift suppression current circuit, the long-gate MOS current mirror circuit is used for providing a stable working power supply for a ring oscillator and performing frequency tuning on the ring oscillator; the PTAT temperature drift suppression current circuit is used for generating a PTAT temperature drift suppression current, and synthesizing the generated PTAT temperature drift suppression current with the stable working power supply provided by the long-gate MOS current mirror circuit to adjust the working current of an inverter in the ring oscillator together. The circuit has low manufacturing cost and good temperature drift suppression effect.
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Description

Technical Field

[0001] This invention relates to the field of electronic product technology, and in particular discloses a low-cost watchdog clock temperature drift suppression circuit and its implementation method. Background Technology

[0002] An on-chip independent watchdog timer is a crucial component that ensures the automatic recovery of the MCU main controller in industrial electronic products when program errors or memory overflows occur. However, for the watchdog timer to accurately achieve its intended triggering and reset functions, a stable and reliable clock source is required. Industrial electronic products operate in harsh environments, with an operating temperature range of -40℃ to 125℃. Wide temperature variations can cause significant clock frequency drift, even causing the oscillator to exceed its tuning range, leading to malfunctions in the electronic system. To ensure the normal operation of industrial electronic systems, many products often require an external independent watchdog clock for the MCU, supplemented by temperature compensation circuitry, which significantly increases power consumption and cost.

[0003] Since the on-chip independent "watchdog" clock typically uses a low-cost, all-MOSFET current-starved ring oscillator, the operating point of the inverter in the oscillator is easily affected by factors such as environmental conditions, power supply voltage, process variations, and noise. In particular, the transconductance (gm) of the MOSFET is severely affected by temperature. To suppress the influence of temperature changes on the oscillation frequency and ensure that the oscillator generates a stable clock in an environment of -40℃ to 125℃, [further measures are needed].

[0004] Therefore, the aforementioned defects in existing watchdog circuits are technical problems that urgently need to be solved. Summary of the Invention

[0005] This invention provides a low-cost watchdog clock temperature drift suppression circuit and implementation method, aiming to solve at least one defect existing in the above-mentioned existing watchdog circuits.

[0006] One aspect of the present invention relates to a low-cost watchdog clock temperature drift suppression circuit, comprising a long-gate MOS current mirror circuit and a PTAT temperature drift suppression current circuit. The long-gate MOS current mirror circuit is used to provide a stable operating power supply to the ring oscillator and to tune the frequency of the ring oscillator. The PTAT temperature drift suppression current circuit is connected to the long-gate MOS current mirror circuit and is used to generate a PTAT temperature drift suppression current. The generated PTAT temperature drift suppression current is combined with the stable operating power supply provided by the long-gate MOS current mirror circuit to adjust the operating current of the inverter in the ring oscillator.

[0007] Furthermore, the long-gate MOSFET current mirror circuit includes a PTAT (proportional to absolute temperature) temperature drift suppression current circuit, a first group of long-channel MOSFET current mirror circuits, a second group of long-channel MOSFET current mirror circuits, a third group of long-channel MOSFET current mirror circuits, a fourth group of long-channel MOSFET current mirror circuits, a frequency control circuit, and a tuning circuit. The first group of long-channel MOSFET current mirror circuits, the second group of long-channel MOSFET current mirror circuits, the third group of long-channel MOSFET current mirror circuits, and the fourth group of long-channel MOSFET current mirror circuits are connected in series and then connected to the PTAT temperature drift suppression current circuit. The second group of long-channel MOSFET current mirror circuits is connected to the frequency control circuit and the tuning circuit, respectively.

[0008] Furthermore, the first group of long-channel MOSFET current mirror circuits includes a first MOSFET and a second MOSFET; the second group of long-channel MOSFET current mirror circuits includes a third MOSFET and a fourth MOSFET; the frequency control circuit includes a fifth MOSFET; the tuning circuit includes a sixth MOSFET; the third group of long-channel MOSFET current mirror circuits includes a seventh MOSFET and an eighth MOSFET; and the fourth group of long-channel MOSFET current mirror circuits includes a ninth MOSFET and a tenth MOSFET. The sources of the first MOSFET, the second MOSFET, the sixth MOSFET, the seventh MOSFET, and the eighth MOSFET are respectively connected to the operating voltage; the gate of the first MOSFET is connected to the gate of the second MOSFET and then to the drain of the first MOSFET; the drain of the second MOSFET... The drain of the fifth MOSFET is connected to the drain of the third MOSFET. The gates of the fifth MOSFET, the third MOSFET, and the fourth MOSFET are connected to the drain of the third MOSFET. The drain of the third MOSFET is connected to the drains of the sixth and eighth MOSFETs. The gates of the seventh and eighth MOSFETs are connected to the drain of the seventh MOSFET. The drain of the seventh MOSFET is connected to the drain of the tenth MOSFET. The gates of the ninth and tenth MOSFETs are connected to the drain of the ninth MOSFET. The drain of the ninth MOSFET is connected to the PTAT temperature drift suppression current circuit. The sources of the third, fourth, fifth, ninth, and tenth MOSFETs are grounded.

[0009] Furthermore, the PTAT temperature drift suppression current circuit includes a startup circuit, a PTAT reference voltage circuit, a common-source cascode current mirror circuit, and a PTAT voltage basic unit. The PTAT reference voltage circuit is connected to the startup circuit, the common-source cascode current mirror circuit, and the PTAT voltage basic unit, respectively.

[0010] Furthermore, the startup circuit includes an eleventh MOSFET, a twelfth MOSFET, and a thirteenth MOSFET. The source of the eleventh MOSFET is connected to the operating voltage. The gate of the eleventh MOSFET is connected to the gate of the twelfth MOSFET and then to the drain of the eleventh MOSFET. The drain of the eleventh MOSFET is connected to the drain of the thirteenth MOSFET. The sources of the thirteenth MOSFET and the twelfth MOSFET are grounded.

[0011] Furthermore, the PTAT reference voltage circuit includes a fourteenth MOSFET, a fifteenth MOSFET, a sixteenth MOSFET, and a seventeenth MOSFET. The gate of the fourteenth MOSFET is connected to the gate of the fifteenth MOSFET and then connected to the drain of the fourteenth MOSFET. The drain of the fourteenth MOSFET is connected to the drain of the sixteenth MOSFET, and the drain of the fifteenth MOSFET is connected to the drain of the seventeenth MOSFET. The sources of the sixteenth MOSFET and the seventeenth MOSFET are grounded.

[0012] Furthermore, the common-source common-gate current mirror circuit includes an eighteenth MOSFET, a nineteenth MOSFET, a twentieth MOSFET, and a twenty-first MOSFET. The sources of the eighteenth MOSFET and the nineteenth MOSFET are connected to the operating voltage. The gates of the eighteenth MOSFET and the nineteenth MOSFET are connected together and then connected to the drain of the nineteenth MOSFET. The drain of the eighteenth MOSFET is connected to the drain of the twentieth MOSFET, the drain of the nineteenth MOSFET is connected to the drain of the twenty-first MOSFET, and the gates of the twentieth MOSFET and the twenty-first MOSFET are connected together and then connected to the drain of the twenty-first MOSFET.

[0013] Furthermore, the PTAT voltage basic unit includes a 22nd MOSFET, a 23rd MOSFET, a 24th MOSFET, a 25th MOSFET, a 26th MOSFET, a 27th MOSFET, a 28th MOSFET, a 29th MOSFET, a 30th MOSFET, and a 31st MOSFET. The source of the 22nd MOSFET is connected to the drain of the 23rd MOSFET. The gate of the 22nd MOSFET is connected to the gate of the 23rd MOSFET and then to the drain of the 22nd MOSFET. The source of the 23rd MOSFET is connected to the source of the 24th MOSFET and the drain of the 25th MOSFET. The gate of the 24th MOSFET is connected to the gate of the 25th MOSFET and then to the 24th MOSFET. The drains of the ET transistors are connected together; the source of the 25th MOSFET is connected to the source of the 26th MOSFET and the drain of the 27th MOSFET, and the gate of the 26th MOSFET and the gate of the 27th MOSFET are connected together and then connected to the drain of the 26th MOSFET; the source of the 27th MOSFET is connected to the source of the 28th MOSFET and the drain of the 29th MOSFET, and the gate of the 28th MOSFET and the gate of the 29th MOSFET are connected together and then connected to the drain of the 28th MOSFET; the source of the 29th MOSFET is connected to the source of the 30th MOSFET and the drain of the 31st MOSFET, and the gate of the 30th MOSFET and the gate of the 31st MOSFET are connected together and then connected to the drain of the 30th MOSFET.

[0014] Another aspect of the present invention relates to a method for implementing a low-cost watchdog clock temperature drift suppression circuit, applied to the aforementioned low-cost watchdog clock temperature drift suppression circuit. The method for implementing the low-cost watchdog clock temperature drift suppression circuit includes the following steps: The long-gate MOS current mirror circuit provides a stable operating power supply for the ring oscillator and performs frequency tuning for the ring oscillator. The PTAT temperature drift suppression current circuit generates the PTAT temperature drift suppression current, and combines the generated PTAT temperature drift suppression current with the stable operating power supply provided by the long-gate MOS current mirror circuit to regulate the operating current of the inverter in the ring oscillator.

[0015] Furthermore, in the steps of providing a stable operating power supply to the ring oscillator and tuning its frequency using the long-gate MOSFET current mirror circuit, the first and second sets of long-channel MOSFET current mirror circuits jointly provide power to the ring oscillator, and the output current is expressed as:

[0016] in, For output current, The reference current is given, where W is the channel width and L is the channel length. This is the fourth MOSFET. This is the third MOSFET.

[0017] The beneficial effects achieved by this invention are as follows: This invention provides a low-cost watchdog clock temperature drift suppression circuit and its implementation method. It employs a long-gate MOS current mirror circuit and a PTAT temperature drift suppression current circuit. The long-gate MOS current mirror circuit provides a stable operating power supply to the ring oscillator and performs frequency tuning. The PTAT temperature drift suppression current circuit generates a PTAT temperature drift suppression current and combines this generated PTAT temperature drift suppression current with the stable operating power supply provided by the long-gate MOS current mirror circuit to regulate the operating current of the inverter in the ring oscillator. This invention aims to design a temperature drift suppression circuit for an independent "watchdog" clock generator that can be integrated into an MCU. The low-cost watchdog clock temperature drift suppression circuit consists of two parts: the first part is a mirror source circuit constructed with a long-gate MOS transistor, providing a stable operating power supply to the current-starved ring oscillator; the second part is a wide-temperature-range suppression current circuit that generates a precise and stable suppression current proportional to absolute temperature (PTAT). In a current-starved ring oscillator composed of 7 inverters, the frequency change of the temperature drift suppression ring oscillator of the present invention ranges from -0.88% to +0.297% within a temperature range of -40°C to 125°C. Attached Figure Description

[0018] Figure 1 This is a functional block diagram of an embodiment of a low-cost watchdog clock temperature drift suppression circuit according to the present invention; Figure 2 This is a schematic diagram of the overall oscillator circuit framework of the present invention; Figure 3 This is a circuit diagram of the PTAT current suppression circuit in this invention; Figure 4This is a schematic diagram illustrating the relationship between the PTAT temperature drift suppression current and temperature in this invention. Figure 5 This is a schematic diagram illustrating the frequency stabilization effect of the ring oscillator of the present invention.

[0019] Explanation of icon numbers: 10. Long-gate MOSFET current mirror circuit; 20. PTAT temperature drift suppression current circuit; 11. First group of long-channel MOSFET current mirror circuits; 12. Second group of long-channel MOSFET current mirror circuits; 13. Third group of long-channel MOSFET current mirror circuits; 14. Fourth group of long-channel MOSFET current mirror circuits; 15. Frequency control circuit; 16. Tuning circuit; 21. Start-up circuit; 22. PTAT reference voltage circuit; 23. Common-source cascode current mirror circuit; 24. PTAT voltage basic unit. Detailed Implementation

[0020] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0021] like Figure 1 and Figure 2 As shown, the first embodiment of the present invention proposes a low-cost watchdog clock temperature drift suppression circuit, including a long-gate MOS current mirror circuit 10 and a PTAT temperature drift suppression current circuit 20. The long-gate MOS current mirror circuit 10 is used to provide a stable operating power supply to the ring oscillator and to tune the frequency of the ring oscillator. The PTAT temperature drift suppression current circuit 20 is connected to the long-gate MOS current mirror circuit 10 and is used to generate a PTAT temperature drift suppression current. The generated PTAT temperature drift suppression current is combined with the stable operating power supply provided by the long-gate MOS current mirror circuit 10 to adjust the operating current of the inverter in the ring oscillator.

[0022] Further, please see Figures 1 to 3This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The long-gate MOSFET current mirror circuit 10 includes a PTAT temperature drift suppression current circuit 20, a first group of long-channel MOSFET current mirror circuits 11 (cm1), a second group of long-channel MOSFET current mirror circuits 12 (cm2), a third group of long-channel MOSFET current mirror circuits 13 (cm3), a fourth group of long-channel MOSFET current mirror circuits 14 (cm4), a frequency control circuit 15, and a tuning circuit 16. The first group of long-channel MOSFET current mirror circuits 11, the second group of long-channel MOSFET current mirror circuits 12, the third group of long-channel MOSFET current mirror circuits 13, and the fourth group of long-channel MOSFET current mirror circuits 14 are connected in series and then connected to the PTAT temperature drift suppression current circuit 20. The second group of long-channel MOSFET current mirror circuits 12 is connected to the frequency control circuit 15 and the tuning circuit 16 respectively. The first group of long-channel MOSFET current mirror circuits 11 (cm1) and the second group of long-channel MOSFET current mirror circuits 12 (cm2) together provide power to the ring oscillator. The third group of long-channel MOSFET current mirror circuits 13 (cm3) and the fourth group of long-channel MOSFET current mirror circuits 14 (cm4) are I PTAT Gain amplifier circuit to suppress current. Frequency control circuit 15 reduces the effect of channel length modulation and improves the accuracy of the current mirror, used to suppress frequency drift of the ring oscillator. Tuning circuit 16 is used to adjust the tuning range of the ring oscillator.

[0023] For details, see Figures 1 to 3This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The first group of long-channel MOSFET current mirror circuits 11 includes a first MOSFET m1 and a second MOSFET m2; the second group of long-channel MOSFET current mirror circuits 12 includes a third MOSFET m3 and a fourth MOSFET m4; the frequency control circuit 15 includes a fifth MOSFET m5; the tuning circuit 16 includes a sixth MOSFET m6; the third group of long-channel MOSFET current mirror circuits 13 includes a seventh MOSFET m7 and an eighth MOSFET m8; and the fourth group of long-channel MOSFET current mirror circuits 14 includes a ninth MOSFET m9 and a tenth MOSFET m10. The sources of the first, second, sixth, seventh, and eighth MOSFETs are respectively connected to the operating voltage. The gate of the first MOSFET is connected to the gate of the second MOSFET and then connected to the first... The drains of the MOSFETs are connected together; the drain of the second MOSFET is connected to the drain of the fifth MOSFET; the gates of the fifth MOSFET, the third MOSFET, and the fourth MOSFET are connected together and then connected to the drain of the third MOSFET; the drain of the third MOSFET is connected to the drains of the sixth MOSFET and the eighth MOSFET respectively; the gates of the seventh MOSFET and the eighth MOSFET are connected together and then connected to the drain of the seventh MOSFET; the drain of the seventh MOSFET is connected to the drain of the tenth MOSFET; the gates of the ninth MOSFET and the tenth MOSFET are connected together and then connected to the drain of the ninth MOSFET; the drain of the ninth MOSFET is connected to the PTAT temperature drift suppression current circuit 20; the sources of the third MOSFET, the fourth MOSFET, the fifth MOSFET, the ninth MOSFET, and the tenth MOSFET are grounded.

[0024] Further, see Figures 1 to 3This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The PTAT temperature drift suppression current circuit 20 includes a startup circuit 21, a PTAT reference voltage circuit 22, a common-source cascode current mirror circuit 23, and a PTAT voltage basic unit 24. The PTAT reference voltage circuit 22 is connected to the startup circuit 21, the common-source cascode current mirror circuit 23, and the PTAT voltage basic unit 24. The startup circuit 21 is used to prevent the suppression circuit from entering a latching state due to leakage current. The PTAT reference voltage circuit 22 is used to provide a PTAT reference voltage. The common-source cascode current mirror circuit 23 is used to provide a PTAT current mirror. The PTAT voltage basic unit 24 is used to effectively reduce power consumption.

[0025] Preferably, please see Figures 1 to 3 This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The startup circuit 21 includes an eleventh MOSFET M3, a twelfth MOSFET M23, and a thirteenth MOSFET M38. The source of the eleventh MOSFET is connected to the operating voltage V. DD The gates of the eleventh MOSFET and the twelfth MOSFET are connected, and then the gates of the eleventh MOSFET are connected to the drain of the eleventh MOSFET. The drain of the eleventh MOSFET is connected to the drain of the thirteenth MOSFET. The sources of the thirteenth MOSFET and the twelfth MOSFET are grounded to GND.

[0026] Further, see Figures 1 to 3 This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The PTAT reference voltage circuit 22 includes a fourteenth MOSFET M4, a fifteenth MOSFET M6, a sixteenth MOSFET M39, and a seventeenth MOSFET M41. The gate of the fourteenth MOSFET is connected to the gate of the fifteenth MOSFET and then connected to the drain of the fourteenth MOSFET. The drain of the fourteenth MOSFET is connected to the drain of the sixteenth MOSFET. The drain of the fifteenth MOSFET is connected to the drain of the seventeenth MOSFET. The source of the sixteenth MOSFET and the source of the seventeenth MOSFET are grounded.

[0027] Preferably, see details. Figures 1 to 3 This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The common-source common-gate current mirror circuit 23 includes an eighteenth MOSFET M16, a nineteenth MOSFET M17, a twentieth MOSFET M18, and a twenty-first MOSFET M19. The sources of the eighteenth and nineteenth MOSFETs are respectively connected to the operating voltage V. DDThe gates of the eighteenth MOSFET and the nineteenth MOSFET are connected together, and then connected to the drain of the nineteenth MOSFET; the drain of the eighteenth MOSFET is connected to the drain of the twentieth MOSFET, the drain of the nineteenth MOSFET is connected to the drain of the twenty-first MOSFET, and the gates of the twentieth MOSFET and the twenty-first MOSFET are connected together, and then connected to the drain of the twenty-first MOSFET.

[0028] Further, please see Figures 1 to 3 This embodiment provides a low-cost watchdog clock temperature drift suppression circuit. The PTAT voltage basic unit 24 includes a 22nd MOSFET M25, a 23rd MOSFET M26, a 24th MOSFET M27, a 25th MOSFET M28, a 26th MOSFET M29, a 27th MOSFET M30, a 28th MOSFET M31, a 29th MOSFET M32, a 30th MOSFET M33, and a 31st MOSFET M34. The source of the 22nd MOSFET is connected to the drain of the 23rd MOSFET. The gate of the 22nd MOSFET is connected to the gate of the 23rd MOSFET and then to the drain of the 22nd MOSFET. The source of the 23rd MOSFET M26 is connected to the source of the 24th MOSFET M27 and the drain of the 25th MOSFET M28. The 24th MOSFET M27... The gate of the 25th MOSFET M28 is connected to the gate of the 24th MOSFET M27. The source of the 25th MOSFET is connected to the source of the 26th MOSFET and the drain of the 27th MOSFET. The gate of the 26th MOSFET and the gate of the 27th MOSFET are connected to the drain of the 26th MOSFET. The source of the 27th MOSFET is connected to the source of the 28th MOSFET and the drain of the 29th MOSFET. The gate of the 28th MOSFET and the gate of the 29th MOSFET are connected to the drain of the 28th MOSFET. The source of the 29th MOSFET is connected to the source of the 30th MOSFET and the drain of the 31st MOSFET. The gate of the 30th MOSFET and the gate of the 31st MOSFET are connected to the drain of the 30th MOSFET.

[0029] This invention provides a method for implementing a low-cost watchdog clock temperature drift suppression circuit, applied to the aforementioned low-cost watchdog clock temperature drift suppression circuit. The method for implementing the low-cost watchdog clock temperature drift suppression circuit includes the following steps: Step S100: The long-gate MOS current mirror circuit provides a stable operating power supply to the ring oscillator and performs frequency tuning on the ring oscillator.

[0030] Step S200: The PTAT temperature drift suppression current circuit generates the PTAT temperature drift suppression current, and combines the generated PTAT temperature drift suppression current with the stable operating power supply provided by the long gate MOS current mirror circuit to adjust the operating current of the inverter in the ring oscillator.

[0031] Furthermore, in the implementation method of the cost watchdog clock temperature drift suppression circuit provided in this embodiment, in step S100, the first group of long-channel MOSFET current mirror circuits and the second group of long-channel MOSFET current mirror circuits jointly provide power to the ring oscillator, and the output current is expressed as: (1) In equation (1), For output current, The reference current is given, where W is the channel width and L is the channel length. This is the fourth MOSFET. This is the third MOSFET.

[0032] like Figures 1 to 5 As shown in the figure, the working principle of the low-cost watchdog clock temperature drift suppression circuit and implementation method provided in this embodiment is as follows: The low-cost watchdog clock temperature drift suppression circuit provided in this embodiment uses a watchdog clock generator. Figure 1 The illustrated all-MOSFET architecture design features a temperature drift suppression circuit consisting of two parts: the first part is a mirror source circuit constructed from long-gate MOSFETs, providing a stable operating power supply for the current-starved ring oscillator; the second part is a wide-temperature-range temperature drift suppression current circuit, generating a precise and stable PTAT suppression current. An external Vctrl interface connects to the gate of the m6 MOSFET, thereby controlling the drain current for frequency tuning of the ring oscillator. This current, combined with the PTAT temperature drift suppression current, regulates the operating current of the inverter in the ring oscillator. Within the industrial standard temperature range of -40°C to 125°C, the temperature drift suppression circuit can control the oscillator frequency variation within the range of -0.88% to +0.297%.

[0033] 1. Circuit Construction (1) Long gate MOS current mirror circuit like Figure 1As shown, this section consists of four long-channel MOSFET current mirror circuits: cm1, cm2, cm3, and cm4. ①cm1 and cm2 together provide power to the ring oscillator, and the output current is expressed as:

[0034] in, For output current, For reference current, The width-to-length ratio of the channel for an m4 pipe. The channel width-to-length ratio of tube m3 is 4μm:8μm. The width-to-length ratio of tubes m1 and m2 is 4μm:8μm. The width-to-length ratio of tubes m3, m4 and m5 is 4μm:4μm. This can reduce the influence of channel length modulation effect, improve the accuracy of current mirror, and suppress the frequency drift of ring oscillator.

[0035] ②cm3 and cm4 are I PTAT A gain amplifier circuit that suppresses current, with the width-to-length ratio of transistors m7, m8, m9 and m10 being 4um:4um, and its current output range being 0.8-1.0uA.

[0036] ③ Figure 1 In the middle, the external V ctl It is the gate voltage input terminal of the m6 transistor, used to adjust the tuning range of the ring oscillator. The width-to-length ratio of the m6 transistor is 2um:1um.

[0037] (2) PTAT temperature drift suppression current circuit ①In Figure 3 In the process, when the gate voltage of the MOSFET is lower than the threshold voltage, there is a small amount of leakage current. M3, M23, and M38 form a startup circuit to prevent the suppression circuit from entering the latch state due to leakage current. The parameters of each MOSFET are shown in Table 1.

[0038] ② M4, M6, M39, and M41, operating in the saturation region, form the PTAT reference voltage. M16-M19 constitute a common-source, common-gate current mirror circuit; CM1 provides the operating current for the PTAT. In CM1, the parameters of each MOSFET are shown in Table 1 to suppress the channel length modulation effect.

[0039] Circuit I P for:

[0040] in, The current flowing into the basic voltage unit. For electron mobility, For gate oxide capacitance, The power supply voltage, This is the drain-source voltage of the M35 transistor. This refers to the gate-source voltage of the M40 transistor. This is the threshold voltage of the M18 transistor. This is the threshold voltage of transistor M19. The aspect ratio of the M18 pipe channel is... The aspect ratio of the M19 pipe trench is... , The threshold voltage at an absolute temperature of 0 K. The temperature coefficient of the threshold voltage. This is an absolute temperature value.

[0041] ③The PTAT voltage source consists of five PTAT voltage basic units composed of M25-M34 transistors, which form a closed loop with M40. This structure is based on source-coupled pairs. Both NMOS transistors in the PTAT voltage basic unit operate in the subthreshold region, which can effectively reduce power consumption. The parameters of each MOSFET are shown in Table 1.

[0042] The output voltage of each voltage basic unit for:

[0043] in, The width-to-length ratio of the channel for M27 pipe. This refers to the width-to-length ratio of the channel in an M28 tube.

[0044] Drain circuit of a single MOSFET in each voltage basic unit for:

[0045] in, This refers to leakage current related to the process, and , For electron mobility, Slope factor C OX For gate oxide capacitance, This refers to the channel width of the MOSFET. The channel length of the MOSFET. This is the drain-source voltage. Thermoelectric voltage, Boltzmann's constant, V is the absolute temperature value, q is the charge of an electron, and V is the absolute temperature value. TH This is the threshold voltage of the MOSFET. This is the gate-source voltage of the MOSFET.

[0046] ④ Calculate the gate-source voltage of transistor M37 using the dimensions of M25-M34. Ignoring channel length modulation effects, the drain current of M37 is the PTAT current.

[0047]

[0048] make:

[0049] Thus, the temperature coefficient TC is derived:

[0050] in, This is the drain current of transistor M37. For electron mobility, For gate oxide capacitance, The aspect ratio of the M37 pipe channel. This refers to the gate-source voltage of transistor M37. This is the threshold voltage of the M37 transistor. This is the threshold voltage of the MOSFET. It is a non-ideal coefficient. Thermoelectric voltage, Boltzmann's constant, This is an absolute temperature value. The charge of an electron. The current flowing into the basic voltage unit. For process parameters, The width-to-length ratio of the M25 pipe channel is... The width-to-length ratio of the M26 pipe channel is... The width-to-length ratio of the M27 pipe channel is... The width-to-length ratio of the M28 pipe channel is... The width-to-length ratio of the M29 pipe channel is... The width-to-length ratio of the M30 pipe channel is... The width-to-length ratio of the M31 pipe channel. The width-to-length ratio of the M32 pipe channel. The width-to-length ratio of the M33 pipe channel is... The width-to-length ratio of the M34 pipe channel. The width-to-length ratio of the M40 pipe channel.

[0051] The relationship between PTAT suppression current and temperature is shown in the figure. Figure 4 Within the temperature range of -40℃ to 125℃, the suppression current increases from 0.8uA to 1.0uA. The drain output current of PMOS M2 is in the opposite direction to that of M37.

[0052] ④ The remaining MOSFETs, excluding those mentioned in the above three points, operate in the strong inversion and deep linear regions. The ring oscillator, with the help of the temperature drift suppression circuit, operates within the industrial-grade temperature range of -40℃ to 125℃. Figure 5 The frequency variation range of the oscillator shown is controlled within -0.88% to +0.297%.

[0053] Table 1 Parameters of MOSFETs in the suppression circuit

[0054] This embodiment provides a low-cost watchdog clock temperature drift suppression circuit and its implementation method. Compared with the prior art, it employs a long-gate MOS current mirror circuit and a PTAT temperature drift suppression current circuit. The long-gate MOS current mirror circuit provides a stable operating power supply to the ring oscillator and performs frequency tuning. The PTAT temperature drift suppression current circuit generates a PTAT temperature drift suppression current and combines it with the stable operating power supply provided by the long-gate MOS current mirror circuit to adjust the operating current of the inverter in the ring oscillator. The low-cost watchdog clock temperature drift suppression circuit and its implementation method provided in this embodiment aim to design a temperature drift suppression circuit for an independent "watchdog" clock generator that can be integrated into an MCU. This low-cost watchdog clock temperature drift suppression circuit consists of two parts: the first part is a mirror source circuit constructed with a long-gate MOS transistor to provide a stable operating power supply to the current-starved ring oscillator; the second part is a wide-temperature-range suppression current circuit that generates a precise and stable suppression current proportional to absolute temperature (PTAT). In a current-starved ring oscillator composed of 7 inverters, the frequency change of the temperature drift suppression ring oscillator in this embodiment ranges from -0.88% to +0.297% within a temperature range of -40°C to 125°C.

[0055] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if these modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include these modifications and modifications.

Claims

1. A low-cost watchdog clock temperature drift suppression circuit, characterized in that, It includes a long-gate MOS current mirror circuit (10) and a PTAT temperature drift suppression current circuit (20), wherein, The long-gate MOS current mirror circuit (10) is used to provide a stable operating power supply for the ring oscillator and to tune the frequency of the ring oscillator. The PTAT temperature drift suppression current circuit (20) is connected to the long gate MOS current mirror circuit (10) to generate the PTAT temperature drift suppression current. The generated PTAT temperature drift suppression current is combined with the stable operating power supply provided by the long gate MOS current mirror circuit (10) to adjust the operating current of the inverter in the ring oscillator.

2. The low-cost watchdog clock temperature drift suppression circuit as described in claim 1, characterized in that, The long-gate MOSFET current mirror circuit (10) includes a first group of long-channel MOSFET current mirror circuits (11), a second group of long-channel MOSFET current mirror circuits (12), a third group of long-channel MOSFET current mirror circuits (13), a fourth group of long-channel MOSFET current mirror circuits (14), a frequency control circuit (15), and a tuning circuit (16). The first group of long-channel MOSFET current mirror circuits (11), the second group of long-channel MOSFET current mirror circuits (12), the third group of long-channel MOSFET current mirror circuits (13), and the fourth group of long-channel MOSFET current mirror circuits (14) are connected in series and then connected to the PTAT temperature drift suppression current circuit (20). The second group of long-channel MOSFET current mirror circuits (12) is connected to the frequency control circuit (15) and the tuning circuit (16) respectively.

3. The low-cost watchdog clock temperature drift suppression circuit as described in claim 2, characterized in that, The first group of long-channel MOSFET current mirror circuits (11) includes a first MOSFET and a second MOSFET; the second group of long-channel MOSFET current mirror circuits (12) includes a third MOSFET and a fourth MOSFET; the frequency control circuit (15) includes a fifth MOSFET; the tuning circuit (16) includes a sixth MOSFET; the third group of long-channel MOSFET current mirror circuits (13) includes a seventh MOSFET and an eighth MOSFET; and the fourth group of long-channel MOSFET current mirror circuits (14) includes a ninth MOSFET and a tenth MOSFET. The sources of the first MOSFET, the second MOSFET, the sixth MOSFET, the seventh MOSFET, and the eighth MOSFET are respectively connected to the operating voltage; the gate of the first MOSFET is connected to the gate of the second MOSFET and then to the drain of the first MOSFET; the drain of the second MOSFET is connected to... The drain of the fifth MOSFET is connected to the ground. The gate of the fifth MOSFET, the gate of the third MOSFET, and the gate of the fourth MOSFET are connected to the drain of the third MOSFET. The drain of the third MOSFET is connected to the drain of the sixth MOSFET and the drain of the eighth MOSFET. The gate of the seventh MOSFET and the gate of the eighth MOSFET are connected to the drain of the seventh MOSFET. The drain of the seventh MOSFET is connected to the drain of the tenth MOSFET. The gate of the ninth MOSFET and the gate of the tenth MOSFET are connected to the drain of the ninth MOSFET. The drain of the ninth MOSFET is connected to the PTAT temperature drift suppression current circuit (20). The sources of the third MOSFET, the fourth MOSFET, the fifth MOSFET, the ninth MOSFET, and the tenth MOSFET are grounded.

4. The low-cost watchdog clock temperature drift suppression circuit as described in claim 1, characterized in that, The PTAT temperature drift suppression current circuit (20) includes a startup circuit (21), a PTAT reference voltage circuit (22), a common source cascode current mirror circuit (23), and a PTAT voltage basic unit (24). The PTAT reference voltage circuit (22) is connected to the startup circuit (21), the common source cascode current mirror circuit (23), and the PTAT voltage basic unit (24), respectively.

5. The low-cost watchdog clock temperature drift suppression circuit as described in claim 4, characterized in that, The startup circuit (21) includes an eleventh MOSFET, a twelfth MOSFET, and a thirteenth MOSFET. The source of the eleventh MOSFET is connected to the operating voltage. The gate of the eleventh MOSFET is connected to the gate of the twelfth MOSFET and then connected to the drain of the eleventh MOSFET. The drain of the eleventh MOSFET is connected to the drain of the thirteenth MOSFET. The sources of the thirteenth MOSFET and the twelfth MOSFET are grounded.

6. The low-cost watchdog clock temperature drift suppression circuit as described in claim 4, characterized in that, The PTAT reference voltage circuit (22) includes a fourteenth MOSFET, a fifteenth MOSFET, a sixteenth MOSFET, and a seventeenth MOSFET. The gate of the fourteenth MOSFET is connected to the gate of the fifteenth MOSFET and then connected to the drain of the fourteenth MOSFET. The drain of the fourteenth MOSFET is connected to the drain of the sixteenth MOSFET. The drain of the fifteenth MOSFET is connected to the drain of the seventeenth MOSFET. The source of the sixteenth MOSFET and the source of the seventeenth MOSFET are grounded.

7. The low-cost watchdog clock temperature drift suppression circuit as described in claim 4, characterized in that, The common-source common-gate current mirror circuit (23) includes an eighteenth MOSFET, a nineteenth MOSFET, a twentieth MOSFET, and a twenty-first MOSFET. The source of the eighteenth MOSFET and the source of the nineteenth MOSFET are respectively connected to the operating voltage. The gate of the eighteenth MOSFET and the gate of the nineteenth MOSFET are connected together and then connected to the drain of the nineteenth MOSFET. The drain of the eighteenth MOSFET is connected to the drain of the twentieth MOSFET, and the drain of the nineteenth MOSFET is connected to the drain of the twenty-first MOSFET. The gate of the twentieth MOSFET and the gate of the twenty-first MOSFET are connected together and then connected to the drain of the twenty-first MOSFET.

8. The low-cost watchdog clock temperature drift suppression circuit as described in claim 4, characterized in that, The PTAT voltage basic unit (24) includes a 22nd MOSFET, a 23rd MOSFET, a 24th MOSFET, a 25th MOSFET, a 26th MOSFET, a 27th MOSFET, a 28th MOSFET, a 29th MOSFET, a 30th MOSFET, and a 31st MOSFET. The source of the 22nd MOSFET is connected to the drain of the 23rd MOSFET. The gate of the 22nd MOSFET is connected to the gate of the 23rd MOSFET and then to the drain of the 22nd MOSFET. The source of the 23rd MOSFET is connected to the source of the 24th MOSFET and the drain of the 25th MOSFET. The gate of the 24th MOSFET is connected to the gate of the 25th MOSFET and then to the drain of the 24th MOSFET. The following connections are made: the source of the 25th MOSFET is connected to the source of the 26th MOSFET and the drain of the 27th MOSFET; the gate of the 26th MOSFET is connected to the gate of the 27th MOSFET and then to the drain of the 26th MOSFET; the source of the 27th MOSFET is connected to the source of the 28th MOSFET and the drain of the 29th MOSFET; the gate of the 28th MOSFET is connected to the gate of the 29th MOSFET and then to the drain of the 28th MOSFET; the source of the 29th MOSFET is connected to the source of the 30th MOSFET and the drain of the 31st MOSFET; the gate of the 30th MOSFET is connected to the gate of the 31st MOSFET and then to the drain of the 30th MOSFET.

9. A method for implementing a low-cost watchdog clock temperature drift suppression circuit, applied in the low-cost watchdog clock temperature drift suppression circuit as described in any one of claims 1 to 8, characterized in that, The implementation method of the low-cost watchdog clock temperature drift suppression circuit includes the following steps: The long-gate MOS current mirror circuit provides a stable operating power supply for the ring oscillator and performs frequency tuning for the ring oscillator. The PTAT temperature drift suppression current circuit generates a PTAT temperature drift suppression current, and combines the generated PTAT temperature drift suppression current with the stable operating power supply provided by the long-gate MOS current mirror circuit to adjust the operating current of the inverter in the ring oscillator.

10. The method for implementing the low-cost watchdog clock temperature drift suppression circuit as described in claim 9, characterized in that, In the steps of providing a stable operating power supply to the ring oscillator and tuning the frequency of the ring oscillator by the long-gate MOS current mirror circuit, the first group of long-channel MOSFET current mirror circuits and the second group of long-channel MOSFET current mirror circuits jointly provide power to the ring oscillator, and the output current is expressed as: in, For output current, The reference current is given, where W is the channel width and L is the channel length. This is the fourth MOSFET. This is the third MOSFET.