A platform configuration verification method and device, electronic equipment and storage medium

Abstract

The application provides a verification platform configuration method and device, electronic equipment and a storage medium, and relates to the field of bus verification. The application can obtain a command configuration file comprising a frame structure of bus timing parameters and bus control commands; a basic stimulus unit is combined according to a frame field and a field order of a target bus control command to obtain a stimulus generation component; a transaction object class and a timing constraint are set according to the frame field and the bus timing parameters; a stimulus sequence class is set according to the frame field and a field value; and the three are configured in a verification platform to output the target bus control command on a target bus. The application can reduce manual modification of underlying code, improve configuration efficiency and configuration reliability.

Description

Technical Field

[0001] This invention relates to the field of bus verification, and in particular to a verification platform configuration method, apparatus, electronic device, and storage medium. Background Technology

[0002] When the bus protocol is updated or the bus control commands supported by the device under test change, verification personnel usually need to manually modify the underlying code of the verification platform according to the changes in the commands. This can easily lead to a long manual adaptation time, reduced adaptation efficiency, and omissions or configuration inconsistencies. Summary of the Invention

[0003] The purpose of this invention is to provide a verification platform configuration method, apparatus, electronic device, and storage medium that can automatically configure the verification platform based on a unified command configuration file, thereby improving the configuration efficiency and reliability of the verification platform.

[0004] To address the aforementioned technical problems, this invention provides a verification platform configuration method, comprising: Obtain the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command, the frame structure including frame fields, field order and field values; For a target bus control command, the corresponding basic excitation unit is obtained according to its frame field, and the basic excitation unit is combined according to its field order to obtain an excitation generation component; Set the transaction object class according to the frame field of the target bus control command and the bus timing parameters, and set the timing constraints of the transaction object class according to the value of the bus timing parameters; The stimulus sequence class for generating transaction objects is set according to the frame field and field values ​​of the target bus control command; The stimulus generation component, the transaction object class, and the stimulus sequence class are configured on the verification platform so that the verification platform outputs the target bus control command on the target bus.

[0005] Optionally, for a target bus control command, the corresponding basic excitation unit is obtained according to its frame field, and the basic excitation unit is combined according to its field order to obtain an excitation generation component, including: In the command configuration file, the frame field located between the start identifier and the end identifier of the target bus control command is obtained according to the start identifier and the end identifier, so as to obtain the frame structure of the target bus control command; Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information and the frame structure are recorded in the preset command pool. The corresponding basic excitation unit is obtained according to the frame field, and the basic excitation unit is combined according to the field order to obtain the excitation generation component of the target bus control command. If a command already exists, the frame structure is compared with the corresponding existing frame structure in the preset command pool, and the corresponding basic excitation unit or the combination order of the basic excitation unit is adjusted according to the changed frame fields or field order to update the excitation generation component corresponding to the target bus control command.

[0006] Optionally, the command configuration file may also include illegal frame field combination information; Before assembling the basic excitation unit, the following is also included: The frame structure of the target bus control command is verified based on the illegal frame field combination information; When the frame structure contains a field combination corresponding to the illegal frame field combination information, the setting of the excitation generation component is stopped, and the verification result is output.

[0007] Optionally, the step of setting a transaction object class based on the frame field of the target bus control command and the bus timing parameters, and setting timing constraints for the transaction object class based on the values ​​of the bus timing parameters, includes: Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information is recorded in the preset command pool, the transaction object class is set according to the frame field of the target bus control command and the bus timing parameters, and the timing constraints of the transaction object class are set according to the value of the bus timing parameters. If a command already exists, the frame field and the bus timing parameters are compared with the existing transaction object class of the target bus control command. The existing transaction object class is adjusted according to the changed frame field, and the timing constraints of the existing transaction object class are adjusted according to the changed bus timing parameters.

[0008] Optionally, setting the timing constraints of the transaction object class according to the values ​​of the bus timing parameters includes: When the bus timing parameters are set to fixed values, fixed timing constraints are set. When the bus timing parameter takes a value within a range, a random timing constraint is set to make the bus timing parameter vary within the range.

[0009] Optionally, setting the stimulus sequence class for generating the transaction object based on the frame field and field values ​​of the target bus control command includes: Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information is recorded in the preset command pool, and the incentive sequence class for creating a transaction object is set according to the value of the field. If a command already exists, the frame field and its value are compared with the existing stimulus sequence class of the target bus control command, and the existing stimulus sequence class is adjusted according to the changed frame field or its value.

[0010] Optionally, the verification platform outputs the target bus control command on the target bus, including: An incentive sequence object is created based on the incentive sequence class, and the incentive sequence object is run to generate a transaction object corresponding to the transaction object class; The excitation generation component reads the transaction object and outputs the target bus control command on the target bus according to the field values ​​and bus timing parameters contained in the transaction object.

[0011] Optionally, the method further includes: Receive manual adjustment information for at least one of the bus timing parameters, frame fields, field order, and field values ​​in the command configuration file; The command configuration file is adjusted according to the manually adjusted information, and the verification platform is configured using the adjusted command configuration file.

[0012] Optionally, after configuring the stimulus generation component, the transaction object class, and the stimulus sequence class in the verification platform, the method further includes: Generate configuration logs for the stimulus generation component, the transaction object class, and the stimulus sequence class; The configuration log is used to record the parsing results of the command configuration file, as well as the configuration results of the stimulus generation component, the transaction object class, and the stimulus sequence class.

[0013] The present invention also provides a verification platform configuration device, comprising: The file acquisition module is used to acquire the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command, and the frame structure includes frame fields, field order and field values; The excitation generation component setting module is used to obtain the corresponding basic excitation unit according to the frame field of the target bus control command, and combine the basic excitation unit according to the field order to obtain the excitation generation component. The transaction object class setting module is used to set the transaction object class according to the frame field of the target bus control command and the bus timing parameters, and to set the timing constraints of the transaction object class according to the value of the bus timing parameters. The incentive sequence class setting module is used to set the incentive sequence class for generating transaction objects according to the frame field and field value of the target bus control command; The platform configuration module is used to configure the stimulus generation component, the transaction object class, and the stimulus sequence class on the verification platform so that the verification platform outputs the target bus control command on the target bus.

[0014] The present invention also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the above-described verification platform configuration method when executing the computer program.

[0015] The present invention also provides a non-volatile computer-readable storage medium storing computer-executable instructions, which, when loaded and executed by a processor, implement the above-described verification platform configuration method.

[0016] This invention provides a verification platform configuration method, comprising: obtaining a command configuration file; the command configuration file includes bus timing parameters and frame structures of each bus control command, the frame structure including frame fields, field order, and field values; for a target bus control command, obtaining the corresponding basic excitation unit according to its frame fields, and combining the basic excitation units according to their field order to obtain an excitation generation component; setting a transaction object class according to the frame fields of the target bus control command and the bus timing parameters, and setting timing constraints according to the values ​​of the bus timing parameters; setting an excitation sequence class for generating transaction objects according to the frame fields and field values ​​of the target bus control command; configuring the excitation generation component, the transaction object class, and the excitation sequence class on the verification platform, so that the verification platform outputs the target bus control command on the target bus.

[0017] The beneficial effects of this invention are as follows: First, this invention can obtain a command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command, the frame structure including frame fields, field order, and field values. Users can flexibly adjust the information in the command configuration file as needed. Subsequently, this invention can combine basic excitation units according to the frame fields and field order of the target bus control command to obtain an excitation generation component; set the transaction object class and its timing constraints according to the frame fields and bus timing parameters; and set the excitation sequence class according to the frame fields and field values. In this way, this invention can complete the configuration of relevant verification content in the verification platform based on the same command configuration file, reducing omissions or configuration inconsistencies caused by manually modifying different codes, thereby improving the configuration efficiency and reliability of the verification platform.

[0018] The present invention also provides a verification platform configuration device, an electronic device, and a storage medium, which have the above-mentioned beneficial effects. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0020] Figure 1 A flowchart illustrating a verification platform configuration method provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of an I3C protocol SETDASA command frame structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the interaction structure of the verification platform provided in an embodiment of the present invention; Figure 4 The overall execution flowchart of the script program provided in the embodiments of the present invention; Figure 5 A flowchart of the script program for automatic generation and updating of the excitation generation component provided in an embodiment of the present invention; Figure 6 A flowchart of a script program for automatically generating and updating transaction object classes provided in an embodiment of the present invention; Figure 7 A flowchart of a script program for automatically generating and updating stimulus sequence classes provided in an embodiment of the present invention; Figure 8 This is a structural block diagram of a verification platform configuration device provided in an embodiment of the present invention; Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Bus protocols typically define data transmission formats, field arrangements, timing rules, and control mechanisms. When the bus protocol version or the bus control commands supported by the device under test change, the verification platform also needs to be adapted accordingly to ensure that the verification platform can correctly send bus control commands.

[0023] In related technologies, the verification platform typically relies on verification personnel to read the differences between the old and new protocols and modify multiple related low-level code. Because bus control commands in bus protocols are of various types and differ significantly, verification personnel often spend a considerable amount of time debugging and testing when adapting the verification environment, thus reducing configuration efficiency. Furthermore, since the frame structure, field values, and timing parameters of bus control commands are interrelated, modifying them separately can easily lead to omissions or inconsistencies, potentially causing the commands output by the verification platform to be inconsistent with the target protocol.

[0024] In related technologies, verifiers can also integrate third-party verification IPs into the verification platform. Although this reduces the configuration workload for verifiers, the usage of new VIPs for new protocol commands often differs from that of older VIPs. Verifiers still need to spend a significant amount of time reading user manuals and debugging the environment to adapt the VIP. Furthermore, the cost of using third-party VIPs is extremely high, which does not meet the long-term operational needs of enterprises given the rapid updates and iterations of bus protocols.

[0025] In view of this, in order to efficiently and reliably automate the configuration of the verification platform when bus control commands change, the present invention provides a verification platform configuration method. This method can use a unified command configuration file to define the frame structure of bus control commands and bus timing parameters, and use an automated script to automatically update the configuration platform according to the command configuration file, thereby improving the configuration efficiency and reliability of the configuration platform.

[0026] In one specific implementation, the target bus can be an Improved Inter-Integrated Circuit (I3C) bus, the target bus control commands can be Common Command Code (CCC) commands, and the verification platform can be set up based on the Universal Verification Methodology (UVM). Of course, this embodiment can also be applied to other bus protocols with frame structure and bus timing requirements.

[0027] For easier understanding, please refer to Figure 1 , Figure 1 A flowchart of a verification platform configuration method provided in an embodiment of the present invention, the method may include: S11. Obtain the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command. The frame structure includes frame fields, field order, and field values.

[0028] In this step, the command configuration file is a file used to uniformly describe bus control commands and bus timing. It can be a text file, a structured data file, a data table, or other formats that can be parsed by script programs. The command configuration file can be created by the user for the first time or can be modified based on an existing command configuration file.

[0029] The command configuration file can contain at least two pieces of data: the frame structure of each bus control command and the bus timing parameters.

[0030] A frame structure can include frame fields, field order, and field values. Frame fields represent the field types or content that constitute the bus control command, such as start flag, address field, read / write field, acknowledge field, command code field, data field, transfer field, and stop flag. Field order indicates the arrangement of frame fields in the target bus control command. Field values ​​represent the values ​​that each frame field can have; these can be fixed values, allowed value ranges, or excluded values.

[0031] Bus timing parameters represent the timing parameters used when outputting bus control commands, and may include clock high-level time, clock low-level time, data response delay, and other parameters related to changes in bus signals.

[0032] In addition, since the bus protocol specifies some disallowed field combinations, the command configuration file can also contain information on illegal frame field combinations to specify which frame field combinations are not allowed.

[0033] To facilitate understanding of frame structure and illegal frame field combinations, the I3C protocol's CCC command will be used as an example below. Please refer to [link / reference]. Figure 2 , Figure 2 This is a schematic diagram of an I3C protocol SETDASA command frame structure provided in an embodiment of the present invention. Figure 2 As can be seen, the SETDASA CCC command begins with either the S (start) flag or the Sr (restart) flag, followed by a 7-bit 0x7E address header. After the address header, there is a W write flag and an ACK response bit. The 0x7E, W flag, and ACK response bit together form a 9-bit address header frame. Following the address header frame is a 9-bit CCC command code frame, consisting of an 8-bit CCC command code and a 1-bit T parity bit, followed by a fixed Sr flag. After the Sr flag are the static destination address frame and the dynamic address frame. The static destination address frame consists of an 8-bit static address of the target device, a write flag, and an ACK bit. The dynamic address frame consists of an 8-bit dynamic address, a fixed 1-bit 0 value, and a 1-bit T parity bit. After the dynamic address frame, according to protocol requirements, a P (stop) stop bit can be added to indicate the end of the current CCC command code transmission, or the Sr flag and the 0x7E address header can be added to indicate the end of the current CCC command code transmission. After the current CCC command code transmission is completed, the P flag and Sr flag can be followed to connect additional target static addresses and other CCC command codes.

[0034] The frame structure of the CCC command described above is a typical example of the I3C protocol. For direct commands, after the current CCC command code transmission ends, connections can be made using P, Sr, or other CCC codes. Therefore, based on this characteristic, the CCC command configuration file only needs to include the specific frame structure of the current CCC command when describing its frame format characteristics. Subsequent various CCC command code connection relationships are sent using different sequence combinations. Meanwhile, the protocol specifies some prohibited combinations, such as: a start flag followed by another start flag; a stop flag followed by another stop flag, etc. Therefore, the command configuration file in this embodiment needs to include three parts: 1. All CCC command formats supported by the protocol; 2. Frame formats not allowed by the protocol; 3. SDA bus timing parameters. These three parts are described below: 1) For CCC commands supported by the protocol, the configuration file uses a separate `include` keyword for differentiation. Since this configuration file contains all CCC command codes supported in the current version of the I3C protocol, users only need to arrange the keywords according to the CCC command frame format as required by the protocol. This configuration file is based on the CCC command frame format, starting with `S / Sr` to indicate the start of the current CCC command structure and ending with `Sr / P` to indicate the end of the current CCC command structure. The middle part contains command code frames, address frames, and data frames. According to the protocol requirements, command frames and address frames are always connected via `Sr`. After the `Sr` flag, there are the target address frame and the dynamic address frame. The frame structure of the target address frame and the dynamic address frame is similar to the address header frame, consisting of a 7-bit address, read / write flag, and either a `T` bit or a response bit. Since the protocol only specifies a portion of the target address and dynamic address available, users can additionally specify the optional range of the target address and dynamic address. After the dynamic address frame ends, the current CCC command frame ends, and subsequent connections to other CCC commands can be made using the `Sr` flag and the `P` (stop) flag.

[0035] Therefore, the configuration file only needs to describe the frame structure within the current CCC command. Taking the SETDASA command mentioned above as an example, the description method is as follows: Include: S / Sr / / Indicates that the current CCC command begins with the S flag or the Sr flag; 0x7E / w / ack / / Indicates that the address header frame format consists of 0x7E, read / write flags, and ack bits; SETDASA_D_CCC_87 / T / / This indicates that the name of the command code is SETDASA, the command type is a direct command (if it is a broadcast command, it is represented by B_CCC), the command code value is 0x87, and the end of the command code frame is composed of T bits; Sr / / Indicates the fixed Sr flag; TA(include[0x8:0x5D], exclude[0x3E]) / w / ack / / Indicates that the target static address is within the user-defined range of 0x8~0x5D; / / Remove the fixed value 0x5D; / / The target address frame consists of the target address, write flag, and ack bit; DA(include[0x8:0x3D]) / 0 / ack / / Indicates that a dynamic address frame consists of a dynamic address, a read flag, and an ack bit; / / The allowed range for dynamic address values ​​is between 0x8 and 0x3D; Sr / P / / Indicates that the current CCC command frame ends with Sr or P; Therefore, when users use the verification system of this invention for the first time, they need to describe the frame structure of all CCC command codes supported by the current version of the protocol in the manner described above. Whenever the protocol is updated or the structure of the CCC command frame is adjusted, only the changed parts need to be maintained.

[0036] 2) For frame structures not supported by the protocol, such as `start` followed by `start`, the configuration file contains a separate `exclude` keyword to detect illegal combinations and generate illegal vectors for subsequent scripts. Example code is as follows: Exclude: SS / / indicates that it is illegal to append the start flag to the start flag; Sr-S / / Indicates that it is illegal to append the start flag to the restart flag; PP / / indicates that it is illegal to append a stop flag after the stop flag; 3) For the timing parameters of the SDA bus, verification personnel often need to simulate the impact of the capacitive load of the external pull-up resistors on the bus timing. Users need to specify the timing parameters in the following way: Timing: scl_pp_low = 6 / / This means that the push-pull SCL low level time is fixed at 6 system clock cycles; scl_pp_high = 6:7 / / This means that the high level time of the push-pull SCL is randomized within 6 to 7 system clock cycles; scl_od_low = 30 / / This means that the open-drain SCL low level time is fixed at 30 system clock cycles; scl_od_high = 5:8 / / This means that the high level time of the open-drain SCL is randomized within 5 to 8 system clock cycles; sda_delay = 1 / / This indicates that the SDA signal's response delay after detecting the SCL clock edge is 1 system clock cycle.

[0037] It should be noted that the above example is only used to illustrate the format of the command configuration file. The specific content contained in the file can be adjusted according to the actual application requirements.

[0038] Furthermore, users can manually adjust the command configuration file, a process that includes: S161. Receive manual adjustment information for at least one of the bus timing parameters, frame fields, field order, and field values ​​in the command configuration file.

[0039] S162. Adjust the command configuration file according to the manual adjustment information, and use the adjusted command configuration file to configure the verification platform.

[0040] Manual adjustments can be used to add new commands, modify the frame structure or parameters of existing commands, and change the timing range during testing. Since users primarily maintain command configuration files, the script can synchronously configure the three types of verification content based on the adjusted unified data source, thereby reducing inconsistencies caused by modifying the underlying code separately.

[0041] S12. For the target bus control command, obtain the corresponding basic excitation unit according to its frame field, and combine the basic excitation units according to its field order to obtain the excitation generation component.

[0042] In steps S12-S14, this embodiment uses a script program to automatically generate a driver, a transaction object class (trans), and a sequence class for each bus control command based on the command configuration file described above. The driver is used to convert the field values ​​and bus timing parameters in the transaction object into actual signals on the target bus; the transaction object class defines the data items and timing parameters required for a single command transmission; and the sequence class creates and sets the transaction object.

[0043] In this step, for each target bus control command in the command configuration file, this embodiment can combine the basic excitation units according to the frame fields and field order defined in the frame structure of the command to obtain the above-mentioned excitation generation component.

[0044] The basic stimulus unit is a reusable software processing unit used to generate a basic bus signal operation, and it corresponds to each frame field. The basic stimulus unit can be pre-set in the stimulus unit library or generated by a script program based on the field type. Taking the I3C bus as an example, the basic stimulus unit can be used to generate start, repeat start, address header, destination address, read / write, acknowledge, command code, data transmission, transmission flag, and stop signal operations.

[0045] The script program can establish a mapping relationship between frame fields and basic excitation units. When a frame field is parsed, the script program obtains the basic excitation unit corresponding to that frame field. After obtaining multiple basic excitation units, it arranges them according to the field order and encapsulates the arranged basic excitation units into an excitation generation component corresponding to the target bus control command. In this way, different bus control commands can reuse the same basic excitation units, forming different complete command excitations only by changing the selection and combination order of the basic excitation units.

[0046] Furthermore, it's worth noting that since users can flexibly update the existing bus control commands in the command configuration file, the script program can also determine whether the bus control command already exists during execution. If it does, it can update the corresponding excitation generation component based on changes in the frame fields and field order of the bus control command. Therefore, in this embodiment, when the bus control command changes, the verification personnel only need to perform a simple update to the command configuration file; the script program can automatically update the underlying excitation generation component, thereby improving the configuration platform's update efficiency.

[0047] In one possible scenario, for a target bus control command, the corresponding basic excitation unit is obtained based on its frame field, and the basic excitation units are combined according to their field order to obtain an excitation generation component, which may include: S121. In the command configuration file, based on the start and end identifiers of the target bus control command, obtain the frame field located between the start and end identifiers to obtain the frame structure of the target bus control command.

[0048] In this step, the start identifier is used to mark the beginning of a bus control command, and the end identifier is used to mark the end of that command. The start and end identifiers can be independent keywords, field types, separators, or other identifiable markers. Specifically, in I3C washing machines, the start identifier may include a start flag (S) or a repeat start flag (Sr), and the end identifier may include a repeat start flag (Sr) or a stop flag (P). The script can identify the fields between the same set of start and end identifiers as the frame fields of the same bus control command.

[0049] S122. Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool.

[0050] In this step, to determine whether the target bus control command has been created, the command code information of the target bus control command can be used to determine whether the target bus control command is an existing command in the preset command pool.

[0051] The command code information is used to identify the target bus control command. The command code information may include the command name, command code value, command type, and combinations thereof. For example, for the CCC command mentioned above, the name and value of the CCC code can serve as the command code information.

[0052] The preset command pool is used to store processed bus control commands and their configurations. The preset command pool can be implemented using configuration files, history logs, a database, or other data structures capable of storing historical command information. Scripts can determine whether the current command is a new command or an existing command by matching at least one of the command name and command code values.

[0053] S123. If there is no existing command, record the command code information and frame structure in the preset command pool, obtain the corresponding basic excitation unit according to the frame field, and combine the basic excitation units according to the field order to obtain the excitation generation component of the target bus control command.

[0054] For newly added commands, the script can obtain the corresponding basic excitation unit for each frame field and form the complete excitation of the command according to the field order. After recording the command code information and frame structure, when the same command is parsed again, the current configuration can be compared with the already recorded configuration, without having to treat it as a completely new command and repeat the process.

[0055] S124. If a command already exists, the frame structure is compared with the corresponding existing frame structure in the preset command pool, and the corresponding basic excitation unit or the combination order of the basic excitation unit is adjusted according to the changed frame fields or field order to update the excitation generation component corresponding to the target bus control command.

[0056] For existing commands, the script can compare whether fields have been added, deleted, or replaced, and whether the field arrangement has changed. When fields change, corresponding basic stimulus units can be added, deleted, or replaced; when the field order changes, the combined positions of the relevant basic stimulus units can be adjusted. Thus, this embodiment can update only the affected stimulus content without rewriting the underlying stimulus code of the entire command.

[0057] Furthermore, before assembling the basic excitation units, the frame structure can be validated, specifically including: S125. Verify the frame structure of the target bus control command based on the illegal frame field combination information.

[0058] Illegal frame field combination information is used to record field adjacency relationships or frame structures that are not allowed by the protocol. Script programs can check adjacent fields in the frame structure item by item, or they can form multiple consecutive fields into a combination of fields to be checked and match it with the illegal frame field combination information.

[0059] S126. When there is an illegal frame field combination in the frame structure, stop setting the excitation generation component and output the verification result.

[0060] The specific process for stopping the configuration can be either terminating the generation of the stimulus generation component for the current command, or marking the current command as having a configuration error and skipping its subsequent configuration. The verification results can record command code information, matched illegal field combinations, and their positions in the frame structure, allowing users to modify the command configuration file. For commands that do not match illegal combinations, basic stimulus units can continue to be combined.

[0061] S13. Set the transaction object class according to the frame field and bus timing parameters of the target bus control command, and set the timing constraints of the transaction object class according to the values ​​of the bus timing parameters.

[0062] In this step, for each target bus control command in the command configuration file, this embodiment can set the transaction object class corresponding to the target bus control command according to the frame field of the command and the bus timing parameters in the command configuration file, and set the timing constraints of the transaction object class according to the value of the bus timing parameters.

[0063] The transaction object class defines the data structure of transaction objects generated when the verification platform is run. The transaction object class can set data items corresponding to command codes, target addresses, dynamic addresses, data, transmission conditions, and bus timing parameters. A transaction object is an instance created based on the transaction object class, used to carry the field values ​​and timing parameters required for a single command transmission.

[0064] Timing constraints are used to ensure that the bus timing parameters in a transaction object meet the fixed values ​​or allowed ranges in the command configuration file, so as to verify the impact of the capacitive load of the external pull-up resistors on the bus timing according to the timing constraints. This embodiment mainly focuses on setting constraints for bus timing parameters; the specific values ​​or ranges of fields such as command code, address, and data can be mainly set by the excitation sequence class, which can be referred to the description in subsequent embodiments.

[0065] In one possible scenario, setting a transaction object class based on the frame field of the target bus control command and the bus timing parameters, and setting timing constraints for the transaction object class based on the values ​​of the bus timing parameters, may include: S131. Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool.

[0066] S132. If there is no existing command, record the command code information in the preset command pool, set the transaction object class according to the frame field and bus timing parameters of the target bus control command, and set the timing constraints of the transaction object class according to the value of the bus timing parameters.

[0067] For new commands, the script can determine the data items that the transaction object class needs to include based on the frame fields and bus timing parameters. For example, if the frame structure includes a target address field, the target address data item is set in the transaction object class; if the frame structure includes a data field, the corresponding data item is set. Furthermore, it is necessary to set the data items corresponding to each bus timing parameter, and the timing constraints of the transaction object class need to be set according to the values ​​of the bus timing parameters.

[0068] Taking the SETDASA command above as an example, if the timing parameters are: Timing: scl_pp_low = 6; scl_pp_high = 6:7; scl_od_low = 30; scl_od_high = 5:8; sda_delay = 1; The trans generated by the script program can be: #define SETDASA 0x87 / / trans definition; class i3c_transaction extends uvm_sequence_item; rand bit [7:0] target_addr; rand bit [7:0] dyn_addr; rand bit setdasa_send; rand bit [7:0] ccc; rand bit [7:0] scl_pp_low; rand bit [7:0] scl_pp_high; rand bit [7:0] scl_od_low; rand bit [7:0] scl_od_high; rand bit [7:0] sda_delay; constraint cc / / Random constraint on time series parameters; { scl_pp_low == 6; scl_pp_high inside {[6:7]}; scl_od_low == 30; scl_od_high inside {[5:8]}; sda_delay == 1 } endclass S133. If there is an existing command, compare the frame field and bus timing parameters with the existing transaction object class of the target bus control command, adjust the existing transaction object class according to the changed frame field, and adjust the timing constraints of the existing transaction object class according to the changed bus timing parameters.

[0069] When a frame field is added or deleted, data items in the transaction object class can be added or deactivated accordingly; when the field type changes, the data item type can be adjusted. When the fixed value or range of bus timing parameters changes, only the corresponding timing constraints can be adjusted, avoiding repeated modification of unchanged data items.

[0070] As can be seen, in this embodiment, when the bus control command changes, the verification personnel only need to update the command configuration file. The script program can automatically update the underlying transaction object class, thereby improving the configuration platform's update efficiency.

[0071] In one feasible implementation, adjusting the timing constraints of an existing transaction object class based on the changed bus timing parameters may include: S134. When the bus timing parameters are fixed values, set fixed timing constraints.

[0072] Fixed timing constraints ensure that the corresponding timing parameters in a transaction object remain at their configured values. For example, when the duration of a certain clock low level is configured to be a fixed number of system clock cycles, all transaction objects generated at runtime will use that value.

[0073] S135. When the bus timing parameter takes a value within a range, set a random timing constraint that causes the bus timing parameter to vary within the range.

[0074] Random timing constraints enable the verification platform to generate different timing parameters within an acceptable range during runtime, covering different bus timing scenarios. The randomization method can be uniform randomization, or weighted or boundary-priority rules can be set according to test requirements; this invention does not limit this.

[0075] S14. Set the stimulus sequence class for generating transaction objects based on the frame field and field values ​​of the target bus control command.

[0076] In this step, for each target bus control command in the command configuration file, this embodiment can set the stimulus sequence class for generating transaction objects according to the frame field and field value of the target bus control command.

[0077] The stimulus sequence class is used to create transaction objects and set the bus control commands to be sent in this test, along with their field values. The stimulus sequence class can set the command code, target address, dynamic address, data, number of transmissions, and transmission conditions, and can call the timing constraints in the transaction object class to generate transaction objects that meet the bus timing requirements.

[0078] In one possible scenario, setting the stimulus sequence class for generating the transaction object based on the frame field and field values ​​of the target bus control command may include: S141. Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool.

[0079] S142. If there is no existing command, record the command code information in the preset command pool, set the activation sequence class for creating the transaction object and set the transaction object according to the field value.

[0080] For new commands, the stimulus sequence class can create a corresponding transaction object, set the command code in the transaction object, and set the address, data, and other fields according to the fixed values, allowed ranges, and excluded values ​​in the command configuration file. In this embodiment, a command sending identifier can also be set so that the stimulus generation component selects the basic stimulus unit combination corresponding to the target bus control command.

[0081] S143. If a command already exists, compare the frame field and field value with the existing excitation sequence class of the target bus control command, and adjust the existing excitation sequence class according to the changed frame field or field value.

[0082] When frame fields are added, deleted, or changed, the data item setting logic of the transaction object can be added, deleted, or adjusted accordingly; when field values ​​change, fixed assignments, value ranges, or excluded values ​​can be adjusted. In this way, the stimulus sequence class, the stimulus generation component, and the transaction object class can maintain consistency for the same command.

[0083] As can be seen, in this embodiment, when the bus control command changes, the verification personnel only need to update the command configuration file. The script program can automatically update the existing stimulus sequence class at the underlying level, thereby improving the configuration update efficiency of the configuration platform.

[0084] S15. Configure the stimulus generation component, transaction object class, and stimulus sequence class on the verification platform so that the verification platform outputs target bus control commands on the target bus.

[0085] In this step, by configuring the stimulus generation component, transaction object class, and stimulus sequence class, which are automatically configured and updated based on script programs, into the verification platform, efficient and reliable configuration of the verification platform can be achieved, improving configuration efficiency and reliability when bus control commands are updated.

[0086] Furthermore, after configuring the three types of verification content on the verification platform, this method may also include: S171. Generate configuration logs for the stimulus generation component, transaction object class, and stimulus sequence class; the configuration logs are used to record the parsing results of the command configuration file and the configuration results of the stimulus generation component, transaction object class, and stimulus sequence class.

[0087] The configuration log can record commands that are added, updated, skipped, or fail to configure, as well as the changed frame fields, field order, field values, and bus timing parameters. Users can check the processing results of scripts based on the configuration log, or use the configuration log as a historical data source for the preset command pool.

[0088] Based on the above embodiments, the present invention first obtains a command configuration file. The command configuration file includes bus timing parameters and the frame structure of each bus control command. The frame structure includes frame fields, field order, and field values. Users can flexibly adjust the information in the command configuration file as needed. Subsequently, the present invention can combine basic excitation units according to the frame fields and field order of the target bus control command to obtain an excitation generation component; set the transaction object class and its timing constraints according to the frame fields and bus timing parameters; and set the excitation sequence class according to the frame fields and field values. In this way, the present invention can complete the configuration of relevant verification content in the verification platform based on the same command configuration file, reducing omissions or configuration inconsistencies caused by manually modifying different codes separately, enabling the excitation generation component, transaction object class, and excitation sequence class to cooperate with each other, thereby improving the configuration efficiency and reliability of the verification platform.

[0089] Based on the above embodiments, the following describes how the verification platform outputs target bus control commands based on the above-mentioned stimulus generation component, transaction object class, and stimulus sequence class.

[0090] In one possible scenario, the verification platform outputting target bus control commands may include: S151. Create an incentive sequence object based on the incentive sequence class and run the incentive sequence object to generate a transaction object corresponding to the transaction object class.

[0091] S152. Read the transaction object through the excitation generation component, and output the target bus control command on the target bus according to the field values ​​and bus timing parameters contained in the transaction object.

[0092] The excitation generation component can select the corresponding excitation combination based on the command code and transmission identifier in the transaction object, then pass the values ​​of fields such as address and data in the transaction object to the corresponding basic excitation unit, and control the signal changes on the target bus according to the timing parameters in the transaction object. In this way, the actual output command can simultaneously conform to the target frame structure, field values, and bus timing.

[0093] Based on the above embodiments, when deleting existing bus control commands from the current command configuration file, configuration cleanup can also be performed. This process includes: S181. Traverse the current command configuration file and record the bus control commands contained in the current command configuration file.

[0094] S182. Compare the bus control commands contained in the current command configuration file with the existing commands in the preset command pool, and determine the deleted commands that are no longer contained in the current command configuration file.

[0095] S183. Delete or disable the stimulus generation component, transaction object class, and stimulus sequence class corresponding to the deleted command in the verification platform.

[0096] For example, a script can record processed commands while traversing the command configuration file, and after the traversal is complete, check whether all existing commands in the preset command pool have been recorded. Existing commands that are not recorded can be identified as deleted commands. Deletion can involve removing the corresponding software content, while deactivation can involve unregistering, disabling the sending flag, or marking the corresponding configuration as unavailable. This process prevents the verification platform from retaining old commands that have been deleted by the protocol or the device under test.

[0097] Furthermore, after completing the verification platform configuration, the actual output can also be verified, specifically including: S191. Acquire the actual output signal when the target bus outputs the target bus control command.

[0098] S192. Identify the actual frame field, actual field order, actual field value, and actual bus timing parameters from the actual output signal.

[0099] S193. Compare the identification results with the command configuration file to identify any discrepancies.

[0100] S194. Based on the inconsistencies, determine the configurations that need to be adjusted in the stimulus generation component, transaction object class, and stimulus sequence class.

[0101] For example, when the actual frame fields or the actual field order are inconsistent, the basic excitation units or their combination order in the excitation generation component can be located first; when the actual bus timing parameters are inconsistent, the timing constraints in the transaction object class can be located first; when the actual field values ​​are inconsistent, the transaction object settings in the excitation sequence class can be located first. This can reduce the scope of manual troubleshooting.

[0102] The following is a specific implementation example to further illustrate the specific coordination between the command configuration file, script program, stimulus generation component, transaction object class, and stimulus sequence class in the original disclosure scheme. This example uses the SETDASA command in the I3C bus for illustration; the specific command name, field width, and value are for illustrative purposes only and do not constitute a limitation of the present invention.

[0103] The frame structure of a SETDASA command can begin with a start field or a repeating start field, followed by an address header frame, command code frame, repeating start field, target static address frame, and dynamic address frame, and end with a repeating start field or a stop field. The command configuration file can describe only the frame structure of the current command itself; the combination relationship between the current command and subsequent commands can be controlled by different stimulus sequence objects.

[0104] One possible configuration for the command description area is as follows: Include: S / Sr; 0x7E / w / ack; SETDASA_D_CCC_87 / T; Sr; TA(include[0x8:0x5D], exclude[0x3E]) / w / ack; DA(include[0x8:0x3D]) / 0 / ack; Sr / P; Here, S / Sr indicates that the current command begins with a start field or a repeating start field; 0x7E / w / ack indicates that the address header frame includes the preset address, write field, and acknowledge field; SETDASA_D_CCC_87 / T indicates the command name, command type, command code value, and transmission fields; TA and DA represent the target static address and dynamic address, respectively, and the allowed range and excluded values ​​are set by include and exclude; Sr / P indicates that the current command ends with a repeating start field or a stop field.

[0105] One configuration option for an illegal combination area is as follows: Exclude: SS; Sr-S; PP; The above configurations indicate that concatenating a start field after another start field, concatenating a start field after repeating a start field, and concatenating a stop field after another stop field are considered illegal combinations. The script can generate illegal combination information based on this and check the command frame structure before forming a complete stimulus.

[0106] One configuration option for the timing parameter area is as follows: Timing: scl_pp_low = 6; scl_pp_high = 6:7; scl_od_low = 30; scl_od_high = 5:8; sda_delay = 1.

[0107] In the above example, fixed values ​​correspond to fixed timing constraints, while ranges represented by start and end values ​​correspond to random timing constraints. The transaction object class can set data items such as clock low-level time, clock high-level time, and data response delay. During runtime, it generates corresponding timing parameters within the allowed range, and then the excitation generation component outputs bus signals according to these timing parameters.

[0108] To better understand the interaction method of the verification platform, please refer to... Figure 3 , Figure 3 This is a schematic diagram of the interactive structure of the verification platform provided in this embodiment of the invention. When the user first inputs the command configuration file, the script program can identify and extract the frame information of each command, sequentially set the stimulus generation component, transaction object class, and stimulus sequence class, and generate configuration logs respectively. When the protocol or the set of commands supported by the device under test changes subsequently, the user can modify the original command configuration file; after identifying the modification point, the script program only updates the affected basic stimulus units, timing constraints, or field settings, and outputs the update log.

[0109] Please refer to Figure 4 , Figure 4 This is a flowchart illustrating the overall execution of the script program according to an embodiment of the present invention. The script program first obtains the frame structure of the current command based on each set of start and end identifiers, and then determines whether the current command is a new command based on the command name and command code value. For new commands, command information is recorded in a preset command pool, and three types of verification content are set sequentially. For existing commands, the current configuration is compared with historical configurations, and the corresponding content is updated accordingly. After processing the current command, the program continues to check whether there are any unprocessed commands in the command configuration file until all commands have been processed.

[0110] Please refer to Figure 5 , Figure 5This is a flowchart of a script program for automatically generating and updating the stimulus generation component according to an embodiment of the present invention. When setting up the stimulus generation component, basic operations such as start, repeat start, address header, read / write, acknowledge, command code, transfer, destination address, dynamic address, and stop can be encapsulated into basic stimulus units. When the command code in the transaction object is equal to 0x87 and the SETDASA send identifier is valid, the stimulus generation component calls the stimulus combination corresponding to SETDASA. This stimulus combination can sequentially execute the basic stimulus units such as start, address header, write, acknowledge, command code, transfer, repeat start, destination address, write, acknowledge, dynamic address, fixed value, transfer, and stop.

[0111] For new commands, the script combines the basic stimulus units according to the field order and checks whether the combination results contain illegal field combinations. For existing commands, the script adjusts the number, type, or order of the basic stimulus units based on the modification points, and then performs a new validity check. This allows the common underlying operations of different commands to be reused as basic stimulus units.

[0112] Please refer to Figure 6 , Figure 6 This is a flowchart of a script program for automatically generating and updating transaction object classes according to an embodiment of the present invention. When setting up the transaction object class, the SETDASA command code, target address, dynamic address, transmit identifier, and various bus timing parameters can be recorded. For example, the transaction object class can keep the clock low-level time constant at 6 seconds, vary the clock high-level time between 6 and 7 seconds, keep the clock low-level time constant at 30 seconds in another operating mode, vary the corresponding clock high-level time between 5 and 8 seconds, and keep the data response delay constant at 1 second. For existing commands, if the command name, command code, or timing parameters change, the data items or timing constraints are adjusted accordingly.

[0113] Please refer to Figure 7 , Figure 7 This is a flowchart of a script program for automatically generating and updating stimulus sequence classes according to an embodiment of the present invention. When creating a stimulus sequence class, a transaction object can be created, and the target address can be set within the allowed range of 0x08 to 0x5D, excluding 0x3E. The dynamic address can be set within the allowed range of 0x08 to 0x3D, the command code can be set to 0x87, and the SETDASA send flag can be set to valid. When the stimulus sequence object is run, a transaction object for invoking the SETDASA stimulus combination can be generated. For existing commands, the address range, command code, data, or send flag can be adjusted according to changes in the configuration file.

[0114] In this way, users mainly maintain the command configuration file, and the script program can synchronously set or update the stimulus generation component, transaction object class and stimulus sequence class, so that users can output the target command by running the corresponding stimulus sequence object, thereby reducing manual modification of the underlying code of the verification platform after protocol iteration.

[0115] The following describes the verification platform configuration device, electronic device, computer program product, and computer-readable storage medium provided in the embodiments of the present invention. The device, electronic device, computer program product, and computer-readable storage medium described below can be referred to in correspondence with the verification platform configuration method described above.

[0116] Please refer to Figure 8 , Figure 8 This is a structural block diagram of a verification platform configuration device provided in an embodiment of the present invention. The device may include: The file acquisition module 801 is used to acquire the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command. The frame structure includes frame fields, field order, and field values. The excitation generation component setting module 802 is used to obtain the corresponding basic excitation unit according to the frame field of the target bus control command, and combine the basic excitation units according to the field order to obtain the excitation generation component. The transaction object class setting module 803 is used to set the transaction object class according to the frame field and bus timing parameters of the target bus control command, and to set the timing constraints of the transaction object class according to the values ​​of the bus timing parameters. The stimulus sequence class setting module 804 is used to set the stimulus sequence class for generating transaction objects according to the frame field and field value of the target bus control command; The platform configuration module 805 is used to configure the stimulus generation component, transaction object class and stimulus sequence class on the verification platform so that the verification platform can output target bus control commands on the target bus.

[0117] Optionally, the excitation generation component setting module 802 may include: The frame structure acquisition unit is used to obtain the frame field located between the start identifier and the end identifier of the target bus control command in the command configuration file, based on the start identifier and the end identifier of the target bus control command, so as to obtain the frame structure of the target bus control command. The first command judgment unit is used to determine whether the target bus control command is an existing command in the preset command pool based on the command code information of the target bus control command. A new excitation setting unit is added, which is used to record the command code information and frame structure in the preset command pool if there is no existing command, obtain the corresponding basic excitation unit according to the frame field, and combine the basic excitation units according to the field order to obtain the excitation generation component of the target bus control command. An existing stimulus update unit is used to compare the frame structure with the corresponding existing frame structure in the preset command pool if there is an existing command, and adjust the corresponding basic stimulus unit or the combination order of basic stimulus units according to the changed frame fields or field order, so as to update the stimulus generation component corresponding to the target bus control command.

[0118] Optionally, the excitation generation component setting module 802 may further include: The frame structure verification unit is used to verify the frame structure of the target bus control command based on the illegal frame field combination information. The stop setting unit is used to stop setting the excitation generation component and output the verification result when there is an illegal frame field combination information in the frame structure.

[0119] Optionally, the transaction object class setting module 803 may include: The second command judgment unit is used to determine whether the target bus control command is an existing command in the preset command pool based on the command code information of the target bus control command. A new transaction setting unit is added, which is used to record command code information in the preset command pool if there is no existing command, set the transaction object class according to the frame field and bus timing parameters of the target bus control command, and set the timing constraints of the transaction object class according to the value of the bus timing parameters. The existing transaction adjustment unit is used to compare the frame field and bus timing parameters with the existing transaction object class of the target bus control command if there is an existing command. It adjusts the existing transaction object class according to the changed frame field and the timing constraints of the existing transaction object class according to the changed bus timing parameters.

[0120] Optionally, the transaction object class setting module 803 may also include: The fixed constraint setting unit is used to set fixed timing constraints when the values ​​of bus timing parameters are fixed. The random constraint setting unit is used to set random timing constraints that cause the bus timing parameters to vary within the range of values ​​when the values ​​of the bus timing parameters are within a range.

[0121] Optionally, the stimulus sequence class setting module 804 may include: The third command judgment unit is used to determine whether the target bus control command is an existing command in the preset command pool based on the command code information of the target bus control command. A new sequence setting unit is added, which is used to record command code information in the preset command pool if there is no existing command, and to set the incentive sequence class for creating transaction objects and setting the transaction object according to the field values; An existing sequence adjustment unit is used to compare the frame field and field value with the existing excitation sequence class of the target bus control command if there is an existing command, and adjust the existing excitation sequence class according to the changed frame field or field value.

[0122] Optionally, the platform configuration module 805 may include: The stimulus sequence object execution unit is used to create stimulus sequence objects based on the stimulus sequence class and run the stimulus sequence objects to generate transaction objects corresponding to the transaction object class; The command output unit is used to read the transaction object through the stimulus generation component and output the target bus control command on the target bus according to the field values ​​contained in the transaction object and the bus timing parameters.

[0123] Optionally, the device may further include: The manual adjustment receiving module is used to receive manual adjustment information for at least one of the bus timing parameters, frame fields, field order, and field values ​​in the command configuration file; The file adjustment module is used to adjust the command configuration file according to manual adjustment information, and to configure the verification platform using the adjusted command configuration file. The configuration log module is used to generate configuration logs for the stimulus generation component, transaction object class, and stimulus sequence class. The configuration logs are used to record the parsing results of the command configuration file and the configuration results of the stimulus generation component, transaction object class, and stimulus sequence class.

[0124] Optionally, the device may further include a deletion command processing module, an illegal test module, and a closed-loop verification module. The deletion command processing module is used to identify existing commands that are no longer included in the command configuration file, and delete or disable the corresponding three types of verification content; The closed-loop verification module is used to collect the actual output signal, compare the recognition result with the command configuration file, and locate the configuration that needs to be adjusted based on the inconsistencies.

[0125] Please refer to Figure 9 , Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. The embodiment of the present invention provides an electronic device 10, including a processor 11 and a memory 12; wherein the memory 12 is used to store a computer program; and the processor 11 is used to execute the verification platform configuration method provided in the foregoing embodiment when executing the computer program.

[0126] The specific process of configuring the above verification platform can be found in the corresponding content of the foregoing embodiments, and will not be repeated here.

[0127] The memory 12 serves as a carrier for resource storage and can be a read-only memory, random access memory, disk, or optical disk, etc. The storage method can be temporary storage or permanent storage.

[0128] In addition, the electronic device 10 also includes a power supply 13, a communication interface 14, an input / output interface 15, and a communication bus 16; wherein, the power supply 13 is used to provide operating voltage for the various hardware devices on the electronic device 10; the communication interface 14 can create a data transmission channel between the electronic device 10 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of the present invention; the input / output interface 15 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to application needs.

[0129] This invention also provides a computer program product, including a computer program or instructions, which, when executed by a processor, implement the above-described verification platform configuration method.

[0130] Since the embodiments of the computer program product part correspond to the embodiments of the verification platform configuration method part, the embodiments of the computer program product part can be found in the description of the verification platform configuration method part, and will not be repeated here.

[0131] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the aforementioned verification platform configuration method. The computer-readable storage medium can be a non-volatile computer-readable storage medium.

[0132] Since the embodiments of the computer-readable storage medium portion correspond to the embodiments of the verification platform configuration method portion, the embodiments of the storage medium portion can be found in the description of the verification platform configuration method portion, and will not be repeated here.

[0133] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the relevant parts can be referred to the method section.

[0134] Those skilled in the art will further recognize that the example units and processing steps described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of both. Whether the above functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can implement the described functions using different methods for specific applications, but such implementations should not be considered beyond the scope of this invention.

[0135] The method steps described in conjunction with the embodiments disclosed herein can be implemented directly using hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory, memory, read-only memory, electrically programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, removable disks, optical disks, or other forms of storage media known in the art.

[0136] The present invention has provided a detailed description of a verification platform configuration method, apparatus, electronic device, and storage medium. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of these embodiments are merely illustrative of the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to the invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A method for configuring a verification platform, characterized in that, include: Obtain the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command, the frame structure including frame fields, field order and field values; For a target bus control command, the corresponding basic excitation unit is obtained according to its frame field, and the basic excitation unit is combined according to its field order to obtain an excitation generation component; Set the transaction object class according to the frame field of the target bus control command and the bus timing parameters, and set the timing constraints of the transaction object class according to the value of the bus timing parameters; The stimulus sequence class for generating transaction objects is set according to the frame field and field values ​​of the target bus control command; The stimulus generation component, the transaction object class, and the stimulus sequence class are configured on the verification platform so that the verification platform outputs the target bus control command on the target bus.

2. The verification platform configuration method according to claim 1, characterized in that, The method for obtaining a target bus control command involves acquiring the corresponding basic excitation unit based on its frame field, and combining the basic excitation units according to their field order to obtain an excitation generation component, including: In the command configuration file, the frame field located between the start identifier and the end identifier of the target bus control command is obtained according to the start identifier and the end identifier, so as to obtain the frame structure of the target bus control command; Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information and the frame structure are recorded in the preset command pool. The corresponding basic excitation unit is obtained according to the frame field, and the basic excitation unit is combined according to the field order to obtain the excitation generation component of the target bus control command. If a command already exists, the frame structure is compared with the corresponding existing frame structure in the preset command pool, and the corresponding basic excitation unit or the combination order of the basic excitation unit is adjusted according to the changed frame fields or field order to update the excitation generation component corresponding to the target bus control command.

3. The verification platform configuration method according to claim 2, characterized in that, The command configuration file also includes information on illegal frame field combinations; Before assembling the basic excitation unit, the following is also included: The frame structure of the target bus control command is verified based on the illegal frame field combination information; When the frame structure contains a field combination corresponding to the illegal frame field combination information, the activation component is stopped and the verification result is output.

4. The verification platform configuration method according to claim 1, characterized in that, The step of setting a transaction object class based on the frame field of the target bus control command and the bus timing parameters, and setting timing constraints for the transaction object class based on the values ​​of the bus timing parameters, includes: Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information is recorded in the preset command pool, the transaction object class is set according to the frame field of the target bus control command and the bus timing parameters, and the timing constraints of the transaction object class are set according to the value of the bus timing parameters. If a command already exists, the frame field and the bus timing parameters are compared with the existing transaction object class of the target bus control command. The existing transaction object class is adjusted according to the changed frame field, and the timing constraints of the existing transaction object class are adjusted according to the changed bus timing parameters.

5. The verification platform configuration method according to claim 4, characterized in that, Setting the timing constraints of the transaction object class according to the values ​​of the bus timing parameters includes: When the bus timing parameters are set to fixed values, fixed timing constraints are set. When the bus timing parameter takes a value within a range, a random timing constraint is set to make the bus timing parameter vary within the range.

6. The verification platform configuration method according to claim 1, characterized in that, The step of setting the stimulus sequence class for generating transaction objects based on the frame field and field values ​​of the target bus control command includes: Based on the command code information of the target bus control command, determine whether the target bus control command is an existing command in the preset command pool; If there is no existing command, the command code information is recorded in the preset command pool, and the incentive sequence class for creating a transaction object is set according to the value of the field. If a command already exists, the frame field and its value are compared with the existing stimulus sequence class of the target bus control command, and the existing stimulus sequence class is adjusted according to the changed frame field or its value.

7. The verification platform configuration method according to claim 1, characterized in that, The verification platform outputs the target bus control commands on the target bus, including: An incentive sequence object is created based on the incentive sequence class, and the incentive sequence object is run to generate a transaction object corresponding to the transaction object class; The excitation generation component reads the transaction object and outputs the target bus control command on the target bus according to the field values ​​and bus timing parameters contained in the transaction object.

8. The verification platform configuration method according to any one of claims 1 to 7, characterized in that, Also includes: Receive manual adjustment information for at least one of the bus timing parameters, frame fields, field order, and field values ​​in the command configuration file; The command configuration file is adjusted according to the manually adjusted information, and the verification platform is configured using the adjusted command configuration file.

9. The verification platform configuration method according to claim 1, characterized in that, After configuring the stimulus generation component, the transaction object class, and the stimulus sequence class in the verification platform, the following is also included: The configuration logs for the stimulus generation component, the transaction object class, and the stimulus sequence class are generated; the configuration logs are used to record the parsing results of the command configuration file and the configuration results of the stimulus generation component, the transaction object class, and the stimulus sequence class.

10. A verification platform configuration device, characterized in that, include: The file acquisition module is used to acquire the command configuration file; the command configuration file includes bus timing parameters and the frame structure of each bus control command, and the frame structure includes frame fields, field order and field values; The excitation generation component setting module is used to obtain the corresponding basic excitation unit according to the frame field of the target bus control command, and combine the basic excitation unit according to the field order to obtain the excitation generation component. The transaction object class setting module is used to set the transaction object class according to the frame field of the target bus control command and the bus timing parameters, and to set the timing constraints of the transaction object class according to the value of the bus timing parameters. The incentive sequence class setting module is used to set the incentive sequence class for generating transaction objects according to the frame field and field value of the target bus control command; The platform configuration module is used to configure the stimulus generation component, the transaction object class, and the stimulus sequence class on the verification platform so that the verification platform outputs the target bus control command on the target bus.

11. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the verification platform configuration method as described in any one of claims 1 to 9 when executing the computer program.

12. A non-volatile computer-readable storage medium, characterized in that, The non-volatile computer-readable storage medium stores computer-executable instructions, which, when loaded and executed by a processor, implement the verification platform configuration method as described in any one of claims 1 to 9.

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