Task allocation method and management device

Abstract

The embodiment of the application provides a task allocation method and a management device, which are applied to the field of management devices and include the following steps: receiving a user's computing task, wherein the computing task comprises a target node list and a total process number; obtaining hardware performance parameters of the target nodes based on the target node list; determining performance occupation scores corresponding to the target nodes according to the hardware performance parameters; and allocating the computing task to the target nodes according to the performance occupation scores and the total process number, so as to solve the problem of low resource utilization caused by a static load allocation strategy.

Description

Technical Field

[0001] This application relates to the field of management equipment technology, and in particular to a task allocation method and management equipment. Background Technology

[0002] When the current cluster processes computing tasks, it needs to distribute the tasks to different nodes for processing.

[0003] In related technologies, a static load distribution strategy is typically used to distribute the computing load across different nodes during the execution of large-scale parallel computing tasks.

[0004] However, using a static load balancing strategy to allocate computing load can lead to low resource utilization. Summary of the Invention

[0005] This application provides a task allocation method and management device, which solves the problem of low resource utilization.

[0006] In a first aspect, embodiments of this application provide a task allocation method applied to a management device. The management device connects to multiple nodes, which include at least two different types of CPU architectures. The method includes: receiving a user's computing task, the computing task including a target node list and a total number of processes; obtaining hardware performance parameters of the target nodes based on the target node list; determining the performance occupancy score corresponding to the target node based on the hardware performance parameters; and allocating the computing task to the target nodes based on the performance occupancy score and the total number of processes.

[0007] The task allocation method provided in this application involves obtaining the hardware performance parameters of the target node after receiving the user's computing task, determining the corresponding performance occupancy score using the hardware performance parameters, and allocating the computing task to the target node based on the performance occupancy score, so that the performance occupancy score matches the computing task.

[0008] In one possible implementation, the performance occupancy score corresponding to the target node is determined based on the hardware performance parameters, including: determining the high load probability corresponding to the hardware performance parameters; and weighted summing of the high load probabilities to obtain the performance occupancy score corresponding to the target node.

[0009] This embodiment of the disclosure determines the high load probability corresponding to the hardware performance parameters, and then sums the weighted coefficients to obtain the performance occupancy score, thereby quantifying the hardware occupancy of the node and facilitating the subsequent allocation of computing tasks that match the hardware usage.

[0010] In one possible implementation, determining the high load probability corresponding to the hardware performance parameters includes: determining the abnormal probability corresponding to the hardware performance parameters; and determining the high load probability corresponding to the hardware performance parameters based on the abnormal probability.

[0011] This embodiment of the disclosure determines the probability of abnormality corresponding to hardware performance parameters, and then determines the probability of high load corresponding to the abnormality probability, thereby realizing the possibility of excessive hardware load, which facilitates subsequent task allocation based on the possibility of excessive hardware load.

[0012] In one possible implementation, determining the high load probability corresponding to the hardware performance parameter based on the anomaly probability includes: multiplying the target anomaly probability by a preset likelihood value corresponding to the target hardware performance parameter to obtain the target dividend; multiplying the preset likelihood value corresponding to each hardware performance parameter by the anomaly probability to obtain the divisor corresponding to each hardware performance parameter; adding the divisors corresponding to each hardware performance parameter to obtain the total divisor; and dividing the target dividend by the total divisor to obtain the high load probability corresponding to the target hardware performance parameter.

[0013] This embodiment of the disclosure achieves a quantitative analysis of the likelihood of excessive load on the target hardware by calculating the posterior probability corresponding to the anomaly probability.

[0014] In one possible implementation, the task type is calculated; based on the task type, the weighting coefficients corresponding to the hardware performance parameters are determined; using the weighting coefficients, the high-load probabilities are weighted and summed to obtain the performance occupancy score corresponding to the target node.

[0015] This embodiment of the disclosure determines the weighting coefficients corresponding to the hardware performance parameters based on the task type, and uses the weighting coefficients to sum the high load probabilities to obtain the performance occupancy score corresponding to the target node. This enables a more accurate determination of the node's performance occupancy score based on the task type, facilitating a more accurate allocation of computational tasks in the future.

[0016] In one possible implementation, the task type corresponding to the task is calculated; based on the hardware performance parameters, the performance score corresponding to the target node is determined, including: inputting the task type and the node hardware performance parameters of the target node into a pre-trained performance evaluation model to obtain the performance score corresponding to the target node.

[0017] This embodiment of the disclosure inputs the task type and node hardware performance parameters into a pre-trained performance evaluation model, along with the performance usage score corresponding to the target node, to enable the model to predict performance usage and increase the accuracy of performance prediction.

[0018] In one possible implementation, the computation task is allocated to the target node based on the performance occupancy score and the total number of processes, including: inputting the performance occupancy score into a proportional-differential-integral algorithm to obtain the load ratio corresponding to the target node; multiplying the load ratio by the total number of processes to obtain the target number of processes; and allocating the target number of computation tasks to the target node.

[0019] This embodiment of the disclosure obtains the load ratio by inputting the performance occupancy score into the PID algorithm, and allocates computing tasks according to the load ratio to achieve balanced scheduling of computing load among nodes, thereby avoiding imbalance in node resource utilization caused by uneven task allocation.

[0020] In one possible implementation, the computation task is allocated to the target node based on the performance score and the total number of processes, including: obtaining the endianness of the target node; if the endianness of the target node is little-endian and the computation task is big-endian, then converting the computation task to little-endian to obtain the converted computation task; allocating the converted computation task to the target node based on the performance score and the total number of processes; if the endianness of the target node is big-endian and the computation task is little-endian, then converting the computation task to big-endian to obtain the converted computation task; and allocating the converted computation task to the target node based on the performance score and the total number of processes.

[0021] This embodiment of the disclosure obtains the endpoint pattern of the target node. When the endpoint pattern of the target node and the endpoint pattern of the computing task are different, the endpoint pattern of the computing task is converted into the endpoint pattern that matches the computing node, so that the computing node can identify the computing task.

[0022] In one possible implementation, after allocating the computational tasks to the target nodes based on performance consumption scores and the total number of processes, the method further includes: obtaining the computational results from the target nodes; and merging the computational results to obtain a comprehensive result.

[0023] This embodiment of the disclosure obtains the calculation results of the target node, merges the calculation results to obtain a comprehensive result, and integrates the overall calculation results after obtaining the calculation results of each node.

[0024] In one possible implementation, after allocating the computing tasks to the target nodes based on performance consumption scores and the total number of processes, the method further includes: obtaining the comprehensive results corresponding to the computing tasks; converting the comprehensive results into the format corresponding to the end-order mode according to the end-order mode of the task issuing side to obtain the comprehensive results to be returned; and sending the comprehensive results to be returned to the task issuing side.

[0025] This embodiment of the disclosure converts the format of the synthesis results according to the terminal sequence mode of the task issuing side and sends them to the task issuing side, so that the task issuing side can correctly read the synthesis results.

[0026] Secondly, embodiments of this application also provide a computing node, including a memory and a baseboard management controller;

[0027] The memory and the baseboard management controller are coupled; the memory is used to store program instructions; the baseboard management controller is used to invoke the program instructions to cause the management device to perform the method described in the first aspect.

[0028] The task allocation method and management device provided in this application obtain the hardware performance parameters of the target node after receiving the user's computing task, determine the corresponding performance occupancy score using the hardware performance parameters, and allocate the computing task to the target node according to the performance occupancy score, so that the performance occupancy score matches the computing task. Attached Figure Description

[0029] Figure 1 A schematic diagram of the system architecture for the application task allocation method provided in the embodiments of this application;

[0030] Figure 2 This is a schematic diagram of a task allocation scenario provided in an embodiment of this application;

[0031] Figure 3 This is a schematic diagram of the task allocation process provided in the embodiments of this application;

[0032] Figure 4 A schematic diagram illustrating a simplified model training process provided in this application embodiment;

[0033] Figure 5 This is a schematic diagram of the end-order conversion process provided in an embodiment of this application;

[0034] Figure 6 This is a schematic diagram of the overall process of the task allocation method provided in the embodiments of this application;

[0035] Figure 7 A schematic diagram of the structure of the task allocation device provided in the embodiments of this application;

[0036] Figure 8 This is a schematic diagram of the structure of a management device provided in an embodiment of this application. Detailed Implementation

[0037] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0038] In the process of processing computing tasks, the existing cluster needs to distribute the corresponding tasks to each node to complete the execution.

[0039] In existing technologies, for large-scale parallel computing tasks, inter-process communication mechanisms are typically used to employ static load balancing strategies to distribute the computing load among nodes. However, this static load balancing approach often results in low system resource utilization.

[0040] In response to the above-mentioned technical content, the inventors propose the following technical concept: after receiving a computing task, the hardware performance parameters of the corresponding node of the computing task are obtained, the performance occupancy score is determined based on the hardware performance parameters, and the computing task is allocated based on the performance occupancy score.

[0041] Figure 1 This is a schematic diagram of the system architecture for the application task allocation method provided in the embodiments of this application. Figure 1 As shown, the application scenarios of the task allocation method include: managing device 101.

[0042] The management device 101 may include computers, servers, tablets, mobile phones, PDAs (personal digital assistants), and laptops, which can perform application processing.

[0043] The application architecture for managing devices includes the application layer, interface layer, communication layer, and basic hardware layer.

[0044] The application layer can include any type of application such as life science applications, fluid simulation applications, meteorological applications, and astrophysical applications. The interface layer can include point-to-point communication, aggregated communication, process management, feature acquisition, and load balancing. The communication layer can include Remote Direct Memory Access (RDMA), Unified Communication X (UCX), and data conversion modules. The basic hardware includes processor platforms with the same or different architectures, network interface cards (NICs), etc. In the basic hardware layer, processor platforms with different architectures can encapsulate hardware characteristics through a common interface, so that upper-layer modules do not need to be aware of specific processor types. At the same time, different types of NICs are supported on the network, providing the basic hardware for RDMA in the communication layer. This application mainly involves the process management, feature acquisition, load balancing, and data conversion modules. The data conversion module converts the endianness and bit width differences of basic data types between different processor platforms to ensure data consistency between different architectures. Since data conversion is performed, a data integration module can also be added to package the data.

[0045] Figure 2 This is a schematic diagram of a task allocation scenario provided in an embodiment of this application. Figure 2As shown, when applications adapted to different architectures (x86-64 architecture, aarch64 architecture) propose computing tasks, they are allocated to the computing nodes of the corresponding architecture through a unified message passing interface.

[0046] Figure 3 This is a schematic diagram of a task allocation process provided for an embodiment of this application. The task allocation process can be applied to... Figure 1 Management equipment within. For example... Figure 3 As shown, the task allocation process includes steps S201 to S204.

[0047] S201: Receive the user's computing task, which includes a list of target nodes and the total number of processes.

[0048] In this step, a computing task sent by a terminal device can be received. The computing task may include the number of nodes or the node architecture type, and the target node list includes the node identifiers.

[0049] The computational tasks can include cross-node computational tasks. Task types can include computationally intensive computational tasks, memory-intensive computational tasks, etc.

[0050] S202: Obtain the hardware performance parameters of the target node based on the target node list.

[0051] In this step, based on the target node list, the identifier of the target node is obtained, and based on the identifier of the target node, the hardware performance parameters of the target node are obtained. The hardware performance parameters may include at least one of the following: processor utilization, IO bandwidth utilization, message passing interface (MPI) waiting time, network bandwidth utilization, etc.

[0052] Specifically, the xMPI protocol can be used to obtain the hardware performance parameters of the target node. Alternatively, the target node's identifier can be used from the target node list to invoke the xMPI protocol and obtain the target node's hardware performance parameters through cross-architecture node communication.

[0053] S203: Determine the performance score corresponding to the target node based on the hardware performance parameters.

[0054] This step may include finding the correspondence between hardware performance parameters and performance usage scores based on the hardware performance parameters of different hardware types, and obtaining the corresponding performance usage scores.

[0055] The correspondence between parameters and performance usage scores can be correlated with hardware type; that is, different hardware types have different correspondences between parameters and performance usage scores.

[0056] S204: Assign computing tasks to target nodes based on performance consumption scores and total number of processes.

[0057] In this step, the allocation ratio of processes is determined based on the performance consumption score; and the computing tasks are allocated to the target nodes according to the allocation ratio based on the total number of processes.

[0058] For example, for the processes corresponding to the grid of a molecular dynamics calculation task, the grid size is divided according to the allocation ratio (the number of processes corresponds to the size of the grid) and the calculation task processes are allocated accordingly.

[0059] As can be seen from the description of the above embodiments, the embodiments of this disclosure, after receiving computing tasks from users including at least two different types of CPU architectures, obtain the hardware performance parameters of the target nodes based on the list of target nodes included in the computing tasks, determine the corresponding performance occupancy score using the hardware performance parameters, and allocate the computing tasks to the target nodes according to the performance occupancy score, so that the performance occupancy score matches the computing tasks.

[0060] In one possible implementation, step S203 above, determining the performance score corresponding to the target node based on hardware performance parameters, includes:

[0061] S2031: Determine the probability of high load corresponding to hardware performance parameters.

[0062] In this step, different hardware can correspond to different maximum likelihood values ​​for anomalies, as well as hardware performance parameters. The corresponding hardware anomaly probability can be determined based on the hardware performance parameters. The hardware anomaly probability of the target hardware is multiplied by the hardware performance parameters, and then divided by the sum of the products of the hardware anomaly probabilities and hardware performance parameters of each hardware to obtain the high load probability.

[0063] S2032: Weighted summation of high load probabilities yields the performance occupancy score corresponding to the target node.

[0064] In this step, the high load probability is multiplied by a preset weight and then added together to obtain the performance usage score.

[0065] As can be seen from the description of the above embodiments, the embodiments of this disclosure determine the high load probability corresponding to the hardware performance parameters, and obtain the performance occupancy score by weighted summation of each weight coefficient, thereby quantifying the hardware occupancy of the node and facilitating the subsequent allocation of computing tasks that match the hardware usage.

[0066] In one possible implementation, in S2031, determining the high load probability corresponding to the hardware performance parameters includes:

[0067] S311: Determine the probability of anomalies corresponding to hardware performance parameters.

[0068] In this step, the target parameter range to which the hardware performance parameters belong can be determined. Then, based on the target parameter range, the correspondence between the parameter range and the anomaly probability can be found to obtain the corresponding anomaly probability.

[0069] S312: Determine the high load probability corresponding to the hardware performance parameters based on the anomaly probability.

[0070] In this step, the abnormal probability of the target hardware can be multiplied by the preset likelihood value of the target hardware to obtain the probability product. Similarly, the probability product of each hardware can be calculated. The probability products of each hardware are added together to obtain the overall probability. The high load probability is obtained by dividing the probability product of the target hardware by the overall probability.

[0071] This step can be expressed as the following formula:

[0072]

[0073] In the formula, This indicates the probability of high load on the target hardware (hardware x). This represents the preset likelihood value of the target hardware. This represents the preset likelihood value for each piece of hardware. This represents the probability of an anomaly in the target hardware. This represents the probability of an anomaly in hardware y.

[0074] in, The calculation method is as follows:

[0075]

[0076] in, This represents the preset likelihood value of the target hardware. This represents the probability of an anomaly in the target hardware. , , , These are preset values ​​for processor utilization, I / O bandwidth utilization, network bandwidth utilization, and MPI latency (which can be set based on experimental data or experience).

[0077] As can be seen from the description of the above embodiments, the embodiments of this disclosure determine the probability of excessive hardware load by determining the abnormal probability corresponding to the hardware performance parameters, and then determining the corresponding high load probability from the abnormal probability, so as to facilitate the subsequent allocation of calculation tasks based on the probability of excessive hardware load.

[0078] In one possible implementation, step S312 above, determining the high load probability corresponding to the hardware performance parameters based on the anomaly probability, includes:

[0079] S3121: Multiply the target anomaly probability by the preset likelihood value corresponding to the target hardware performance parameters to obtain the target dividend.

[0080] In this step, the target anomaly probability, target hardware performance parameters, and preset likelihood values ​​can all correspond to the same hardware.

[0081] S3122: Multiply the preset likelihood value corresponding to each hardware performance parameter by the anomaly probability to obtain the divisor corresponding to each hardware performance parameter.

[0082] This step can be represented as "in the formula of the above embodiment" ".

[0083] S3123: Add the divisors corresponding to each hardware performance parameter to obtain the total divisor.

[0084] This step can be represented as "in the formula of the above embodiment" ".

[0085] S3124: Divide the target dividend by the total divisors to obtain the high load probability corresponding to the target hardware performance parameters.

[0086] In this step, for example, if the target dividend is 0.6 and the total divisor is 2, then the high load probability corresponding to the target hardware performance parameter is 0.3. As another example, if the target dividend is 0.8 and the total divisor is 4, then the high load probability corresponding to the target hardware performance parameter is 0.2.

[0087] As can be seen from the description of the above embodiments, the embodiments of this disclosure achieve quantitative analysis of the probability of excessive load on the target hardware by calculating the posterior probability corresponding to the anomaly probability.

[0088] In one possible implementation, the task type corresponding to the task is calculated. In step S2032 above, the high-load probability is weighted and summed to obtain the performance occupancy score corresponding to the target node, including:

[0089] S2321: Determine the weighting coefficients corresponding to the hardware performance parameters based on the task type.

[0090] In this step, the correspondence between task type and weight coefficient can be found based on the task type to obtain hardware performance parameters.

[0091] The correspondence between task type and weight coefficient can be pre-set by staff based on experimental data, and the weight coefficients corresponding to hardware performance parameters under different task types are stored.

[0092] S322: Determine the weighting coefficients corresponding to the hardware performance parameters based on the task type.

[0093] In this step, based on the task type, the correspondence between the task type and the weight coefficient is found to obtain the weight coefficient corresponding to the hardware performance parameters.

[0094] The correspondence between task types and weight coefficients can be pre-set based on experimental data; the correspondence between task types and weight coefficients can store the weight coefficients corresponding to different hardware performance parameters under different task types.

[0095] S323: Using weighted coefficients, the high load probabilities are weighted and summed to obtain the performance occupancy score corresponding to the target node.

[0096] In this step, the high load probability is multiplied by the corresponding weight coefficient, and the products are added together to obtain the performance occupancy score corresponding to the target node.

[0097] As can be seen from the description of the above embodiments, the embodiments of this disclosure determine the weight coefficients corresponding to the hardware performance parameters according to the task type, and use the weight coefficients to weight and sum the high load probabilities to obtain the performance occupancy score corresponding to the target node. This enables a more accurate determination of the node's performance occupancy score based on the task type, which facilitates a more accurate allocation of the computation task process in the future.

[0098] In one possible implementation, the task type corresponds to the computation task; in step S203 above, the performance score corresponding to the target node is determined based on hardware performance parameters, including:

[0099] S203B1: Input the task type and the node hardware performance parameters of the target node into the pre-trained performance evaluation model to obtain the performance score of the target node.

[0100] The performance evaluation model can be trained using a Convolutional Neural Network (CNN) or an optimized distributed gradient boosting library (eXtreme Gradient Boosting, XGBoost). The training data can be collected during application runtime. Data collection can be performed at given intervals, such as 1 second, 2 seconds, and 5 seconds, continuously collecting CPU utilization, I / O bandwidth utilization, network bandwidth utilization, and MPI latency percentage for each node, forming an N×4 matrix of approximately 10K data points. After data collection, manual annotation based on experience and rules can be performed. In addition to instantaneous values, the mean, standard deviation, and slope of a sliding window (e.g., over the past 30, 50, and 60 seconds) can be calculated to capture dynamic patterns, and all features can be scaled to a standard normal distribution. The trained performance evaluation model can be accessed via an API.

[0101] As can be seen from the description of the above embodiments, the embodiments of this disclosure input the task type and node hardware performance parameters into a pre-trained performance evaluation model, and the performance occupancy score corresponding to the target node, so as to use the model to predict the performance occupancy and increase the accuracy of performance prediction.

[0102] Figure 4 This is a simplified schematic diagram illustrating the model training process provided in an embodiment of this application. Figure 4 As shown, the brief process of model training includes:

[0103] S401: Data acquisition performance metrics at the second level.

[0104] S402: Expert annotation generates training labels.

[0105] S403: Feature engineering construction timing features.

[0106] S404: Model training is performed using XGBoost or CNN networks.

[0107] S405: Deploy the model via the application programming interface.

[0108] S406: Real-time prediction and response output bottleneck type.

[0109] S407: Continuous optimization, based on new data iteration.

[0110] In one possible implementation, step S204 above, which involves allocating computational tasks to target nodes based on performance consumption scores and the total number of processes, includes:

[0111] S204A1: Input the performance occupancy score into the proportional differential integral algorithm to obtain the load ratio corresponding to the target node.

[0112] In this step, the performance usage score of each node can be normalized and then input into the PID algorithm to obtain the load ratio corresponding to the target node. Alternatively, the performance usage score can be directly input into the PID algorithm to obtain the corresponding load ratio.

[0113] S204A2: Multiply the total number of processes by the load ratio to obtain the target number of processes.

[0114] In this step, for example, if the load ratio is 10% and the total number of processes is 80, then the target number of processes is 8. Another example is if the load ratio is 20% and the total number of processes is 10, then the target number of processes is 2. Yet another example is if the load ratio is 50% and the total number of processes is 12, then the target number of processes is 6.

[0115] S204A3: Assign the number of computational tasks equal to the target number of processes to the target node.

[0116] In this step, processes can be scheduled and bound to different nodes through configuration files or schedulers, allowing processes assigned to different nodes to execute the corresponding computational shards.

[0117] As can be seen from the description of the above embodiments, the embodiments of this disclosure obtain the load ratio by inputting the performance occupancy score into the PID algorithm, and allocate the computing tasks according to the load ratio and the total number of processes to achieve balanced scheduling of computing load among nodes, thereby avoiding imbalance in node resource utilization caused by uneven task allocation.

[0118] In one possible implementation, step S204 above, which involves allocating computational tasks to target nodes based on performance consumption scores and the total number of processes, includes:

[0119] S204B1: Obtain the end-order mode of the target node.

[0120] In this step, the target node's endpoint sequence mode can be obtained by finding the correspondence between the preset architecture type and the endpoint sequence mode based on the target node's architecture type.

[0121] S204B2: If the target node's endianness is little-endian and the computation task is big-endian, then convert the computation task to little-endian to obtain the converted computation task. Based on the performance score and the total number of processes, allocate the converted computation task to the target node.

[0122] In this step, the endianness of the computation task data can be converted to obtain the converted computation task process allocation process, which is similar to step S2043 above, and will not be repeated here.

[0123] For example, if x86 or ARM architecture nodes use little-endian byte order, while network byte order is big-endian, then the data input from the network side to the processor needs to be converted from big-endian to little-endian, and vice versa. Data types can use fixed-width integer types and explicit alignment rules.

[0124] S204B3: If the target node's endianness is big-endian and the computation task is little-endian, then convert the computation task to big-endian to obtain the converted computation task. Assign the converted computation task to the target node based on its performance score.

[0125] This step is similar to step S204B2 above, and will not be repeated here.

[0126] As can be seen from the description of the above embodiments, the embodiments of this disclosure obtain the endpoint pattern of the target node, and when the endpoint pattern of the target node and the endpoint pattern of the computing task are in different endpoint patterns, convert the endpoint pattern of the computing task into an endpoint pattern that matches the computing node, so that the computing node can identify the computing task.

[0127] Figure 5 This is a schematic diagram illustrating the end-order conversion process provided in an embodiment of this application. Figure 5 As shown, the source and target platforms use different endiannesses during the endianness conversion process. In the source platform, the native structure of the first architecture is serialized to obtain a canonical format (little-endian compact byte stream). Serialization includes byte order conversion and memory packing. The target platform then deserializes the original structure of the second architecture.

[0128] In one possible implementation, after step S204 above, which allocates the computational tasks to the target nodes based on performance occupancy scores, the method further includes:

[0129] S230: Obtain the calculation results of the target node.

[0130] This step may include receiving the computation results output by the target node. It may also include retrieving the computation results from the target node's storage location.

[0131] S231: Combine the calculation results to obtain the comprehensive result.

[0132] In this step, the results of each node can be sorted and placed according to the dimension identifiers when the task is split (such as data shard index, calculation area number, task sequence number, etc.), duplicate calculations or redundant data are removed, and then the corresponding aggregation logic is used to complete the merging according to the task type (numerical results are integrated by summation, mean, extreme value, weighted statistics, etc., structured data is spliced, merged or aligned according to the index, and unstructured results are spliced ​​and integrated according to the shard order).

[0133] As can be seen from the description of the above embodiments, the embodiments of this disclosure obtain the calculation results of the target node, merge the calculation results to obtain a comprehensive result, and realize the integration of the overall calculation results after obtaining the calculation results of each node.

[0134] In one possible implementation, after step S204 above, where computational tasks are allocated to target nodes based on performance occupancy scores and the total number of processes, the following further step is included:

[0135] S240: Obtain the comprehensive results corresponding to the computation task.

[0136] This step can be described as described in steps S230 and S231 above.

[0137] S241: Based on the endpoint sequence mode of the task publishing side, convert the synthesis results into the format corresponding to the endpoint sequence mode to obtain the synthesis results to be returned.

[0138] In this step, if the endpoint order mode on the task issuing side is the same as the endpoint order mode of the synthesis result, no conversion is required. If conversion is required, the order is reversed to obtain the synthesis result to be recycled.

[0139] S242: Send the integrated results to be returned to the task issuing side.

[0140] In this step, the integrated results to be returned can be sent to the task issuing side in formats such as messages and data packets.

[0141] As can be seen from the description of the above embodiments, the embodiments of this disclosure obtain the comprehensive result corresponding to the computing task, convert the format of the comprehensive result according to the end sequence mode of the task issuing side, and send it to the task issuing side so that the task issuing side can correctly read the comprehensive result.

[0142] Figure 6 This is a schematic diagram illustrating the overall flow of the task allocation method provided in an embodiment of this application. Figure 6 As shown, the task allocation method includes:

[0143] Users submit cross-node computing tasks, specifying parameters such as the total number of processes and the list of computing nodes. The management device parses the task and starts the applications on all nodes in the list, enabling the processes on the master node and sub-nodes to run. Applications on different nodes are pre-compiled executables for their respective architectures. Computing node A and computing node B in the diagram can have the same or different architectures.

[0144] The task of parsing the task and launching the applications of all nodes in the list can include using the xMPI interface to parse the task and launch the applications of all nodes in the list. The applications of the nodes can be pre-compiled executable files for the corresponding architecture.

[0145] Each slave node obtains hardware performance parameters and returns them to the master node, which then combines and comprehensively evaluates the computing power (performance usage score).

[0146] The master node uses the computing power of each node as the basis for dividing the load (computing tasks) and divides the load proportionally. Each slave node then starts its computing task.

[0147] Once each node has completed its calculation, it returns the results to the master node, which then merges the results.

[0148] If the computation task is a multi-round iterative task, the steps of proportionally dividing the load and returning the computation results to the master node, and the master node merging the results, are repeated. During each iteration, the node load is monitored in real time, and the task is reallocated. In the next iteration, the heavily loaded task is assigned to a node with high computing power, a node with lower performance consumption score, or a node with a lower probability of high load.

[0149] Within a cluster with the same CPU architecture, collaborative computing across different levels of computing power enables fine-grained dynamic load balancing, avoiding the bottleneck effect. For example, in computing clusters built in multiple batches, due to differences in CPU generations, early-built clusters have smaller CPU cores, lower clock speeds, and do not support new instructions, while later-built clusters have larger CPU cores, higher clock speeds, and support new instructions. Therefore, different queue management systems are used for the nodes with CPUs of different specifications.

[0150] In this way, all nodes with different computing power levels can be integrated into a cluster. When running parallel tasks across nodes, the computing power gap can be balanced by a dynamic load balancing model, enabling the execution of larger-scale computing tasks or shortening the time required for computing tasks of the same scale.

[0151] Figure 7 This is a schematic diagram of the structure of the task allocation device provided in an embodiment of this application. Figure 7 As shown, the task allocation device 700 is applied to a management device that connects to multiple nodes, including at least two different types of CPU architectures. The task allocation device 700 includes: a task receiving module 701, a parameter acquisition module 702, a score determination module 703, and a task allocation module 704.

[0152] The task receiving module 701 is used to receive the user's computing tasks, which include a list of target nodes and the total number of processes.

[0153] The parameter acquisition module 702 is used to acquire the hardware performance parameters of the target nodes based on the target node list.

[0154] The score determination module 703 is used to determine the performance score corresponding to the target node based on the hardware performance parameters.

[0155] The task allocation module 704 is used to allocate computing tasks to target nodes based on performance usage scores and the total number of processes.

[0156] In one possible implementation, the score determination module 703 is used to determine the high load probability corresponding to the hardware performance parameters. The high load probabilities are weighted and summed to obtain the performance occupancy score corresponding to the target node.

[0157] In one possible implementation, the score determination module 703 is used to determine the probability of anomalies corresponding to the hardware performance parameters. Based on the probability of anomalies, the probability of high load corresponding to the hardware performance parameters is determined.

[0158] In one possible implementation, the score determination module 703 is used to multiply the target anomaly probability by a preset likelihood value corresponding to the target hardware performance parameter to obtain the target dividend. The preset likelihood value corresponding to each hardware performance parameter is multiplied by the anomaly probability to obtain the divisor corresponding to each hardware performance parameter. The divisors corresponding to all hardware performance parameters are added together to obtain the total divisor. The target dividend is divided by the total divisor to obtain the high load probability corresponding to the target hardware performance parameter.

[0159] In one possible implementation, the calculation task corresponds to the task type. The score determination module 703 is used to determine the weighting coefficients corresponding to the hardware performance parameters based on the task type. Using these weighting coefficients, the high-load probabilities are weighted and summed to obtain the performance occupancy score corresponding to the target node.

[0160] In one possible implementation, the computation task corresponds to the task type.

[0161] The score determination module 703 is used to input the task type and the node hardware performance parameters of the target node into the pre-trained performance evaluation model to obtain the performance score corresponding to the target node.

[0162] In one possible implementation, the task allocation module 704 is used to input the performance occupancy score into a proportional-differential-integral algorithm to obtain the load ratio corresponding to the target node. The load ratio is multiplied by the total number of processes to obtain the target number of processes. The computational tasks, with a quantity equal to the target number of processes, are then allocated to the target node.

[0163] In one possible implementation, the task allocation module 704 is used to obtain the endianness of the target node. If the target node's endianness is little-endian and the computation task is big-endian, the computation task is converted to little-endian, resulting in a converted computation task. Based on the performance score and the total number of processes, the converted computation task is allocated to the target node. If the target node's endianness is big-endian and the computation task is little-endian, the computation task is converted to big-endian, resulting in a converted computation task. Based on the performance score and the total number of processes, the converted computation task is allocated to the target node.

[0164] In one possible implementation, the task allocation device 700 includes a result return module 705.

[0165] The result feedback module 705 is used to obtain the comprehensive results corresponding to the computation task. Based on the endpoint sequence mode of the task issuing side, the comprehensive results are converted to the format corresponding to the endpoint sequence mode to obtain the comprehensive results to be fed back. The comprehensive results to be fed back are then sent to the task issuing side.

[0166] Figure 8This is a schematic diagram of a management device provided in an embodiment of this application. The management device can be a first management device, or it can be a second management device.

[0167] like Figure 8 As shown, the management device 800 may include a baseboard management controller 801 and a memory 802, wherein the baseboard management controller 801 and the memory 802 are coupled and can communicate with each other; for example, the baseboard management controller 801 and the memory 802 communicate via a communication bus 803, the memory 802 is used to store computer execution instructions, and the baseboard management controller 801 is used to invoke the computer execution instructions in the memory to execute the task allocation method shown in the above method embodiment. The management device 800 may be a server.

[0168] Optionally, the management device 800 may also include a communication interface, which may include a transmitter and / or a receiver.

[0169] Optionally, the aforementioned baseboard management controller can be a central processing unit (CPU), a graphics processing unit (GPU), other general-purpose processors, digital signal processors (DSPs), or application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.

[0170] This application provides a computer-readable storage medium storing computer program instructions; when the program instructions are executed by a management device, the management device performs the above-described task allocation method.

[0171] This application provides a computer program product, which includes computer program instructions. When the computer program instructions are executed, they cause a management device or a management device to perform the above-described task allocation method.

[0172] All or part of the steps in the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, it performs the steps of the above method embodiments; and the aforementioned memory (storage medium) includes: read-only memory (ROM), RAM, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disk, and any combination thereof.

[0173] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them. Although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A task allocation method, characterized in that, Applied to a management device connected to multiple nodes, the multiple nodes including at least two different types of CPU architectures, the method includes: Receive a user's computing task, which includes a list of target nodes and a total number of processes; Obtain the hardware performance parameters of the target nodes based on the target node list; Based on the hardware performance parameters, determine the performance score corresponding to the target node; The computing tasks are allocated to the target nodes based on the performance consumption score and the total number of processes.

2. The method according to claim 1, characterized in that, The step of determining the performance score corresponding to the target node based on the hardware performance parameters includes: Determine the high load probability corresponding to the hardware performance parameters; The performance occupancy score corresponding to the target node is obtained by weighted summation of the high load probabilities.

3. The method according to claim 2, characterized in that, Determining the high load probability corresponding to the hardware performance parameters includes: Determine the probability of anomalies corresponding to the hardware performance parameters; Based on the anomaly probability, the high load probability corresponding to the hardware performance parameters is determined.

4. The method according to claim 3, characterized in that, The step of determining the high load probability corresponding to the hardware performance parameter based on the anomaly probability includes: Multiply the target anomaly probability by the preset likelihood value corresponding to the target hardware performance parameters to obtain the target divisor; Multiply the preset likelihood value corresponding to each hardware performance parameter by the anomaly probability to obtain the divisor corresponding to each hardware performance parameter; Add the divisors corresponding to each hardware performance parameter to get the total divisor; Divide the target dividend by the total divisors to obtain the high load probability corresponding to the target hardware performance parameters.

5. The method according to claim 2, characterized in that, The computation task corresponds to the task type; The step of weighted summation of the high-load probabilities to obtain the performance occupancy score corresponding to the target node includes: Based on the task type, determine the weighting coefficients corresponding to the hardware performance parameters; Using the weighting coefficients, the high load probabilities are weighted and summed to obtain the performance occupancy score corresponding to the target node.

6. The method according to claim 1, characterized in that, The computation task corresponds to the task type; The step of determining the performance score corresponding to the target node based on the hardware performance parameters includes: The task type and the node hardware performance parameters of the target node are input into a pre-trained performance evaluation model to obtain the performance score corresponding to the target node.

7. The method according to claim 1, characterized in that, The step of allocating the computing tasks to the target node based on the performance consumption score and the total number of processes includes: The performance occupancy score is input into a proportional differential integral algorithm to obtain the load ratio corresponding to the target node; Multiply the load ratio by the total number of processes to obtain the target number of processes; The number of processes of the computing task, equal to the target number of processes, are allocated to the target node.

8. The method according to any one of claims 1 to 6, characterized in that, The step of allocating the computing tasks to the target node based on the performance consumption score and the total number of processes includes: Obtain the end-order pattern of the target node; If the target node is little-endian and the computation task is big-endian, then the computation task is converted to little-endian to obtain a converted computation task; based on the performance score and the total number of processes, the processes of the converted computation task are allocated to the target node. If the target node is big-endian and the computation task is little-endian, then the computation task is converted to big-endian to obtain a converted computation task; based on the performance score and the total number of processes, the processes of the converted computation task are allocated to the target node.

9. The method according to any one of claims 1 to 6, characterized in that, After allocating the computing tasks to the target nodes based on the performance consumption score and the total number of processes, the method further includes: Obtain the comprehensive result corresponding to the computation task; Based on the endpoint sequence mode of the task publishing side, the synthesis result is converted into the format corresponding to the endpoint sequence mode to obtain the synthesis result to be sent back. The integrated results to be returned are sent to the task issuing side.

10. A management device, characterized in that, The management device includes a memory and a baseboard management controller; The memory and the substrate management controller are coupled; The memory is used to store program instructions; The baseboard management controller is used to invoke the program instructions to cause the management device to perform the method as described in any one of claims 1 to 9.

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