Method and apparatus for sparse matrix multiplication search based on permutation equivalence class zero block topology

Abstract

The application relates to the technical field of computing data processing, in particular to a zero block topology sparse matrix multiplication search method and device based on permutation equivalence classes, wherein the method comprises the following steps: constructing permutation equivalence classes based on the row or column permutation symmetry of all zeroing schemes; in the case of determining a target matrix multiplication strategy expression, setting a target zero block position to zero through variable elimination to generate a strategy conforming to a target block sparse format; and based on the permutation equivalence classes and the strategy conforming to the target block sparse format, determining at least one sparse strategy space by generating multiple root node schemes for each equivalence class to perform zero block topology sparse matrix multiplication search. Therefore, the problems that search complexity is significantly improved, it is difficult to converge to a high-quality solution in time and the efficiency of matrix multiplication strategy search is seriously restricted due to the fact that related technologies directly perform search in a complete tensor space are solved.

Description

Technical Field

[0001] This application relates to the field of computational data processing technology, and in particular to a zero-block topological sparse matrix multiplication search method and apparatus based on permutation equivalence classes. Background Technology

[0002] Matrix multiplication strategy search methods typically construct a candidate matrix multiplication decomposition space and use search algorithms to iteratively explore different tensor representation structures in order to find low-rank decomposition schemes that satisfy computational complexity constraints, thereby achieving an efficient search for low-rank decomposition structures of matrix multiplication.

[0003] However, related techniques typically search directly in the complete tensor space. When the matrix size is large, the number of candidate decomposition structures grows rapidly, and the search space exhibits combinatorial explosion, resulting in a significant increase in search complexity. This makes it difficult to converge to a high-quality solution in a timely manner, which severely restricts the search efficiency of matrix multiplication strategies. Summary of the Invention

[0004] This application provides a zero-block topological sparse matrix multiplication search method and apparatus based on permutation equivalence classes to solve the problem in related technologies that directly searching in the complete tensor space leads to a significant increase in search complexity, makes it difficult to converge to a high-quality solution in a timely manner, and seriously restricts the search efficiency of matrix multiplication strategies.

[0005] The first aspect of this application provides a zero-block topological sparse matrix multiplication search method based on permutation equivalence classes, comprising the following steps: constructing permutation equivalence classes based on the row or column permutation symmetry of all zeroing schemes; given a determined expression for the target matrix multiplication strategy, setting the target zero-block position to zero through variable elimination to generate a strategy conforming to the sparse format of the target block; and determining at least one sparse strategy space by generating multiple root node schemes for each equivalence class based on the permutation equivalence classes and the strategies conforming to the sparse format of the target block, thereby performing a zero-block topological sparse matrix multiplication search.

[0006] By employing the above techniques, based on the row or column permutation symmetry of all zeroing schemes, a permutation equivalence class is constructed. By applying zero-block topological constraints directly to the policy tensor through variable elimination, search space compression and constraint pre-positioning can be achieved, reducing redundant and invalid searches, lowering the search complexity of matrix multiplication policies, and improving the search efficiency and solution efficiency of low-rank matrix multiplication policies.

[0007] Optionally, in one embodiment of this application, based on the row or column permutation symmetry of all zeroing schemes, a permutation equivalence class is constructed, including: generating all zeroing schemes that zero out a number of cells; generating all row permutations and column permutations until all zeroing schemes are traversed, constructing equivalence relations, and determining the permutation mapping from each zeroing scheme to the root node of its equivalence class, so as to determine the permutation equivalence class.

[0008] By using the above technical means, equivalence relations are constructed using all row and column permutations, and the permutation mapping from each zeroing scheme to the root node of its equivalence class is determined. This establishes a unified equivalence class index relationship, improves the efficiency of candidate scheme management, and provides a fast mapping basis for subsequent matrix multiplication strategy search.

[0009] Optionally, in one embodiment of this application, when the target matrix multiplication strategy expression is determined, setting the target zero block position to zero through variable elimination to generate a strategy conforming to the target block sparse format includes: decomposing the target matrix strategy expression into a product of multiple factors, wherein each factor corresponds to a coefficient polynomial of a matrix; detecting whether each term of each factor contains a variable to be eliminated; and in response to a variable containing a variable to be eliminated, removing the term containing the variable to be eliminated to output a strategy conforming to the target block sparse format.

[0010] By using the above techniques, the target zero-block position is set to zero through variable elimination to generate a strategy that conforms to the sparse format of the target block. This ensures that the search process always satisfies the zero-block constraint, reduces the invalid search space, and improves the effectiveness of the strategy search.

[0011] Optionally, in one embodiment of this application, at least one sparse policy space is determined by generating multiple root node schemes for each equivalence class based on the permutation equivalence class and the policy conforming to the target block sparse format, including: generating multiple root node schemes for each equivalence class of the permutation equivalence class; and determining at least one sparse policy space based on the multiple root node schemes according to the policy conforming to the target block sparse format.

[0012] By using the above techniques, multiple root node schemes can be generated for each equivalence class of permutation equivalence classes, which can cover the policy space corresponding to different zero block distributions and sparse topologies. Policy search can be performed based on different root nodes, which can reduce the repeated exploration of similar policies and improve the efficiency of matrix multiplication policy search.

[0013] Optionally, in one embodiment of this application, determining at least one sparse policy space based on multiple root node schemes includes: loading the root node policy of each equivalence class; for each member in each equivalence class, if its permutation to the root node is a unit permutation, then the member policy is equal to the root node policy; otherwise, the root node policy is applied to the permutation corresponding to the member to obtain the member policy; all member policies are output to a file, and the index, root node index, whether it is a root node, zeroing position, and output file path of each member policy are recorded.

[0014] By using the above techniques to determine the strategy of each member in the equivalence class based on the root node, equivalent strategies with the same sparse topology and matrix multiplication computation characteristics can be generated quickly, thereby reducing the repeated construction of equivalent strategies and improving strategy generation efficiency.

[0015] A second aspect of this application provides a zero-block topological sparse matrix multiplication search apparatus based on permutation equivalence classes, comprising: a construction module for constructing permutation equivalence classes based on the row or column permutation symmetry of all zeroing schemes; a generation module for setting the target zero-block position to zero by variable elimination, given a determined target matrix multiplication strategy expression, to generate a strategy conforming to the target block sparse format; and a search module for determining at least one sparse strategy space by generating multiple root node schemes for each equivalence class based on the permutation equivalence classes and the strategy conforming to the target block sparse format, to perform a zero-block topological sparse matrix multiplication search.

[0016] Optionally, in one embodiment of this application, the construction module includes: a generation unit, configured to generate all zeroing schemes that set zero-element cells to zero; and a construction unit, configured to generate all row permutations and column permutations until all zeroing schemes are traversed, construct equivalence relations, and determine the permutation mapping from each zeroing scheme to the root node of its equivalence class, so as to determine the permutation equivalence class.

[0017] Optionally, in one embodiment of this application, the generation module includes: a decomposition unit for decomposing the target matrix policy expression into a product of multiple factors, wherein each factor corresponds to a coefficient polynomial of a matrix; a detection unit for detecting whether each term of each factor contains a variable to be eliminated; and a removal unit for removing terms containing variables to be eliminated in response to variables containing variables to be eliminated, so as to output a policy that conforms to the target block sparse format.

[0018] Optionally, in one embodiment of this application, the search module includes: a processing unit, configured to generate multiple root node schemes for each equivalence class of a permutation equivalence class; and a determination unit, configured to determine at least one sparse policy space based on a policy conforming to the target block sparse format, according to the multiple root node schemes.

[0019] Optionally, in one embodiment of this application, the determining unit is configured to include: a loading subunit for loading the root node policy of each equivalence class; a permutation subunit for determining, for each member in each equivalence class, if its permutation to the root node is a unit permutation, then the member policy is equal to the root node policy; otherwise, the root node policy is applied to the permutation corresponding to the member to obtain the member policy; and a recording subunit for outputting all member policies to a file and recording the index, root node index, whether it is a root node, zeroing position, and output file path of each member policy.

[0020] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes as described in the above embodiments.

[0021] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described zero-block topological sparse matrix multiplication search method based on permutation equivalence classes.

[0022] A fifth aspect of this application provides a computer program product, including a computer program that, when executed, is used to implement the above-described zero-block topological sparse matrix multiplication search method based on permutation equivalence classes.

[0023] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0024] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein: Figure 1 This is a flowchart of a zero-block topological sparse matrix multiplication search method based on permutation equivalence classes provided in an embodiment of this application; Figure 2 This is a block diagram of a zero-block topological sparse matrix multiplication search device based on permutation equivalence classes according to an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application.

[0025] Figure label: 10- Zero-block topological sparse matrix multiplication search device based on permutation equivalence class; 100- Construction module, 200- Generation module, 300- Search module; 301- Memory, 302- Processor, 303- Communication interface. Detailed Implementation

[0026] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0027] The following description, with reference to the accompanying drawings, describes a zero-block topological sparse matrix multiplication search method and apparatus based on permutation equivalence classes according to embodiments of this application. Addressing the technical problem mentioned in the background art, where direct searching in the complete tensor space leads to significantly increased search complexity and difficulty in timely convergence to a high-quality solution, severely restricting the search efficiency of matrix multiplication strategies, this application provides a zero-block topological sparse matrix multiplication search method based on permutation equivalence classes. This method aims to compress the search space through permutation equivalence classes and combine variable elimination to pre-position block sparse constraints, thereby reducing redundant and invalid searches in matrix multiplication strategy searches and improving the search and solution efficiency of low-rank matrix multiplication strategies.

[0028] Specifically, Figure 1 This is a flowchart illustrating a zero-block topological sparse matrix multiplication search method based on permutation equivalence classes provided in an embodiment of this application.

[0029] like Figure 1 As shown, the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes includes the following steps: In step S101, based on the row or column permutation symmetry of all zeroing schemes, a permutation equivalence class is constructed.

[0030] In this context, the zeroing scheme refers to the sparse structure configuration formed by assigning zero to some elements in the candidate coefficient matrix scheme during matrix multiplication tensor decomposition. This configuration indicates which computational terms are retained and which are deleted. Different zeroing schemes correspond to different matrix multiplication decomposition structures and computational complexities.

[0031] As a concrete example, given a matrix size m and the number of zeros n, all C(m) can be... 2 There are n ways to zero out a coordinate system, represented as a set of n coordinates. Each zeroing scheme corresponds to a type, represented as a set of k coordinates (r_i, c_i) in an N×N matrix.

[0032] Row or column permutation symmetry means that for two candidate matrix decomposition schemes, if one can be obtained by performing row permutation, column permutation or a combination of both on the other, and the matrix multiplication calculation relationship and decomposition rank remain unchanged before and after the permutation, then the two are considered to have row or column permutation symmetry.

[0033] A permutation equivalence class can be defined as follows: if solution A can be obtained from solution B through a certain rp (row permutation) and a certain cp (column permutation), then A and B belong to the same equivalence class. Row permutation applies to the row indices of all matrix elements, and column permutation applies to the column indices of all matrix elements.

[0034] In the embodiments of this application, schemes within the same permutation equivalence class can be converted to each other through several row permutations and column permutations to avoid repeated traversal of essentially identical decomposition structures, thereby reducing search complexity and computational overhead.

[0035] As one possible approach, based on the row or column permutation symmetry of all zeroing schemes, a permutation equivalence class is constructed, including: generating all zeroing schemes that zero out a number of cells; generating all row and column permutations until all zeroing schemes are traversed, constructing equivalence relations, and determining the permutation mapping from each zeroing scheme to the root node of its equivalence class, so as to determine the permutation equivalence class.

[0036] In generating all zeroing schemes, this embodiment of the application can select a corresponding number of position combinations from the set of all element positions in the candidate coefficient matrix according to a set number of zero elements, and set the elements at the selected positions to zero to generate all zeroing schemes. Each scheme can be represented as a set of coordinates with the number of zero elements.

[0037] When generating all row and column permutations, each row and column permutation is a permutation from 1 to the size of the matrix, and the number of row and column permutations is the factorial of the size of the matrix.

[0038] When traversing all zeroing schemes, this embodiment of the application attempts all combinations of row and column permutations for each zeroing scheme. If the transformed scheme is the same as the existing root node, the scheme is assigned to the equivalence class corresponding to the root node; otherwise, a new equivalence class is created, and the scheme is used as the new root node.

[0039] Subsequently, embodiments of this application record the permutation mapping from each scheme to the root node of its equivalence class, the mapping including the row and column permutations required to be applied from the scheme to the root node.

[0040] Using the above method, the search space of this application embodiment can be expanded from C(m) 2 The number of equivalence classes (n) is reduced to eliminate structural redundancy caused by row and column permutations, avoid repeated searches for candidate solutions with the same computational properties, thereby reducing search complexity and improving the search efficiency of the matrix multiplication strategy. For each equivalence class, a root node solution is selected and stored in the template directory. The filename format reflects the coordinates of the zero-set position, and the root node represents that equivalence class for subsequent searches.

[0041] In step S102, given the target matrix multiplication strategy expression, the target zero block position is set to zero by variable elimination to generate a strategy that conforms to the target block sparse format.

[0042] As a concrete example, the target matrix multiplication strategy expression can be represented as the sum of several products, each consisting of coefficient variables from three matrices A, B, and C. Here, matrix A has variable a_ij, matrix B has variable b_jk, and matrix C has variable c_ki.

[0043] Variable elimination refers to using the constraints between variables during matrix multiplication tensor decomposition to substitute variables that can be determined by other variables, thereby reducing the number of independent search variables and lowering the dimensionality of the candidate solution space. Target block sparsity refers to dividing the elements of a matrix or tensor into multiple fixed-size data blocks based on computational resource constraints or algorithm optimization requirements, and specifying that some data blocks are all set to zero to form a sparse structure constraint, used to limit the non-zero distribution form of the matrix multiplication strategy to be searched.

[0044] In this embodiment, the zero block position can be determined according to the sparse format requirements of the target block, and the coefficient variable corresponding to the zero block position is set to zero constraint. The variable value is fixed by variable elimination, thereby reducing the dimension of the search variable and generating a matrix multiplication strategy that conforms to the target sparse structure.

[0045] Optionally, in one embodiment of this application, when the target matrix multiplication strategy expression is determined, setting the target zero block position to zero through variable elimination to generate a strategy conforming to the target block sparse format includes: decomposing the target matrix strategy expression into a product of multiple factors, wherein each factor corresponds to a coefficient polynomial of a matrix; detecting whether each term of each factor contains a variable to be eliminated; and in response to a variable containing a variable to be eliminated, removing the term containing the variable to be eliminated to output a strategy conforming to the target block sparse format.

[0046] In the embodiments of this application, decomposing the matrix multiplication strategy expression into the product of several factors means converting the high-dimensional tensor expression representing the matrix multiplication calculation relationship into a combination of multiple low-rank factor tensors, so that each factor corresponds to a part of the calculation structure, and the complete matrix multiplication strategy is represented by the combination of multiple factors.

[0047] First, this embodiment of the application can decompose the policy expression into a product of several factors, with each factor corresponding to a coefficient polynomial of a matrix. For each term in each factor, it is checked whether it contains a variable to be eliminated; the variable format is a_xy, b_xy, or c_xy, where x and y represent the row index and column index, respectively. Subsequently, this embodiment of the application can remove terms containing variables to be eliminated; if any factor in a term becomes zero, then that term is removed. Finally, if any term after elimination is zero, the entire policy is invalid; if there are no valid terms after elimination, the output is empty; otherwise, the policy after elimination is output.

[0048] This application embodiment can directly generate a strategy that conforms to the sparse format of the target block by predefining zero-block topology constraints and performing elimination. No post-processing is required; constraints can be applied to the strategy tensor before the search to ensure that the search results meet the zero-block topology requirements.

[0049] In step S103, based on the permutation equivalence class and the strategy that conforms to the target block sparse format, at least one sparse strategy space is determined by generating multiple root node schemes for each equivalence class in order to perform zero-block topological sparse matrix multiplication search.

[0050] In the embodiments of this application, all strategies within the same permutation equivalence class can be converted to each other by applying row permutations and column permutations, and the zero-block topology remains unchanged after the conversion.

[0051] The specific rules for permutation transformations are as follows: Row permutations apply to the row dimensions of both matrices A and C. When a row permutation rp is applied to the policy, the i-th row of matrix A becomes the rp(i)-th row, and the i-th row of matrix C becomes the rp(i)-th row.

[0052] Column permutations apply to the column dimensions of both matrices B and C. When a column permutation cp is applied to the strategy, the j-th column of matrix B becomes the cp(j)-th column, and the j-th column of matrix C becomes the cp(j)-th column.

[0053] The transformed strategy belongs to the same permutation equivalence class as the original strategy and shares the same zero-block topology. The permutation transformation is implemented using a lookup table method, and pre-computed permutation maps are used to avoid redundant computation.

[0054] For each permutation equivalence class, the embodiments of this application can transform the representative zeroing scheme according to different combinations of row permutations and column permutations to generate multiple root node schemes with different initial zero block distributions, and use the root node scheme as the initial state for subsequent matrix multiplication strategy search, which can avoid repeated search for each zeroing scheme and reduce the search space size.

[0055] As a concrete example, based on permutation equivalence classes and a strategy conforming to the sparse format of the target block, at least one sparse strategy space is determined by generating multiple root node schemes for each equivalence class, including: generating multiple root node schemes for each equivalence class of the permutation equivalence class; and determining at least one sparse strategy space based on the multiple root node schemes according to the strategy conforming to the sparse format of the target block.

[0056] For each permutation equivalence class, embodiments of this application can generate multiple root node schemes with different initial zero-block distributions; each root node scheme corresponds to a specific zero-block topology. Permutations of all members within the equivalence class are applied to each root node scheme to generate all variants corresponding to that root node; each variant shares the same zero-block topology, but the specific coordinates of the zeroing positions are different.

[0057] By selecting root nodes with different topologies, embodiments of this application can systematically cover various sparse strategy configurations, reduce repeated exploration of similar sparse structures by different search paths, and improve search efficiency.

[0058] In actual execution, at least one sparse policy space is determined based on multiple root node schemes, including: loading the root node policy of each equivalence class; for each member in each equivalence class, if its permutation to the root node is a unit permutation, then the member policy is equal to the root node policy; otherwise, the root node policy is applied to the permutation corresponding to the member to obtain the member policy; all member policies are output to a file, and the index, root node index, whether it is a root node, zeroing position and output file path of each member policy are recorded.

[0059] It can be noted that, using pre-computed permutation mapping, the policies of all members within the equivalence class can be automatically generated from the root node policy.

[0060] The specific steps for batch generation are as follows: 1) Construct the permutation equivalence class of the zeroing scheme to obtain the permutation mapping from each member to the root node, including row permutations and column permutations.

[0061] 2) For each equivalence class, load its root node strategy, which is stored in the template directory.

[0062] 3) For each member in the equivalence class, if its permutation to the root node is a unit permutation, then the policy of that member is equal to the policy of the root node; otherwise, apply the permutation corresponding to that member to the root node policy to obtain the policy of that member.

[0063] 4) Output all generated strategies to a file. The file name format should reflect the zeroing position of the strategy. Also record the index, root node index, whether it is a root node, zeroing position and output file path of each strategy.

[0064] The embodiments of this application can achieve automatic expansion of search results. Only one search is needed for each equivalence class, and the expansion automatically generates all variants.

[0065] The zero-block topological sparse matrix multiplication search method based on permutation equivalence classes proposed in this application constructs permutation equivalence classes based on the row and column permutation symmetry of all zeroing schemes. This merges a large number of structurally equivalent candidate schemes into a small number of representative schemes for searching, effectively reducing redundant searches, significantly reducing the search space, and improving the search efficiency of matrix multiplication strategies. Simultaneously, zero-block topological constraints are directly applied to the strategy tensor through variable elimination, and the coefficient variables corresponding to the zero blocks are pre-fixed, reducing the number of free variables to be optimized. This ensures that the search process always meets the sparse format requirements of the target block, reducing invalid search overhead and improving solution efficiency and convergence speed. Furthermore, based on the root node strategy and its permutation mapping relationship, other member strategies within the equivalence class can be quickly recovered without repeatedly storing or reconstructing equivalent schemes. This ensures the consistency of the strategy structure while improving strategy generation efficiency, providing support for the rapid search, verification, and deployment of low-rank strategies in matrix multiplication.

[0066] Next, referring to the accompanying drawings, a zero-block topological sparse matrix multiplication search device based on permutation equivalence classes is described according to an embodiment of this application.

[0067] Figure 2 This is a block diagram of a zero-block topological sparse matrix multiplication search device based on permutation equivalence classes according to an embodiment of this application.

[0068] like Figure 2 As shown, the zero-block topological sparse matrix multiplication search device 10 based on permutation equivalence classes includes: a construction module 100, a generation module 200, and a search module 300.

[0069] Among them, the construction module 100 is used to construct a permutation equivalence class based on the row or column permutation symmetry of all zeroing schemes.

[0070] The generation module 200 is used to set the target zero block position to zero by variable elimination when the target matrix multiplication strategy expression is determined, so as to generate a strategy that conforms to the sparse format of the target block.

[0071] Search module 300 is used to determine at least one sparse policy space by generating multiple root node schemes for each equivalence class based on permutation equivalence classes and policies conforming to the target block sparse format, in order to perform zero-block topological sparse matrix multiplication search.

[0072] Optionally, in one embodiment of this application, the construction module 100 includes a generation unit and a construction unit.

[0073] The generation unit is used to generate all zeroing schemes that set the zero-element number of cells to zero.

[0074] The building unit is used to generate all row and column permutations until all zeroing schemes are traversed, construct equivalence relations, and determine the permutation mapping from each zeroing scheme to the root node of its equivalence class, so as to determine the permutation equivalence class.

[0075] Optionally, in one embodiment of this application, the generation module 200 includes: a decomposition unit, a detection unit, and a removal unit.

[0076] The decomposition unit is used to decompose the target matrix strategy expression into a product of multiple factors, where each factor corresponds to a coefficient polynomial of a matrix.

[0077] The detection unit is used to detect whether each item of each factor contains the variable to be eliminated.

[0078] The removal unit is used to remove terms containing variables to be eliminated in response to a variable containing a variable to be eliminated, so as to output a strategy that conforms to the sparse format of the target block.

[0079] Optionally, in one embodiment of this application, the search module 300 includes a processing unit and a determining unit.

[0080] The processing unit is used to generate multiple root node schemes for each equivalence class of the permutation equivalence class.

[0081] A determination unit is used to determine at least one sparse policy space based on a policy conforming to the target block sparse format and multiple root node schemes.

[0082] Optionally, in one embodiment of this application, the determining unit is used to include: a loading subunit, a replacement subunit, and a recording subunit.

[0083] The loading subunit is used to load the root node strategy for each equivalence class.

[0084] The permutation subunit is used to determine the member policy for each member in each equivalence class. If the permutation from the member to the root node is a unit permutation, the member policy is equal to the root node policy. Otherwise, the root node policy is applied to the permutation corresponding to the member to obtain the member policy.

[0085] The recording sub-unit is used to output all member policies to a file and record the index, root node index, whether it is a root node, the zeroing position, and the output file path of each member policy.

[0086] It should be noted that the foregoing explanation of the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes also applies to the zero-block topological sparse matrix multiplication search device based on permutation equivalence classes in this embodiment, and will not be repeated here.

[0087] The zero-block topological sparse matrix multiplication search device based on permutation equivalence classes proposed in this application constructs permutation equivalence classes based on the row and column permutation symmetry of all zeroing schemes. This merges a large number of structurally equivalent candidate schemes into a small number of representative schemes for searching, effectively reducing redundant searches, significantly shrinking the search space, and improving the search efficiency of matrix multiplication strategies. Simultaneously, zero-block topological constraints are directly applied to the strategy tensor through variable elimination, and the coefficient variables corresponding to the zero blocks are pre-fixed, reducing the number of free variables to be optimized. This ensures that the search process always meets the sparse format requirements of the target block, reducing invalid search overhead and improving solution efficiency and convergence speed. Furthermore, based on the root node strategy and its permutation mapping relationship, other member strategies within the equivalence class can be quickly recovered without repeatedly storing or reconstructing equivalent schemes. This ensures the consistency of the strategy structure while improving strategy generation efficiency, providing support for the rapid search, verification, and deployment of low-rank matrix multiplication strategies.

[0088] Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include: The memory 301, the processor 302, and the computer program stored on the memory 301 and capable of running on the processor 302.

[0089] When the processor 302 executes the program, it implements the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes provided in the above embodiments.

[0090] Furthermore, electronic devices also include: Communication interface 303 is used for communication between memory 301 and processor 302.

[0091] The memory 301 is used to store computer programs that can run on the processor 302.

[0092] The memory 301 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0093] If the memory 301, processor 302, and communication interface 303 are implemented independently, then the communication interface 303, memory 301, and processor 302 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, Figure 3 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0094] Optionally, in a specific implementation, if the memory 301, processor 302, and communication interface 303 are integrated on a single chip, then the memory 301, processor 302, and communication interface 303 can communicate with each other through an internal interface.

[0095] Processor 302 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.

[0096] This embodiment also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes as described above.

[0097] This application also provides a computer program product, including a computer program that can run computer instructions. When the computer instructions are executed by a processor, they implement the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes provided in this application.

[0098] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0099] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0100] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0101] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0102] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, it can be implemented using any one or more of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0103] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0104] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0105] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. A zero-block topological sparse matrix multiplication search method based on permutation equivalence classes, characterized in that, Includes the following steps: Based on the row or column permutation symmetry of all zeroing schemes, construct permutation equivalence classes; Given a defined expression for the target matrix multiplication strategy, variable elimination is used to set the target zero-block positions to zero, thereby generating a strategy that conforms to the sparse format of the target blocks. Based on the permutation equivalence class and the strategy conforming to the target block sparse format, at least one sparse strategy space is determined by generating multiple root node schemes for each equivalence class to perform zero-block topological sparse matrix multiplication search.

2. The method according to claim 1, characterized in that, The construction of permutation equivalence classes based on the row or column permutation symmetry of all zeroing schemes includes: Generate all the zeroing schemes that set the number of zero-element cells to zero; Generate all row and column permutations until all the zeroing schemes are traversed, construct equivalence relations, and determine the permutation mapping from each zeroing scheme to the root node of its equivalence class to determine the permutation equivalence class.

3. The method according to claim 1, characterized in that, The step of setting the target zero block positions to zero through variable elimination, given a determined target matrix multiplication strategy expression, to generate a strategy conforming to the target block sparse format, includes: The target matrix strategy expression is decomposed into a product of multiple factors, where each factor corresponds to a coefficient polynomial of a matrix. Detect whether each term of each factor contains a variable to be eliminated; In response to the variable containing the element to be eliminated, remove the item containing the variable to output the strategy that conforms to the target block sparse format.

4. The method according to claim 1, characterized in that, The strategy based on the permutation equivalence class and the target block sparse format determines at least one sparse strategy space by generating multiple root node schemes for each equivalence class, including: Generate multiple root node schemes for each of the permutation equivalence classes; Based on the strategy that conforms to the target block sparse format, at least one sparse strategy space is determined according to multiple root node schemes.

5. The method according to claim 4, characterized in that, Determining the at least one sparse policy space based on multiple root node schemes includes: Load the root node strategy for each equivalence class; For each member in each equivalence class, if its permutation to the root node is a unit permutation, then the member policy is equal to the root node policy; otherwise, the root node policy is applied to the permutation corresponding to the member to obtain the member policy. Output all member policies to a file and record the index, root node index, whether it is a root node, the zeroing position, and the output file path for each member policy.

6. A zero-block topological sparse matrix multiplication search device based on permutation equivalence classes, characterized in that, include: A module is built to construct permutation equivalence classes based on the row or column permutation symmetry of all zeroing schemes; The generation module, given a defined target matrix multiplication strategy expression, sets the target zero-block positions to zero through variable elimination to generate a strategy conforming to the sparse format of the target blocks. The search module is used to determine at least one sparse policy space by generating multiple root node schemes for each equivalence class based on the permutation equivalence class and the policy that conforms to the target block sparse format, so as to perform zero-block topological sparse matrix multiplication search.

7. The apparatus according to claim 6, characterized in that, The building module includes: A generation unit is used to generate all the zeroing schemes that set the zero-element number of cells to zero; A construction unit is used to generate all row permutations and column permutations until all the zeroing schemes are traversed, construct equivalence relations, and determine the permutation mapping from each zeroing scheme to the root node of its equivalence class, so as to determine the permutation equivalence class.

8. An electronic device, characterized in that, include: The memory, the processor, and the computer program stored in the memory and capable of running on the processor, wherein the processor executes the program to implement the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes as described in any one of claims 1-5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes as described in any one of claims 1-5.

10. A computer program product, comprising a computer program, characterized in that, The computer program is executed to implement the zero-block topological sparse matrix multiplication search method based on permutation equivalence classes as described in any one of claims 1-5.

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