A method, device, equipment and medium for detecting a multi-layer board stacking sequence

Abstract

The application discloses a kind of multilayer board stack sequence detection method, device, equipment and medium, it is related to printed circuit board manufacturing technical field.The method comprises: obtaining the target image of PCB board;Wherein, PCB board is the multilayer board that has completed pressing plate process, has not carried out component assembly, and the copper block of interlayer misregistration is arranged in the copper-free area of the board edge of PCB board;With the center point of first layer copper block in target image as origin, establish coordinate system, extract the coordinates of each layer copper block center point;Calculate the horizontal interval between adjacent layer copper block center points;With the standard layer sequence interval of pre-set, whether the stack sequence of PCB board is correct is judged by comparing horizontal interval.This application determines by numerical horizontal direction coordinate difference, eliminates subjective error of artificial visual inspection, detection precision is high, fast, and without professional operation, can realize the online full-automatic detection of multilayer board stack sequence, and timely intercepts interlayer stack reverse or wrong after pressing plate process.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a method, apparatus, equipment, and medium for detecting the stacking sequence of multilayer boards. Background Technology

[0002] In the manufacturing process of multilayer printed circuit boards (PCBs), the inner core boards need to undergo inner layer circuit fabrication and browning treatment before being stacked using a welding machine or riveting machine, and then laminated into a multilayer board. During this process, due to manual loading errors, abnormal equipment positioning, or unclear core board orientation markings, the inner core boards are prone to being reversed in orientation (e.g., rotated 180°) or having incorrect layer sequence (e.g., L2 and L4 layers interchanged). This is commonly referred to in the industry as interlayer reversal or interlayer error.

[0003] When multilayer boards are reversed or incorrectly stacked, the outer layers after lamination will exhibit various observable structural anomalies. The industry primarily identifies these anomalies through manual visual inspection: checking for differences in the outermost layer's circuitry and verifying the layer number markings at the board's edge. However, this manual inspection method is extremely inefficient and has a very high rate of missed detections. After subsequent processes such as drilling, copper plating, dry film application, pattern printing, etching, solder masking, texturing, tin plating, routing, and electrical testing, the impedance values ​​or waveforms of the PCB's inner layer impedance lines are measured to further determine if stacking anomalies exist. However, impedance measurement is complex, time-consuming, and requires specialized equipment and operators, making it impossible to meet the 100% inspection requirements of mass production lines.

[0004] Therefore, there is an urgent need for a method that can accurately and efficiently detect errors or reversed layers in multilayer boards, and intercept defective products in the factory after the pressing process and before component assembly. Summary of the Invention

[0005] The technical problem to be solved by the present invention is how to accurately and efficiently detect whether there are interlayer errors or reversed stacking in multilayer boards. The purpose is to provide a method, device, equipment and medium for detecting the stacking order of multilayer boards, thereby solving the above-mentioned problems.

[0006] This invention is achieved through the following technical solution:

[0007] In a first aspect, the present invention provides a method for detecting the stacking order of multilayer boards, comprising:

[0008] Obtain a target image of a PCB board; wherein the PCB board is a multilayer board that has completed the pressing process but has not yet undergone component mounting; the copper-free areas on the edges of the PCB board are provided with interlayer misaligned copper blocks;

[0009] Extract the coordinates of the center points of each copper block in the target image;

[0010] Calculate the horizontal distance between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks;

[0011] The horizontal spacing between the center points of adjacent copper blocks is compared with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

[0012] Optionally, all copper blocks are arranged in a stepped pattern, with the center points of all copper blocks located on a straight line.

[0013] Optionally, comparing the horizontal spacing between adjacent copper blocks with a preset standard layer sequence spacing to determine whether the PCB board's stacking order is correct includes:

[0014] According to the stacking order Calculate the horizontal coordinate difference between the center points of adjacent copper blocks; n is the total number of layers of the PCB board;

[0015] If the coordinate difference of the center point of each adjacent copper block in the horizontal direction is equal to the preset standard layer sequence spacing, then the stacking order of the PCB board is determined to be correct.

[0016] If the difference in the horizontal coordinates of the center points of any adjacent copper blocks is not equal to the preset standard layer spacing, then the stacking order of the PCB board is determined to be incorrect.

[0017] Optionally, determining that the stacking order of the PCB board is correct includes:

[0018] According to the stacking order The vertical coordinates of the center point of each copper block are obtained sequentially.

[0019] If the vertical coordinates of the center points of each layer of copper blocks are as follows If the order of the layers decreases sequentially, then the stacking order of the PCB board is confirmed to be correct.

[0020] Optionally, after determining that there is an error in the stacking order of the PCB board, the method further includes:

[0021] Identify the locations of abnormal differences that are not equal to the standard sequence spacing;

[0022] Based on the location of the abnormal difference, the specific layer sequence in which the interlayer overlap occurred is determined.

[0023] Optionally, the standard layer spacing is the width of the copper block in the horizontal direction plus the horizontal offset between adjacent copper blocks.

[0024] Optionally, extracting the coordinates of the center points of each copper block in the target image includes:

[0025] The target image is converted into a grayscale image, and the grayscale image is then filtered and denoised.

[0026] The filtered and denoised image is binarized to separate the copper block area from the background area;

[0027] Edge detection is performed on the binarized image to extract the edge contours of each copper block layer;

[0028] A coordinate system is established with the center point of the first layer of copper blocks in the target image as the origin, and the coordinates of the center points of each layer of copper blocks in the coordinate system are calculated based on the edge contour.

[0029] In a second aspect, the present invention provides a multilayer board stacking sequence detection device, comprising:

[0030] An image acquisition module is used to acquire a target image of a PCB board; wherein the PCB board is a multilayer board that has completed the pressing process but has not yet undergone component mounting; the copper-free areas on the edges of the PCB board are provided with interlayer misaligned copper blocks;

[0031] The coordinate extraction module is used to establish a coordinate system with the center point of the first layer of copper blocks in the target image as the origin, and extract the coordinates of the center points of each layer of copper blocks in the coordinate system.

[0032] The spacing calculation module is used to calculate the horizontal spacing between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks.

[0033] The comparison and judgment module is used to compare the horizontal spacing between the center points of each adjacent copper block with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

[0034] Thirdly, the present invention provides a multilayer board stacking sequence detection device, comprising:

[0035] The support platform is used to place the PCB board;

[0036] CCD industrial cameras are used to acquire target images of PCB boards;

[0037] The processor, which is communicatively connected to a CCD industrial camera, is used to execute the multilayer board stacking sequence detection method as described in any one of the first aspects.

[0038] Fourthly, the present invention provides a computer-readable storage medium storing a computer program, wherein a processor executes the computer program to implement a multilayer board stack-up sequence detection method as described in any one of the first aspects.

[0039] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0040] This invention provides a method for detecting the stacking order of multilayer boards. The method acquires a target image of a PCB board, wherein the PCB board is a multilayer board that has completed the pressing process but has not yet undergone component mounting. Copper blocks with interlayer misalignment are set in the copper-free areas along the edges of the PCB board. The coordinates of the center points of each layer's copper blocks in the target image are extracted. Based on the coordinates of the center points of each layer's copper blocks, the horizontal spacing between the center points of adjacent layers' copper blocks is calculated. The horizontal spacing between the center points of adjacent layers' copper blocks is compared with a preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct, thus achieving full automation of the multilayer board stacking order detection process. This invention uses numerical horizontal coordinate differences for judgment, eliminating the subjective error of human eye recognition and the risk of missed detection due to visual fatigue compared to existing manual visual inspection methods, resulting in more objective and accurate detection results. Compared to existing methods relying on impedance measurement, this method requires no professional personnel, has low computational load, and fast processing speed, making it suitable for online full inspection in batch production lines. This invention performs automatic detection before component assembly, which can promptly intercept defective products with reversed or incorrectly made layers, avoiding the risk of quality complaints from customers due to reversed defective boards, while also reducing material waste and rework costs. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0042] Figure 1 A flowchart illustrating a method for detecting the stacking order of multilayer boards provided in this application embodiment;

[0043] Figure 2 This is a schematic diagram showing the position of the interlayer misaligned copper blocks in the PCB board provided in the embodiments of this application;

[0044] Figure 3 This is a schematic diagram showing the coordinates of the center point of the copper block under a normal stacking sequence, provided in an embodiment of this application.

[0045] Figure 4 A schematic diagram showing the coordinates of the center point of the copper block when the L2 and L3 layers are inverted, as provided in an embodiment of this application.

[0046] Figure 5 A schematic diagram showing the coordinates of the center point of the copper block when the L4 and L5 layers are inverted, as provided in an embodiment of this application.

[0047] Figure 6A schematic diagram showing the coordinates of the center point of the copper block when layers L2 and L3 are inverted and layers L4 and L5 are inverted, as provided in an embodiment of this application.

[0048] Figure 7 This is a schematic diagram of a multilayer board stacking sequence detection device provided in an embodiment of this application;

[0049] Figure 8 A physical image of the multilayer board stacking sequence detection device provided in the embodiments of this application. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0051] Please refer to Figure 1 This is a flowchart illustrating a method for detecting the stacking order of multilayer boards provided in an embodiment of this application. The following is a description of... Figure 1 This paper introduces a method for detecting the stacking sequence of multilayer boards.

[0052] S1. Obtain the target image of the PCB board.

[0053] The PCB board is a multilayer board that has completed the lamination process but has not yet undergone component mounting. The copper-free areas along the PCB board's edges are fitted with staggered copper blocks. These copper blocks are arranged in a stepped pattern, with the center points of all the copper blocks aligned in a straight line. The copper blocks can be rectangular, square, circular, etc.

[0054] Please refer to Figure 2 This is a schematic diagram showing the position of the copper block provided in an embodiment of this application. Figure 2 Taking a 6-layer board as an example, each layer has a copper block in the copper-free area on the edge, represented by a black rectangle. The copper blocks are staggered layer by layer according to the stacking order, with the horizontal offset between adjacent copper blocks being a fixed value. In the normal stacking order, the copper blocks in each layer present a stepped arrangement that shifts from left to right.

[0055] In other words, the copper block is set up during the PCB inner layer circuit manufacturing stage and goes through all subsequent process steps (pressing, drilling, copper plating, dry film, patterning, etching, solder masking, texturing, tin plating, routing, electrical testing, etc.) along with the PCB board. In the finished board stage, the target image of the PCB board is acquired by a CCD optical inspection machine to detect the stacking sequence.

[0056] In one possible embodiment, the width of the copper block in the horizontal direction is 0.3 mm, and the horizontal offset between adjacent copper blocks is 0.1 mm. Those skilled in the art will understand that the above values ​​are merely examples, and in practical applications, they can be adaptively adjusted according to the size of the PCB board and the required detection accuracy.

[0057] S2. Extract the coordinates of the center points of each copper block in the target image.

[0058] In one possible embodiment, the target image is converted into a grayscale image, and the grayscale image is filtered and denoised; the filtered and denoised image is binarized to separate the copper block region from the background region; edge detection is performed on the binarized image to extract the edge contours of each layer of copper blocks; a coordinate system is established with the center point of the first layer of copper blocks in the target image as the origin, and the coordinates of the center points of each layer of copper blocks in the coordinate system are calculated based on the edge contours.

[0059] In the specific implementation process, median filtering or Gaussian filtering can be used for noise reduction to eliminate noise interference introduced during image acquisition. Edge detection can use the Canny edge detection operator to extract the closed edge contours of each layer of copper blocks. When the copper block is rectangular or square: the four vertices of the copper block are extracted through edge detection, and the intersection of their diagonals is calculated as the coordinates of the center point of the copper block in that layer; when the copper block is circular: the circular contour of the copper block is extracted through edge detection, and the position of its center is calculated as the coordinates of the center point of the copper block in that layer. After establishing a coordinate system with the center point of the first layer of copper blocks as the origin (0,0), the coordinates of the center points of the remaining layers of copper blocks are all determined based on the same origin.

[0060] In this embodiment, after establishing a coordinate system with the center point of the first layer of copper blocks as the origin, the coordinates of the center points of the remaining layers of copper blocks are all determined based on the same origin, eliminating coordinate errors caused by the overall offset or rotation of the PCB board during image acquisition. A unified coordinate reference ensures the consistency of subsequent horizontal spacing calculations, avoiding calculation deviations due to different coordinate references and guaranteeing the reliability of the judgment results.

[0061] S3. Calculate the horizontal distance between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks.

[0062] In the specific implementation process, the horizontal coordinates of the center points of adjacent copper blocks are obtained sequentially according to the stacking order L1~Ln. For the i-th and (i-1)-th copper blocks, the horizontal coordinates of their center points are obtained respectively, and the difference between the two is taken as the horizontal distance between the center points of the i-th and (i-1)-th copper blocks. Where 2≤i≤n, and n is the total number of layers on the PCB board.

[0063] S4. Compare the horizontal spacing between the center points of adjacent copper blocks with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

[0064] The standard layer sequence spacing is the width of the copper block in the horizontal direction plus the horizontal offset between adjacent copper blocks. For example, when the width of the copper block in the horizontal direction is 0.3 mm and the horizontal offset between adjacent copper blocks is 0.1 mm, the standard layer sequence spacing d = 0.3 + 0.1 = 0.4 mm.

[0065] In one possible embodiment, step S4 includes:

[0066] According to the stacking order Calculate the horizontal coordinate difference between the center points of adjacent copper blocks; if the horizontal coordinate difference between the center points of each adjacent copper block is equal to the preset standard layer sequence spacing, the PCB stack-up order is determined to be correct; if the horizontal coordinate difference between the center points of any adjacent copper block is not equal to the preset standard layer sequence spacing, the PCB stack-up order is determined to be incorrect.

[0067] Please refer to Figure 3 This is a schematic diagram showing the coordinates of the center point of the copper block under the normal stacking sequence provided in this application embodiment. Figure 3 The "+" sign indicates the center point of each copper block layer. The horizontal (X) and vertical (Y) coordinates of the center point of each copper block layer are shown in Table 1.

[0068] Table 1. Coordinates of the center point of the copper block under normal stacking sequence

[0069]

[0070] As shown in Table 1, from layer L1 to layer L6, the X coordinate of the center point of each copper block increases layer by layer, and the difference in X coordinate of the center point of the copper block of adjacent layers is 0.4 mm; the Y coordinate decreases layer by layer, that is, arranged from top to bottom, which can be determined that the stacking order is correct.

[0071] In this embodiment, it is only necessary to calculate the coordinate difference of the center point of the adjacent copper block in the horizontal direction and determine whether the difference is equal to the standard layer sequence spacing. There is no need to perform complex graphic matching or pattern recognition. The computation is small and the processing speed is fast, making it suitable for high-speed online full inspection of batch production lines.

[0072] In one possible embodiment, the step of determining that the PCB board stack-up order is correct includes: according to the stack-up order Obtain the vertical coordinates of the center points of each copper block in sequence; if the vertical coordinates of the center points of each copper block are... If the order of the layers decreases sequentially, then the stacking order of the PCB board is confirmed to be correct.

[0073] In the specific implementation process, the vertical coordinates decrease layer by layer from L1 to Ln, which essentially verifies whether the copper blocks in each layer are arranged in the correct top-to-bottom order in physical space. Even if the horizontal spacing meets the standard layer sequence spacing, if the vertical coordinates of the center points of the copper blocks in each layer do not follow the correct order, the copper blocks will still be affected. The order decreases layer by layer (for example, after L2 and L3 are reversed), Even so, it can still identify vertical sequence anomalies between layers.

[0074] Taking a 6-layer board as an example, the vertical coordinates of the center points of the copper blocks in each layer are as follows: Under the correct stacking order, the vertical coordinates should decrease layer by layer from top to bottom, satisfying the following condition. If detected This indicates that the L2 and L3 layers are out of order in the vertical direction, confirming that the stacking order of the PCB board is incorrect.

[0075] In this embodiment of the application, based on the fact that the difference in the horizontal coordinates is equal to the standard layer sequence spacing, a judgment condition of decreasing vertical coordinates layer by layer is further introduced. The two dimensions corroborate each other and double confirm each other. Through the double verification in the horizontal and vertical directions, the judgment result is more reliable, effectively avoiding misjudgments caused by factors such as image acquisition errors, copper block manufacturing deviations or environmental interference, and improving the credibility and stability of the detection results.

[0076] In one possible embodiment, after determining that there is an error in the stacking order of the PCB board, the location of the abnormal difference that is not equal to the standard layer spacing is determined; based on the location of the abnormal difference, the specific layer sequence in which the interlayer overlap has occurred is determined.

[0077] Please refer to Figure 4 Table 2 shows the coordinates of the center points of the copper blocks when the L2 and L3 layers are overlaid according to an embodiment of this application. The horizontal X-coordinates and vertical Y-coordinates of the center points of the copper blocks in each layer are shown in Table 2.

[0078] Table 2. Coordinates of the center point of the copper block when L2 and L3 layers are inverted.

[0079]

[0080] As shown in Table 2, the X-coordinate sequence of the center points of each copper block layer is 0.0, 0.80, 0.40, 1.20, 1.60, 2.00, and the difference in X-coordinate between the center points of adjacent copper blocks is... .in , and An anomaly occurred ( Based on the location of the abnormal difference, it can be determined that the L2 layer and the L3 layer have overlapped.

[0081] Please refer to Figure 5 Table 3 shows the coordinates of the center points of the copper blocks when the L4 and L5 layers are overlaid in an embodiment of this application. The horizontal X-coordinates and vertical Y-coordinates of the center points of the copper blocks in each layer are shown in Table 3.

[0082] Table 3. Coordinates of the center point of the copper block when L4 and L5 layers are inverted.

[0083]

[0084] As shown in Table 3, the X-coordinate sequence of the center points of each copper block layer is 0.0, 0.40, 0.80, 1.60, 1.20, 2.00, and the difference in X-coordinate between the center points of adjacent copper blocks is... .in , and An anomaly occurred ( Based on the location of the abnormal difference, it can be determined that the L4 layer and the L5 layer have overlapped.

[0085] Please refer to Figure 6 Table 4 shows the coordinates of the center points of the copper blocks when layers L2 and L3 are inverted and layers L4 and L5 are inverted, as provided in this embodiment of the application. The horizontal X and vertical Y coordinates of the center points of the copper blocks in each layer are shown in Table 4.

[0086] Table 4. Coordinates of the center point of the copper block when L2 and L3 layers are inverted, and L4 and L5 layers are inverted.

[0087]

[0088] As shown in Table 4, the X-coordinate sequence of the center point of each copper block layer is 0.0, 1.20, 1.60, 0.40, 0.80, 2.00, and the difference in X-coordinate between the center points of adjacent copper blocks is... .in , , An anomaly occurred ( Based on the location of the abnormal difference, it can be determined that the L2-L3 layer group and the L4-L5 layer group have overlapped.

[0089] Furthermore, in the three abnormal scenarios shown in Tables 2-4, the Y-coordinates are completely consistent with the normal stacking sequence (0.0, -0.15, -0.25, -0.775, -0.875, -1.025), indicating that the Y-coordinates may maintain the illusion of decreasing layer by layer when there is interlayer inversion. Therefore, relying solely on the vertical coordinates to determine the stacking sequence can easily lead to missed detections. However, this application can effectively identify the above-mentioned various interlayer inversion scenarios through precise comparison of the differences in the horizontal coordinates.

[0090] In summary, this application provides a method for detecting the stacking order of multilayer boards, which has at least the following beneficial effects:

[0091] 1. High detection accuracy and strong reliability.

[0092] This application establishes a coordinate system with the center point of the first layer of copper blocks as the origin, extracts the precise coordinates of the center points of each layer of copper blocks, and uses numerical horizontal coordinate differences for determination. Compared with the existing technology of manually visually inspecting the layer number or relying on impedance measurement, it eliminates the subjective error of human eye recognition and the risk of missed detection caused by visual fatigue. The detection accuracy can reach the micrometer level, and the determination results are objective, accurate, and repeatable.

[0093] 2. The decision logic is simple and the computational efficiency is high.

[0094] This application only requires calculating the coordinate difference of the center point of the adjacent copper block in the horizontal direction and comparing it with the preset standard layer sequence spacing to obtain the judgment result. There is no need for complex graphic matching or pattern recognition. It has low computational load, fast processing speed, and the single board inspection time can be controlled within 1 second. It is suitable for online full inspection of batch production lines.

[0095] 3. It can accurately locate the stacked and reversed layers, making it easy to trace rework.

[0096] When an error is determined in the stacking sequence, this application can directly locate the specific stacking sequence or stacking group (such as L2 stacking with L3, L4 stacking with L5, L2-3 stacking with L4-5 stacking, etc.) based on the abnormal difference position that is not equal to the standard stacking interval, providing accurate information for subsequent rework or cause tracing, and effectively improving the efficiency of production anomaly investigation.

[0097] 4. Dual verification mechanism to avoid missed detections.

[0098] After confirming that the horizontal coordinate differences are correct, this application further verifies the results by checking whether the vertical coordinates decrease layer by layer in the order of L1 to Ln, forming a dual verification mechanism. Even if an anomaly is not obvious in the horizontal coordinate differences, anomalies in the vertical sorting can still be detected, further reducing the risk of missed detections.

[0099] 5. Intercept defective products in advance to reduce rework costs.

[0100] This application performs layer sequence testing on each multilayer board after the pressing process and before component assembly, intercepting defective boards with reversed or incorrectly constructed layers within the factory. This prevents defective products from flowing into the customer's component assembly and electrical testing processes, reducing customer complaints and significantly lowering rework costs and quality losses.

[0101] Based on the same inventive concept, please refer to Figure 7This application also provides a multilayer board stacking sequence detection device, the device comprising:

[0102] The image acquisition module is used to acquire the target image of the PCB board; wherein the PCB board is a multilayer board that has completed the pressing process but has not yet been assembled with components; the copper-free areas on the edge of the PCB board are provided with interlayer misaligned copper blocks;

[0103] The coordinate extraction module is used to establish a coordinate system with the center point of the first layer of copper blocks in the target image as the origin, and extract the coordinates of the center points of each layer of copper blocks in the coordinate system.

[0104] The spacing calculation module is used to calculate the horizontal spacing between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks.

[0105] The comparison and judgment module is used to compare the horizontal spacing between the center points of the copper blocks of each adjacent layer with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

[0106] Optionally, all copper blocks are arranged in a stepped pattern, with the center points of all copper blocks located on a straight line.

[0107] Optionally, the comparison and judgment module is specifically used for:

[0108] According to the stacking order Calculate the horizontal coordinate difference between the center points of adjacent copper blocks; n is the total number of layers on the PCB board;

[0109] If the coordinate difference of the center point of each adjacent copper block in the horizontal direction is equal to the preset standard layer sequence spacing, then the stacking order of the PCB board is determined to be correct.

[0110] If the difference in the horizontal coordinates of the center points of any adjacent copper blocks is not equal to the preset standard layer spacing, then the stacking order of the PCB board is determined to be incorrect.

[0111] Optionally, the comparison and judgment module is specifically used for:

[0112] According to the stacking order The vertical coordinates of the center point of each copper block are obtained sequentially.

[0113] If the vertical coordinates of the center points of each layer of copper blocks are as follows If the order of the layers decreases sequentially, then the stacking order of the PCB board is confirmed to be correct.

[0114] Optionally, the device further includes a determining module, which is specifically used for:

[0115] After determining that there is an error in the stacking order of the PCB board, the location of the abnormal difference value that is not equal to the standard layer sequence spacing is identified.

[0116] Based on the location of the abnormal difference, the specific stratigraphic sequence in which the interlayer overlap occurred is determined.

[0117] Optionally, the standard layer sequence spacing is the width of the copper block in the horizontal direction plus the horizontal offset between adjacent copper blocks.

[0118] Optionally, the coordinate extraction module is specifically used for:

[0119] The target image is converted to a grayscale image, and then the grayscale image is filtered and denoised.

[0120] The filtered and denoised image is binarized to separate the copper block area from the background area;

[0121] Edge detection is performed on the binarized image to extract the edge contours of each copper block layer;

[0122] A coordinate system is established with the center point of the first layer of copper blocks in the target image as the origin, and the coordinates of the center points of each layer of copper blocks in the coordinate system are calculated based on the edge contour.

[0123] It should be noted that each module in the multilayer board stacking sequence detection device in this embodiment corresponds one-to-one with each step in the multilayer board stacking sequence detection method in the aforementioned embodiment. Therefore, the specific implementation of this embodiment can refer to the implementation of the aforementioned multilayer board stacking sequence detection method, and will not be repeated here.

[0124] Based on the same inventive concept, this application also provides a multilayer board stacking sequence detection device, such as... Figure 8 As shown. This multilayer board stacking sequence detection equipment includes:

[0125] The support platform is used to place the PCB board;

[0126] CCD industrial cameras are used to acquire target images of PCB boards;

[0127] The processor communicates with the CCD industrial camera and is used to execute the aforementioned multilayer board stacking sequence detection method.

[0128] In one possible embodiment, the device may further include:

[0129] The light source module is used to provide illumination for the CCD industrial camera when acquiring target images;

[0130] An interactive interface is used to display the multilayer board stacking sequence detection process and results;

[0131] An alarm device is used to issue an audible and visual alarm signal when an error is detected in the stacking sequence.

[0132] The platform is equipped with positioning fixtures to fix the PCB board in place at the inspection station, ensuring that the PCB board does not shift position during image acquisition. A CCD industrial camera is positioned above the platform, with its optical axis perpendicular to the platform's support surface. The center of the CCD camera's field of view corresponds to the area where the misaligned copper blocks are located on the PCB board's edge layers. The light source module can be a ring light source or a coaxial light source, arranged around the CCD camera to provide uniform and stable illumination for image acquisition of the copper blocks on the board's edge, improving image clarity and ensuring accurate identification of the copper block edge contours. The interactive interface can be a touch screen display, used to display in real time the acquired target image, the coordinates of the center points of each layer of copper blocks, the calculated horizontal spacing, and the stacking sequence detection results.

[0133] In practice, the workflow of this equipment is as follows:

[0134] The PCB board to be tested is transferred to the inspection station on the support platform. After the positioning fixture fixes the PCB board, the CCD industrial camera automatically focuses and acquires images of the misaligned copper blocks between layers. The acquired target image is transmitted to the processor, which executes a multilayer board stacking sequence detection method to process and analyze the target image to determine whether the stacking sequence is correct. After the determination is completed, the interactive interface displays the inspection process and results. When the processor determines that the stacking sequence of a certain PCB board is incorrect, the alarm device emits an audible and visual alarm signal, and at the same time, the board number of the erroneous board, the error type, and the specific layer sequence of the reversed stacking are highlighted on the interactive interface to prompt the operator to handle the situation promptly.

[0135] Based on the same inventive concept, this application also provides a computer storage medium storing a computer program, which is executed by a processor to implement the aforementioned method for detecting the stacking order of multilayer boards.

[0136] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; or it may be a device including one or any combination of the above-mentioned memories. The computer may be a variety of computing devices, including smart terminals and servers.

[0137] In some embodiments, executable instructions may take the form of a program, software, software module, script, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0138] As an example, executable instructions may, but do not necessarily, correspond to files in the file system. They may be stored as part of a file that holds other programs or data, for example, in one or more scripts in a Hyper Text Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple collaborative files (e.g., a file that stores one or more modules, subroutines, or code sections).

[0139] As an example, executable instructions can be deployed to execute on a single computing device, or on multiple computing devices located in one location, or on multiple computing devices distributed across multiple locations and interconnected via a communication network.

[0140] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0141] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for detecting the stacking sequence of multilayer boards, characterized in that, include: Obtain a target image of the PCB board; wherein the PCB board is a multilayer board that has completed the pressing process but has not yet undergone component assembly; The PCB board has copper blocks with interlayer misalignment in the copper-free area on the board edge. Extract the coordinates of the center points of each copper block in the target image; Calculate the horizontal distance between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks; The horizontal spacing between the center points of adjacent copper blocks is compared with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

2. The method for detecting the stacking sequence of multilayer boards according to claim 1, characterized in that, All the copper blocks are arranged in a stepped pattern, and the center points of all the copper blocks are located on a straight line.

3. The method for detecting the stacking sequence of multilayer boards according to claim 1, characterized in that, The step of comparing the horizontal spacing between adjacent copper blocks with a preset standard layer sequence spacing to determine whether the PCB board's layer stacking order is correct includes: According to the stacking order Calculate the horizontal coordinate difference between the center points of adjacent copper blocks; n is the total number of layers of the PCB board; If the coordinate difference of the center point of each adjacent copper block in the horizontal direction is equal to the preset standard layer sequence spacing, then the stacking order of the PCB board is determined to be correct. If the difference in the horizontal coordinates of the center points of any adjacent copper blocks is not equal to the preset standard layer spacing, then the stacking order of the PCB board is determined to be incorrect.

4. The method for detecting the stacking sequence of multilayer boards according to claim 3, characterized in that, The determination that the PCB board's stacking order is correct includes: According to the stacking order The vertical coordinates of the center point of each copper block are obtained sequentially. If the vertical coordinates of the center points of each layer of copper blocks are as follows If the order of the layers decreases sequentially, then the stacking order of the PCB board is confirmed to be correct.

5. The method for detecting the stacking sequence of multilayer boards according to claim 3, characterized in that, After determining that there is an error in the stacking order of the PCB board, the method further includes: Identify the locations of abnormal differences that are not equal to the standard sequence spacing; Based on the location of the abnormal difference, the specific layer sequence in which the interlayer overlap occurred is determined.

6. The method for detecting the stacking sequence of multilayer boards according to claim 1, characterized in that, The standard layer sequence spacing is the width of the copper block in the horizontal direction plus the horizontal offset between adjacent copper blocks.

7. The method for detecting the stacking sequence of multilayer boards according to claim 1, characterized in that, Extracting the coordinates of the center points of each copper block in the target image includes: The target image is converted into a grayscale image, and the grayscale image is then filtered and denoised. The filtered and denoised image is binarized to separate the copper block area from the background area; Edge detection is performed on the binarized image to extract the edge contours of each copper block layer; A coordinate system is established with the center point of the first layer of copper blocks in the target image as the origin, and the coordinates of the center points of each layer of copper blocks in the coordinate system are calculated based on the edge contour.

8. A multilayer board stacking sequence detection device, characterized in that, include: An image acquisition module is used to acquire a target image of a PCB board; wherein the PCB board is a multilayer board that has completed the pressing process but has not yet undergone component mounting; the copper-free areas on the edges of the PCB board are provided with interlayer misaligned copper blocks; The coordinate extraction module is used to establish a coordinate system with the center point of the first layer of copper blocks in the target image as the origin, and to extract the coordinates of the center points of each layer of copper blocks in the coordinate system. The spacing calculation module is used to calculate the horizontal spacing between the center points of adjacent copper blocks based on the coordinates of the center points of each layer of copper blocks. The comparison and judgment module is used to compare the horizontal spacing between the center points of each adjacent copper block with the preset standard layer sequence spacing to determine whether the stacking order of the PCB board is correct.

9. A multilayer board stacking sequence detection device, characterized in that, include: The support platform is used to place the PCB board; A CCD industrial camera is used to acquire target images of the PCB board. The processor is communicatively connected to the CCD industrial camera and is used to execute the multilayer board stacking sequence detection method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and the processor executes the computer program to implement the multilayer board stacking sequence detection method as described in any one of claims 1-7.

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