A grain scratch detection method based on high-dimensional features and binary sample generation

Abstract

The application discloses a kind of based on high-dimensional feature and binary sample generation's grain scratch detection method, it is related to the field of grain surface defect detection, including: initial data set is constructed;Initial data set is used to iteratively train attention feature mapping network, and after training convergence, network parameter is serialized and packed and solidified;Binary training sample is generated using hybrid data generation engine;Using binary training sample set, iteratively train the lightweight detection network embedded with strip feature reconstruction module, output defect bounding box prediction result and solidify model parameter;Enter online real-time detection stage, the real-time image of the grain to be detected is collected and spatial geometry correction;Real-time extraction binary candidate mask;Real-time extraction defect bounding box result.The application can effectively separate grain process background and defect signal, expand high-quality defect training sample, improve the detection precision and geometric quantization accuracy of long strip scratch.

Description

Technical Field

[0001] This invention relates to the field of grain surface defect detection, and more particularly to a grain scratch detection method based on high-dimensional features and binary sample generation. Background Technology

[0002] As advanced semiconductor manufacturing processes continue to evolve towards higher integration nodes, high-density 3D packaging technologies (such as microbumps and through-silicon vias) are being adopted more and more widely. In semiconductor manufacturing, a single silicon wafer must undergo hundreds of complex processes, including photolithography, etching, and doping, before it can be diced into individual semiconductor dies / chips. During manufacturing and dicing, physical scratches are easily generated on the die surface. These tiny scratches not only disrupt the delicate circuit patterns, leading to direct yield losses, but may also cause potential reliability failures after product delivery. Therefore, achieving high-precision automated optical inspection (AOI) of die surface defects is a core aspect of semiconductor quality control.

[0003] However, with the increasing integration of processes, the surface of the die exhibits a highly repetitive and geometrically dense microcircuit layout. Under the same process step, these micro-backgrounds show extremely high spatial consistency, but their dense high-frequency textures and process fluctuations (such as lithographic inhomogeneity and etching textures) cause the low-contrast signals of weak scratches to easily overlap with background noise in the image pixel domain. Existing visual inspection architectures face significant performance bottlenecks in dealing with high-frequency complex background interference, sample scarcity, and maintaining the topological integrity of long strip defects, making it difficult to simultaneously meet the industrial requirements of low data dependence and high-fidelity geometric quantization. Therefore, how to address the field requirements of complex high-frequency circuit textures and achieve efficient image cleansing, low-cost data resource generation, and long-distance axially dependent defect capture remains a critical problem that urgently needs to be solved.

[0004] A review of existing literature revealed that one of the closest existing technologies is Chinese Patent Publication No. CN114910480B (A Machine Vision-Based Method for Detecting Wafer Surface Defects). Its technical approach involves using a single standard grain image and a complete image to perform multi-template matching and clustering to extract individual grain regions. Image enhancement is applied to the segmented samples, and a one-dimensional array is generated by traversing and extracting outer contour features and grayscale features within the contour. K-Means and hierarchical clustering analysis are then used to filter out discrete defect samples that deviate from the norm. However, when faced with complex microscopic dense circuit textures, this approach relies on manually defined traditional contours and grayscale statistical features, lacking the nonlinear discrimination and purification capabilities of high-dimensional feature spaces. The slight pixel grayscale fluctuations of minute scratches are easily masked by normal process random noise, leading to severe over-detection or under-detection when the system is implemented on the actual production line.

[0005] Another closely related scratch-specific detection scheme is Chinese Patent Publication No. CN117350988A (A method, apparatus, medium, and system for detecting scratch defects on wafer surfaces). Its specific approach involves: segmenting an image to obtain multiple suspected defective connected regions; calculating the straight line along the long side (direction difference) of the minimum bounding rectangle of each connected region and the perpendicular distance between their center points; merging connected regions that meet preset threshold conditions and have the potential for discontinuity to generate the final defect region to be tested and identifying its category. While this scheme recognizes the discontinuous topology of long, strip-shaped scratches, it relies on traditional pixel-level binarization and hard-coded static geometric threshold formulas to piece together discontinuous defect segments. On the surface of a grain with a complex and dense background, process noise and normal microcircuit edges are prone to generating disordered connected domain fragments, causing this mechanism to trigger severe erroneous merging. At the same time, when conventional detection backbone networks expand the receptive field through layer-by-layer downsampling (such as pooling and strided convolution), they irreversibly lose the fine-grained spatial resolution information of fine scratches, resulting in the inability to output sharp edge masks. Consequently, it is difficult to meet the stringent standards of precise geometric quantification of the actual length, average width, and orientation of scratches in industrial-grade quality assessment.

[0006] Furthermore, existing mainstream unsupervised anomaly detection (UAD) networks (such as autoencoder models based on reconstruction errors) often exhibit overgeneralization characteristics due to their large network capacity. They tend to reconstruct even minor scratches and defects with high fidelity, which further weakens the discrimination signal between the background and the defect.

[0007] Therefore, those skilled in the art are dedicated to developing a grain scratch detection method based on high-dimensional features and binary sample generation, which can effectively separate grain process background and defect signals, expand high-quality defect training samples, and improve the detection accuracy and geometric quantization accuracy of long strip scratches. Summary of the Invention

[0008] In view of the above-mentioned deficiencies of the prior art, the technical problem to be solved by the present invention is that the background suppression ability is insufficient, the training samples are scarce, and the adaptability of long strip defects is poor.

[0009] To achieve the above objectives, this invention provides a method for detecting grain scratches based on high-dimensional features and binary samples, wherein the method includes the following steps: Step S101: For the test dies under the same semiconductor manufacturing process, uniformly collect offline basic data, perform spatial pixel-level registration and annotation information aggregation to construct an initial dataset; Step S102: Iteratively train the attention feature mapping network using the initial dataset. After the training converges, serialize, package, and solidify the network parameters. Step S103: Use a hybrid data generation engine to perform multi-channel sample mixing to synthesize a defect mask, and superimpose the defect mask with the grain background to build a binary training sample set in batches; the hybrid data generation engine adopts a dual-channel parallel generation architecture that includes a data-driven channel and a physical rule channel; Step S104: Using the binary training sample set, iteratively train the lightweight detection network embedded with the strip feature reconstruction module, output the defect bounding box prediction results and solidify the model parameters; Step S105: Enter the online real-time detection stage, and acquire and spatially correct the real-time image of the grain to be detected; Step S106: Invoke the attention feature mapping network online to extract binary candidate masks in real time; Step S107: Use the lightweight detection network online to extract the defect bounding box results in real time.

[0010] Furthermore, step S101 also includes: Step S1011: Acquire the original grayscale image of the grain with a specific defect morphology on the lower surface of the current wafer manufacturing process as the original image to be tested; obtain or construct a defect-free ideal grain image at the same process node as the original image to be tested as the process reference image; Step S1012: Input the original image to be tested and the process reference image into the image registration operator, and use feature point matching or contour alignment algorithm to perform spatial geometric correction and pixel-level alignment registration on a two-dimensional physical space scale to eliminate relative displacement and geometric distortion. Step S1013: Pixel-level precise boundary delineation and marking are performed on the pixel region where the actual defect is located in the original image under test, thereby generating a binary truth mask with the same size as the original image under test; in the binary truth mask, pixels in the defect-corresponding region are assigned a specific first logical value, and pixels in the background region are assigned a specific second logical value; the spatially registered original image under test, the process reference image, and the corresponding binary truth mask are bound together to form a single set of finely annotated grain images, and batch-assembled to form the initial dataset.

[0011] Furthermore, step S102 also includes: Step S1021: Input the original image to be tested and the process reference image bound together with the same source into two feature extraction modules with shared parameters for high-dimensional manifold representation, and output the corresponding feature matrix to be tested and the reference feature matrix; input the feature matrix to be tested and the reference feature matrix into the feature difference operation unit, perform element-wise absolute value subtraction, and output the feature difference map; input the feature difference map serially into the spatial attention module, use long-distance dependent convolutional layers and nonlinear activation mapping to adaptively learn the background noise suppression coefficient, and output the refined feature map; input the refined feature map into the binary mask prediction module, and output the binary candidate mask through differentiable soft threshold activation mapping; Step S1022: Construct a hybrid loss function for collaborative supervised training, and perform multi-criteria joint gradient backpropagation on the binary candidate mask and the binary ground truth mask; Step S1023: When the value of the hybrid loss function reaches the preset convergence condition or the training reaches the preset maximum number of iterations, terminate backpropagation; serialize and package the weight matrix and bias parameters required for online inference of the attention feature mapping network to complete parameter solidification.

[0012] Furthermore, the hybrid loss function is a weighted combination of a binary cross-entropy classification loss term and a region-specific contrast constraint term; Calculate the full-image pixel-level cross-entropy between the binary candidate mask and the binary ground truth mask, and use it as the binary cross-entropy classification loss term; The entire image is divided into a defect target region and a background texture region based on the pixel logical values ​​of the binary truth mask. In the background texture region, a quadratic penalty is applied to the residual noise pixels in the feature difference map. In the defect target region, the positive deviation between the current residual energy and the ideal mapping energy is calculated through the hinge loss function, thereby forming a region-specific contrast constraint term. The hybrid loss function is defined as follows:

[0013] Among them, L total L represents the total loss value. BCE For binary cross-entropy classification loss, L contrast For region-specific contrast loss

[0014] Region-specific contrast loss is defined as:

[0015] Among them, D neg D is the set of pixel feature values ​​of the background region in the feature difference map. pos This is the set of pixel feature values ​​of the defect region in the feature difference map. mean() is the mean operation, and max(a,b) is the maximum value between a and b.

[0016] Furthermore, step S103 also includes: Step S1031: Construct an adversarial generation module using a Wasserstein generative adversarial network with gradient penalty, perform adversarial iterative training using a binary ground truth mask as a supervision signal, and output a virtual defect mask; input the virtual defect mask into the geometric enhancement operation unit to generate a geometric enhancement virtual defect mask; Step S1032: In the physical rule channel parallel to the data-driven channel, a random walk algorithm is executed in the two-dimensional physical space through the physical evolution generation module; by configuring the preset single-step evolution probability matrix and axial deflection moment constraint, the long-distance connected topological trajectory of the scratch as it extends on the grain surface is simulated; during the evolution process, the branching and bending operators are dynamically called to simulate the topological changes of the scratch when it is subjected to abrupt changes in lattice direction or contact stress; using morphological expansion, corrosion operators and edge Gaussian smoothing operators, the simulated scratch center skeleton is subjected to thickness variation, sharp corner processing and edge transition blurring to generate a physical evolution defect mask; Step S1033: The geometrically enhanced virtual defect mask and the physical evolution defect mask are simultaneously and in parallel input to the sample mixing module. The sample mixing module is configured with a probability sampling operator based on an indicator variable. In each synthesis loop of a sample instance, a binary discrete indicator variable is generated according to a preset sampling probability to adaptively control the gated routing switch: if the sampled indicator variable is 1, the output result of the data-driven channel is allowed to pass; if the sampled indicator variable is 0, the output result of the physical rule channel is allowed to pass. Step S1034: Call the process reference image stored in step S101 to generate a defect-free good product background mask with process random noise; input the defect mask output by the sample mixing module and the defect-free good product background mask together into the background overlay operation unit, perform element-by-element maximum value overlay, fuse the generated defects into the real semiconductor manufacturing process background texture, batch output and construct the binary training sample set.

[0017] Furthermore, step S104 also includes: Step S1041: Construct a forward flow architecture, input the synthetic image from the binary training sample set into the backbone feature extraction network for high-dimensional feature extraction; embed a strip feature reconstruction module at the high-dimensional feature map output interface of the backbone feature extraction network to process the high-dimensional feature map and output a refined strip feature matrix; input the refined strip feature matrix into a multi-scale feature fusion network, and output the defect bounding box prediction result through the defect prediction output head; Step S1042: Align the predicted defect bounding box output from the forward propagation with the ground truth bounding box information corresponding to the binary training sample set; calculate the loss value and generate the gradient using the target detection loss function, perform backpropagation, and jointly update the weight parameters of the entire network. Step S1043: When the loss function value reaches the preset convergence condition or the training reaches the preset maximum number of iterations, terminate the training and serialize and package all parameters in the lightweight detection network.

[0018] Further, in step S1041, the processing of the high-dimensional feature map by the strip feature reconstruction module includes: Multi-scale cascaded dilated deep convolution branch: The input feature matrix is ​​passed through a grouped deep convolutional layer, and its output is fed into two grouped dilated deep convolutional layers with different dilation rates to perform multi-scale feature extraction. Sparse Axial Maximum Strip Reconstruction Branch: Adaptive Top-K sparse reconstruction is performed along the two-dimensional spatial axis of the feature map using the axial projection operator: For a feature matrix with height H and width W, a preset sparse threshold coefficient k is used; the top k largest response pixels are extracted along the height dimension and mean projection is performed, and then expanded and restored to an H × W feature matrix; the top k largest response pixels are extracted along the width dimension and mean projection is performed, and then expanded and restored to an H × W feature matrix; finally, the two axial expansion matrices are fused element-wise by addition to output a sparse axial feature map; Feature fusion and gating mechanism: The outputs of two parallel dilated convolution layers in the multi-scale cascaded dilated depthwise convolution branch are additively fused with the sparse axial feature map, channel integration is performed through a 1×1 convolutional layer, and sigmoid activation mapping is executed to output gating weights; the gating weights are then multiplied element-wise with the input feature matrix of the identity mapping branch, and a learnable channel scaling factor gamma is introduced for residual scaling to output a refined strip feature matrix; the strip feature reconstruction module is initialized with identity mapping during the initial training phase.

[0019] Furthermore, step S105 also includes: Step S1051: Acquire a real-time two-dimensional grayscale image of the surface of the grain to be tested as the test grain image; Step S1052: Retrieve and load the process reference image obtained in step S101, which has the same process as the test grain image; Step S1053: Simultaneously input the acquired test grain image and the loaded process reference image into the spatial geometric registration operator; calculate the geometric deformation parameters between the two using a feature point matching algorithm or a grain contour edge alignment algorithm; and perform spatial geometric correction on the test grain image based on the geometric deformation parameters.

[0020] Furthermore, step S106 also includes: Step S1061: Deserialize and load the attention feature mapping network parameter file that was solidified and exported in step S102, and fix the weights and bias parameters of the attention feature mapping network in the memory of the hardware computing platform. Step S1062: The registered and aligned test grain image from step S105 and the retrieved process reference image are used as parallel dual-path inputs and input to the dual-path parameter-sharing feature extraction module of the attention feature mapping network for high-dimensional feature extraction, outputting a test feature matrix and a reference feature matrix; the test feature matrix and the reference feature matrix are input to the feature difference operation unit, and element-wise absolute value subtraction is performed in real time to calculate the difference between the two in the feature manifold space, outputting a feature difference map; Step S1063: Input the feature difference map into the spatial attention module; adaptively calculate the background noise suppression coefficient at each pixel position in the entire image using long-distance dependent convolutional layers and Sigmoid nonlinear activation mapping; use the background noise suppression coefficient to perform element-wise multiplication weighted suppression on the feature difference map, and output a refined feature map; input the refined feature map into the binary mask prediction module, perform differentiable soft threshold activation mapping online, and output the binary candidate mask in real time.

[0021] Furthermore, step S107 also includes: Step S1071: Instantiate the lightweight detection network in the memory of the hardware computing platform, and deserialize and load the lightweight detection network parameter file that was solidified and exported in step S104, and fix the weights and bias parameters of each layer in the network. Step S1072: The binary candidate mask output in step S106 is used as input to the lightweight detection network; the input data is sequentially processed by the backbone feature extraction network, the strip feature reconstruction module and the multi-scale feature fusion network for feature extraction and fusion, and finally the defect prediction output head calculates and outputs the defect bounding box prediction result in real time. Step S1073: Analyze the defect bounding box prediction results output by the defect prediction output head, and extract the confidence score, the physical coordinates of the center of the bounding rectangle, and the width and height scale information of the box in real time. Step S1074: Based on the defect bounding box prediction results, extract the corresponding defect region from the binary candidate mask, perform connected component analysis to remove isolated noise points; calculate the minimum bounding rotation rectangle for each independent defect connected component, extract its long side length as the actual pixel length of the scratch, the short side length as the average width of the scratch, and the rotation angle as the spatial pose information of the scratch.

[0022] Compared with the prior art, the present invention has at least the following beneficial technical effects: 1. This invention provides a high-dimensional feature space nonlinear mapping and asymmetric contrast denoising mechanism that maintains a one-to-one correspondence at the pixel level. It effectively solves the inherent technical defect of the traditional Die-to-Die algorithm in that it cannot filter out random noise artifacts in the process when performing linear subtraction in the pixel domain. While maintaining the pixel-level spatial fidelity without loss, it significantly improves the feature space separability between weak scratches and complex circuit backgrounds, and significantly improves the background texture suppression and denoising capabilities under discrete noise environments. It provides a high signal-to-noise ratio and topologically connected pixel-level target feature basis for subsequent fine detection and accurate geometric quantization. 2. This invention provides a low-data-dependency hybrid data generation engine that operates in a binary geometric domain and combines data-driven feature learning with physical behavior rule simulation. This significantly reduces the constraints of complex surface optical textures on generation quality. Only a small number of defect seeds and good backgrounds are needed to synthesize a large number of binary training samples that have both local texture realism and long-tail topological diversity, effectively filling the distribution gap of real defects. This also reduces the economic cost of data acquisition and manual annotation when the model is deployed in industry and migrated across process environments. 3. This invention introduces a strip feature reconstruction module into a lightweight detection network and constructs a gated residual connection based on a channel-level scaling factor. This significantly enhances the detection network's ability to perceive long-distance axial features and context of high aspect ratio defects, significantly improves the prediction accuracy of defect bounding boxes under discrete noise interference, and supports the overall framework to accurately acquire the target region of the defect and complete subsequent geometric quantization evaluation. Moreover, the entire module architecture introduces fewer additional parameters, which is conducive to the real-time online lightweight deployment of edge devices.

[0023] The following will further explain the concept, specific structure, and technical effects of the present invention in conjunction with the accompanying drawings, so as to fully understand the purpose, features, and effects of the present invention. Attached Figure Description

[0024] Figure 1 This is a flowchart of a preferred embodiment of the present invention; Figure 2 This is a schematic diagram of the topology of an attention feature mapping network according to a preferred embodiment of the present invention; Figure 3 This is a schematic diagram of the topology of a hybrid data generation engine according to a preferred embodiment of the present invention; Figure 4 This is a schematic diagram of the topology of a lightweight detection network according to a preferred embodiment of the present invention. Detailed Implementation

[0025] The following description, with reference to the accompanying drawings, illustrates several preferred embodiments of the present invention to make its technical content clearer and easier to understand. The present invention can be embodied in many different forms, and the scope of protection of the present invention is not limited to the embodiments mentioned herein.

[0026] In the accompanying drawings, components with the same structure are indicated by the same numerical designation, and components with similar structures or functions are indicated by similar numerical designations. The dimensions and thicknesses of each component shown in the drawings are arbitrary, and the present invention does not limit the dimensions and thicknesses of each component. To make the illustrations clearer, the thickness of some components has been appropriately exaggerated in the drawings.

[0027] This embodiment provides a method for detecting grain scratch defects based on high-dimensional feature mapping and binary domain data generation, such as... Figure 1 As shown, it includes the following steps: Step S101: Construct the initial dataset.

[0028] To enable high-generalization model training with a small number of real samples in the subsequent offline training phase, this step involves uniformly collecting offline basic data, spatial pixel-level registration, and annotation information aggregation for the test dies under the same semiconductor manufacturing process, in order to construct a highly self-consistent initial dataset. The specific implementation process includes the following steps: Step S1011: Obtain the original image to be tested and the process reference image.

[0029] Using the imaging sensor of an automated optical inspection (AOI) device, the original grayscale image of the grain with a specific defect morphology (such as a fine scratch defect) on the lower surface of the current wafer manufacturing process is acquired as the original image to be tested; at the same time, an ideal grain image without defects at the same process node as the original image to be tested is acquired or constructed as the process reference image.

[0030] Step S1012: Spatial pixel-level registration preprocessing.

[0031] The acquired original image to be tested and the process reference image are input into the image registration operator. Using feature point matching or contour alignment algorithms, the two are finely aligned and registered in two-dimensional physical space to eliminate relative displacement and geometric distortion caused by mechanical errors, optical deformation or vibration at the work station, and ensure that the pixel coordinates of the same manufacturing topology in the two images are accurately aligned.

[0032] Step S1013: Aggregate annotation information and construct the initial dataset.

[0033] Using manual or semi-automatic annotation, pixel-level precise boundary delineation and marking are performed on the pixel regions where actual defects are located in the original test image, thereby generating a binary ground truth mask of the same size as the original test image. In the binary ground truth mask, pixels corresponding to defect regions are assigned specific first logical values, and pixels in background regions are assigned specific second logical values. Finally, the spatially registered original test image, process reference image, and corresponding binary ground truth mask are bound together to form a single set of finely annotated grain images, which are then batch-assembled to form the initial dataset.

[0034] As a preferred implementation, when constructing the initial dataset in the embodiment, the preset total number of finely annotated grain images included in the initial dataset is preferably configured to be 10. The resolution size of the original test image, process reference image, and binary ground truth mask is preferably uniformly set to 1024×1024 pixels, and the image type is preferably uniformly configured to be a single-channel grayscale image. In the binary ground truth mask, the first logical value assigned to the pixel region where the real scratch defect is located is preferably 1.0, and the second logical value assigned to the pixel region where the defect-free grain background is located is preferably 0.0. Through this high-value core data encapsulation with a small sample size, a standard initial data source is provided for the subsequent lossless background erasure and parallel batch expansion of data. 10 images are the minimum sample size to meet the training requirements of this invention. Through mini-batch training, early stopping strategy, and the regularization effect of the asymmetric contrastive loss function, overfitting of the network in small sample scenarios can be effectively prevented. In practical applications, the sample size can be appropriately increased according to the diversity of defect morphology.

[0035] Step S102: Training and parameter fixing of the attention feature mapping network.

[0036] The attention feature mapping network is iteratively trained using the initial dataset constructed in step S101 to achieve feature difference extraction and background texture suppression. The topology of the attention feature mapping network is as follows: Figure 2 As shown. Its core technical idea is to train a dual-path symmetric network using an initial dataset to adaptively suppress background texture on the grain surface and extract residual energy from scratch defects in the feature space. The specific implementation process includes the following steps: Step S1021: Construct a single-channel serial stream forward architecture.

[0037] An attention feature mapping network is instantiated in the memory of the hardware computing platform, with its internal topology employing a branchless, single-path serial stream design. First, the original test image and the process reference image, bound together by the same source in the initial dataset, are used as dual inputs and fed into two feature extraction modules sharing parameters for high-dimensional manifold representation, outputting the corresponding test feature matrix and reference feature matrix. Then, the test feature matrix and reference feature matrix are input to the feature difference operation unit, where element-wise absolute value subtraction is performed to separate the shared wafer manufacturing process background from the two images, outputting a feature difference map. Next, the feature difference map is directly serially input to the spatial attention module, which adaptively learns the background noise suppression coefficient using long-distance dependent convolutional layers and nonlinear activation mapping, outputting a refined feature map with a more concentrated energy distribution. Finally, the refined feature map is input to the binary mask prediction module, which, through differentiable soft-threshold activation mapping, outputs a binary candidate mask representing the probability distribution of defect pixels.

[0038] Step S1022: Construct a region-specific hybrid loss function for collaborative supervised training.

[0039] To improve the signal-to-noise ratio of subtle scratch defects under small sample constraints, this step does not employ the conventional single-classification loss. Instead, it constructs a hybrid loss function, a weighted combination of a binary cross-entropy classification loss term and a region-specific contrast constraint term, and performs multi-criteria joint gradient backpropagation on the binary candidate mask and the binary ground truth mask output from the forward propagation. Specifically, the supervision mechanism of the hybrid loss function is as follows: Binary cross-entropy classification loss term: Calculates the full-image pixel-level cross-entropy between the binary candidate mask and the binary ground truth mask in the forward output, used to constrain the network's robustness to basic classification of defects and background.

[0040] Region-specific contrast constraint: Based on the pixel logical values ​​of the binary truth mask, the entire image is divided into a defect target region and a background texture region. In the background texture region, a quadratic penalty is applied to high-frequency residual noise pixels in the feature difference map to guide their residual energy to approach 0.0; in the defect target region, the positive deviation between the current residual energy and the ideal mapping energy is calculated through the hinge loss function to guide the energy of the narrow strip defect to approach 1.0.

[0041] The hybrid loss function is defined as:

[0042] Among them, L total L represents the total loss value. BCE For binary cross-entropy classification loss, L contrast For region-specific contrast loss

[0043] Region-specific contrast loss is defined as:

[0044] Among them, D neg D represents the set of pixel feature values ​​of the background region in the feature difference map (corresponding to regions with a binary ground truth mask ≤ 0.5). pos This is the set of pixel feature values ​​of the defect region in the feature difference map (corresponding to the region with a binary ground truth mask > 0.5). mean() is the mean operation, and max(a,b) is the maximum value of a and b.

[0045] Note: If the defect area is empty, only the loss term of the background area will be calculated.

[0046] By combining the binary cross-entropy classification loss term with the region-specific contrast constraint term, the network can adaptively converge during iterative training, effectively improving the contrast between defects and the background.

[0047] Step S1023: Model decoupling and network parameter serialization and solidification.

[0048] Backpropagation terminates when the hybrid loss function value reaches the preset convergence condition or the training reaches the preset maximum number of iterations. At this point, the attention feature mapping network has the generalization ability to extract defect candidate regions at the pixel level under unknown background interference in different batches of the same process. Subsequently, the weight matrix and bias parameters required for online inference of this network are serialized and packaged, exported as a standard binary network parameter solidification file, and stored in an offline non-volatile storage medium. This completes the parameter solidification of feature extraction and defect candidate region extraction functions in the offline stage, which is then used for deserialization parameter loading in the subsequent online detection stage.

[0049] As a preferred implementation, when training the attention feature mapping network offline, the core component structure and hyperparameter configuration of the network are as follows: The feature extraction module preferably adopts a deep network consisting of two cascaded 3×3 dilated convolutional layers with an inflation rate of 2 and one 1×1 ordinary convolutional layer, wherein the number of channels in the high-dimensional feature map within the network is preferably configured to be 36; the spatial attention module preferably adopts a single 7×7 large receptive field convolutional layer and a sigmoid nonlinear activation function; in the binary mask prediction module, the initial value of the learnable scaling factor is preferably set to 10.0, and the initial value of the learnable segmentation threshold is preferably set to 0.1. In the hybrid loss function, the quadratic penalty coefficient for the background texture region in the region-specific contrast constraint term is preferably set to 10.0, and the global weighting ratio coefficient between the region-specific contrast constraint term and the binary cross-entropy classification loss term is preferably set to 0.5. In terms of training optimization strategy, the Adam optimizer is preferred for gradient update, the batch size is preferably configured to 1, the global maximum number of iterations (Epoch) is preferably configured to 200, and the initial learning rate is preferably set to 1e-3.

[0050] Step S103: Training the hybrid data generation engine and synthesizing samples.

[0051] Binary training samples are generated in batches using a hybrid data generation engine. The topology of the hybrid data generation engine is as follows: Figure 3 As shown. Its core is the use of a dual-channel parallel generation architecture, including a data-driven channel and a physical rule channel, to achieve multi-channel sample mixing and grain background overlay, ultimately constructing a batch of binary training sample sets. The specific implementation process includes the following steps: Step S1031: Adversarial generation and geometric enhancement of data-driven channels.

[0052] The binary ground truth mask from the initial dataset constructed in step S101 is used as the training sample source input to the data-driven channel. First, an adversarial generation module is constructed using a Wasserstein Generative Adversarial Network with gradient penalty (WGAN-GP). The binary ground truth mask is used as a supervision signal for adversarial iterative training, enabling the generator to learn and reconstruct the probability distribution of real scratch defects on edge micro-burrs and local irregular deformations, and output a virtual defect mask with highly realistic micro-edge morphology. Subsequently, the virtual defect mask is input to the geometry enhancement operation unit, which performs anisotropic scaling and random rotation of the spatial axis in the two-dimensional image space, thereby expanding the geometric diversity of defects while maintaining the realism of micro-edges.

[0053] Step S1032: Topological evolution generation of physical rule channels.

[0054] In the physical rules channel, parallel to the data-driven channel, the computing platform triggers the physical evolution generation module. This module requires no external defect image input; instead, it executes a random walk algorithm in a two-dimensional physical space based on the macroscopic physical formation mechanism of slender wear scratches on semiconductor surfaces. By configuring a preset single-step evolution probability matrix and axial deflection moment constraints, it simulates the long-distance connected topological trajectory of the scratch as it extends on the grain surface. Simultaneously, during the evolution process, it dynamically invokes branching and bending operators to simulate the topological changes of the scratch when subjected to abrupt changes in lattice orientation or contact stress. Subsequently, using morphological dilation, corrosion operators, and edge Gaussian smoothing operators, it performs thickness variation, sharp corner processing, and edge transition blurring on the simulated scratch center skeleton, thereby adaptively generating a physical evolution defect mask with a complex macroscopic topological structure based on mathematical and physical rules.

[0055] S1033: Multichannel sample mixing

[0056] The geometrically enhanced virtual defect mask output from the data-driven channel and the physically evolved defect mask output from the physical rule channel are simultaneously input into the sample mixing module. The sample mixing module is internally configured with a probability sampling operator based on an indicator variable. In each synthesis loop of a sample instance, a binary discrete indicator variable is generated according to a preset sampling probability, adaptively controlling the gating routing switch: if the sampled indicator variable has a value of 1, the output of the data-driven channel is allowed; if the sampled indicator variable has a value of 0, the output of the physical rule channel is allowed. This achieves a deep fusion and complementarity of macroscopic topological structures and microscopic edge textures in terms of statistical distribution.

[0057] Step S1034: Background overlay operation.

[0058] Call the defect-free process reference image stored in step S101 to generate a defect-free good product background mask with random process noise: construct a basic global binary background image based on the process reference image, and uniformly assign the second logical value to all pixels of the base; generate discrete interference pixels through Gaussian noise, salt and pepper noise, and texture grayscale perturbation algorithms, uniformly assign the first logical value to the noise pixels and superimpose them onto the basic background image, thereby simulating inherent interferences in the production line such as lithography unevenness, etching texture fluctuation, and imaging particle noise.

[0059] The defect mask output by the sample mixing module is input together with the background mask of defect-free good products into the background overlay operation unit. The maximum value of each element is overlaid to merge the generated defects into the real semiconductor manufacturing process background texture. Finally, the samples are output in batches and a highly generalizable binary training sample set is constructed.

[0060] As a preferred implementation, when running the hybrid data generation engine for sample synthesis, the core topology and technical parameters of each module are preferably configured as follows: In the adversarial generation module, the kernel size of the two-dimensional convolutional layer in the discriminator and the two-dimensional transposed convolutional layer in the generator is preferably configured as 4×4 pixels (stride preferably configured as 2, padding preferably configured as 1), and the gradient penalty term coefficient used to limit gradient explosion is preferably set to 10.0; in the geometric enhancement operation, the anisotropic scaling ratio is preferably limited to the range of 0.60 to 1.40. In the spatial axis random rotation angle range, the preferred configuration is 0.0 degrees to 360.0 degrees. In the physical evolution generation module, the preferred configuration is 1 to 5 pixels for the scratch base line width and thickness range of random walk evolution. The preferred configuration is 0.28 for the probability weight of random branching during the evolution process (the branch thickness scaling ratio is preferably limited to between 0.45 and 1.2), 0.14 for the probability weight of random bending and twisting, and 0.12 for the probability of sudden thickening (the thickening scale is preferably limited to between 1.4 and 3.1). In the sample mixing module, in the binary distribution used to control the dual-channel split routing, the preset probability parameter value for allowing data to drive the channel results is preferably set to 0.5 (i.e., adaptively controlling the output instances of the two independent channels with a 50% to 50% balanced probability). Through the cyclical alternating synthesis and multi-process concurrent output of the hybrid data generation engine, the generated binary training sample set is finally expanded, preferably including 1600 training set images for training the subsequent lightweight detection network, and 400 validation set images for model validation.

[0061] Step S104: Lightweight detection network training and parameter solidification.

[0062] Using the binary training sample set generated in step S103, the lightweight detection network embedded with the strip feature reconstruction module is iteratively trained, outputting the defect bounding box prediction results and fixing the model parameters. The topology of the lightweight detection network is as follows: Figure 4 As shown. The specific implementation process includes the following steps: Step S1041: Construct the forward flow architecture. Instantiate the lightweight detection network in the memory of the hardware computing platform, with a topology using a single-path serial stream design: First, the synthesized images from the binary training sample set are input into the backbone feature extraction network for high-dimensional feature extraction. Subsequently, a strip feature reconstruction module is embedded at the high-dimensional feature map output interface of the backbone feature extraction network. The input feature map is processed and reconstructed within the strip feature reconstruction module through three parallel branches: Multi-scale cascaded dilated deep convolution branch: The input feature matrix first passes through a grouped deep convolutional layer with a kernel size of 5×5. Its output is then fed into two grouped dilated deep convolutional layers with kernel sizes of 7×7 and dilation rates of 3 and 9, respectively, for multi-scale feature extraction. Sparse Axial Maximum Strip Reconstruction Branch: Adaptive Top-K sparse reconstruction is performed along the two-dimensional spatial axis of the feature map using the axial projection operator: For a feature matrix with height H and width W, the preset sparse threshold coefficient k is preferably 5; the top 5 largest response pixels are extracted along the height dimension (vertical axis) and mean projection is performed, and then expanded and restored to an H × W feature matrix; the top 5 largest response pixels are extracted along the width dimension (horizontal axis) and mean projection is performed, and then expanded and restored to an H × W feature matrix; finally, the two axial expansion matrices are fused element-wise by addition to output a sparse axial feature map; Feature fusion and gating mechanism: The outputs of two parallel dilated convolutional layers in the multi-scale cascaded dilated depthwise convolutional branch are additively fused with the sparse axial feature map. Channel integration is performed through a 1×1 convolutional layer (pw), and a sigmoid activation mapping is applied to the output gating weights. Finally, the gating weights are element-wise multiplied and weighted with the input feature matrix of the identity mapping branch, and a learnable channel scaling factor gamma is introduced for residual scaling, outputting an enhanced and refined strip feature matrix. During the initial training phase, the strip feature reconstruction module is initialized with an identity mapping to ensure that gradients can backpropagate without decay in the early stages of training, addressing the gradient discontinuity problem caused by discrete boundary selection.

[0063] Next, the refined strip feature matrix is ​​input into a multi-scale feature fusion network for feature multi-resolution aggregation; Finally, feature mapping is performed through the defect prediction output head to output the defect bounding box prediction results (including confidence score, physical coordinates of the center of the bounding rectangle, and the width and height scale of the box) used to characterize the scratch defect attributes.

[0064] S1042, Network Iterative Training.

[0065] The system aligns the predicted defect bounding boxes from the forward propagation output with the ground truth bounding box information corresponding to the binary training sample set. It then uses a standard object detection loss function (composed of a confidence classification loss term and a bounding box regression loss term) to calculate the loss value and generate the gradient, performs backpropagation, and jointly updates the weight parameters of the entire network.

[0066] S1043, Detection parameters are fixed.

[0067] Training terminates when the loss function value reaches the preset convergence condition or the training reaches the preset maximum number of iterations. Using a serialization export component, the weights, biases, grouped convolution parameters, and learnable channel weighted parameters of all network layers in the lightweight detection network are serialized, packaged, exported, and solidified into a standard lightweight detection network parameter file. This file is stored in non-volatile storage for subsequent online detection deserialization and loading.

[0068] As a preferred implementation, the basic framework of the lightweight detection network (composed of a backbone feature extraction network, a multi-scale feature fusion network, and a defect prediction output head) preferably adopts the YOLO11 lightweight object detection architecture to reduce the total number of model parameters. During offline iterative training, the binary training sample set preferably includes 1600 training images for training and 400 validation images for model validation. The initial value of the learnable channel scaling factor gamma is preferably set to 0.0. Furthermore, the basic framework can be replaced with other lightweight object detection architectures such as YOLOv8 or YOLOv9, all of which embed a strip feature reconstruction module at the cascade interface between the backbone and the multi-scale feature fusion network to improve the model's detection capability.

[0069] Step S105: Test image acquisition and registration preprocessing.

[0070] Step S105 proceeds to the online real-time detection stage, where real-time images of the grains to be detected are acquired and spatial geometric corrections are performed. The specific implementation process includes the following steps: Step S1051: Online test image acquisition.

[0071] The imaging sensor of the automated optical inspection (AOI) equipment is invoked online to acquire a real-time two-dimensional grayscale image of the surface of the grain to be inspected, which serves as the test grain image.

[0072] Step S1052: Load the process reference image.

[0073] Retrieve and load the process reference image constructed in step S101, which uses the same process as the test grain image.

[0074] Step S1053: Image registration preprocessing.

[0075] The acquired test grain image and the loaded process reference image are simultaneously input into the spatial geometric registration operator. Using a feature point matching algorithm or a grain contour edge alignment algorithm, the geometric deformation parameters between the two are calculated. Based on these parameters, spatial geometric correction is performed on the test grain image to eliminate relative displacement and geometric distortion, ensuring that the corrected test grain image and the process reference image are accurately aligned in pixel coordinates on a physical scale.

[0076] Step S106: Online invocation of the attention feature mapping network for real-time extraction of binary candidate masks. The attention feature mapping network is invoked online in the detection pipeline to perform background suppression and defect feature region extraction on the image under test in real time. The specific implementation process includes the following steps: Step S1061: Load curing parameters.

[0077] In the deserialization loading step S102, the exported attention feature map network parameter file is solidified, and the weights and bias parameters of the attention feature map network are fixed in the memory of the hardware computing platform.

[0078] Step S1062: Input feature extraction and background separation.

[0079] The registered and aligned test grain image from step S105, along with the retrieved process reference image, are used as parallel dual-path inputs to the dual-path parameter-shared feature extraction module of the attention feature mapping network for high-dimensional feature extraction, outputting a test feature matrix and a reference feature matrix. Subsequently, the test feature matrix and the reference feature matrix are input to the feature difference operation unit, where element-wise absolute value subtraction is performed in real time to calculate the difference between the two in the feature manifold space, outputting a feature difference map.

[0080] Step S1063: Spatial attention weighting and mask inference.

[0081] The feature difference map is input into the spatial attention module. Using long-range dependent convolutional layers and a sigmoid non-linear activation map, the background noise suppression coefficients at each pixel location in the entire image are adaptively calculated. These background noise suppression coefficients are then used to perform element-wise multiplication weighted suppression on the feature difference map, outputting a purified and refined feature map. Next, the refined feature map is input into the binary mask prediction module, where a differentiable soft-threshold activation map is performed online. Finally, a binary candidate mask representing the probability distribution of defective pixel regions is output in real time.

[0082] Step S107: Use the lightweight detection network online to extract the defect bounding box results in real time.

[0083] Step S107, in the online real-time detection stage, utilizes binary candidate masks for real-time detection and attribute extraction of defect bounding boxes. The specific implementation process includes the following steps: Step S1071: Load network and solidify parameters.

[0084] The lightweight detection network is instantiated in the memory of the hardware computing platform, and the lightweight detection network parameter file exported in step S104 is deserialized and loaded to fix the weights and bias parameters of each layer in the network.

[0085] Step S1072: Online forward inference.

[0086] The binary candidate mask output in step S106 is used as input to the lightweight detection network. The input data is sequentially processed through the backbone feature extraction network, the strip feature reconstruction module, and the multi-scale feature fusion network for feature extraction and fusion. Finally, the defect prediction output head calculates and outputs the defect bounding box prediction result in real time to characterize the scratch defect attributes on the surface of the current test grain.

[0087] Step S1073: Output defect attribute parsing.

[0088] The defect bounding box prediction results output by the defect prediction output head are analyzed, and three core physical properties for locating and quantifying scratch defects are extracted in real time: Confidence score used to determine the existence of scratch defects; The physical coordinates of the center of the outer rectangle used to locate the core location of the defect in two-dimensional physical space; The width and height of the circumscribed rectangle used to characterize the geometry of the defect.

[0089] Step S1074: Defect geometry quantification calculation.

[0090] Based on the defect bounding box prediction results, the corresponding defect region is extracted from the binary candidate mask, and connected component analysis is performed to remove isolated noise points. For each independent defect connected component, the minimum bounding rotation rectangle is calculated, and its long side length is extracted as the actual pixel length of the scratch, the short side length is extracted as the average width of the scratch, and the rotation angle is extracted as the spatial pose information of the scratch.

[0091] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A method for detecting grain scratches based on high-dimensional features and binary samples, wherein, The method includes the following steps: Step S101: For the test dies under the same semiconductor manufacturing process, uniformly collect offline basic data, perform spatial pixel-level registration and annotation information aggregation to construct an initial dataset; Step S102: Iteratively train the attention feature mapping network using the initial dataset. After the training converges, serialize, package, and solidify the network parameters. Step S103: Use a hybrid data generation engine to perform multi-channel sample mixing to synthesize a defect mask, and superimpose the defect mask with the grain background to build a binary training sample set in batches; the hybrid data generation engine adopts a dual-channel parallel generation architecture that includes a data-driven channel and a physical rule channel; Step S104: Using the binary training sample set, iteratively train the lightweight detection network embedded with the strip feature reconstruction module, output the defect bounding box prediction results and solidify the model parameters; Step S105: Enter the online real-time detection stage, and acquire and spatially correct the real-time image of the grain to be detected; Step S106: Invoke the attention feature mapping network online to extract binary candidate masks in real time; Step S107: Use the lightweight detection network online to extract the defect bounding box results in real time.

2. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S101 further includes: Step S1011: Acquire the original grayscale image of the grain with a specific defect morphology on the lower surface of the current wafer manufacturing process as the original image to be tested; obtain or construct a defect-free ideal grain image at the same process node as the original image to be tested as the process reference image; Step S1012: Input the original image to be tested and the process reference image into the image registration operator, and use feature point matching or contour alignment algorithm to perform spatial geometric correction and pixel-level alignment registration on a two-dimensional physical space scale to eliminate relative displacement and geometric distortion. Step S1013: Pixel-level precise boundary delineation and marking are performed on the pixel region where the actual defect is located in the original image under test, thereby generating a binary truth mask with the same size as the original image under test; in the binary truth mask, pixels in the defect-corresponding region are assigned a specific first logical value, and pixels in the background region are assigned a specific second logical value; the spatially registered original image under test, the process reference image, and the corresponding binary truth mask are bound together to form a single set of finely annotated grain images, and batch-assembled to form the initial dataset.

3. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 2, wherein, Step S102 further includes: Step S1021: Input the original image to be tested and the process reference image bound together with the same source into two feature extraction modules with shared parameters for high-dimensional manifold representation, and output the corresponding feature matrix to be tested and the reference feature matrix; input the feature matrix to be tested and the reference feature matrix into the feature difference operation unit, perform element-wise absolute value subtraction, and output the feature difference map; input the feature difference map serially into the spatial attention module, use long-distance dependent convolutional layers and nonlinear activation mapping to adaptively learn the background noise suppression coefficient, and output the refined feature map; input the refined feature map into the binary mask prediction module, and output the binary candidate mask through differentiable soft threshold activation mapping; Step S1022: Construct a hybrid loss function for collaborative supervised training, and perform multi-criteria joint gradient backpropagation on the binary candidate mask and the binary ground truth mask; Step S1023: When the value of the hybrid loss function reaches the preset convergence condition or the training reaches the preset maximum number of iterations, terminate backpropagation; serialize and package the weight matrix and bias parameters required for online inference of the attention feature mapping network to complete parameter solidification.

4. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 3, wherein, The hybrid loss function is a weighted combination of a binary cross-entropy classification loss term and a region-specific contrast constraint term. Calculate the full-image pixel-level cross-entropy between the binary candidate mask and the binary ground truth mask, and use it as the binary cross-entropy classification loss term; The entire image is divided into a defect target region and a background texture region based on the pixel logical values ​​of the binary truth mask. In the background texture region, a quadratic penalty is applied to the residual noise pixels in the feature difference map. In the defect target region, the positive deviation between the current residual energy and the ideal mapping energy is calculated through the hinge loss function, thereby forming a region-specific contrast constraint term. The hybrid loss function is defined as follows: Among them, L total L represents the total loss value. BCE For binary cross-entropy classification loss, L contrast For region-specific contrast loss Region-specific contrast loss is defined as: Among them, D neg D is the set of pixel feature values ​​of the background region in the feature difference map. pos This is the set of pixel feature values ​​of the defect region in the feature difference map. mean() is the mean operation, and max(a,b) is the maximum value between a and b.

5. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S103 further includes: Step S1031: Construct an adversarial generation module using a Wasserstein generative adversarial network with gradient penalty, perform adversarial iterative training using a binary ground truth mask as a supervision signal, and output a virtual defect mask; input the virtual defect mask into the geometric enhancement operation unit to generate a geometric enhancement virtual defect mask; Step S1032: In the physical rule channel parallel to the data-driven channel, a random walk algorithm is executed in the two-dimensional physical space through the physical evolution generation module; by configuring the preset single-step evolution probability matrix and axial deflection moment constraint, the long-distance connected topological trajectory of the scratch as it extends on the grain surface is simulated; during the evolution process, the branching and bending operators are dynamically called to simulate the topological changes of the scratch when it is subjected to abrupt changes in lattice direction or contact stress; using morphological expansion, corrosion operators and edge Gaussian smoothing operators, the simulated scratch center skeleton is subjected to thickness variation, sharp corner processing and edge transition blurring to generate a physical evolution defect mask; Step S1033: The geometrically enhanced virtual defect mask and the physical evolution defect mask are simultaneously and in parallel input to the sample mixing module. The sample mixing module is configured with a probability sampling operator based on an indicator variable. In each synthesis loop of a sample instance, a binary discrete indicator variable is generated according to a preset sampling probability to adaptively control the gated routing switch: if the sampled indicator variable is 1, the output result of the data-driven channel is allowed to pass; if the sampled indicator variable is 0, the output result of the physical rule channel is allowed to pass. Step S1034: Call the process reference image stored in step S101 to generate a defect-free good product background mask with process random noise; input the defect mask output by the sample mixing module and the defect-free good product background mask together into the background overlay operation unit, perform element-by-element maximum value overlay, fuse the generated defects into the real semiconductor manufacturing process background texture, batch output and construct the binary training sample set.

6. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S104 further includes: Step S1041: Construct a forward flow architecture, input the synthetic image from the binary training sample set into the backbone feature extraction network for high-dimensional feature extraction; embed a strip feature reconstruction module at the high-dimensional feature map output interface of the backbone feature extraction network to process the high-dimensional feature map and output a refined strip feature matrix; input the refined strip feature matrix into a multi-scale feature fusion network, and output the defect bounding box prediction result through the defect prediction output head; Step S1042: Align the predicted defect bounding box output from the forward propagation with the ground truth bounding box information corresponding to the binary training sample set; calculate the loss value and generate the gradient using the target detection loss function, perform backpropagation, and jointly update the weight parameters of the entire network. Step S1043: When the loss function value reaches the preset convergence condition or the training reaches the preset maximum number of iterations, terminate the training and serialize and package all parameters in the lightweight detection network.

7. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 6, wherein, In step S1041, the processing of the high-dimensional feature map by the strip feature reconstruction module includes: Multi-scale cascaded dilated deep convolution branch: The input feature matrix is ​​passed through a grouped deep convolutional layer, and its output is fed into two grouped dilated deep convolutional layers with different dilation rates to perform multi-scale feature extraction. Sparse Axial Maximum Strip Reconstruction Branch: Adaptive Top-K sparse reconstruction is performed along the two-dimensional spatial axis of the feature map using the axial projection operator: For a feature matrix with height H and width W, a preset sparse threshold coefficient k is used; the top k largest response pixels are extracted along the height dimension and mean projection is performed, and then expanded and restored to an H × W feature matrix; the top k largest response pixels are extracted along the width dimension and mean projection is performed, and then expanded and restored to an H × W feature matrix; finally, the two axial expansion matrices are fused element-wise by addition to output a sparse axial feature map; Feature fusion and gating mechanism: The outputs of two parallel dilated convolution layers in the multi-scale cascaded dilated depthwise convolution branch are additively fused with the sparse axial feature map, channel integration is performed through a 1×1 convolutional layer, and sigmoid activation mapping is executed to output gating weights; the gating weights are then multiplied element-wise with the input feature matrix of the identity mapping branch, and a learnable channel scaling factor gamma is introduced for residual scaling to output a refined strip feature matrix; the strip feature reconstruction module is initialized with identity mapping during the initial training phase.

8. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S105 further includes: Step S1051: Acquire a real-time two-dimensional grayscale image of the surface of the grain to be tested as the test grain image; Step S1052: Retrieve and load the process reference image obtained in step S101, which has the same process as the test grain image; Step S1053: Simultaneously input the acquired test grain image and the loaded process reference image into the spatial geometric registration operator; calculate the geometric deformation parameters between the two using a feature point matching algorithm or a grain contour edge alignment algorithm; and perform spatial geometric correction on the test grain image based on the geometric deformation parameters.

9. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S106 further includes: Step S1061: Deserialize and load the attention feature mapping network parameter file that was solidified and exported in step S102, and fix the weights and bias parameters of the attention feature mapping network in the memory of the hardware computing platform. Step S1062: The registered and aligned test grain image from step S105 and the retrieved process reference image are used as parallel dual-path inputs and input to the dual-path parameter-sharing feature extraction module of the attention feature mapping network for high-dimensional feature extraction, outputting a test feature matrix and a reference feature matrix; the test feature matrix and the reference feature matrix are input to the feature difference operation unit, and element-wise absolute value subtraction is performed in real time to calculate the difference between the two in the feature manifold space, outputting a feature difference map; Step S1063: Input the feature difference map into the spatial attention module; adaptively calculate the background noise suppression coefficient at each pixel position in the entire image using long-distance dependent convolutional layers and Sigmoid nonlinear activation mapping; use the background noise suppression coefficient to perform element-wise multiplication weighted suppression on the feature difference map, and output a refined feature map; input the refined feature map into the binary mask prediction module, perform differentiable soft threshold activation mapping online, and output the binary candidate mask in real time.

10. The grain scratch detection method based on high-dimensional features and binary samples as described in claim 1, wherein, Step S107 further includes: Step S1071: Instantiate the lightweight detection network in the memory of the hardware computing platform, and deserialize and load the lightweight detection network parameter file that was solidified and exported in step S104, and fix the weights and bias parameters of each layer in the network. Step S1072: The binary candidate mask output in step S106 is used as input to the lightweight detection network; the input data is sequentially processed by the backbone feature extraction network, the strip feature reconstruction module and the multi-scale feature fusion network for feature extraction and fusion, and finally the defect prediction output head calculates and outputs the defect bounding box prediction result in real time. Step S1073: Analyze the defect bounding box prediction results output by the defect prediction output head, and extract the confidence score, the physical coordinates of the center of the bounding rectangle, and the width and height scale information of the box in real time. Step S1074: Based on the defect bounding box prediction results, extract the corresponding defect region from the binary candidate mask, perform connected component analysis to remove isolated noise points; calculate the minimum bounding rotation rectangle for each independent defect connected component, extract its long side length as the actual pixel length of the scratch, the short side length as the average width of the scratch, and the rotation angle as the spatial pose information of the scratch.

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