Silicon negative electrode material and preparation method and application thereof

Abstract

The application provides a silicon negative electrode material and a preparation method and application thereof. The preparation method comprises the following steps: taking silicon powder as a cathode, taking a molten salt containing M metal elements as an electrolyte, passing current to electrolyze, obtaining an alloy of silicon and metal M at the cathode after electrolysis, wherein M is at least one selected from Mg, Li, Sn and Ca; taking the alloy of silicon and metal M as an anode, electrolyzing through at least two stages of molten salt electrolysis, obtaining a porous silicon intermediate at the anode after electrolysis; after cooling to a predetermined temperature, an oxygen-containing gas is introduced to in-situ grow amorphous SiOx on the surface of the porous silicon intermediate X a passivation layer, cooling to room temperature, and obtaining the silicon negative electrode material. Through the synergistic control of electrolysis temperature, electrolysis time and the like, the method can realize the synergistic control of the amorphous phase content and the grain size, and can effectively reduce the expansion rate of the silicon negative electrode.

Description

Technical Field

[0001] This invention relates to the field of lithium-ion batteries, and more specifically, to a silicon anode material, its preparation method, and its application. Background Technology

[0002] With the development of portable electronic devices, electric vehicles, and energy storage systems, the requirements for energy density, cycle life, and safety stability of lithium-ion batteries continue to increase. Graphite anode materials, due to their limited theoretical specific capacity, are insufficient to meet the further development needs of high-energy-density lithium-ion battery systems. Therefore, developing anode materials with high specific capacity, low volume expansion, and good cycle stability is an important direction for the development of lithium-ion battery technology.

[0003] Silicon, with its high theoretical specific capacity and low lithium intercalation potential, is considered a promising candidate for next-generation high-capacity anode materials. However, silicon undergoes significant volume changes during charge and discharge. Repeated lithium intercalation and deintercalation lead to expansion, contraction, cracking, and pulverization of silicon particles, resulting in poor contact between the active material and the current collector, repeated formation of the solid electrolyte interfacial film, and a continuous increase in battery internal resistance, ultimately causing rapid capacity decay and reduced cycle life. To alleviate the volume expansion problem of silicon anode materials, existing technologies typically employ modification methods such as nano-sizing, porousing, carbon coating, silicon oxide composites, silicon-carbon composites, and binder optimization. For example, reducing the silicon particle size to the nanoscale can alleviate stress concentration to some extent; constructing porous structures can provide buffer space for silicon expansion; and carbon coating or oxide layer modification can improve conductivity and interface stability. However, these methods still have certain limitations. For example, nano-sizing can easily increase the specific surface area of ​​materials, leading to more side reactions and a decrease in the first-cycle coulombic efficiency; carbon coating or composite structure preparation processes are more complex and may reduce the active silicon content; if the pore size and porosity of porous structures are not properly controlled, it can easily lead to insufficient mechanical strength of the materials; although silicon oxide composites can improve expansion behavior, excessive oxygen content may lead to an irreversible increase in capacity. Summary of the Invention

[0004] In view of the shortcomings of the prior art, one of the objectives of this invention is to solve one or more problems existing in the prior art. For example, one objective of this invention is to provide a method for preparing silicon anode materials with high specific capacity, low volume expansion, and good cycle stability.

[0005] This invention provides a method for preparing a silicon anode material, which may include the following steps: using silicon powder as the cathode, a molten salt containing a metal element M as the electrolyte, electrolyzing, and obtaining an alloy of silicon and metal M at the cathode after electrolysis, wherein M is selected from at least one of Mg, Li, Sn, and Ca; using the silicon-metal M alloy as the anode, performing at least two stages of molten salt electrolysis, and obtaining a porous silicon intermediate at the anode after electrolysis; cooling to a predetermined temperature and then introducing an oxygen-containing gas to grow amorphous SiO2 in situ on the surface of the porous silicon intermediate. X Passivation layer, cooled to room temperature, yields silicon anode material, wherein 1.2 ≤ x ≤ 1.6.

[0006] Furthermore, porous silicon intermediates can be obtained at the anode through two-stage molten salt electrolysis. The voltage of the first stage of molten salt electrolysis can be 1.8 V to 2.2 V, and the electrolysis time can be 1 h to 3 h. The voltage of the second stage of molten salt electrolysis can be 3.0 V to 3.5 V, and the electrolysis time can be 0.5 h to 1.0 h. The second stage of molten salt electrolysis is pulse electrolysis, and the pulse duty cycle can be 45% to 55%.

[0007] Furthermore, the current density of the first stage of molten salt electrolysis can be controlled to be 0.05 A / cm². 2 ~0.15 A / cm 2 The current density for the second stage of molten salt electrolysis is 0.3 A / cm². 2 ~0.5 A / cm 2 After the two-stage molten salt electrolysis is completed, the average grain size of the porous silicon intermediate can be 50 nm to 200 nm.

[0008] Furthermore, in the step of obtaining the alloy of silicon and metal M, the voltage of electrolysis can be 2.0 V to 2.5 V, and the electrolysis time can be 0.5 h to 1.5 h.

[0009] Furthermore, the pores in the porous silicon intermediate are through pores and / or blind pores, with a pore size of 10 nm to 50 nm and a porosity of 15% to 30%.

[0010] Furthermore, the porous silicon intermediate can have a core-shell structure, where the core can be a composite of amorphous silicon and nanocrystalline silicon, and the shell can be a nanocrystalline silicon layer. Specifically, amorphous silicon can account for 40 wt% to 80 wt% of the porous silicon intermediate, and the nanocrystalline silicon size of the nanocrystalline silicon layer can be 50 nm to 80 nm.

[0011] Furthermore, amorphous SiO X The thickness of the passivation layer can be 2 nm to 5 nm.

[0012] Furthermore, in the step of obtaining the silicon anode material, the temperature can be reduced to 200℃~300℃ at a cooling rate of 25℃ / h~100℃ / h, and a mixture of oxygen and inert gas can be introduced and maintained for 10 min~30 min to grow amorphous SiO2 in situ on the surface of the porous silicon intermediate. X Passivation layer.

[0013] Furthermore, the silicon powder is silicon powder pretreated from a silicon source. The pretreatment includes acid washing, washing, and vacuum drying of the silicon source. The vacuum drying temperature can be 60 ℃~120 ℃, and the drying time can be 6 h~24 h. The silicon source can be industrial-grade silicon powder with a purity of not less than 98.5%.

[0014] Another aspect of the present invention provides a silicon anode material, which may include a silicon substrate and an amorphous SiO2 coating on the surface of the silicon substrate. X Passivation layer, wherein amorphous SiO X The thickness of the passivation layer can be 2 nm to 5 nm, and 1.2 ≤ x ≤ 1.6.

[0015] In another aspect, the present invention provides a lithium-ion battery comprising a silicon anode material prepared by the silicon anode material preparation method described above, or the silicon anode material described above.

[0016] Compared with the prior art, the beneficial effects of the present invention include at least one of the following:

[0017] (1) The method of the present invention utilizes the alloying reaction between metal elements and silicon, and the metal elements are preferentially dissolved through subsequent dealloying, thereby forming a porous structure. The porous structure can provide a buffer space for silicon lithium intercalation expansion, which is beneficial to reducing particle pulverization.

[0018] (2) The method of the present invention can achieve coordinated control of amorphous phase content and grain size by synergistic control of electrolysis temperature, electrolysis time, etc., which can effectively reduce the expansion rate of silicon anode.

[0019] (3) The method of the present invention forms amorphous SiO on the outer layer. x The passivation layer eliminates the need for additional complex coating processes. This passivation layer stabilizes the silicon surface, improves electrode interface reactions, and further reduces the actual expansion rate. Attached Figure Description

[0020] The above and other objects and features of the present invention will become clearer from the following description taken in conjunction with the accompanying drawings, in which:

[0021] Figure 1 This is a schematic diagram of the silicon anode material structure prepared in Example 1 of the present invention.

[0022] Figure 2This is a schematic diagram of the orthogonal experimental results showing the influence of the amorphous silicon ratio X and silicon grain size D on the expansion rate Y of the silicon anode in this invention.

[0023] Explanation of reference numerals in the attached figures:

[0024] 1-Amorphous SiOx passivation layer, 2-Nanocrystalline silicon layer, 3-Amorphous silicon and nanocrystalline silicon composite. Detailed Implementation

[0025] In the following, a silicon anode material according to the present invention, its preparation method and application will be described in detail with reference to the accompanying drawings and exemplary embodiments.

[0026] Specifically, the volume expansion of silicon anode materials is not only related to particle size, pore structure, and surface coating, but also closely related to the content of amorphous phase, grain size, and crystalline structure distribution within the material. Amorphous silicon can reduce the anisotropic phase transition stress of crystalline silicon during lithium intercalation, which helps to alleviate local stress concentration; while appropriately sized nanocrystalline silicon can maintain a certain electron transport capacity and structural stability. Therefore, if the content of amorphous phase and grain size can be simultaneously controlled within the silicon material, combined with a reasonable pore structure and surface passivation layer, the expansion of silicon anodes can be reduced from the intrinsic structural level of the material.

[0027] The method of this invention constructs closed-pore and / or through-pore nanopores on a silicon substrate in a molten salt electrolysis system through alloying and dealloying processes. During the dealloying stage, parameters such as electrolysis temperature and time are adjusted to synergistically control the proportion and grain size of amorphous silicon in the silicon material, forming an amorphous / nanocrystalline composite – an amorphous core-shell structure – with a gradient distribution from the inside out. Subsequently, during the cooling process, amorphous SiO₂ is generated in situ on the surface of the silicon particles. x Passivation layer. This controllable electrolysis process achieves synergistic regulation of pore structure, amorphous phase content, and grain size, combined with surface SiO2. x The passivation layer, while maintaining a high active silicon content, effectively suppresses the volume expansion of silicon materials during electrochemical cycling, significantly improving its cycle stability and application reliability as a lithium-ion battery anode material, thereby obtaining an intrinsically low-expansion silicon anode material.

[0028] One aspect of the present invention provides a method for preparing a silicon anode material. In some embodiments, the method may include the following steps:

[0029] S01 uses silicon powder as the cathode and molten salt containing metal element M as the electrolyte. Electrolysis is performed by passing an electric current through the cathode. After electrolysis, an alloy of silicon and metal M is obtained at the cathode, wherein M is selected from at least one of Mg, Li, Sn and Ca.

[0030] SO2, using an alloy of silicon and metal M as the anode, is obtained through at least two stages of molten salt electrolysis, and a porous silicon intermediate is obtained at the anode after the electrolysis is completed;

[0031] After SiO3 is cooled to a predetermined temperature, oxygen-containing gas is introduced to grow amorphous SiO2 in situ on the surface of the porous silicon intermediate. X Passivation layer, cooled to room temperature, yields silicon anode material, wherein 1.2 ≤ x ≤ 1.6.

[0032] In some embodiments, the silicon powder can be pretreated silicon powder from a silicon source. The pretreatment may include: firstly, acid washing of the silicon source to remove free elemental metals such as iron, aluminum, and calcium, as well as easily soluble metal salts, from the surface of the silicon source powder. After acid washing, the powder is repeatedly centrifuged / filtered with deionized water until the filtrate is neutral, and then vacuum dried to obtain the pretreated silicon powder. The acid washing medium can be a single acid system such as dilute hydrochloric acid or dilute nitric acid; acids that react with silicon, such as hydrofluoric acid, should be avoided. In some embodiments, the vacuum drying temperature can be 60℃~120℃, and the drying time can be 6 h~24 h. For example, the vacuum drying temperature can be 70℃~110℃, and the drying time can be 8 h~20 h. Another example is that the vacuum drying temperature can be 85℃~95℃, and the drying time can be 12 h~17 h. The silicon source can be industrial-grade silicon powder with a purity of not less than 98.5%. The method of this invention does not require the use of high-cost high-purity silicon sources. Structural reconstruction can be achieved through acid washing to remove impurities, molten salt electrolysis, and temperature control, which has good industrial applicability.

[0033] In some implementations, the molten salt can be NaCl molten salt, KCl molten salt, NaCl-KCl mixed molten salt, CaCl2 molten salt, NaCl-CaCl2 mixed molten salt, and NaCl-KCl-CaCl2 mixed molten salt, etc. If the molten salt does not contain the metal element M, a salt containing metal M can be added to the molten salt, such as MgCl2, LiCl, SnCl2, and CaCl2. The amount of the metal salt containing M added can be 0.5 wt% to 25 wt% of the mass of the molten salt system. For example, the amount added can be 5 wt% to 15 wt% or 8 wt% to 12 wt% of the mass of the molten salt system. If the molten salt itself contains the metal element M, no other substances need to be added. For example, if CaCl2 is used as the molten salt, since the molten salt contains the element Ca, no other metal salt needs to be added.

[0034] In some implementations, the silicon alloying process in step S01 can use a graphite rod as the anode, with an applied electrolysis voltage of 2.0 V to 2.5 V and an electrolysis time of 0.5 h to 1.5 h, causing silicon to undergo an alloying reaction with metal ions M in the molten salt system, forming silicon alloys such as CaSi2, Mg2Si, Li-Si, and Sn-Si. Through silicon alloying, a second phase that preferentially dissolves in subsequent electrolysis can be introduced into the silicon particles, providing a basis for forming porous structures and controlling the bulk phase structure. For example, the electrolysis voltage can be 2.1 V to 2.4 V, and the electrolysis time can be 0.7 h to 1.3 h. Another example is an electrolysis voltage of 2.2 V to 2.3 V and an electrolysis time of 0.8 h to 1.0 h. The electrolysis temperature can be adaptively adjusted according to the type of molten salt system selected. For example, the electrolysis temperature can be 450 ℃ to 900 ℃. For example, the electrolysis temperature can be 500℃, 560℃, 680℃, 750℃ or 840℃.

[0035] In some implementations, step S02 is a dealloying process. After the alloying in step S01 is completed, the electrodes can be switched, using the silicon-metal M alloy as the anode and the graphite rod as the cathode, and dealloying is performed in a molten salt system. During the dealloying process, on the one hand, the metal M component in the alloy preferentially dissolves, leaving a porous structure dominated by silicon, resulting in a porous silicon intermediate. Uniformly distributed blind pores (non-through pores) and / or through nanopores are formed inside or on the surface of the porous silicon intermediate. The distributed pore structure can serve as an internal buffer space during the lithium intercalation expansion process of silicon material, thereby reducing the overall outward expansion of silicon particles and reducing particle cracking and pulverization. On the other hand, by controlling the electrolysis parameters during the dealloying process, the amorphous phase content and grain size of the silicon powder can be controlled, thereby improving the physicochemical properties of the silicon powder.

[0036] In some embodiments, the pore size of the formed blind pores and / or through pores can be 10 nm to 50 nm, and the porosity can be 15% to 30%. Setting the above pore size and porosity allows the composite material to provide buffer space for the expansion of silicon-lithium intercalation while avoiding a decrease in particle mechanical strength due to excessive porosity. For example, the pore size of the formed blind pores and / or through pores can be 15 nm to 40 nm, and the porosity can be 18% to 26%. As another example, the pore size of the formed blind pores and / or through pores can be 21 nm to 35 nm, and the porosity can be 22% to 24%.

[0037] In some implementations, dealloying can be performed using multi-stage molten salt electrolysis, such as two-stage, three-stage, or four-stage molten salt electrolysis. Multi-stage molten salt electrolysis allows for better control of the amorphous phase content and grain size of the silicon powder. Preferably, two-stage molten salt electrolysis is performed.

[0038] The first stage of molten salt electrolysis can be performed using a relatively low voltage, typically set to 1.8 V to 2.2 V, with an electrolysis time of 1 h to 3 h. In this stage, the lower voltage promotes the dominant growth of amorphous silicon and reduces the tendency for excessive growth of crystalline silicon, thereby increasing the proportion of amorphous silicon in the material. The electrolysis temperature can be adjusted according to the type of molten salt; for example, it can be between 450 ℃ and 900 ℃. Alternatively, the electrolysis temperature could be 480 ℃, 520 ℃, 590 ℃, 640 ℃, 730 ℃, or 860 ℃.

[0039] The second stage of molten salt electrolysis can be performed at a high voltage, typically 3.0 V to 3.5 V, with an electrolysis time of 0.5 h to 1 h. This stage is used to induce moderate crystallization on the surface of silicon particles and control the grain size of the surface nanocrystalline silicon shell layer. For example, the second stage of molten salt electrolysis can employ high-voltage pulsed electrolysis, with a pulse duty cycle of 45% to 55%, 48% to 50%, etc. By adjusting the electrolysis voltage waveform, the grain size of the surface nanocrystalline shell layer can be controlled within the range of 50 nm to 80 nm. For example, the grain size of the surface nanocrystalline silicon shell layer can be a combination of 55 nm to 74 nm, 60 nm to 70 nm, 63 nm to 68 nm, or higher. The electrolysis temperature in this stage can be adjusted according to the type of molten salt; for example, the electrolysis temperature can be 450 ℃ to 900 ℃. For example, the electrolysis temperature can be 470 ℃, 500 ℃, 560 ℃, 670 ℃, 760 ℃ or 840 ℃.

[0040] Through the two-stage electrolysis described above, silicon materials can form a gradient amorphous / nanocrystalline composite-amorphous core-shell structure. That is, the core of the material maintains a high amorphous content and an adjustable nanocrystalline structure, while the surface of the material forms a fine-grained nanocrystalline shell. At the same time, the grain size of the core and the surface layer remains adjustable, thus forming a dual-scale structure of "fine surface grains - adjustable core grains". This improves the overall structural stability of the material and suppresses volume expansion, thereby improving the mechanical stability of the anode material.

[0041] In some implementations, the average grain size of the overall silicon particles and the surface nanocrystalline structure can be controlled by adjusting the electrolytic current density in the first and second stages during the dealloying process in step S02. In some implementations, the current density of the first stage molten salt electrolysis can be controlled to be 0.05 A / cm². 2 ~0.15 A / cm 2 At this point, the average grain size of the silicon powder can be controlled between 150 nm and 200 nm. For example, the current density of the first stage of molten salt electrolysis can be controlled to be 0.09 A / cm². 2~0.13 A / cm 2 0.10 A / cm 2 ~0.12 A / cm 2 Or a combination of the above ranges. The average grain size can be 155 nm, 161 nm, 178 nm, 184 nm, or 192 nm. The current density of the second-stage molten salt electrolysis can be controlled to 0.3 A / cm². 2 ~0.5 A / cm 2 For example, the current density in the second stage of molten salt electrolysis can be 0.33 A / cm². 2 ~0.47 A / cm 2 0.38 A / cm 2 ~0.42 A / cm 2 Or a combination of the above ranges. By controlling the current density as described above, the average grain size of the porous silicon intermediate can be tuned to between 50 nm and 200 nm after molten salt electrolysis. For example, after two stages of molten salt electrolysis, the average grain size of the porous silicon intermediate can be a combination of 54 nm to 93 nm, 60 nm to 85 nm, 67 nm to 73 nm, or higher. Thus, the average grain size of the entire silicon particle can be controlled by controlling the current density.

[0042] Furthermore, the proportion of amorphous silicon can be controlled through multi-stage electrolysis, ensuring that the amorphous silicon mass accounts for 40 wt% to 80 wt% of the porous silicon intermediate. For example, combinations of amorphous silicon mass percentages within the ranges of 45 wt% to 72 wt%, 53 wt% to 68 wt%, 57 wt% to 62 wt%, or higher can be used. By setting the amorphous silicon mass percentage to 40 wt% to 80 wt% of the porous silicon intermediate, and in conjunction with an average grain size of 50 nm to 200 nm for the porous silicon intermediate, the expansion rate of the silicon anode can be effectively reduced. Excessively large grain sizes will lead to an increased expansion rate of the silicon anode.

[0043] In some implementations, step S03 can involve gradient cooling to achieve in-situ SiO2. x Formation of the passivation layer. For example, after electrolysis, the temperature is reduced to 200℃~300℃ at a cooling rate of 25℃ / h~100℃ / h, and a mixture of O2 and inert gas is introduced, wherein the volume fraction of O2 can be 0.1%–1%, and maintained for 10 min~30 min. This allows for the in-situ growth of amorphous SiO2 on the surface of the porous silicon intermediate. XPassivation layer. For example, after electrolysis, the temperature is lowered to 210℃~250℃ at a rate of 40℃ / h~70℃ / h, and a mixture of O2 and inert gas is introduced, where the O2 volume fraction can be 0.4%–0.8%, and maintained for 15 min~25 min. This allows for the in-situ growth of amorphous SiO2 on the surface of the porous silicon intermediate. X Passivation layer. In some embodiments, the thickness of the amorphous SiOx passivation layer can be 2 nm to 5 nm, where x can be 1.2 ≤ x ≤ 1.6. For example, the thickness of the amorphous SiOx passivation layer can be 3 nm to 4 nm, where x can be 1.3 or 1.4. Amorphous SiO x After the passivation layer is formed, the temperature can be further reduced to room temperature to decrease residual stress within the silicon material and stabilize the particle surface structure. The amorphous SiO₂ structure described above... x The passivation layer can regulate the ratio of Li₂O to active silicon during the first discharge cycle of silicon anode materials. This is achieved by using SiO₂... x By controlling the oxygen content x in the layer to be 1.2~1.6, the mass ratio of Li2O generated during the first discharge cycle to active silicon can be (1.2~2.0):1, thereby achieving a balance between flexibility, ionic conductivity and mechanical strength.

[0044] The inventors discovered a quantitative correlation between the expansion rate of silicon anode materials and the proportion of amorphous silicon and the silicon grain size. By setting up orthogonal experimental combinations with different proportions of amorphous silicon (X) and different silicon grain sizes (D), and by performing structural characterization and electrode thickness expansion rate tests on the corresponding silicon anode materials, the following empirical relationship was obtained:

[0045] Y = -0.72X + 0.58D + 101.4

[0046] Where X represents the amorphous silicon percentage in wt%; D represents the average silicon grain size in nm; and Y represents the silicon anode expansion rate without a SiOx passivation layer in %. This relationship indicates that within the structural control range defined by this invention, i.e., when the amorphous silicon percentage is 40 wt%~80 wt% and the silicon grain size is 50 nm~200 nm, the silicon anode expansion rate will be reduced. This is because the higher amorphous silicon percentage set in this invention can weaken the anisotropic phase transition stress of crystalline silicon during lithium intercalation, reducing local stress concentration; the smaller grain size of 50 nm~200 nm helps to shorten the lithium-ion diffusion path and reduce stress accumulation within individual grains.

[0047] When an amorphous SiOx passivation layer with a thickness of 2 nm to 5 nm and an x ​​value of 1.2 to 1.6 is further formed on the material surface, the actual expansion ratio Y' satisfies the following relationship:

[0048] Y' = Y × (0.65–0.75)

[0049] Wherein, Y represents the expansion rate of the silicon anode without the SiOx passivation layer. It can be seen that by setting the amorphous silicon ratio and silicon grain size of this invention, and constructing a 2 nm to 5 nm thick SiOx passivation layer with a certain oxygen content on the material surface, the actual expansion rate of the silicon anode material can be reduced synergistically from both the bulk structure and the surface / interface structure aspects.

[0050] In another aspect, the present invention provides a silicon anode material. In some embodiments, such as... Figure 1 As shown, the negative electrode material may include a silicon substrate and amorphous SiO2 coated on the surface of the silicon substrate. X Passivation layer 1, wherein amorphous SiO X The passivation layer can have a thickness of 2 nm to 5 nm, and 1.2 ≤ x ≤ 1.6. The silicon substrate has a core-shell structure, with the core being a composite of amorphous silicon and nanocrystalline silicon 3, and the shell being a nanocrystalline silicon layer 2.

[0051] In another aspect, the present invention provides a lithium-ion battery comprising a silicon anode material prepared by the silicon anode material preparation method described above, or the silicon anode material described above.

[0052] To better understand the present invention, specific examples are provided below to further illustrate the content of the present invention, but the content of the present invention is not limited to the examples below.

[0053] To verify the synergistic effect of the amorphous silicon ratio X and the average silicon grain size D on the expansion rate of silicon anode materials, the inventors designed an orthogonal experiment with the amorphous silicon ratio X and silicon grain size D as the main factors to be investigated. A schematic diagram of the orthogonal experimental results showing the influence of the amorphous silicon ratio X and silicon grain size D on the expansion rate Y of the silicon anode is shown below. Figure 2 As shown.

[0054] The obtained silicon anode materials were characterized by X-ray diffraction, Raman spectroscopy, and transmission electron microscopy to determine their amorphous silicon content and average grain size. Subsequently, each group of silicon anode materials was fabricated into anode sheets, and charge-discharge tests were conducted under the same electrode formulation, the same compaction density, and the same testing regime. The silicon anode expansion rate was calculated by the change in anode sheet thickness before and after cycling.

[0055] The amorphous silicon content (X) was selected at three levels: 40 wt%, 60 wt%, and 80 wt%, and the silicon grain size (D) was selected at three levels: 50 nm, 125 nm, and 200 nm, forming a 3×3 orthogonal experimental setup. The experimental design and expansion rate calculation results are shown in the table below.

[0056] Table 1. Orthogonal experimental results showing the influence of amorphous silicon ratio and grain size on the expansion rate of silicon anodes.

[0057]

[0058] As shown in Table 1, with the same average silicon grain size D, the expansion rate of the silicon anode significantly decreases as the amorphous silicon content X increases from 40 wt% to 80 wt%. Conversely, with the same amorphous silicon content X, the expansion rate of the silicon anode significantly increases as the silicon grain size D increases from 50 nm to 200 nm. This indicates that both the amorphous silicon content and the silicon grain size significantly affect the expansion behavior of the silicon anode material.

[0059] Linear fitting was performed on the above orthogonal experimental results to obtain the relationship between the silicon anode expansion rate Y, the amorphous silicon ratio X, and the silicon grain size D:

[0060] Y = -0.72X + 0.58D + 101.4

[0061] Where X is the amorphous silicon percentage in wt%; D is the silicon grain size in nm; and Y is the silicon anode expansion rate without SiOx coating in wt%.

[0062] The fitting relationship shows that the coefficient of amorphous silicon proportion X is negative, indicating that increasing the amorphous silicon proportion can reduce the expansion rate of silicon anodes. This is because increasing the amorphous silicon proportion weakens the anisotropic phase transition stress in crystalline silicon during lithium intercalation, reducing local stress concentration and crack initiation tendency. The long-range disorder of atomic arrangement in the amorphous silicon structure provides a more uniform stress release path during lithium-ion insertion and extraction, thus helping to alleviate particle cracking. The coefficient of silicon grain size D is positive, indicating that increasing the grain size increases the expansion rate of silicon anodes. This is because grain size also has a significant impact on the expansion behavior of silicon anode materials. Appropriately reducing the grain size can shorten the lithium-ion diffusion path and reduce the stress accumulation within individual grains. However, excessively small grain size may also lead to an increase in the material interface area, thereby increasing side reactions. Therefore, this invention controls the silicon grain size within the range of 50–200 nm to balance stress release and structural stability. The above analysis results are consistent with the technical approach of this invention, which promotes the growth of amorphous silicon through a low-voltage stage, controls the grain size through current density, and forms a fine-grained surface structure through high-voltage pulses.

[0063] Furthermore, an amorphous SiOx passivation layer was introduced onto the silicon material surface. Test results showed that after forming the SiOx passivation layer, the actual expansion rate Y' of the silicon anode material was further reduced, reaching approximately 65%–75% of the expansion rate Y without the SiOx layer.

[0064] Y' = Y × (0.65–0.75)

[0065] This demonstrates that the SiOx passivation layer can improve the surface structural stability of silicon particles, alleviate stress concentration on the particle surface, and reduce the overall thickness expansion of the electrode. This proves that the present invention, through the synergistic design of "amorphous silicon ratio control—grain size control—surface SiOx passivation layer construction," can effectively reduce the volume expansion of silicon anode materials during charging and discharging.

[0066] Example 1

[0067] A method for preparing a silicon anode material may include the following steps:

[0068] Step 1: Use industrial-grade silicon powder with a purity of 98.5% or higher as the silicon source. Place the silicon powder in dilute hydrochloric acid for impurity removal to remove metallic and oxide impurities from the surface. After acid washing, wash with deionized water until neutral, and dry under vacuum at 80°C for 8 hours to obtain pretreated silicon powder.

[0069] Step 2: The pretreated silicon powder is added to the NaCl molten salt system, and 10 wt% CaCl2 is added as an alloying material. The silicon powder is used as the cathode and the graphite rod as the anode. A voltage of 2.3 V is applied at about 600 °C and maintained for 1 hour to allow silicon to undergo an alloying reaction with calcium ions in the molten salt system, forming a silicon alloy structure containing the CaSi2 phase.

[0070] Step 3: After alloying, the electrode polarity is reversed, and the alloyed silicon alloy containing the CaSi2 phase is used as the anode for dealloying. During dealloying, the calcium component in the alloy preferentially dissolves, forming uniformly distributed closed or interconnected nanopores inside the silicon particles. The dealloying process employs a two-stage electrolysis mode. The first stage uses a voltage of 2.0 V for 2 hours to promote the growth of amorphous silicon. The second stage uses a high-voltage pulse treatment of 3.2 V for 0.75 hours with a pulse duty cycle of 50% to induce crystallization on the silicon particle surface and form a fine-grained nanocrystalline shell. The electrolysis current density in the first stage is controlled at 0.10 A / cm². 2 The electrolysis current density in the second stage is controlled at 0.35 A / cm². 2 This allows the overall average grain size of silicon particles to be controlled at 80 nm.

[0071] Step 4: After electrolysis, a gradient cooling process is performed at a rate of 50 °C / h. When the temperature drops to 250 °C, an O2 / Ar mixed gas is introduced, with an O2 volume fraction of 0.5%, and maintained for 20 min to allow an amorphous SiOx passivation layer with a thickness of approximately 3 nm to form in situ on the surface of the silicon particles, where x is 1.4. The temperature is then further gradient-cooled to room temperature to obtain an intrinsically low-expansion silicon anode material.

[0072] Structural characterization revealed that the material contains approximately 70 wt% amorphous silicon, with an average grain size of approximately 80 nm, pore sizes mainly ranging from 10 nm to 50 nm, and a porosity of approximately 20%. Based on the equation Y = -0.72X + 0.58D + 101.4, the expansion rate without considering the SiOx passivation layer is approximately 97.4%. Considering the SiOx passivation layer, based on the equation Y' = Y × (0.65–0.75), the actual expansion rate is approximately 63.3%–73.1%.

[0073] Example 2

[0074] A method for preparing a silicon anode material may include the following steps:

[0075] Step 1: Take industrial-grade silicon powder with a purity of 98.5% or higher, and remove impurities by acid washing with dilute hydrochloric acid. After acid washing, wash with deionized water until neutral, and dry under vacuum at 110℃ for 20 hours to obtain pretreated silicon powder.

[0076] Step 2: The pretreated silicon powder is added to the NaCl molten salt system, along with 5 wt% MgCl2 and 5 wt% LiCl as alloying materials. Using the pretreated silicon powder as the cathode and a graphite rod as the anode, the electrolysis temperature is controlled at 550 ℃, and a voltage of 2.2 V is applied and maintained for 1 h to allow silicon to undergo an alloying reaction with magnesium or lithium ions, generating Mg2Si and Li-Si alloy phases.

[0077] Step 3: After alloying, the electrode polarity is reversed, and the alloyed product is used as the anode for dealloying treatment, allowing the metal components in the second phase to preferentially dissolve and form a nanoporous structure. The first stage of dealloying uses a voltage of 1.9 V for 2.5 h; the second stage uses a 3.1 V high-voltage pulse for 0.5 h with a pulse duty cycle of 50%. The electrolytic current density in the first stage is controlled at 0.12 A / cm². 2 The electrolysis current density in the second stage is controlled at 0.30 A / cm². 2 To obtain porous silicon intermediates with an average grain size of approximately 160 nm.

[0078] Step 4: After dealloying, the temperature is gradually reduced at a rate of 75 °C / h. At 250 °C, an O2 / Ar mixture with a volume fraction of 0.3% is introduced and maintained for 15 min to form an amorphous SiOx passivation layer with a thickness of about 2~3 nm and an x ​​of about 1.3.

[0079] The resulting silicon anode material contains approximately 55 wt% amorphous silicon, with an average grain size of approximately 160 nm. According to the above formula, the expansion rate without a passivation layer is approximately 154.6%; after forming a SiOx passivation layer, the actual expansion rate is approximately 100.5%–116.0%. This material is suitable for composite anode systems that require both rate performance and structural stability.

[0080] Example 3

[0081] A method for preparing a silicon anode material may include the following steps:

[0082] Step 1: Use industrial-grade silicon powder with a purity of 98.5% or higher as the silicon source. Place the silicon powder in dilute nitric acid for impurity removal to remove metallic and oxide impurities from the surface. After acid washing, wash with deionized water until neutral, and dry under vacuum at 90°C for 15 hours to obtain pretreated silicon powder.

[0083] Step 2: The pretreated silicon powder was added to the NaCl molten salt system, and 14 wt% CaCl2 and 11 wt% SnCl2 were added as alloying raw materials. During the alloying stage, a voltage of 2.5 V was applied and maintained for 1.5 h to obtain a metallic alloy of Si with Ca and Sn.

[0084] Step 3: After alloying, the electrode polarity is reversed for dealloying to preferentially dissolve the metallic components in the alloy. The dealloying stage employs a two-stage electrolysis mode. The first stage uses a voltage of 2.1 V for 3 hours; the second stage uses a 3.5 V high-voltage pulse for 1 hour with a pulse duty cycle of 50%. The electrolysis current density in the first stage is controlled at 0.15 A / cm². 2 The electrolysis current density in the second stage is controlled at 0.30 A / cm². 2 A silicon material with an amorphous silicon content of approximately 65 wt% and an average grain size of approximately 120 nm was obtained.

[0085] Step 4: After electrolysis, a gradient cooling process is performed at a slow cooling rate of 25 °C / h. When the temperature drops to 300 °C, an O2 / Ar mixture with a volume fraction of 1% is introduced and maintained for 30 min. The mixture is then cooled to room temperature to obtain the intrinsically low-expansion silicon anode material.

[0086] Structural characterization revealed that the material contains approximately 65 wt% amorphous silicon, with an average grain size of approximately 120 nm, pore sizes primarily ranging from 10 nm to 50 nm, and a porosity of approximately 30%. An amorphous SiOx passivation layer with a thickness of approximately 5 nm and a x-coefficient of 1.6 was formed. Based on the aforementioned relationship, the expansion rate without the passivation layer was approximately 124.2%; after forming the SiOx passivation layer, the actual expansion rate was approximately 80.7%–93.2%. The resulting material is suitable for high-silicon content anode formulations.

[0087] Example 4

[0088] A method for preparing a silicon anode material may include the following steps:

[0089] Step 1: Take industrial-grade silicon powder with a purity of 98.5% or higher as the silicon source, remove impurities by acid washing with dilute hydrochloric acid, wash with deionized water until neutral after acid washing, and dry under vacuum at 90°C for 15 h to obtain pretreated silicon powder.

[0090] Step 2: The pretreated silicon powder was added to a LiCl-KCl mixed molten salt system, and 0.5 wt% LiCl was added as an alloying material. Alloying was carried out at 450 ℃. The alloying voltage was controlled at 2.0 V for 0.5 h.

[0091] Step 3: Subsequently, the electrode polarity is reversed for dealloying. The first stage of dealloying uses a 1.8 V voltage for 1 hour, and the second stage uses a 3.0 V high-voltage pulse treatment for 0.5 hours, with a pulse duty cycle of 50%. The electrolytic current density in the first stage is controlled at 0.08 A / cm². 2 The electrolysis current density in the second stage is controlled at 0.45 A / cm². 2 .

[0092] Step 4: After electrolysis, a gradient cooling rate of 100 ℃ / h is adopted, and an O2 / Ar mixed gas with an O2 volume fraction of 0.1% is introduced at 250 ℃ and maintained for 10 min. Then, it is cooled to room temperature to obtain intrinsic low expansion silicon anode material.

[0093] Structural characterization revealed that the material contains approximately 66 wt% amorphous silicon, with an average grain size of approximately 100 nm, forming an amorphous SiOx passivation layer with a thickness of approximately 2 nm and a x-coefficient of 1.2. Based on the aforementioned relationship, the expansion rate without the passivation layer is approximately 111.9%; after forming the SiOx passivation layer, the actual expansion rate is approximately 72.7%–83.9%. The resulting material is suitable for high-silicon-content anode formulations.

[0094] Example 5

[0095] A method for preparing a silicon anode material may include the following steps:

[0096] Step 1: Use industrial-grade silicon powder with a purity of 98.5% or higher as the silicon source. Place the silicon powder in dilute hydrochloric acid for impurity removal to remove metallic and oxide impurities from the surface. After acid washing, wash with deionized water until neutral, and dry under vacuum at 100°C for 8 hours to obtain pretreated silicon powder.

[0097] Step 2: The pretreated silicon powder was added to a NaCl molten salt system, and a mixture of 20 wt% KCl, MgCl2, and CaCl2 was added to the molten salt system. Alloying was performed at 650 °C, using silicon powder as the cathode and a graphite rod as the anode. The alloying voltage was 2.5 V, and the treatment time was 1.5 h.

[0098] Step 3: After alloying, the electrode polarity is reversed for dealloying. The first stage of dealloying uses a 2.2 V voltage for 3 hours, and the second stage uses a 3.5 V high-voltage pulse for 1 hour, with a pulse duty cycle of 50%. The electrolytic current density in the first stage is controlled at 0.15 A / cm². 2 The electrolysis current density in the second stage is controlled at 0.50 A / cm². 2 The higher second-stage current density promotes grain refinement, resulting in an average grain size of 75 nm for the obtained silicon material, with amorphous silicon accounting for approximately 70 wt%.

[0099] Step 4: After electrolysis, a gradient cooling rate of 50 ℃ / h is adopted, and an O2 / Ar mixture with an O2 volume fraction of 0.8% is introduced at 250 ℃ and maintained for 25 min to form an amorphous SiOx passivation layer with a thickness of approximately 4 nm. Then, it is cooled to room temperature to obtain an intrinsically low-expansion silicon anode material. Based on the above relationship, the expansion rate without the passivation layer is approximately 94.5%; after forming the SiOx passivation layer, the actual expansion rate is approximately 61.4%–66.2%.

[0100] Although the invention has been described above in conjunction with exemplary embodiments, those skilled in the art will understand that various modifications and changes can be made to the exemplary embodiments of the invention without departing from the spirit and scope defined by the claims.

Claims

1. A method for preparing a silicon anode material, characterized in that, Includes the following steps: Using silicon powder as the cathode and molten salt containing metal element M as the electrolyte, electrolysis is performed. After electrolysis, an alloy of silicon and metal M is obtained at the cathode, wherein M is selected from at least one of Mg, Li, Sn and Ca. Using an alloy of silicon and metal M as the anode, a porous silicon intermediate is obtained at the anode after at least two stages of molten salt electrolysis. After cooling to the predetermined temperature, oxygen-containing gas is introduced to grow amorphous SiO2 in situ on the surface of the porous silicon intermediate. X Passivation layer, cooled to room temperature, yields silicon anode material, wherein 1.2 ≤ x ≤ 1.

6.

2. The method for preparing silicon anode material according to claim 1, characterized in that, Porous silicon intermediates are obtained at the anode through two-stage molten salt electrolysis. The voltage of the first stage of molten salt electrolysis is 1.8 V to 2.2 V, and the electrolysis time is 1 h to 3 h. The voltage of the second stage of molten salt electrolysis is 3.0 V to 3.5 V, and the electrolysis time is 0.5 h to 1.0 h. The second stage of molten salt electrolysis is pulsed electrolysis with a pulse duty cycle of 45% to 55%.

3. The method for preparing silicon anode material according to claim 2, characterized in that, The current density for the first stage of molten salt electrolysis is controlled at 0.05 A / cm². 2 ~0.15 A / cm 2 The current density for the second stage of molten salt electrolysis is 0.3 A / cm². 2 ~0.5 A / cm 2 After the two-stage molten salt electrolysis is completed, the average grain size of the porous silicon intermediate is 50 nm to 200 nm.

4. The method for preparing silicon anode material according to claim 1, 2 or 3, characterized in that, In the step of obtaining the alloy of silicon and metal M, the voltage of electrolysis is 2.0 V to 2.5 V, and the electrolysis time is 0.5 h to 1.5 h.

5. The method for preparing silicon anode material according to claim 1, 2 or 3, characterized in that, The pores in the porous silicon intermediate are through pores and / or blind pores, with a pore size of 10 nm to 50 nm and a porosity of 15% to 30%.

6. The method for preparing silicon anode material according to claim 1, 2 or 3, characterized in that, The porous silicon intermediate has a core-shell structure, with the core being a composite of amorphous silicon and nanocrystalline silicon, and the shell being a nanocrystalline silicon layer. Amorphous silicon accounts for 40 wt% to 80 wt% of the porous silicon intermediate, and the average size of the nanocrystalline silicon in the nanocrystalline silicon layer is 50 nm to 80 nm.

7. The method for preparing silicon anode material according to claim 1, 2 or 3, characterized in that, Amorphous SiO X The thickness of the passivation layer is 2 nm to 5 nm.

8. The method for preparing silicon anode material according to claim 1, 2 or 3, characterized in that, In the step of obtaining silicon anode material, the temperature is reduced to 200℃~300℃ at a cooling rate of 25℃ / h~100℃ / h, and a mixture of oxygen and inert gas is introduced and maintained for 10 min~30 min to allow in-situ growth of amorphous SiO on the surface of the porous silicon intermediate. X Passivation layer.

9. A silicon anode material, characterized in that, Including the silicon substrate and the amorphous SiO2 coating on the surface of the silicon substrate. X Passivation layer, wherein amorphous SiO X The passivation layer has a thickness of 2 nm to 5 nm and 1.2 ≤ x ≤ 1.

6.

10. A lithium-ion battery, characterized in that, The silicon anode material includes the silicon anode material prepared by the silicon anode material preparation method according to any one of claims 1 to 8, or the silicon anode material according to claim 9.

Images