An automatic bypass design for terminal power distribution voltage regulating device

Abstract

The application relates to the technical field of low-voltage power distribution, and discloses an automatic bypass design for a terminal power distribution voltage regulating device, which comprises a bypass double-switch unit, an MCU state detection module and a double-switch automatic bypass hardware circuit. The thyristor and the magnetic latching relay are matched with each other, so that the bypass function can be automatically and quickly realized when a fault occurs in the equipment running process; the design realizes millisecond-level automatic bypass of the terminal power distribution voltage regulating device, and the bypass switching is seamlessly realized by using the strong impact resistance of the thyristor. Meanwhile, the design realizes real-time detection of the running state of the master control chip by using a PWM detection circuit, and the bypass switching is automatically realized when the chip is abnormal, so that the reliability of the system is improved.

Description

Technical Field

[0001] This invention relates to the field of low-voltage power distribution technology, and in particular to an automatic bypass design for a terminal power distribution voltage regulating device. Background Technology

[0002] With rapid economic growth in recent years and the booming development of urban villages and peri-urban areas, rural electricity demand has surged. The contradiction between the power supply capacity of rural power distribution networks and the rapidly increasing demand has become increasingly prominent, leading to frequent low-voltage problems that severely affect users' normal electricity use and pose a serious challenge to power supply reliability. Furthermore, in remote mountainous areas, low-voltage problems are also increasing due to factors such as higher residential electricity consumption levels, excessively long power lines, and excessively thin power lines. Therefore, more and more end-user voltage regulating devices are being used to improve voltage for end users.

[0003] Typical terminal power distribution voltage regulating devices employ a series voltage regulation scheme, connecting the power supply lines in series. This places extremely high demands on the reliability of the voltage regulating device. If the device malfunctions or requires maintenance, the power supply line must be disconnected before operation can proceed, leading to power outages for downstream users and severely impacting their normal production and daily lives. This is particularly problematic in locations with high requirements for power continuity, such as hospitals, small factories, and essential household power supplies; power outages not only cause economic losses but can also pose safety hazards. Therefore, ensuring the normal voltage regulation function of the terminal power distribution voltage regulating device while guaranteeing continuous power supply to downstream users during device malfunctions or maintenance has become a critical issue that urgently needs to be addressed in the design of current terminal power distribution voltage regulating devices. Traditional bypass designs often rely on relay-controlled contactors, resulting in slow response times. Zero-crossing detection is required during bypass, but due to inconsistencies in device parameters, the zero-crossing control effect is poor, leading to frequent contactor switching under load and significantly reduced lifespan. Furthermore, this design depends on the reliability of the MCU (Microcontroller Unit). If the MCU experiences hardware failure or program malfunction, it cannot effectively control the contactor bypass in a timely manner, causing the bypass unit to fail and resulting in prolonged power outages for the distribution lines. Summary of the Invention

[0004] This invention addresses the shortcomings and defects of existing technologies by providing an automatic bypass design for end-point power distribution voltage regulation devices. Utilizing a dual-switch design of thyristors and magnetically latched relays, it achieves rapid response and seamless real-time bypass. The thyristors withstand surge impacts during bypass, and there is no surge current when the relays are closed. Simultaneously, the MCU monitoring unit monitors the MCU's operating status in real time, ensuring instantaneous bypass in case of MCU malfunctions, thus improving the device's reliability.

[0005] The objective of this invention can be achieved through the following technical solutions.

[0006] An automatic bypass design for a terminal power distribution voltage regulating device includes control of thyristors and magnetically latched relays by an MCU. When the device is operating normally, the MCU controls the thyristors and magnetically latched relays to be in the open state, and the device operates in voltage-boosting mode. When an abnormality occurs, the MCU controls the thyristors and magnetically latched relays to close sequentially, and the device enters bypass mode. During this process, the MCU monitoring unit monitors the MCU's operating status in real time. When an abnormality is detected, the MCU monitoring unit sends a control signal to the bypass control unit, which then sends a pulse signal to control the thyristors and magnetically latched relays to close, and the device enters bypass mode.

[0007] Furthermore, the invention specifically includes the following steps:

[0008] S1, the MCU determines whether the device is normal and gives different instructions according to the device status;

[0009] S2, when the device can lift the pressure normally, the MCU sends a control signal to keep the thyristor and the magnetic latching relay disconnected. The thyristor and the magnetic latching relay remain disconnected, and the device works in voltage regulation mode.

[0010] S3, when the device cannot raise the pressure normally, the MCU sends a control signal to control the thyristor and the magnetic latching relay to close. The thyristor and the magnetic latching relay close in sequence, and the device works in voltage regulation mode.

[0011] S4, the MCU monitoring unit monitors the feedback signal of the MCU in real time, determines whether the MCU is in normal working condition, and makes different instructions to the bypass control unit according to the working condition of the MCU;

[0012] S5, when the MCU monitoring unit detects that the MCU is working normally, the MCU monitoring unit maintains a high-level signal to the bypass control unit, the bypass control unit does not act, the thyristor and magnetic latching relay are controlled by the MCU, and the MCU control state is maintained;

[0013] S6. When the MCU monitoring unit detects an abnormal MCU operation, the MCU monitoring unit sends a low-level signal to the bypass control unit. The bypass control unit then sends a pulse signal to control the thyristor and the magnetic latching relay to close. The thyristor and the magnetic latching relay close sequentially, and the device operates in bypass mode.

[0014] Beneficial technical effects of the present invention:

[0015] This invention utilizes the interplay of thyristors and magnetically latched relays to automatically and rapidly bypass faults during equipment operation, achieving millisecond-level automatic bypass for end-point power distribution voltage regulation devices. The high impact resistance of thyristors allows for seamless bypass switching at any time. Simultaneously, an MCU monitoring circuit monitors the main control chip's operating status in real time, and automatically bypasses the chip instantly in case of an anomaly, avoiding reliance on the MCU for the bypass function and significantly improving system reliability. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the circuit principle of the present invention.

[0017] Figure 2 This is a schematic diagram of the circuit control process of the present invention.

[0018] Figure 3 This is a schematic diagram of the MCU monitoring unit and bypass control unit of the present invention. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and do not limit the scope of the invention.

[0020] Example:

[0021] like Figure 1 The diagram shows the circuit principle of this invention. The circuit mainly consists of an MCU unit, a thyristor unit, a magnetic latching relay unit, an MCU status monitoring unit, and a bypass control unit. The thyristor unit and the magnetic latching relay unit are connected in parallel with the voltage-raising section and then in series in the circuit. After the thyristor and the magnetic latching relay are closed, the device enters the bypass state. Due to the excellent surge protection capability of the thyristor, before the magnetic latching relay unit closes, the thyristor unit is controlled to close first, ensuring no voltage across the magnetic latching relay before controlling its closure. This eliminates surge impact when the magnetic latching relay closes, significantly improving its lifespan. Under normal conditions, the thyristor unit and the magnetic latching relay unit are controlled by the MCU unit. When the MCU status monitoring unit determines that the MCU unit is malfunctioning, the bypass control unit controls the thyristor unit and the magnetic latching relay unit to close, achieving bypass. The MCU monitoring unit monitors the MCU status using PWM signals emitted by the MCU.

[0022] An automatic bypass design for a terminal power distribution voltage regulating device includes the following steps:

[0023] S1, the MCU determines whether the device is normal and gives different instructions according to the device status;

[0024] S2, when the device can lift the pressure normally, the MCU sends a control signal to keep the thyristor and the magnetic latching relay disconnected. The thyristor and the magnetic latching relay remain disconnected, and the device works in voltage regulation mode.

[0025] S3, when the device cannot raise the pressure normally, the MCU sends a control signal to control the thyristor and the magnetic latching relay to close. The thyristor and the magnetic latching relay close in sequence, and the device works in voltage regulation mode.

[0026] S4, the MCU monitoring unit monitors the feedback signal of the MCU in real time, determines whether the MCU is in normal working condition, and makes different instructions to the bypass control unit according to the working condition of the MCU;

[0027] S5, when the MCU monitoring unit detects that the MCU is working normally, the MCU monitoring unit maintains a high-level signal to the bypass control unit, the bypass control unit does not act, the thyristor and magnetic latching relay are controlled by the MCU, and the MCU control state is maintained;

[0028] S6. When the MCU monitoring unit detects an abnormal MCU operation, the MCU monitoring unit sends a low-level signal to the bypass control unit. The bypass control unit then sends a pulse signal to control the thyristor and the magnetic latching relay to close. The thyristor and the magnetic latching relay close sequentially, and the device operates in bypass mode.

[0029] like Figure 3 The diagram shown is a schematic diagram of the MCU monitoring unit and bypass control unit of the present invention.

[0030] The MCU status monitoring unit receives a PWM signal with a fixed frequency and duty cycle output by the MCU. The default signal frequency is 1kHz. When the PWM signal is normal, the MCU monitoring unit outputs a high level to the bypass control unit, and the bypass control unit maintains a low output level. When the PWM signal stops, the MCU monitoring unit outputs a low voltage to the bypass control unit, and the bypass control unit outputs a pulse control signal to the thyristor unit and the magnetic latching relay unit, controlling them to close sequentially.

[0031] The bypass control unit receives high and low level signals output from the MCU monitoring unit. This unit consists of transistors, resistors, capacitors, diodes, buffers, and other components. The transistor base is connected to the MCU status monitoring unit, the transistor emitter is connected to GND, and the transistor collector is connected to the power supply through a pull-up resistor. The control pulse signal is extracted by a capacitor and output to the thyristor unit and the magnetic latching relay unit via a buffer. When the MCU PWM signal output is normal, the MCU monitoring unit outputs a high level, the transistor collector is pulled low, and the bypass control unit has no output signal. When the MCU PWM signal output is abnormal, the MCU monitoring unit outputs a low signal that is momentarily pulled up, and a short-lived high-level pulse signal is output through a capacitor. This pulse signal, after passing through a buffer, controls the magnetic latching relay unit and the thyristor unit to close the bypass, and the device automatically switches to bypass mode.

[0032] The above embodiments are descriptions of specific implementations of the present invention, and not limitations thereof. Those skilled in the art can make various modifications and changes without departing from the spirit and scope of the present invention to obtain corresponding equivalent technical solutions. Therefore, all equivalent technical solutions should be included in the patent protection scope of the present invention.

Claims

1. An automatic bypass design for a terminal power distribution voltage regulating device, characterized in that, It comprises an MCU unit, a magnetic latching relay unit, a thyristor unit, an MCU status monitoring unit, and a bypass control unit. The magnetic latching relay unit and the thyristor unit are connected in series in the power distribution line and in parallel with the voltage regulating equipment. During bypass, the thyristor unit closes first to resist the surge impact during closing, and the magnetic latching relay unit closes stably after the thyristor closes. The MCU status monitoring unit monitors the PWM signal output by the MCU in real time. If the MCU fails, the PWM signal output stops, and the MCU status monitoring unit feeds back an abnormal signal to the bypass control unit. The bypass control unit will then send a pulse signal to control the thyristor module and the magnetic latching relay unit to close sequentially.

2. The automatic bypass design for a terminal power distribution voltage regulating device according to claim 1, characterized in that, The MCU unit acts as the main controller; when the MCU is working normally, it sends signals to open and close the thyristor and magnetic latching relay to control the device to enter and exit bypass mode.

3. The automatic bypass design for a terminal power distribution voltage regulating device according to claim 1, characterized in that, The thyristor unit enables pre-bypass and is connected in series with the magnetic latching relay in the power distribution line. When the equipment malfunctions, the thyristor unit closes quickly, and the equipment automatically switches to bypass mode. The thyristor module disconnects when the next power frequency cycle crosses zero. The thyristor unit has strong impact resistance, ensuring the reliability of the equipment when closed.

4. The automatic bypass design for a terminal power distribution voltage regulating device according to claim 1, characterized in that, The magnetic latching relay unit enables long-term bypass and is connected in series with the thyristor in the power distribution circuit. When the equipment malfunctions, the magnetic latching relay closes 15ms after the thyristor unit closes to maintain the bypass mode and reduce bypass losses.

5. An automatic bypass design for a terminal power distribution voltage regulating device according to claim 1, characterized in that, The MCU status monitoring unit detects the PWM signal emitted by the MCU in real time, with a signal frequency of 1kHz. When the PWM signal is normal, the unit outputs a high level to the bypass control unit, and the bypass control unit outputs a low level; when the PWM signal stops, the unit outputs a low voltage to the bypass control unit, and the bypass control unit outputs a pulse control signal.

6. An automatic bypass design for a terminal power distribution voltage regulating device according to claim 1, characterized in that, The bypass control unit controls the operating status of the thyristor unit and the magnetic latching relay unit. This unit is composed of transistors, resistors, capacitors, diodes, buffers, and other components. The transistor base is connected to the MCU status monitoring unit, the transistor emitter is connected to GND, and the transistor collector is connected to the power supply via a pull-up resistor. The control pulse signal is extracted by the capacitor and output to the thyristor unit and the magnetic latching relay unit via the buffer. When the MCU PWM signal output is normal, the MCU monitoring unit outputs a high level, the transistor collector is pulled low, and the bypass control unit has no output signal. When the MCU PWM signal output is abnormal, the MCU monitoring unit outputs a low signal followed by a momentary pull-up, which, through the capacitor, outputs a short-duration high-level pulse signal. This pulse signal, through the buffer, controls the magnetic latching relay unit and the thyristor unit to close the bypass, and the device automatically switches to bypass mode.

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